TW201242252A - Output input interface apparatus and voltage level shifter thereof - Google Patents

Output input interface apparatus and voltage level shifter thereof Download PDF

Info

Publication number
TW201242252A
TW201242252A TW100112060A TW100112060A TW201242252A TW 201242252 A TW201242252 A TW 201242252A TW 100112060 A TW100112060 A TW 100112060A TW 100112060 A TW100112060 A TW 100112060A TW 201242252 A TW201242252 A TW 201242252A
Authority
TW
Taiwan
Prior art keywords
voltage
signal
circuit
input signal
reference voltage
Prior art date
Application number
TW100112060A
Other languages
Chinese (zh)
Inventor
Shao-Chang Huang
Kun-Wei Chang
Mao-Shu Hsu
Tang-Lung Lee
Wei-Yao Lin
Lin-Fwu Chen
Hsin-Chou Liu
Original Assignee
Ememory Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ememory Technology Inc filed Critical Ememory Technology Inc
Priority to TW100112060A priority Critical patent/TW201242252A/en
Publication of TW201242252A publication Critical patent/TW201242252A/en

Links

Landscapes

  • Logic Circuits (AREA)

Abstract

A voltage level shifter for receiving an input signal and shift a voltage level thereof to generate an output signal at an output terminal is disclosed. The voltage level shifter includes a path circuit, an inverting circuit and a voltage pull circuit. The path circuit receives the input signal and a first reference voltage and turning on or off a connection between the output terminal and the path circuit. The input signal is a digital signal transited between a ground voltage and a second reference voltage. The inverting circuit receives and converts the input signal to generate a control signal transited between the ground voltage and the first reference voltage. The voltage pull circuit receives the first reference voltage and the control signal for pulling the output signal to the first reference voltage.

Description

201242252 uyy〇i2 37081twf.doc/I 六、發明說明: 【發明所屬之技術領域】 本發明是有關於一種電壓準位轉移器以及應用電壓 準位轉移器所組成的輸出輸入介面裝置。 【先前技術】 在電子技術突飛猛進的今天,同時具有多種功能的整 合性電子產品成為市場追逐的焦點。為了在單一產品中達 成多樣的功能,在不同的工作電壓範圍間進行切換是此類 產品所需要的基本技術。而用來進行這個工作電壓範圍的 轉換的主角’則疋所謂的電壓準位轉移器(voltage level shifter)。 請參見圖1,圖1繪示習知的電壓準位轉移器100的 示意圖。電壓準位轉移器1〇〇包括由電晶體MP1〜MP3以 及MN1〜MN3所構成。電壓準位轉移器1〇〇接收工作在參 考電壓VDD及接地電壓GND間的輸入信號IN,並轉換 輸入信號IN以產生在參考電壓VCC及接地電壓GND間 工作的輸出信號OUT(其中的參考電壓VCC與VDD的電201242252 uyy〇i2 37081twf.doc/I VI. Description of the Invention: [Technical Field] The present invention relates to an output input interface device comprising a voltage level shifter and an applied voltage level shifter. [Prior Art] In today's rapid advancement in electronic technology, integrated electronic products with multiple functions have become the focus of market pursuit. In order to achieve a wide range of functions in a single product, switching between different operating voltage ranges is a basic technology required for such products. The principal angle ' used to perform the conversion of this operating voltage range is the so-called voltage level shifter. Please refer to FIG. 1. FIG. 1 is a schematic diagram of a conventional voltage level shifter 100. The voltage level shifter 1A is composed of transistors MP1 to MP3 and MN1 to MN3. The voltage level shifter 1 receives an input signal IN between the reference voltage VDD and the ground voltage GND, and converts the input signal IN to generate an output signal OUT (the reference voltage between the reference voltage VCC and the ground voltage GND) VCC and VDD

壓準位不相同)。其中,當輸入信號IN等於接地電壓GND 時’電晶體MN3接收由電晶體MP1及MN1構成的反向 器的輸出(等於參考電壓VDD)而導通,同時,輸出信號 OUT透過導通的電晶體MN3被拉低為等於接地電壓 GND。 相反的,當當輸入信號IN等於參考電壓VDD時,電 4 201242252The pressure level is not the same). Wherein, when the input signal IN is equal to the ground voltage GND, the transistor MN3 receives the output of the inverter composed of the transistors MP1 and MN1 (equal to the reference voltage VDD) and is turned on, and at the same time, the output signal OUT is transmitted through the turned-on transistor MN3. Pull low to be equal to the ground voltage GND. Conversely, when the input signal IN is equal to the reference voltage VDD, the power 4 201242252

099012 37081twf.doc/I 晶體MN2等於參考電壓vDD的輸入信號IN而導通,並 且’電晶體MP3的閘極因電晶體MN2導通而被拉低至等 於接地電壓GND,並據以被導通。此時,輸出信號〇υτ 透過導通的電晶體MP3被拉高而為等於參考電壓 VCC。 上述的電壓準位轉移器100雖可以有效的達成信號間 的電壓工條15的轉移,然卻需要六顆電㈣方能有效動 作在電路佈局上,需要佔去不小的面積,無形中增加電 路的生產成本。另外’電壓準位轉移器因需要透過交 合的電晶體MP2及MP3來拉升輸出信號〇υτ的電 埜,造成其轉態速度受到限制。 【發明内容】 的發明提供—㈣壓準位轉移11,用關整輸入信號 的電壓擺幅以產生具餘低魏擺㈣輸出信號。 ,發明提供-種電鮮位轉移器,用關整輸入信號 的電壓擺幅以產生具有較高電壓擺幅的輸出信號 本發賴供—缝_人介岭置,雜具有較高電 =中田的外部信號來產生具有較低電壓擺幅的内部輸入作 =或調整具有較低賴擺幅的内部輸出信號來產生具^ 車乂向電壓擺幅的外部信號。 本發明提出—種電壓準位轉移器,用以接收並轉 。號的電壓準位以在輸㈣產生輪^信號。電壓準位轉 I器包括通路電路、反向電路以及拉升電路。通路電路耦 接至輸出端,用以接收輸入信號以及第一參考電壓,並依099012 37081twf.doc/I The crystal MN2 is turned on equal to the input signal IN of the reference voltage vDD, and the gate of the transistor MP3 is pulled down to be equal to the ground voltage GND due to the conduction of the transistor MN2, and is thereby turned on. At this time, the output signal 〇υτ is pulled high through the turned-on transistor MP3 to be equal to the reference voltage VCC. Although the above-mentioned voltage level shifter 100 can effectively achieve the transfer of the voltage bar 15 between signals, it requires six electric (four) to effectively operate on the circuit layout, and needs to occupy a large area, which is invisibly increased. The production cost of the circuit. In addition, the voltage level shifter is required to pull up the electric field of the output signal 〇υτ through the intersecting transistors MP2 and MP3, so that the transition speed is limited. SUMMARY OF THE INVENTION The invention provides - (iv) a pressure level shift 11 for closing the voltage swing of the input signal to produce a low Wei (s) output signal. The invention provides a kind of electric fresh-position transfer device, which uses the voltage swing of the input signal to generate an output signal with a higher voltage swing, which is provided by the supply-seam_human Jieling, and has a higher electric power = Zhongtian The external signal is used to generate an internal input with a lower voltage swing = or to adjust an internal output signal with a lower slew to generate an external signal with a vehicle-to-voltage swing. The invention proposes a voltage level shifter for receiving and transferring. The voltage level of the number is used to generate the round signal at the input (four). The voltage level converter includes a path circuit, a reverse circuit, and a pull-up circuit. The path circuit is coupled to the output terminal for receiving the input signal and the first reference voltage, and

201242252 099012 37081 twf.doc/I 據輸入信號以及第一參考電壓以導通或斷開與輸出端的連 接。其中,輸入信號為在接地電壓以及第二參考電壓間轉 態的數位信號,且第一參考電壓的電壓準位小於第二參考 電壓的電壓準位。反向電路接收輸入信號,並反向輸入信 號且轉換輸入信號為在接地電壓以及第一參考電壓間轉態 的數位信號以產生控制信號。拉升電路耦接通路電路以及 反向電路。拉升電路接收第一參考電壓與控制信號,並依 據控制信號來拉升輸出信號至第一參考電壓。 本發明另提出一種電壓準位轉移器,接收並轉移輸^ 乜唬的電壓準位以在輸出端產生輸出信號。電壓準位轉孝 器包括通路電路、反向電路以及拉升電路。通路電路綱 至輸出端,用以接收輸入信號以及第一參考電壓,依據秦 入信號以調整通路電路與輸出端間的等效阻抗。其中,赛 入信號為在接地電壓以及第—參考電壓間轉態的、數位# 號。反向電路_至通路電路,接收輸人信號以及第二屬 考電壓。反向電路並轉換輸人信號為在接地賴以二 參考電壓間轉態的數位信號以產生控制信號。其中,第二 參考電>1的電壓雜大於第—參考電壓的電壓準位。 電,搞接通路電路以及反向電路,接收第二參考電壓與控 制#號’依據控制信號來拉升輸出信號至第二參考電壓。 树日聽㈣路魏綠騎域號的電 ^位以傳輸或阻隔將輸人信號傳送至輸出端的路徑,並 反向電路來依據輸人信號的電壓準位以產生 號’再透過拉升電路來在輸人信號傳送至輸出端的職被 6 201242252201242252 099012 37081 twf.doc/I Connects to the output according to the input signal and the first reference voltage. The input signal is a digital signal that is transitioned between the ground voltage and the second reference voltage, and the voltage level of the first reference voltage is less than the voltage level of the second reference voltage. The inverting circuit receives the input signal and inverts the input signal and converts the input signal to a digital signal that transitions between the ground voltage and the first reference voltage to generate a control signal. The pull-up circuit is coupled to the path circuit and the reverse circuit. The pull-up circuit receives the first reference voltage and the control signal, and pulls the output signal to the first reference voltage according to the control signal. The invention further provides a voltage level shifter that receives and transfers the voltage level of the input to generate an output signal at the output. The voltage level thief includes a path circuit, a reverse circuit, and a pull-up circuit. The path circuit is connected to the output terminal for receiving the input signal and the first reference voltage, and adjusting the equivalent impedance between the path circuit and the output terminal according to the Qin input signal. Among them, the race signal is the digit ## between the ground voltage and the first reference voltage. The reverse circuit _ to the path circuit receives the input signal and the second reference voltage. The reverse circuit converts the input signal into a digital signal that is grounded between two reference voltages to generate a control signal. The voltage of the second reference circuit > 1 is greater than the voltage level of the first reference voltage. The electric circuit is connected to the path circuit and the reverse circuit, and receives the second reference voltage and the control ## to pull up the output signal to the second reference voltage according to the control signal. The tree is used to transmit or block the path of the input signal to the output, and the reverse circuit is used to generate the number 're-transmission circuit according to the voltage level of the input signal. Come to the job in the input signal to the output 6 6 201242252

099012 37081twf.doc/I 隔時’拉升輸出端的電壓準位賴需的參考電壓(第 壓參考電壓),並藉以使所產生的輸出信號的電 準,偏移至所需的電塵準位。本發明所提供的電壓準 位轉移减需使用少數的電晶體數量,有效節省電路面積。 為讓本發明之上述特徵和優點能更明顯易懂,下文特 舉實施例’並配合所附圖式作詳細說明如下。 ’ 【實施方式】 请參照圖2,圖2繪示本發明一實施例的電壓準位轉 移器200的示意圖。電壓準位轉移器2〇〇包括通路電路 210、反向電路220以及拉升電路23〇。其中,電壓準位轉 移器200接收輸入信號ΙΝ並藉由轉移輸入信號m的電壓 準位來在電壓準位轉移器2〇〇的輸出端〇τ產生輸出信號 OUT。在本實施例中,輸入信號ΙΝ為在參考電壓VCC及 接地電壓GND間轉態的數位信號,而輸出信號〇υτ則為 在參考電壓VDD及接地電壓GND間轉態的數位信號。並 且,參考電壓VDD的電壓準位小於參考電壓vcc的電壓 準位。 通路電路210耗接至電壓準位轉移器2〇〇的輸出端 OT,並接收輸入彳§號IN以及參考電壓VDD。通路電路210 依據所接收的輸入信號IN以及參考電壓VDD以導通或斷 開與輸出端OT的連接。也就是說,當通路電路21〇依據 輸入信號IN以及參考電壓VDD而導通時,輸入信號IN 會透過通路電路210傳送至輸出端〇τ上成為輸出信號 201242252099012 37081twf.doc/I When the voltage level of the output terminal is pulled up, the reference voltage (the voltage reference voltage) is required, and the level of the generated output signal is shifted to the required electric dust level. . The voltage level transfer provided by the present invention reduces the need to use a small number of transistors, thereby effectively saving circuit area. The above described features and advantages of the present invention will become more apparent from the description of the appended claims. [Embodiment] Please refer to FIG. 2. FIG. 2 is a schematic diagram of a voltage level shifter 200 according to an embodiment of the present invention. The voltage level shifter 2 includes a path circuit 210, a reverse circuit 220, and a pull-up circuit 23A. The voltage level shifter 200 receives the input signal ΙΝ and generates an output signal OUT at the output terminal 〇τ of the voltage level shifter 2〇〇 by shifting the voltage level of the input signal m. In this embodiment, the input signal ΙΝ is a digital signal that transitions between the reference voltage VCC and the ground voltage GND, and the output signal 〇υτ is a digital signal that transitions between the reference voltage VDD and the ground voltage GND. Moreover, the voltage level of the reference voltage VDD is less than the voltage level of the reference voltage vcc. The path circuit 210 is drained to the output terminal OT of the voltage level shifter 2A, and receives the input 彳§IN and the reference voltage VDD. The path circuit 210 turns on or off the connection with the output terminal OT in accordance with the received input signal IN and the reference voltage VDD. That is, when the path circuit 21 is turned on according to the input signal IN and the reference voltage VDD, the input signal IN is transmitted through the path circuit 210 to the output terminal 〇τ to become an output signal 201242252

uyyuiz 37081twf.doc/I OUT。相反的,當通路電路210依據輸入信號IN以及參 考電壓VDD而斷開時’輸出端〇τ上的輸出信號out會 由拉升電路230來決定。 反向電路220搞接在通路電路210以及拉升電路230 之間。反向電路220接收輸入信號IN,反向並轉換輸入信 號IN為在接地電壓GND以及參考電壓VDD間轉態的數 位信號’藉以產生控制信號CTRL。 拉升電路230則耦接通路電路210以及反向電路 220,並耦接至輸出端OT。拉升電路230接收參考電壓 VDD與控制信號CTRL,並依據控制信號CTRL來決定是 否拉升輸出端OT上的輸出信號0UT為等於參考電壓 VDD具體點來說明,當輸入信號IN等於參考電壓vcc 時,反向電路220對應產生等於接地電壓GND的控制信 號CTRL。拉升電路230接收到等於接地電壓GND的控制 信號CTRL時’則拉升其所連接的輸出端〇τ上的輸出信 ,out至等於參考電壓VDD。相反的,若是輸入信號取 等於接地電壓GND時,反向電路22〇對應產生等於參考 電壓VDD的控制信號CTRL。拉升電路230接收到等於參 考,壓VDD的控制信號CTRL時,則停止工作(不拉升輪 出4 οτ的輸出號out)。而在此同時,由於通路電路 210直接傳送等於接地電壓GND的輸人信號IN至輸出端 〇Τ,因此,輸出信號OUT等於接地電壓GND。 以I舉一個實際的範例來說明電壓準位轉移器2 0 〇的 動作細節。轉考電壓VDD為3.3伏特(Volts,V)而參考電 8 201242252 099012 37081twf.doc/l 壓VCC為6V為範例’當輸入信號IN等於接地電壓 GND(OV)時,通路電路21〇導通輸入信號m與輸出端〇丁 的連接巧將所接㈣輸人㈣IN直接傳送至輸出端 OT。也就疋s兒,當輸入信號IN等於接地電壓GND時,輸 出仏號〇UT同樣等於接地電壓GND(OV)。附帶一提的, 反向電路220此時產生等於3 3V的控制信號CTRL,而拉 升電路230接收等於3 3V的控制信號CTRL並不對輪出端 〇Τ的輸出信號ουτ進行拉升。也就是此時的輸出信號 0UT等於接地電壓GND(OV)。 相反的’在當輸入信號IN等於參考電壓VCC(6V)時, 通路電路210斷開輸入信號IN與輸出端〇τ的連接。而在 此同時,反向電路220此時產生等於〇ν的控制信號 CTRL ’拉升電路230接收等於ον的控制信號CTRL,並 對輸出端OT的輸出信號ουτ進行拉升,使輸出信號〇υτ 被拉升至等於參考電壓VDD(3.3V)。 值得注意的是,在本實施例的電壓準位轉移器2〇〇 中,通路電路210可利用通路電晶體MN21來建構,其中 通路電晶體MN21的控制端(閘極)接收參考電壓VDd,其 第一端(源極或汲極)接收輸入信號IN,其第二端(汲極或源 極)則耦接至輸出端〇Τ。反向電路22〇則由反向電晶體 MP21及MN22串接在參考電壓VDd及接地電壓GND間 構成。其中,反向電晶體MP21及MN22的控制端(閘極) 共同接收輸入信號IN。並且,拉升電路230則由拉升電晶 體MP22建構,其控制端(閘極)接收控制信號CTRL,其第Uyyuiz 37081twf.doc/I OUT. Conversely, when the path circuit 210 is turned off in accordance with the input signal IN and the reference voltage VDD, the output signal out at the output terminal 〇τ is determined by the pull-up circuit 230. The reverse circuit 220 is coupled between the path circuit 210 and the pull-up circuit 230. The inverting circuit 220 receives the input signal IN and reverses and converts the input signal IN to a digital signal of a transition between the ground voltage GND and the reference voltage VDD to generate a control signal CTRL. The pull-up circuit 230 is coupled to the path circuit 210 and the reverse circuit 220 and coupled to the output terminal OT. The pull-up circuit 230 receives the reference voltage VDD and the control signal CTRL, and determines whether to pull up the output signal OUT on the output terminal OT to be equal to the reference voltage VDD specific point according to the control signal CTRL, when the input signal IN is equal to the reference voltage vcc The reverse circuit 220 correspondingly generates a control signal CTRL equal to the ground voltage GND. When the pull-up circuit 230 receives the control signal CTRL equal to the ground voltage GND, it pulls up the output signal on the connected output terminal 〇τ, which is equal to the reference voltage VDD. Conversely, if the input signal is equal to the ground voltage GND, the inverting circuit 22A correspondingly generates a control signal CTRL equal to the reference voltage VDD. When the pull-up circuit 230 receives the control signal CTRL equal to the reference and the voltage VDD, the operation is stopped (the output number out of the 4 οτ is not pulled up). At the same time, since the path circuit 210 directly transmits the input signal IN equal to the ground voltage GND to the output terminal 〇Τ, the output signal OUT is equal to the ground voltage GND. I will give a practical example to illustrate the details of the action of the voltage level shifter 2 0 。. The conversion voltage VDD is 3.3 volts (Volts, V) and the reference power 8 201242252 099012 37081 twf.doc / l voltage VCC is 6V as an example 'When the input signal IN is equal to the ground voltage GND (OV), the path circuit 21 turns on the input signal The connection between m and the output terminal is to directly transfer the connected (four) input (four) IN to the output terminal OT. In other words, when the input signal IN is equal to the ground voltage GND, the output 〇 〇UT is also equal to the ground voltage GND (OV). Incidentally, the reverse circuit 220 generates a control signal CTRL equal to 3 3 V at this time, and the pull-up circuit 230 receives a control signal CTRL equal to 3 3 V and does not pull up the output signal ο τ of the wheel terminal 〇Τ. That is, the output signal 0UT at this time is equal to the ground voltage GND (OV). In contrast, when the input signal IN is equal to the reference voltage VCC (6V), the path circuit 210 disconnects the input signal IN from the output terminal 〇τ. At the same time, the reverse circuit 220 generates a control signal CTRL' equal to 〇ν at this time, and the pull-up circuit 230 receives the control signal CTRL equal to ον, and pulls up the output signal ουτ of the output terminal OT to make the output signal 〇υτ It is pulled up to be equal to the reference voltage VDD (3.3V). It should be noted that, in the voltage level shifter 2A of the embodiment, the path circuit 210 can be constructed by using the via transistor MN21, wherein the control terminal (gate) of the via transistor MN21 receives the reference voltage VDd, The first end (source or drain) receives the input signal IN, and the second end (drain or source) is coupled to the output terminal 〇Τ. The reverse circuit 22 is composed of a reverse transistor MP21 and MN22 connected in series between the reference voltage VDd and the ground voltage GND. The control terminals (gates) of the reverse transistors MP21 and MN22 collectively receive the input signal IN. Moreover, the pull-up circuit 230 is constructed by the pull-up battery MP22, and its control terminal (gate) receives the control signal CTRL, which is

201242252 099012 37081twf.doc/I 一端(源/汲極)及第二端(汲/源極)則分別耦接至參考電壓 VDD以及輸出端〇τ。另外,在本實施例中,通路電晶體 MN21及反向電晶體MN22為N型的金氧半場效電晶體, 而反向電晶體MP21及拉升電晶體Mp22則為p型的金氧 半場效電晶體。 綜合上述的說明’本實施例的電壓準位轉移器2〇〇可 將在接地電壓GND(〇V)到參考電壓VCC(6V)間轉態的輸 入信號IN,進行電壓準位的轉移,並產生在接地電壓 GND(OV)到參考電壓VDD(3 3V)間轉態的輸出信號 OUT。本實施例的電壓準位轉移器200僅需要四個電晶體 來建構,有效節省成本。並且,本實施例的電壓準位轉移 器200可利用拉升電晶體MP22的導通來直接拉升輸出信 號out至參考電壓VDD,有效減低輸出信號〇υτ所需^ 轉態時間。 以下δ月參照圖3,圖3繪示本發明另一實施例的電壓 準位轉移器300的示意圖。電壓準位轉移器3〇〇包括通路 電路310、反向電路320以及拉升電路330。電壓準位轉移 器3 00接收並轉移輸入信號ΙΝ的電壓準位以在輸出端〇 τ 產生輸出信號0UT。其中的輸入信號ΙΝ為在參考電壓 VDD及接地電壓GND間轉態的數位信號,而輸出信號 out則為在參考電壓vcc及接地電壓GND間轉態的^位 信號。參考電壓VCC的電壓準位大於參考電壓V^D的電 壓準位。 通路電路310耦接至輸出端〇Τ。通路電路31〇接收 201242252201242252 099012 37081twf.doc/I One end (source/drain) and the second end (汲/source) are respectively coupled to the reference voltage VDD and the output terminal 〇τ. In addition, in the present embodiment, the via transistor MN21 and the reverse transistor MN22 are N-type gold-oxygen half-field effect transistors, and the reverse transistor MP21 and the pull-up transistor Mp22 are p-type gold-oxygen half-field effects. Transistor. In combination with the above description, the voltage level shifter 2 of the present embodiment can transfer the voltage level of the input signal IN between the ground voltage GND (〇V) and the reference voltage VCC (6V), and An output signal OUT that is transitioned between the ground voltage GND (OV) and the reference voltage VDD (3 3V) is generated. The voltage level shifter 200 of the present embodiment requires only four transistors to be constructed, which is cost effective. Moreover, the voltage level shifter 200 of the present embodiment can directly pull up the output signal out to the reference voltage VDD by turning on the pull-up transistor MP22, thereby effectively reducing the required transition time of the output signal 〇υτ. Referring to Figure 3 below, Figure 3 is a schematic diagram of a voltage level shifter 300 in accordance with another embodiment of the present invention. The voltage level shifter 3A includes a path circuit 310, a reverse circuit 320, and a pull-up circuit 330. Voltage level shifter 3 00 receives and diverts the voltage level of input signal 以 to produce an output signal OUT at output 〇 τ. The input signal ΙΝ is a digital signal that transitions between the reference voltage VDD and the ground voltage GND, and the output signal out is a bit signal that transitions between the reference voltage vcc and the ground voltage GND. The voltage level of the reference voltage VCC is greater than the voltage level of the reference voltage V^D. The path circuit 310 is coupled to the output terminal 〇Τ. Path circuit 31〇 receiving 201242252

099012 3708Itwf.doc/I 輸入㈣IN以及參考輕VDD,並依據輸人信號m以調 ,通路電路310與輸出端〇Τ間的等效阻抗。也就是說, 當輸入仏唬IN等於接地電壓GND時,通路電路310的等 效阻抗被調整為相對低的低阻抗值,並使輸入信號IN可 以被直接傳送至輪出端〇τ。相對的,當輸入信號IN等於 參考電壓VDD日夺,通路電路31〇的等效阻抗被調整為相 對南的南阻抗值。 在本實施例中,通路電路310包括通路電晶體MP31 以及MN3卜通路電晶體Mp31的第一端(源/沒極)接收參 考電壓VDD ’其第二端(沒/源極)搞接至通路電晶體娜 的^制端(閘極),通路電晶體MP31❸控制端(閘極)接收輸 入化唬IN。通路電晶體MN3丨的第一端(源/汲極)則接收輸 入信號IN,其第二端(汲/源極)耦接至輸出端〇τ。其中, §輸入仏號IN專於接地電壓GND(〇V)時,通路電晶體 MP31對應被導通,並傳送參考電壓VDD(例如3 3v)至通 路電晶體MN31的控制端。在此同日夺,通路電晶體顧^ 則被導通使通路電路310的等效阻抗幾乎等於〇,並直接 傳送輸入仏號IN至輸出端〇τ(也就是輸出信號out等於 0V)。 ' 相反的,當輸入信號IN等於參考電壓VDD時,通路 電晶體MP31對應被斷開’而通路電晶體Mnm的控制端 則呈現高阻抗(high impendence)的狀態。因此,通^電晶 體MN31所提供的等效阻抗相對提高。此時 ^ 的電壓準位則可以由拉升電路330來決定。 ^ ~ 11099012 3708Itwf.doc/I Input (4) IN and reference light VDD, and according to the input signal m, the equivalent impedance between the path circuit 310 and the output terminal. That is, when the input 仏唬IN is equal to the ground voltage GND, the equivalent impedance of the path circuit 310 is adjusted to a relatively low low impedance value, and the input signal IN can be directly transmitted to the wheel terminal 〇τ. In contrast, when the input signal IN is equal to the reference voltage VDD, the equivalent impedance of the path circuit 31 is adjusted to the south south impedance value. In this embodiment, the path circuit 310 includes the path transistor MP31 and the first end (source/no-pole) of the MN path transistor Mp31 receives the reference voltage VDD', and the second end (no/source) is connected to the path The transistor terminal (gate) of the transistor Na, the control transistor (gate) of the via transistor MP31 receives the input 唬IN. The first terminal (source/drain) of the via transistor MN3丨 receives the input signal IN, and the second terminal (汲/source) is coupled to the output terminal 〇τ. Wherein, when the input nickname IN is dedicated to the ground voltage GND (〇V), the via transistor MP31 is turned on correspondingly, and the reference voltage VDD (for example, 3 3v) is transmitted to the control terminal of the pass transistor MN31. At the same time, the pass transistor is turned on so that the equivalent impedance of the path circuit 310 is almost equal to 〇, and the input 仏 IN is directly transmitted to the output 〇τ (that is, the output signal out is equal to 0V). On the contrary, when the input signal IN is equal to the reference voltage VDD, the via transistor MP31 is turned off correspondingly, and the control terminal of the via transistor Mnm assumes a high impendence state. Therefore, the equivalent impedance provided by the transistor MN31 is relatively increased. The voltage level of ^ at this time can be determined by the pull-up circuit 330. ^ ~ 11

201242252 〇ywu 37081twf.doc/I 反向電路320則耦接至通路電路310,接收輸入信號 IN以及參考電壓VCC。反向電路320並轉換輸入信號IN 為在接地電壓GND以及參考電壓VCC間轉態的數位信 號,並藉以產生控制信號CTRL。其中,反向電路320包 括反向電晶體MP32以及MN32。反向電晶體MP32的控 制端(閘極)耦接輸出端OT,其第一端(源/汲極)耦接參考電 壓VCC,且其第二端(沒/源極)產生控制信號CTRL。反向 電晶體MN32其第一端(源/沒極)耗接反向電晶體Mp32的 第二端’其控制端(閘極)接收輸入信號IN,其第二端(沒/ 源極)接收接地電壓GND。 在當輸入信號IN等於接地電壓GND時,反向電晶體 MP32的控制端接收由通路電晶體MN31傳送至的等於接 地電壓GND的輸入信號IN,反向電晶體Mp32被導通並 產生等於參考電壓VCC的控制信號CTRL。相對的,當輸 入仏號IN等於參考電壓VDD時,反向電晶體MN32的控 制蜢接收等於參考電壓VDD的輸入信號IN而被導通並 產生等於接地電壓GND的控制信號CTRL。 拉升電路330耦接通路電路310以及反向電路320, 接收參考電壓VCC與控制錢CTRL,並依據控制信號 CTRL來拉指㈣號QUT絲考電壓vcc。也就是說, 田控制彳5號CTRL等於接地電壓GND時,拉升電路33〇 輸dMs* CHJT上拉至等於參考電壓vcc。而當控制 仏號CTRL等於參考電壓vcc時,拉升電路33〇則被禁 能而不動作。 201242252201242252 〇ywu 37081twf.doc/I The reverse circuit 320 is coupled to the path circuit 310 to receive the input signal IN and the reference voltage VCC. The inverting circuit 320 converts the input signal IN into a digital signal that transitions between the ground voltage GND and the reference voltage VCC, and thereby generates a control signal CTRL. The reverse circuit 320 includes reverse transistors MP32 and MN32. The control terminal (gate) of the reverse transistor MP32 is coupled to the output terminal OT, the first terminal (source/drain) is coupled to the reference voltage VCC, and the second terminal (no/source) generates a control signal CTRL. The first end (source/no-pole) of the reverse transistor MN32 consumes the second end of the reverse transistor Mp32, whose control terminal (gate) receives the input signal IN, and its second terminal (no/source) receives Ground voltage GND. When the input signal IN is equal to the ground voltage GND, the control terminal of the reverse transistor MP32 receives the input signal IN equal to the ground voltage GND transmitted from the via transistor MN31, and the reverse transistor Mp32 is turned on and generates a voltage equal to the reference voltage VCC. Control signal CTRL. In contrast, when the input nickname IN is equal to the reference voltage VDD, the control 蜢 of the reverse transistor MN32 receives the input signal IN equal to the reference voltage VDD and is turned on and generates a control signal CTRL equal to the ground voltage GND. The pull-up circuit 330 is coupled to the path circuit 310 and the reverse circuit 320, receives the reference voltage VCC and the control money CTRL, and pulls the finger (four) number QUT wire test voltage vcc according to the control signal CTRL. That is to say, when the field control 彳5 CTRL is equal to the ground voltage GND, the pull-up circuit 33 d dMs* CHJT is pulled up to be equal to the reference voltage vcc. When the control apostrophe CTRL is equal to the reference voltage vcc, the pull-up circuit 33 is disabled and does not operate. 201242252

099012 3708 ltwf.doc/I 本貫施例中’拉升電路330包括拉升電晶體mp33。 拉升電晶體MP33的第一端(源/沒極)輕接參考電壓vcc, 其控制端(閘極)接收控制信號CTRL,其第二端(汲/源極) 耦接至輸出端OT。 在本貫施例中’通路電晶體MP31、反向電晶體MP32 以及拉升電晶體MP33均為P型的金氧半場效電晶體,通 路電晶體MN31以及反向電晶體MN32則為N型的金氧半 場效電晶體。在此,電壓準位轉移器3〇〇僅需要五個電晶 體就可以動作,也具有較低電路成本。並且,輸出信號〇υτ 是藉由拉升電晶體MP33來直接拉升至參考電壓VCUC,因 此具有快速的轉態速度。 •綜上所述,本發明利用通路電路來選擇是否直接提供 輸入信號至電壓準位轉移器的輸出端’並在通路電路未直 接提供輸入信號至電壓準位轉移器的輸出端時,透過拉升 電路來拉升電壓準位轉移器的輸出信號,以使電壓準位轉 移器可以轉換輸入信號的轉態電壓區間。 減低所需要的U體數量外,更可叫效的提升輸 的轉態速度,增進電鮮位轉移ϋ所屬❹、統的效率。 雖然本發明已以實施例揭露如上,然其並非用以限定 I明,任何所屬技術領域中具有通常知識者,在不脫離 和範圍内’當可作些許之更動與潤飾,故本 月之保濩乾圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 13 201242252099012 3708 ltwf.doc/I In the present embodiment, the pull-up circuit 330 includes a pull-up transistor mp33. The first end (source/no-pole) of the pull-up transistor MP33 is connected to the reference voltage vcc, the control terminal (gate) receives the control signal CTRL, and the second end (汲/source) is coupled to the output terminal OT. In the present embodiment, 'the pass transistor MP31, the reverse transistor MP32, and the pull-up transistor MP33 are P-type gold-oxygen half-field effect transistors, and the via transistor MN31 and the reverse transistor MN32 are N-type. Gold oxygen half field effect transistor. Here, the voltage level shifter 3 〇〇 requires only five electric crystals to operate, and also has a lower circuit cost. Moreover, the output signal 〇υτ is directly pulled up to the reference voltage VCUC by pulling up the transistor MP33, thus having a fast transition speed. In summary, the present invention utilizes a path circuit to select whether to directly provide an input signal to the output terminal of the voltage level shifter and to transmit through the path when the path circuit does not directly provide an input signal to the output of the voltage level shifter. The circuit is raised to pull up the output signal of the voltage level shifter so that the voltage level shifter can convert the transition voltage interval of the input signal. In addition to reducing the number of U-body required, it is more effective to improve the transition speed of the transmission and improve the efficiency of the transmission of the electric fresh-spot. Although the present invention has been disclosed in the above embodiments, it is not intended to be limiting, and any person having ordinary skill in the art can make a few changes and refinements without departing from the scope and scope. The scope of the patent application scope attached to the company is subject to the definition of patent application. [Simple description of the schema] 13 201242252

〇yyul2 37081twf.doc/I 圖1繪示習知的電壓準位轉移器100的示意圖。 圖2繪示本發明一實施例的電壓準位轉移器200的示 意圖 圖3繪示本發明另一實施例的電壓準位轉移器300的 示意圖。 【主要元件符號說明】 100、200、300 :電壓準位轉移器 210、310 :通路電路 220、320 :反向電路 230、330 :拉升電路 IN :輸入信號 OT :輸出端 VDD、VCC :參考電壓 GND :接地電壓 OUT :輸出信號 CTRL :控制信號 MP1 〜MP3、MN1 〜MN3、MN2 卜 MN22、MP21、MP22、 MP31 〜MP33、MN31 〜MN32 :電晶體〇yyul2 37081twf.doc/I FIG. 1 is a schematic diagram of a conventional voltage level shifter 100. 2 is a schematic diagram of a voltage level shifter 200 according to another embodiment of the present invention. FIG. 3 is a schematic diagram of a voltage level shifter 300 according to another embodiment of the present invention. [Main component symbol description] 100, 200, 300: voltage level shifter 210, 310: path circuit 220, 320: reverse circuit 230, 330: pull-up circuit IN: input signal OT: output terminal VDD, VCC: reference Voltage GND: Ground voltage OUT: Output signal CTRL: Control signals MP1 to MP3, MN1 to MN3, MN2 Bu MN22, MP21, MP22, MP31 to MP33, MN31 to MN32: Transistor

Claims (1)

201242252 099012 37081twf.doc/I 七、申請專利範圍: 1. 一種電壓準位轉移器’接收並轉移一輸入信號的電 壓準位以在一輸出端產生一輸出信號,包括: 一通路電路’耦接至該輸出端,接收該輸入信號以及 一第一參考電壓’並依據該輸入信號以及該第一參考電壓 以導通或斷開與該輸出端的連接,其中該輸入信號為在一 接地電壓以及一第二參考電壓間轉態的數位信號,且該第 一參考電壓的電壓準位小於該第二參考電壓的電壓準位; 一反向電路,接收該輸入信號,反向該輸入信號並轉 換該輸入信號為在該接地電壓以及該第一參考電壓間轉態 的數位信號以產生一控制信號;以及 一拉升電路,耦接該通路電路以及該反向電路,接收 該第一參考電壓與該控制信號,依據該控制信號來拉升該 輸出信號至該第一參考電壓。 2. 如申請專利範圍第丨項所述之電壓準位轉移器,其 中,當該輸入信號等於該第二參考電壓時,該通路電路與 該輸出端的連純斷開,#該輸人信鮮於該接地電^ 時,該通路電路與雜出端的連接被導通並傳送該輸入信 號至該輸出端。 3:如申請專利範圍第2項所述之電壓準位轉移器,其 中/當該通路電路無輸㈣的連接輯開時,該反向電 路對應產生等於該接地電壓賴控制信號。 a如h專利範圍第3項所述之電 中,當該控制信號等於該接地電壓時,該拉升 15 20124225237081twf.docA 輸出"5虎至該第一參考電壓。 φ專利$IL圍第2項所述之電•準位轉移器,其 田。X、電路與该輸出端的連接被導通時,該反向電 路對應產生等於該第-參考電壓的該控制信1。 Φ 月專利乾圍第5項所述之電壓準位轉移器’其 二’1=號等於該第一參考電壓時,該拉升電路被 π月匕,且5玄輸出信號等於該接地電壓。 中該範圍第1賴狀電壓準位轉移器,其 一通路電晶體’具有第—端 控制端接收該第-參考電m =及控㈣/、 其第二端祕該輸其第―端接收該輸入信號’ 中^向如電申&專括利範圍第1項所述之電壓準位轉移器,其 端,a:一二:^广體’具有第-端、第二端以及控制 ’、4接該第—參考電壓,其控制端接收該輪入 信號二其第二端產生該㈣信號;以及 輸入 端,j一 曰曰體’具有第一端、第二端以及控制 接收叶人第—反向電晶體的第二端’其控制端 接收該輸人域,其第二端接收該接地電廢。 中該i升"第1項所述之電鮮位轉移器,其 第-:二體端以及控制端,其 亏電壓,其控制端接收該控制信號, 201242252 099012 37081twf.doc/I 其第二端耦接至該輸出端。 ,10· -種電壓準位轉移器,接收並轉移 一輸入信號的 電壓準位以在-輸出端產生—輸出信號,包括: L路電路輕接至该輸出端,接收該輸入信號以及 參考電壓’依據該輸人錢以難該祕電路與該 輸出端_-等纽抗,其中該輸人信縣在—接地電壓 以及該第—參考電壓_態的數位信號; 及一筮反路二耦接至該通路電路,接收該輸入信號以 該反向電路並轉換該輸入信號為在該 ㈣參考電壓間轉態的數位信號以產生— 考電壓_壓2第考11壓的電壓準位大於該第-參 ri:電路該通路電路以及該反向電路,接收 =號號,依據該控制信號來拉升該 =·如中請專鄉U第1G項所述之電壓準位轉移 L皮ίΐϊ該輸人信號等於該第—參考電壓時,該等效阻 =被调整等於—低阻抗值,該輪人信號透過該通路電路被 至5亥輪出端,當該輸入信號等於該接地電壓時,該通 路電路等於—高阻抗值。 =·〜冑凊專利U項所述之電壓準位轉移 Γ當該輸人信號等於該第—參考電壓時,該反向電 座生專於該接地電壓的該控制信號。 如申凊專利範圍第12項所述之電壓準位轉移 17 201242252 w^yuiz 37081twf.doc/I 器,其中當該控制信號等於該接地電壓時,該拉升電路拉 升該輸出信號至該第二參考電壓。 14. 如申請專利範圍第11項所述之電壓準位轉移 器,其中當該輸入信號等於該接地電壓時,該反向電路產 生等於該第二參考電壓的該控制信號。 15. 如申請專利範圍第14項所述之電壓準位轉移 器,其中當該控制信號等於該第二參考電壓時,該拉升電 路被禁能,且該輸出信號等於該接地電壓。 18201242252 099012 37081twf.doc/I VII. Patent Application Range: 1. A voltage level shifter 'receives and transfers the voltage level of an input signal to generate an output signal at an output, including: a path circuit 'coupled Receiving the input signal and a first reference voltage 'and according to the input signal and the first reference voltage to turn on or off the connection with the output terminal, wherein the input signal is at a ground voltage and a first a reference digital signal between the voltages, and the voltage level of the first reference voltage is less than a voltage level of the second reference voltage; a reverse circuit receiving the input signal, inverting the input signal, and converting the input The signal is a digital signal that transitions between the ground voltage and the first reference voltage to generate a control signal; and a pull-up circuit coupled to the path circuit and the reverse circuit to receive the first reference voltage and the control And transmitting a signal to the first reference voltage according to the control signal. 2. The voltage level shifter of claim 2, wherein when the input signal is equal to the second reference voltage, the path circuit is disconnected from the output terminal, and the input signal is fresh. At the grounding, the connection of the path circuit to the stray terminal is turned on and the input signal is transmitted to the output terminal. 3: The voltage level shifter according to claim 2, wherein when the connection circuit has no connection (4), the reverse circuit correspondingly generates a control signal equal to the ground voltage. If the control signal is equal to the ground voltage, the pull-up 15 20124225237081 twf.docA outputs "5 to the first reference voltage. φ patent $IL circumference of the electric / level transfer device described in item 2, its field. When the connection between the circuit and the output is turned on, the reverse circuit correspondingly generates the control signal 1 equal to the first reference voltage. When the voltage level shifter described in item 5 of the Φ monthly patent circumstance is equal to the first reference voltage, the pull-up circuit is π 匕, and the 5 玄 output signal is equal to the ground voltage. The first-stage voltage level shifter of the range has a first-channel control terminal having the first-side control terminal receiving the first reference power m=and the control (four)/, and the second terminal end thereof receiving the first-end reception The input signal 'in the direction of the voltage level shifter as described in item 1 of the power supply & exclusive range, the end, a: one two: ^ wide body 'with the first end, the second end and the control ', 4 is connected to the first-reference voltage, the control end receives the round-in signal 2 and the second end generates the (4) signal; and the input end, the j-body 'has the first end, the second end, and the control receiving leaf The second end of the human-reverse transistor receives its input domain and its second end receives the grounded electrical waste. The electric fresh-spot transfer device described in the first item, the first-: two-body end and the control end, the deficient voltage, the control end receives the control signal, 201242252 099012 37081twf.doc/I The two ends are coupled to the output end. a voltage level shifter that receives and transfers a voltage level of an input signal to generate an output signal at the output terminal, comprising: an L circuit is lightly connected to the output terminal, and receives the input signal and a reference voltage 'According to the input of the money, it is difficult to use the circuit and the output terminal _-, etc., where the input signal is in the ground voltage and the digital signal of the first reference voltage _ state; Connected to the path circuit, receiving the input signal to the reverse circuit and converting the input signal to a digital signal that is transitioned between the (four) reference voltages to generate a test voltage _ voltage 2, the voltage level of the 11th voltage is greater than the The first-parameter ri: the circuit and the reverse circuit receive the = number, and according to the control signal, pull up the voltage level. When the input signal is equal to the first reference voltage, the equivalent resistance is adjusted to be equal to the low impedance value, and the wheel signal is transmitted to the 5th round out terminal through the path circuit, when the input signal is equal to the ground voltage, The path circuit is equal to - high resistance Value. =·~胄凊 Voltage level transfer as described in the patent U. When the input signal is equal to the first reference voltage, the reverse battery generates the control signal specific to the ground voltage. For example, the voltage level transfer 17 201242252 w^yuiz 37081 twf.doc/I device described in claim 12, wherein when the control signal is equal to the ground voltage, the pull-up circuit pulls the output signal to the first Two reference voltages. 14. The voltage level shifter of claim 11, wherein the reverse circuit produces the control signal equal to the second reference voltage when the input signal is equal to the ground voltage. 15. The voltage level shifter of claim 14, wherein when the control signal is equal to the second reference voltage, the pull-up circuit is disabled and the output signal is equal to the ground voltage. 18
TW100112060A 2011-04-07 2011-04-07 Output input interface apparatus and voltage level shifter thereof TW201242252A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW100112060A TW201242252A (en) 2011-04-07 2011-04-07 Output input interface apparatus and voltage level shifter thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW100112060A TW201242252A (en) 2011-04-07 2011-04-07 Output input interface apparatus and voltage level shifter thereof

Publications (1)

Publication Number Publication Date
TW201242252A true TW201242252A (en) 2012-10-16

Family

ID=47600269

Family Applications (1)

Application Number Title Priority Date Filing Date
TW100112060A TW201242252A (en) 2011-04-07 2011-04-07 Output input interface apparatus and voltage level shifter thereof

Country Status (1)

Country Link
TW (1) TW201242252A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130099847A1 (en) * 2011-10-24 2013-04-25 Renesas Electronics Corporation Input circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130099847A1 (en) * 2011-10-24 2013-04-25 Renesas Electronics Corporation Input circuit
US8531230B2 (en) * 2011-10-24 2013-09-10 Renesas Electronics Corporation Input circuit

Similar Documents

Publication Publication Date Title
US8749269B2 (en) CML to CMOS conversion circuit
US20060132179A1 (en) Low voltage differential signaling drivers including branches with series resistors
CN102457455B (en) Low voltage differential signal transmitter
US6922083B2 (en) High speed sampling receiver with reduced output impedance
TW201121238A (en) Driving circuit with impedence calibration
TW200632813A (en) Driver for bidirectional shift register
CN102208909A (en) Level shift circuit
TW200636669A (en) Bidirectional shift register
TW200824307A (en) Low to high voltage conversion output driver and conversion method, parallel to serial transmitter and output driver for driving a serial link
KR20150123929A (en) Voltage level shifter with a low-latency voltage boost circuit
CN101304251B (en) Difference interface circuit for on-chip long lines interlinkage
KR20170064842A (en) Transmitter and Semiconductor Apparatus
US20080001628A1 (en) Level conversion circuit
US20100033211A1 (en) Link transmitter with reduced power consumption
TW201242252A (en) Output input interface apparatus and voltage level shifter thereof
CN219918909U (en) Level conversion circuit, chip and electronic equipment
WO2004104820A3 (en) A sum bit generation circuit
Kim et al. A 4-Gb/s/pin low-power memory I/O interface using 4-level simultaneous bi-directional signaling
JP7051694B2 (en) Driver circuit and its control method, and transmission / reception system
Bae et al. A 1-pJ/bit, 10-Gb/s/ch forwarded-clock transmitter using a resistive feedback inverter-based driver in 65-nm CMOS
KR100780881B1 (en) Circuit for low power dual-level lvds technique using current source switching
TW200509529A (en) Transmission apparatus
TW200910743A (en) High-to-low level shifters
TWI511442B (en) Data control circuit
Lu et al. A 10Gb/s 10mW 2-tap reconfigurable pre-emphasis transmitter in 65nm LP CMOS