TW201230149A - Semiconductor device and its fabricating method - Google Patents

Semiconductor device and its fabricating method Download PDF

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TW201230149A
TW201230149A TW100143045A TW100143045A TW201230149A TW 201230149 A TW201230149 A TW 201230149A TW 100143045 A TW100143045 A TW 100143045A TW 100143045 A TW100143045 A TW 100143045A TW 201230149 A TW201230149 A TW 201230149A
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gan
layer
based semiconductor
semiconductor layer
electrode
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TW100143045A
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Chinese (zh)
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Yasunobu Sumida
Shoko Hirata
Takayuki Inada
Shuichi Yagi
Hiroji Kawai
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Powdec Kk
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Abstract

Provided are a semiconductor device and its fabricating method which can grow island GaN-based semiconductor layer made of high quality semiconductor crystal on a substrate of a different kind from GaN-based semiconductor while suppressing bending of the substrate, suppressing generation of cracks, etc. although the GaN-based semiconductor layer is very thick, thereby realizing large area semiconductor device easily. The semiconductor device comprises a substrate 11 made of substances different from GaN-based semiconductor, a growth mask 12 having one or more striped opening(s) 12a and one or more island GaN-based semiconductor layer(s) 13 grown on the substrate 11 in (0001)-plane orientation using the growth mask 12. Striped opening 12a of the growth mask 12 lies in a direction pararell to <1-100> direction of the GaN-based semiconductor layer(s) 13.

Description

201230149 六、發明說明: 【發明所屬之技術領域】 本發明係關於半導赞;&amp; n 4 等體70件及其製造方法,特別是適 用於採用氮化鎵(GaN)系半導體的半導體元件。 【先前技術】 右可在低饧格的異種基板上,獲得高品質的高附加 價值半導體,則產業上的價值非常高,因而為了予以實 現,自昔-直進行研究開發。特別是石夕⑻)基板上的石申 化鎵(GaAs)系半導體薄膜成長,或藍寶石基板上的 系半導體薄膜成長,採用所謂緩衝層技術可獲得比較良 好的半導體薄膜’既已被實用化。然而,由於習知的緩 衝層技術在已成長的半導體薄瞑上,存在非常多缺陷或 穿透差排,僅止於適用發光二極體(LED)等之有限的元 件。 突破该狀況的新技術係選擇區域成長(Seiective Area Growth’ SAG)技術。例如,AUsu^係應用周知的 緩衝層技術,使於藍寶石基板上成長^⑶層而成的基板作 為基底基板’並於其上將二氧化矽(Si〇2)構成的絕緣膜 ’作為成長遮罩配置成條紋狀,使GaN層選擇性地成長於 沒有該絕緣膜的部分(窗)上’接著使GaN層在絕緣膜上 橫向成長,急遽減少GaN層中的穿透差排(非專利文獻1} 。該技術已於1982年在Si基板上的GaAs成長上作了嘗試 (非專利文獻2)。該手法係藉絕緣膜遮斷源自基底層的穿 透差排之傳播,由於目的在於藉由GaN層朝該絕緣膜上 橫向成長,以急遽減少穿透差排,強調橫向成長,故多 201230149 稱呼該手法為 EL〇(Epitaxial Latei*al CWer^ovnh)。 又’在薄AlGaN層作為中間層積層的以基板上之 GaN的選擇成長,已於1 988年由γ Kawaguchi等報告,根 據此報告,基本上ELO是可行的,賦予了 GaN的結晶方 位和基底S i基板之方位關係(非專利文獻3)。 利用ELO法成長GaN系半導體的情況所用之成長遮 罩’ 一般是由寬度3〜1 Ομιη的條紋狀的遮罩部和寬度與 遮罩部相同程度的條紋狀窗所構成。在該情況,在成長 遮罩上從窗朝橫向成長的GaN層與從相鄰的窗朝橫向成201230149 VI. Description of the Invention: [Technical Field] The present invention relates to a semi-conductor; &amp; n 4 body 70 and a method of manufacturing the same, and particularly to a semiconductor device using a gallium nitride (GaN) semiconductor . [Prior Art] Right, high-value, high-value-added semiconductors can be obtained on a low-profile heterogeneous substrate, and the industrial value is very high. Therefore, in order to realize this, research and development have been carried out since the past. In particular, the growth of a gallium (GaAs) semiconductor film on a substrate of Shi Xi (8)), or the growth of a semiconductor thin film on a sapphire substrate, and a relatively good semiconductor film by a so-called buffer layer technique have been put into practical use. However, since the conventional buffer layer technology has a large number of defects or penetrations on the grown semiconductor thin film, it is limited to a limited number of components such as a light-emitting diode (LED). The new technology that breaks this situation is the Seiective Area Growth (SAG) technology. For example, AUsu^ uses a well-known buffer layer technology to form a substrate on which a (3) layer is grown on a sapphire substrate as a base substrate 'on which an insulating film made of cerium oxide (Si〇2) is used as a growth mask. The cover is arranged in a stripe shape, and the GaN layer is selectively grown on a portion (window) where the insulating film is not present. Then, the GaN layer is laterally grown on the insulating film, and the penetration difference in the GaN layer is rapidly reduced (Non-Patent Literature) 1} This technique was attempted on the growth of GaAs on a Si substrate in 1982 (Non-Patent Document 2). This technique uses an insulating film to block the propagation of the transmission difference from the basal layer, since the purpose is By grading the GaN layer laterally toward the insulating film, the penetration difference is reduced sharply, and the lateral growth is emphasized, so that the multi-201230149 refers to the method as EL〇(Epitaxial Latei*al CWer^ovnh). Also in the thin AlGaN layer The selective growth of GaN on the substrate in the intermediate layer has been reported by γ Kawaguchi et al. in 1988. According to this report, substantially ELO is feasible, giving the orientation of GaN and the orientation of the substrate of the substrate. Non-patent document 3 The growth mask used in the case of growing a GaN-based semiconductor by the ELO method is generally composed of a stripe-shaped mask portion having a width of 3 to 1 μm and a stripe-like window having the same width as that of the mask portion. a GaN layer that grows from the window toward the lateral direction on the growth mask and from the adjacent window toward the lateral direction

長的GaN層碰撞並合體,覆蓋成長遮罩,形成一體的GaN 層。如此所得之GaN層,以窗區域而言,由於來自底面 的穿透差排之成長’且合體部分很多因晶格失配所致之 差排’此等部分無法作為元件的活性區域使用,不得不 在條紋上的有限區域形成條紋形狀的活性區域。該方法 雖嘗試應用於製造狹條紋的半導體雷射,但還未達實用 化。 [先前技術文獻] [非專利文獻] [非專利文獻 1 ]A· Usui,H. Sunakawa,A. Sasaki,and A. Yamaguchi: Jpn. J. Appl. Phys., 36, L899(1997) [非專利文獻 2]B-Y. Ysauer et. al.: Appl. Phys. Lett., 41, 347(1982) [非專利文獻 3]Y. Kawaguchi et. al.,Jpn. J. Appl. Phys., 37(1998)p.L966 【發明内容】 201230149 [發明所欲解決之課題] 通常,由於基底基板和半導體層係不同物質,熱膨 脹係數互異,半導體層成長後使基板溫度回歸室溫時, 會於上部的半導體層產生壓縮或拉伸應力,使基板整體The long GaN layer collides and merges to cover the growth mask to form an integrated GaN layer. The GaN layer thus obtained, in terms of the window region, may not be used as an active region of the element due to the growth of the difference in the penetration from the bottom surface and the fact that many of the bonded portions are caused by the lattice mismatch. A stripe-shaped active area is not formed in a limited area on the stripe. Although this method has been applied to the manufacture of semiconductor lasers with narrow stripes, it has not yet reached practical use. [Prior Art Document] [Non-Patent Document] [Non-Patent Document 1] A· Usui, H. Sunakawa, A. Sasaki, and A. Yamaguchi: Jpn. J. Appl. Phys., 36, L899 (1997) [Non Patent Document 2] BY. Ysauer et. al.: Appl. Phys. Lett., 41, 347 (1982) [Non-Patent Document 3] Y. Kawaguchi et. al., Jpn. J. Appl. Phys., 37 ( 1998) p. L966 [Summary of the Invention] 201230149 [Problems to be Solved by the Invention] Generally, since the base substrate and the semiconductor layer are different materials, the coefficients of thermal expansion are different, and when the semiconductor layer is grown and the substrate temperature is returned to room temperature, it is in the upper portion. The semiconductor layer generates compressive or tensile stress to make the substrate as a whole

大大地彎曲。例如,在藍寶石基板上利用ELO法使GaN 層成長的情況,基板向上凸。反之,在Si基板或碳化矽 (SiC)基板等之上利用EL〇法使GaN層成長的情況,基板 向下凸。若半導體層變厚則該基板的彎曲變非常顯著, 嚴重時半導體層會出現裂縫(龜裂)。又,基板的彎曲即 使未在半導體層造成裂縫,仍會導致用以形成元件的微 影術步驟明顯困難。又,以習知技術而言,在GaN層中 穿透差排少的絕緣膜上的部分,被限制在數μπι&amp;右的狹 窄區域’故只能製造半導體雷射等之數μπι寬度的條紋 元件。 本發明之目的在於一舉解決習知技術所具有的上述 課題。 亦即,本發明所欲解決的課題為提供一種半導體元 件及其製造方法,可於異種基板上抑制基板的彎曲,使 高品質半導體結晶所構成的島狀的GaN系半導體層成長 ,且即使GaN系半導體層極厚亦可抑制裂縫等之發生, 可容易地實現大面積的半導體元件。 [解決課題之手段] 為解決上述課題,本發明之半導體元件的特徵為: .具有由異於GaN系半導體的物質所構成的基板、直 接或間接地設於上述基板上且具有—或錢個條紋狀的 201230149 開口之成長遮罩, 朝(0001)面方位成 層;‘ 及使用上述成長遮罩而於上述基板上 長之—或複數個島狀的GaN系半導體 長遮罩之上述條紋狀的開口係在平行於上述 ⑽:導體層的〈Μ.方向的方向延伸。 戎F二t導體疋件中’成長遮罩係直接、亦即直接連接 二* I、系半導體所構成的中間層等’間接地設置 /、於GaN系半導體的物質所構成的基板上。由显於 G-系半導體的物f所構成的基板之例子,可舉出藍寶 :t t或Sl基板等,但未受此等所限,只要能使GaN系 =體層在(00(H)面方位成長,則何種基板皆可。在該 面=2 7L件中,典型的是,島狀的GaN系半導體層的侧 =由(1-1〇〇〇面(α為任意的整數)、⑴,面α為任 心、正數)或和此等在結晶學上等價的面所形成或島 ::GaN系半導體層的側面係包含。·ι〇α)面沁為任意的 ,)、成長遮罩例如係藉由SiCh膜或SiN膜等之絕緣膜 所形成。成長遮罩的—較佳例為具有:在平行於GaN系 :導體層的〈…心方向的第1方向,及平行於GaN系半 體層的&lt;1-1 〇〇&gt;方向的第2方向,分別以第W期及第2 周期作周期地配列,且在第2方向延伸之複數個條紋狀的 1 ’及在第1方向相互鄰接之一對的條紋狀的開口之 間的區域之二等分線上’以和在第2方向相互鄰接之一 對的條紋狀的開口之相互對向的末端部,為使分別重合 於規定距離而設置的輔助的條紋狀的開口,亦可因應需 要而不設置輔助的條紋狀的開口。成長遮罩其他的一較 201230149 佳例為具有··在平行於GaN系半導體層的&lt;ιι_2〇&gt;方向 的第1方向作周期地配列,且在平行於GaN系半導體層的 &lt; 1 -100&gt;方向的第2方向延伸之複數個條紋狀的開口;在 第1方向以和上述條紋狀的開口相同周期,對上述條紋狀 的開口錯開半周期地作周期配列,且使第2方向之上述條 紋狀的開口之末端部重合於規定距離,在第2方向延伸之 複數個條紋狀的開口。GaN系半導體層係因應於半導體 兀件而適宜地構成,一般由包含η型層、未摻雜層及p型 層當中至少一個的2層以上的層所構成。構成GaN系半 導體層的層’具體而言,例如GaN層、A1GaN層、 AlGalnN層、InGaN層等。在半導體元件具有複數個GaN 系半導體層的情況,相互鄰接之島狀的GaN系半導體層 彼此之間隔一般為30μιη以下,較佳為! 〇μιη以下,但未 受此所限。該半導體元件中,對應該半導體元件的種類 之數量的電極被言史置在^的部位。料導體元件例如 蕭特基二極體、發光二極體、半導體雷射、光電二極體 、電晶體等’但未受此等所限。 又,本發明的半導體元件的製造方法係具有: 在由異於GaN系半導體的物質所構成的基板上,直 接或間接地形成具有複數個條紋狀的開口之成長遮罩的 步驟;及 〜&lt; 使用上迷成長 在 層 的 上述基板上朝(000 1)面方位,且使上 使上迷G a Ν糸半導體 的&lt;1-100&gt;方向在平行於上述成具 述成長遮罩之上述條紋狀 開口之方向延伸成長之步驟。 201230149 在上述半導體元件的製造方法之發明中,只要不違 反其性質’則與上述半導體元件之發明相關的說明是成 立的。 上述半導體元件的製造方法係進一步具有:使GaN 系半導體層成長於基板上之後’將第丨支持基板接著於 該GaN系半導體層的上面側,將該第】支持基板及GaN系 半導體層從上述基板剝離的步驟;此外亦進一步且有. 將第1支持基板及GaN系半導體層從上述基板剝離後, 在露出GaN系半導體層的面形成—或複數個電極之步驟 。上述半導體元件的製造方法因應需要而進一步具有·· 使GaN系半導體層成長於基板上之後,在將第1支持基 板接著於該GaN系半導體層的上面側之前,在該GaN系 半導體層的上面形成一或複數個電極之步驟,或將成長 遮罩的至少一部分,較佳為大致全部,最好為全部除去 的步驟,或此等的兩步驟。又,因應需要在和GaN系半 導體層接著側的第1支持基板之主面形成導體薄膜或導 體線路。上述半導體元件的製造方法因應需要而進一步 具有:將第1支持基板及GaN系半導體層從上述基板剝 離後,在露出該GaN系半導體層的面側接著第2支持基 板的步驟。第1支持基板及第2支持基板係由元素半導體 、化合物半導體、金屬、合金、氮化物系陶瓷、氧化物 系陶竟、金剛石、碳、塑膠等所構成,可為由此等材料 所構成的單層構造亦可為多層構造。第丨支持基板及第2 支持基板之接著係可使用銲膏等之接著用金屬或有機系 的接著劑等’因應需要而選擇。 201230149 又,本發明的半導體元件的製造方法之特徵為具有 在由異於GaN系半導體的物質所構成的基板上直接 或間接地形成具有複數個條紋狀的開口之成長遮罩的步 使用上述成長遮罩使複數個島狀的GaN系半導體層 在上述基板上朝(〇〇〇 1)面方位,且使上述GaN系半導體 磨的&lt;1-100&gt;方向在平行於上述成長遮罩之上述條紋狀 的開口之方向延伸成長之步驟; 在上述GaN系半導體層的上面形成一或複數個第1 電極之步驟; 在形成上述第1電極之後,除去上述成長遮罩的至 少一部分之步驟; 在除去上述成長遮罩的至少一部分之後,在上述 ㈣系半導體層之形成上述第!電極的上述上面側,隔 著有機系接著層接著第1支持基板之步驟; 將上述第1支持基板及上述GaN系半導體層從上述 基板剝離之步驟; 基板第1支露持出基上板二上述叫 在路出上述GaN系丰導體屉沾二…, 複數個第2電極之步驟;及 層的面形成一或 字$成上述第1電極及上述第2雷;u J· 導體層從上述第…&quot;二 的上述⑽系半 弟1支持基板剥離之步驟。 典型的是’在形成第 全部,最“ 取長遮罩的大致 4除去。错此,容易將第1支 -10- 201230149Bending greatly. For example, in the case where the GaN layer is grown by the ELO method on the sapphire substrate, the substrate is convex upward. On the other hand, when the GaN layer is grown by an EL germanium method on a Si substrate or a tantalum carbide (SiC) substrate or the like, the substrate is convex downward. If the semiconductor layer becomes thick, the bending of the substrate becomes very remarkable, and in a serious case, cracks (cracks) may occur in the semiconductor layer. Moreover, the bending of the substrate, even if it does not cause cracks in the semiconductor layer, still causes significant difficulties in the lithography steps for forming the components. Further, in the prior art, the portion of the GaN layer that penetrates the insulating film having a small difference in the GaN layer is limited to a narrow region of a few μπι &amp; right, so that only a plurality of stripes of a semiconductor laser or the like can be manufactured. element. SUMMARY OF THE INVENTION An object of the present invention is to solve the above problems of the prior art. In other words, the present invention has been made to provide a semiconductor device and a method for fabricating the same, which can suppress the bending of a substrate on a dissimilar substrate, and grow an island-shaped GaN-based semiconductor layer composed of a high-quality semiconductor crystal, and even GaN The semiconductor layer is extremely thick, and cracks and the like can be suppressed, and a semiconductor element having a large area can be easily realized. [Means for Solving the Problem] In order to solve the above problems, a semiconductor device of the present invention is characterized in that: a substrate having a substance different from a GaN-based semiconductor is directly or indirectly provided on the substrate and has - or money a stripe-shaped 201230149 opening growth mask, layered toward the (0001) plane; 'and a stripe-shaped GaN-based semiconductor long mask that is grown on the substrate using the growth mask described above - or a plurality of island-shaped GaN-based semiconductor long masks The opening extends in a direction parallel to the above (10): the direction of the conductor layer. In the 二F two-t conductor element, the 'growth mask is directly connected to the substrate of the GaN-based semiconductor, which is directly connected to the intermediate layer of the semiconductor. Examples of the substrate composed of the material f of the G-based semiconductor include a sapphire: tt or an S1 substrate, but are not limited thereto, as long as the GaN-based body layer can be (00(H) In the case of the surface azimuth growth, any substrate is acceptable. In this case, the side of the island-shaped GaN-based semiconductor layer is typically 1-1 (the α is an arbitrary integer). (1), the surface α is a center, a positive number, or a crystallographically equivalent surface or island: the side surface of the GaN-based semiconductor layer is included. · ι〇α) The surface is arbitrary,) The growth mask is formed, for example, by an insulating film such as a SiCh film or a SiN film. The growth mask is preferably a first direction parallel to the GaN-based: conductor layer and a second direction parallel to the 1-1 〇〇&gt; direction of the GaN-based half layer. The direction is periodically arranged in the Wth phase and the second cycle, and a plurality of stripe-shaped 1' extending in the second direction and a stripe-shaped opening adjacent to each other in the first direction are adjacent to each other. The end portion of the bisector line that is opposite to the stripe-shaped opening that is adjacent to each other in the second direction is an auxiliary stripe-shaped opening that is provided to overlap the predetermined distance, and may be required No auxiliary striped openings are provided. The other example of the growth mask is 201230149. The first example is periodically arranged in the first direction parallel to the &lt; ιι 〇&gt; direction of the GaN-based semiconductor layer, and is &lt; 1 parallel to the GaN-based semiconductor layer. a plurality of stripe-shaped openings extending in the second direction of the -100&gt;direction; the first direction is arranged in a period of the same period as the stripe-shaped opening, and the stripe-shaped openings are periodically arranged in a half cycle and the second direction is made The end portion of the stripe-shaped opening overlaps a predetermined distance and has a plurality of stripe-shaped openings extending in the second direction. The GaN-based semiconductor layer is suitably formed in accordance with a semiconductor element, and is generally composed of two or more layers including at least one of an n-type layer, an undoped layer, and a p-type layer. Specifically, a layer constituting the GaN-based semiconductor layer is, for example, a GaN layer, an A1GaN layer, an AlGalnN layer, an InGaN layer, or the like. When the semiconductor element has a plurality of GaN-based semiconductor layers, the distance between the island-shaped GaN-based semiconductor layers adjacent to each other is generally 30 μm or less, preferably! 〇μιη below, but not limited by this. In the semiconductor element, the number of electrodes corresponding to the type of the semiconductor element is placed at the position of the semiconductor. The conductor elements are, for example, Schottky diodes, light-emitting diodes, semiconductor lasers, photodiodes, transistors, etc., but are not limited by these. Further, the method for producing a semiconductor device of the present invention includes: a step of forming a growth mask having a plurality of stripe-shaped openings directly or indirectly on a substrate made of a substance different from the GaN-based semiconductor; and ~&lt; Using the above-mentioned substrate grown on the layer toward the (000 1) plane orientation, and making the &lt;1-100&gt; direction of the upper Ga Ν糸 semiconductor in parallel with the above-described growth mask The step of extending the direction of the stripe-shaped opening. 201230149 In the invention of the method for manufacturing a semiconductor device described above, the description relating to the invention of the above semiconductor element is established as long as it does not deviate from the property. The method of manufacturing the semiconductor device further includes: after the GaN-based semiconductor layer is grown on the substrate, the second support substrate is attached to the upper surface side of the GaN-based semiconductor layer, and the first support substrate and the GaN-based semiconductor layer are The step of peeling off the substrate; and further, the step of forming the first support substrate and the GaN-based semiconductor layer from the substrate, and forming a plurality of electrodes on the surface on which the GaN-based semiconductor layer is exposed. In the method of manufacturing the semiconductor device, the GaN-based semiconductor layer is grown on the substrate, and the first support substrate is placed on the upper surface of the GaN-based semiconductor layer before the first support substrate is placed on the upper surface of the GaN-based semiconductor layer. The step of forming one or more electrodes, or the step of growing at least a portion of the mask, preferably substantially all, preferably all, or two steps. Further, it is necessary to form a conductor film or a conductor line on the main surface of the first support substrate on the side of the GaN-based semiconductor layer. In the method of manufacturing the semiconductor device, the first support substrate and the GaN-based semiconductor layer are peeled off from the substrate, and then the second support substrate is placed on the surface side on which the GaN-based semiconductor layer is exposed. The first support substrate and the second support substrate are made of an elemental semiconductor, a compound semiconductor, a metal, an alloy, a nitride-based ceramic, an oxide ceramic, diamond, carbon, plastic, or the like, and may be composed of such materials. The single layer construction can also be a multilayer construction. The adhesion between the second support substrate and the second support substrate can be selected by using a metal or an organic adhesive such as solder paste or the like as needed. 201230149 Further, the method for producing a semiconductor device according to the present invention is characterized in that the step of forming a growth mask having a plurality of stripe-shaped openings directly or indirectly on a substrate made of a substance different from the GaN-based semiconductor is used in the above growth. The mask has a plurality of island-shaped GaN-based semiconductor layers oriented on the substrate in a (〇〇〇1) plane orientation, and the &lt;1-100&gt; direction of the GaN-based semiconductor mill is parallel to the growth mask described above a step of extending the growth direction of the stripe-shaped opening; forming one or a plurality of first electrodes on the upper surface of the GaN-based semiconductor layer; and removing at least a part of the growth mask after forming the first electrode; After removing at least a part of the growth mask, the above-mentioned (four)-type semiconductor layer is formed in the above-mentioned first! a step of adhering the first support substrate via the organic via layer to the upper surface side of the electrode; a step of separating the first support substrate and the GaN-based semiconductor layer from the substrate; and a first support substrate of the substrate The above is called the step of removing the GaN-based conductors, and the plurality of second electrodes; and the surface of the layer is formed with a word or the first electrode and the second portion; the U J · conductor layer is The above (10) of the second...the second half 1 supports the step of peeling off the substrate. Typically, 'the whole part is formed, and the most "takes a long mask." It is easy to remove the first branch. -10- 201230149

GaN系半導體層從基板剝離。有機系接著層可形成於第 1支持基板的一主面,亦可形成於GaN系半導體層形成 第1電極的上面側。典型的是,在第2電極側貼附第2支 持基板後,將形成第1電極及第2電極的GaN系半導體層 從第1支持基板剝離。第1支持基板係由元素半導體化 合物半導體、金屬、合金、氮化物系陶瓷、氧化物系陶 瓷、金剛石、碳、塑膠等所構成,可為由此等材料所構 成的單層構造亦可為多層構造。在第2支持基板方面, 典型的是採用切割膠帶或延伸膠帶,但未受此所限。因 應需要,進一步具有:形成第2電極後,在將形成第丄電 極及第2電極的GaN系半導體層從第1支持基板剝離之前 ’於包含第2電極的全面上形成金屬層之步驟。該金屬 層可作為銲墊電極使用。因應需要而進一步具有:形成 金屬層後’在將形成第1電極及第2電極的〇_系半導體 層從第1支持基板剝離之前,按每一或複數個GaN系半 導體層於金屬層形成溝之步驟。其它只要不違反其性質 ,則與上述的半導體元件及半導體元件的製造方法之發 明相關的說明是成立的。 又’本發明的半導體元件的製造方法之特徵為具有 在由異於GaN系半導體的物質所構成的基板上直接 或間接地形成具有複數個條紋狀的開口之成長遮罩的步 驟; 使用上述成長遮罩使複數個島狀的GaN系半導體層 在上述基板上朝(0001)面方位,且使上述GaN系半導體 -11 - 201230149 層的&lt;1 100&gt;方向在平行於上述成長遮罩之上述條紋狀 的開口之方向延伸成長之步频; 在上述GaN系半導體層的上面形成—或複數個第i 電極之步驟; 在形成上述第1電極之後,除去上述成長遮罩的至 少一部分之步驟; 在除去上述成長遮罩的至少一部分之後,將形成上 述第1電極的上述GaN系I導體層從上述基板剝離之步 驟; 將形成上述第1電極的上述GaN系半導體層從上述 基板剝離之後’將形成上述第i電極的上述㈣系半導 體層之上述第1電極側,朝形成於第1支持基板的一主面 之第1有機系接著層按壓接著之步驟; 在上述GaN系半導體層的側面形成由絕緣體所構成 的侧壁隔離層之步驟; 將側面形成上述側壁隔離層的上述GaN系半導體層 ,藉由真空吸附從上述第丨支持基板剝離之後,在形成於 第2支持基板的一主面之第2有機系接著層,將複數個上 述GaN系半導體層以隔著上述側壁隔離層而相互接近的 狀態接著之步驟; 在與上述第2支持基板的上述第2有機系接著層接著 之複數個露出上述GaN系半導體層的面,形成一或複數 個第2電極之步驟;及 將形成上述第i電極及上述第2電極的上述GaN系半 導體層從上述第2支持基板剝離之步驟。 -12- 201230149 典型的是,在形成第丨電極後,將成長遮罩的大致 全部,最好為全部除去,藉此,容易將形成第丨電極的 GaN系半導體層從基板剝離。將形成第1電極的GaN系半 導體層從基板剝離的方法無特別限定,例如,藉由真允 吸附形成第1電極的GaN系半導體層之第1電極側,並朝 自基板分離的方向施力可進行剝離。第丨支持基板及第2 支持基板係由元素半導體、化合物半導體、金屬、合金 、氮化物系陶瓷、氧化物系陶瓷、金剛石、碳、塑膠等 所構成,可為由此等材料所構成的單層構造亦可為多層 構造。因應需要而進一步具有:形成第2電極後,在將 形成第1電極及第2電極的GaN系半導體層從第2支持基 板剝離之前,於包含第2電極的全面上形成金屬層之步 驟。該金屬層可作為銲墊電極使用。又,因應需要而進 一步具有:形成金屬層後,在將形成第丨電極及第2電極 的GaN系半導體層從第2支持基板剝離之前,按每一或 複數個GaN系半導體層於金屬層形成溝之步驟。再者, 亦可因應需要,在金屬層形成溝之後,將該金屬層側的 表面貼附於切割膠帶或延伸膠帶,並於剝離第2支持基 板之後’延伸切割膠帶或延伸膠帶,藉以增大GaN系半 導體層彼此之間隔而安裝形成有第1電極及第2電極的 GaN系半導體層。其它只要不違反其性質,則與上述的 半導體元件及半導體元件的製造方法之發明相關的說明 是成立的。 [發明效果] 依據本發明’從成長遮罩的條紋狀的開口在成長遮 201230149The GaN-based semiconductor layer is peeled off from the substrate. The organic underlayer may be formed on one main surface of the first support substrate, or may be formed on the upper surface side of the first electrode on which the GaN-based semiconductor layer is formed. Typically, after attaching the second supporting substrate to the second electrode side, the GaN-based semiconductor layer forming the first electrode and the second electrode is peeled off from the first supporting substrate. The first support substrate is composed of an elemental semiconductor compound semiconductor, a metal, an alloy, a nitride-based ceramic, an oxide-based ceramic, diamond, carbon, plastic, or the like, and may have a single layer structure composed of such a material or a plurality of layers. structure. In the case of the second support substrate, a dicing tape or an extension tape is typically used, but it is not limited thereto. Further, if necessary, the step of forming a metal layer on the entire surface including the second electrode before the GaN-based semiconductor layer forming the second electrode and the second electrode is formed from the first support substrate is formed. This metal layer can be used as a pad electrode. Further, if necessary, after the metal layer is formed, a groove is formed in the metal layer for each of the plurality of GaN-based semiconductor layers before the 〇-based semiconductor layer on which the first electrode and the second electrode are formed are separated from the first support substrate. The steps. Other descriptions relating to the above-described semiconductor element and method for manufacturing a semiconductor element are established as long as they do not violate the nature. Further, the method for producing a semiconductor device of the present invention is characterized in that it has a step of forming a growth mask having a plurality of stripe-shaped openings directly or indirectly on a substrate made of a substance different from a GaN-based semiconductor; The mask has a plurality of island-shaped GaN-based semiconductor layers facing the (0001) plane on the substrate, and the &lt;1 100&gt; direction of the GaN-based semiconductor-11 - 201230149 layer is parallel to the growth mask a step of extending the growth direction of the stripe-shaped opening; forming a plurality of ith electrodes on the upper surface of the GaN-based semiconductor layer; and removing at least a portion of the growth mask after forming the first electrode; After removing at least a part of the growth mask, the GaN-based I conductor layer forming the first electrode is peeled off from the substrate; and after the GaN-based semiconductor layer forming the first electrode is peeled off from the substrate, The first electrode side of the (four)-type semiconductor layer on which the ith electrode is formed is formed on the first surface of one main surface of the first support substrate a step of pressing the next layer of the device; forming a sidewall spacer formed of an insulator on a side surface of the GaN-based semiconductor layer; and forming the GaN-based semiconductor layer having the sidewall spacer on the side surface by vacuum adsorption from the above After the second support layer is formed on the first main surface of the second support substrate, a plurality of the GaN-based semiconductor layers are next to each other with the sidewall spacers interposed therebetween; a step of forming one or a plurality of second electrodes on a surface of the plurality of second organic-based adhesion layers on the second support substrate, and forming a plurality of second electrodes; and forming the ith electrode and the second electrode The step of peeling off the GaN-based semiconductor layer of the electrode from the second support substrate. -12- 201230149 Typically, after forming the second electrode, substantially all of the growth mask is removed, preferably all, and the GaN-based semiconductor layer on which the second electrode is formed is easily peeled off from the substrate. The method of peeling the GaN-based semiconductor layer in which the first electrode is formed from the substrate is not particularly limited. For example, the first electrode side of the GaN-based semiconductor layer in which the first electrode is formed is adsorbed by force, and the force is applied in a direction separating from the substrate. Peel off. The second support substrate and the second support substrate are made of an elemental semiconductor, a compound semiconductor, a metal, an alloy, a nitride ceramic, an oxide ceramic, diamond, carbon, or plastic, and may be a single material. The layer structure can also be a multilayer structure. Further, if necessary, the step of forming a metal layer on the entire surface including the second electrode before the GaN-based semiconductor layer on which the first electrode and the second electrode are formed is peeled off from the second support substrate is formed. This metal layer can be used as a pad electrode. Further, if necessary, after forming the metal layer, the GaN-based semiconductor layer forming the second electrode and the second electrode is formed in the metal layer for each of the plurality of GaN-based semiconductor layers before being peeled off from the second support substrate. The step of the ditch. Furthermore, after the groove is formed in the metal layer, the surface of the metal layer side may be attached to the dicing tape or the extension tape, and the dicing tape or the extension tape may be extended after the second support substrate is peeled off, thereby increasing A GaN-based semiconductor layer in which the first electrode and the second electrode are formed is interposed between the GaN-based semiconductor layers. Other explanations relating to the invention of the above-described semiconductor element and semiconductor element manufacturing method are established as long as they do not violate the nature. [Effect of the Invention] According to the present invention, the stripe-shaped opening of the growth mask is grown and covered 201230149

罩上橫向&gt; A 食 &lt; 島狀的GaN系半導體層之結晶性極高, 可獲得由高品暂i、&amp; 门ασ質+導體結晶所構成的GaN系半導體層。 1 *在成長複數個島狀的QaN系半導體層之情況,由於 ::等係相互分離的狀態,亦即孤立地形成,在各GaN系 半導體層發生的拉伸應力或壓縮應力僅限定在該系 =導體層内’此等拉伸應力或壓縮應力的影響不及於其 匕的GaN系半導體層。又’由於成長遮罩和GaN系半導 體層未形成化學鍵結,GaN系半導體層内的應力可藉由 在成長遮罩和GaN系半導體層之界面引起的滑動來緩和 又,由於島狀的GaN系半導體層彼此之間存在間隙, 成長複數個島狀的GaN系半導體層的基板整體具有柔軟 比外力施加時可容易地變形、撓曲。因此,即使基板 稍微存在翹曲、彎曲、變形等,仍可容易地以小的外力 將其等矯正,可利用真空夾頭搬運基板等,容易地執行 半導體元件的製程。藉由以上,可抑制基板的彎曲,使 由高品質半導體結晶所構成的島狀的GaN系半導體層成 長,且即使GaN系半導體層極厚亦可抑制裂縫等之發生 ,可容易地實現大面積的半導體元件。 又,可容易地製造在GaN系半導體層的兩面形成電 極的半導體元件。 【實施方式】 [實施發明之形態] 以下,針對用以貫施發明的形態(以下稱為實施形 態)作說明。 [第1實施形態] -14 - 201230149 針對第1實施形態之GaN系半導體元件及其製造方 法作說明。 ^ 該第1實施形態中’如圖1A所示,首先,在基底基 板1 1上形成具有複數個條紋狀的開口(以下稱為條紋窗 )12a。,A因應需要增加的後述之複數個輔助的條紋狀的 開口(以下稱為輔助條紋窗)之成長遮罩12。#為基底基 板11,由異於GaN系半導體的物質所構成的基板,例如 可使用在c面藍寶石基板或(ln)面方位的^基板等之上 朝(0001)面方位成長例如GaN層等之GaN系半導體層, 亦可使用原樣之C面藍寶石基板。在。面藍寶石基板或 (111)面方位的Si基板等之上成長的GaN層等之GaN系半 導體層的厚度例如為i〜2μιη,但未受此所限。成長遮 罩12例如在基底基板u上利用例如電漿化學蒸氣沉積 (CVD)法等形成絕緣膜,例如形成Si〇2膜之後,可藉由採 用規定的光罩之光微影術及蝕刻使該Si〇2膜圖案化而形 成。遠Si〇2膜的厚度例如〇 3μιη,但未受此所限。關於 該成長遮罩1 2的條紋窗i 2a及輔助條紋窗之形狀、配置 等容待後述。 其次,如圖1B所示,使用成長遮罩12並以蒸氣沉積 法例如金屬有機化學蒸氣沉積(M〇CVD)法使GaN系半導 體層13在(0001)面方位呈島狀成長。在該情況,首先, GaN系半導體在露出條紋窗12a的基底基板21的表面選 擇地成長,藉由繼續在成長遮罩12上橫向成長,GaN系 半導體層13成長於成長遮罩12上。於該成長期間,在島 狀的GaN系半導體層13與鄰接之島狀的GaN系半導體層 -15- 201230149 13衝撞之前停止成長。可因腌The lateral direction of the cover &gt; A food &lt; The island-shaped GaN-based semiconductor layer has extremely high crystallinity, and a GaN-based semiconductor layer composed of a high-quality i, a &lt; gate α σ-type + conductor crystal can be obtained. 1 * When a plurality of island-shaped QaN-based semiconductor layers are grown, the states in which the systems are separated from each other are formed in isolation, and the tensile stress or compressive stress generated in each GaN-based semiconductor layer is limited to the The influence of these tensile stresses or compressive stresses in the conductor layer is less than that of the GaN-based semiconductor layer. Further, since the growth mask and the GaN-based semiconductor layer are not chemically bonded, the stress in the GaN-based semiconductor layer can be alleviated by the sliding caused by the interface between the growth mask and the GaN-based semiconductor layer, and the island-shaped GaN system There is a gap between the semiconductor layers, and the entire substrate in which a plurality of island-shaped GaN-based semiconductor layers are grown is soft and can be easily deformed and deflected when applied by an external force. Therefore, even if the substrate is slightly warped, bent, deformed, or the like, it can be easily corrected with a small external force, and the substrate can be easily transported by a vacuum chuck to carry out the process of the semiconductor element. According to the above, the curvature of the substrate can be suppressed, and the island-shaped GaN-based semiconductor layer composed of the high-quality semiconductor crystal can be grown, and even if the GaN-based semiconductor layer is extremely thick, the occurrence of cracks or the like can be suppressed, and a large area can be easily realized. Semiconductor component. Further, a semiconductor element in which an electrode is formed on both surfaces of a GaN-based semiconductor layer can be easily produced. [Embodiment] [Embodiment of the Invention] Hereinafter, a mode for carrying out the invention (hereinafter referred to as an embodiment) will be described. [First Embodiment] -14 - 201230149 A GaN-based semiconductor device according to the first embodiment and a method of manufacturing the same will be described. In the first embodiment, as shown in Fig. 1A, first, an opening (hereinafter referred to as a stripe window) 12a having a plurality of stripe shapes is formed on the base substrate 11. A, a growth mask 12 of a plurality of auxiliary stripe-shaped openings (hereinafter referred to as auxiliary stripe windows) to be described later is added. In the base substrate 11, a substrate made of a material different from the GaN-based semiconductor can be grown, for example, on a c-plane sapphire substrate or a (in) plane orientation, for example, a GaN layer or the like in a (0001) plane orientation. As the GaN-based semiconductor layer, a C-plane sapphire substrate as it is can be used. in. The thickness of the GaN-based semiconductor layer such as a GaN layer grown on a surface sapphire substrate or a (111) plane-oriented Si substrate is, for example, i 2 μm, but is not limited thereto. The growth mask 12 is formed, for example, on the base substrate u by, for example, a plasma chemical vapor deposition (CVD) method, for example, after forming a Si 2 film, by photolithography and etching using a prescribed mask. The Si〇2 film is patterned to form. The thickness of the far Si 2 film is, for example, 〇 3 μm, but is not limited thereto. The shape and arrangement of the stripe window i 2a and the auxiliary stripe window of the growth mask 1 2 will be described later. Next, as shown in Fig. 1B, the GaN-based semiconductor layer 13 is grown in an island shape in a (0001) plane by a vapor deposition method such as metal organic chemical vapor deposition (M〇CVD) using a growth mask 12. In this case, first, the GaN-based semiconductor is selectively grown on the surface of the base substrate 21 on which the stripe window 12a is exposed, and the GaN-based semiconductor layer 13 is grown on the growth mask 12 by continuing to grow laterally on the growth mask 12. During this growth period, the island-shaped GaN-based semiconductor layer 13 stops growing until it collides with the adjacent island-shaped GaN-based semiconductor layer -15-201230149. Can be marinated

. 應需要決定一個島狀的GaN 系半導體層13係從幾個條呋脔 % Ύ、又1^ 12a成長。儘管圖1B中圖 示了一個島狀的GaN系半導體 ®層1 3從一個條紋窗1 2a成 長的情況’但亦可使一個島壯 馬狀的GaN系半導體層13從二 個以上的條紋窗12a成長。ΠαΧΤ &lt; , ^ QaN系半導體層13係因應於 欲製造的GaN系半導體元件, 而由包含η型層、未摻雜層 及Ρ型層當中至少一個的2層以上的層所構成。 其-人目應需要加工如此成長於成長遮罩12上的島 狀的各GaN系半導體層13,進—牛 ^ 步形成必要的電極(未圖 示)。 之後,將上述般形成元件構造的基底基板i i以例如 -個晶片含有-個島狀的GaN系半導體層13般地晶片化 ’製造目的之GaN系半導體元件。 兹針對成長迤罩12詳細說明。成長遮罩12的二個例 子示於圖2及圖3。 圖2所示的成長遮罩12係具有:在平行於(〇〇〇ι)面 方位的GaN系半導體層^的^^仏方向之第工方向及 平行於GaN系半導體層方向之第2方向,分 別以周期Pl及Pa作周期地配列且在第2方向延伸之複數 個條紋窗12a。成長遮罩12更具有:在第i方向相互鄰接 之對的條紋窗12 a之間的區域之二等分線上,以和在 第2方向相互鄰接之一對的條紋窗1 2a之相互對向的末端 ’分別僅重合長度q般設置的輔助條紋窗丨2t^該輔助 條紋窗1 2b如後述,係用以防止GaN系半導體層丨3的 Μ-100〉方向之兩端部的隆起。條紋窗12a的長度為a, 201230149 寬度為b’辅助條紋窗12b的長度為c,寬度為d。成長遮 罩12中的條紋窗1 2a及輔助條紋窗12b以外的部分係遮罩 部1 2 c。條紋窗1 2 a的長度a例如為2 0 〇〜2 〇 〇 〇 μ m,寬产匕 例如為2〜2 0 μηι,條紋窗1 2a的周期p,例如為6〜i 2 〇 ,周期P2例如為505〜1 050μηι,輔助條紋窗i2b的長度c 為概略((Pa-ahCprb-cO + tanSO。)左右,例如 α = 800μηι、 b = 5pm、ί! = 5μπι、、ρ2=810μιη時為 80 〜90μπι。寬 度d例如和寬度b相同。遮罩部12c的寬度例如係pi_b, 因而為5〇μηι ’輔助條紋窗12b和條紋窗i2a之相互重人 的長度q由於是(Pi_b-d) + tan30o + 2 ’在上述設定時為35 〜40μιη 0 圖3所示的成長遮罩12為具有:在平行於(〇〇〇1)面 方位的GaN系半導體層13的&lt;11-20&gt;方向之第1方向以周 期p 1作周期地配列’且在平行於G aN系半導體層1 3的 &lt; 1 -100&gt;方向之第2方向延伸的複數個條紋窗丨2a。如後 述’成長遮罩12更具有:為防止GaN系半導體層13在 &lt; 1 -10 0 &gt;方向之兩端部的隆起,而在第1方向以和條紋窗 12a相同周期Pi且對條紋窗12a錯開半周期Pl/2地作周期 配列’與第2方向的條紋窗1 2a的末端部僅重合長度r般地 在第2方向延伸之複數個條紋窗12a。條紋窗12a的長度a 例如為200〜2000μιη,寬度b例如為2〜20μιη,條紋窗 1 2 a的周期ρ 1例如為6〜1 2〇 μηι,遮罩部1 2c的寬度由於例 如為prb ’設例如P丨= 55μιη、b = 時則為50μπι。條紋窗 12a的末端部彼此之相互重合的長度r由於為 (Pi-b-d) + tan30° + 2 ’ 設例如 ρι = 55μηι、b = 5pm、d = 5pm 時 -17- 201230149 則為3 5〜4 0 μ m。 當使用圖2或圖3所示的成長遮罩1 2使GaN系半導體 層1 3成長時,可得以卞效果。 詳細容待後述’關於GaN系半導體的(000 1)面成長 ,平行於該面的方向之橫向成長速度是&lt;11 _2〇&gt;方向最 大,&lt;1-100&gt;方向最小。在圖2或圖3所示的成長遮罩12 中’由於條紋窗12 a的縱向是&lt; 1 -1 〇 〇 &gt;方向,在該條紋窗 12a的兩端’ GaN系半導體的成長速度小,&lt;i-i〇 〇&gt;方向 之相對的島狀的GaN系半導體層1 3彼此不合體,可將島 狀的GaN系半導體層13彼此分離。此時,&lt;1-1〇〇&gt;方向 的島狀的GaN系半導體層1 3之大小係和條紋窗1 2a的長 度a大致相等。 另一方面,由於從條紋窗12a朝&lt;11-20&gt;方向之橫向 成長速度非常大,故有必要使&lt;η_2〇&gt;方向之島狀的It is necessary to determine that an island-shaped GaN-based semiconductor layer 13 grows from a few fluffy % Ύ and 1 ^ 12a. Although FIG. 1B illustrates a case where an island-shaped GaN-based semiconductor layer 13 is grown from one stripe window 12a, it is also possible to make an island-rich GaN-based semiconductor layer 13 from two or more stripe windows. 12a grows. QαΧΤ &lt; , ^ The QaN-based semiconductor layer 13 is composed of two or more layers including at least one of an n-type layer, an undoped layer, and a Ρ-type layer in accordance with the GaN-based semiconductor element to be manufactured. It is necessary to process the island-shaped GaN-based semiconductor layers 13 thus grown on the growth mask 12, and to form necessary electrodes (not shown). Then, the base substrate i i having the above-described element-formed structure is wafer-formed for the purpose of, for example, a wafer-containing GaN-based semiconductor layer 13 as a GaN-based semiconductor element. The growth cover 12 will be described in detail. Two examples of the growth mask 12 are shown in Figs. 2 and 3. The growth mask 12 shown in FIG. 2 has a working direction in the direction of the GaN-based semiconductor layer parallel to the (〇〇〇ι) plane direction and a second direction parallel to the direction of the GaN-based semiconductor layer. The plurality of stripe windows 12a are periodically arranged in the second direction by the periods P1 and Pa, respectively. The growth mask 12 further has a bisector on a region between the stripe windows 12a adjacent to each other in the i-th direction, and a pair of stripe windows 12a adjacent to each other in the second direction. The auxiliary end strips 1 2b which are disposed only in the same manner as the length q are used to prevent the ridges of the GaN-based semiconductor layer 3 in the Μ-100> direction from being raised as will be described later. The stripe window 12a has a length a, 201230149 has a width b', and the auxiliary stripe window 12b has a length c and a width d. The portion other than the stripe window 12a and the auxiliary stripe window 12b in the growth mask 12 is the mask portion 1 2 c. The length a of the stripe window 1 2 a is, for example, 2 0 〇 2 2 〇〇〇 μ m, the wide yield 匕 is, for example, 2 to 2 0 μηι, and the period p of the stripe window 12 2a is, for example, 6 to i 2 〇, period P2 For example, 505~1 050μηι, the length c of the auxiliary stripe window i2b is approximate ((Pa-ahCprb-cO + tanSO.)), for example, α = 800μηι, b = 5pm, ί! = 5μπι, and ρ2 = 810μιη is 80 〜90μπι. The width d is, for example, the same as the width b. The width of the mask portion 12c is, for example, pi_b, and thus is 5〇μηι 'the auxiliary stripe window 12b and the stripe window i2a are mutually different in length q because it is (Pi_b-d) + Tan30o + 2 ' is 35 to 40 μm in the above setting. 0 The growth mask 12 shown in Fig. 3 has the &lt;11-20&gt; direction of the GaN-based semiconductor layer 13 parallel to the (〇〇〇1) plane orientation. The first direction is a plurality of stripe window 丨 2a extending in the second direction parallel to the &lt; 1 -100&gt; The cover 12 further has a ridge in the first direction in order to prevent the GaN-based semiconductor layer 13 from rising at both ends of the <1 - 10 0 &gt; The stripe window 12a has the same period Pi, and the stripe window 12a is periodically arranged in a half-period P1/2. The stripe window 12a in the second direction overlaps the end portion of the stripe window 12a in the second direction by a plurality of stripe windows extending in the second direction. 12a. The length a of the stripe window 12a is, for example, 200 to 2000 μm, the width b is, for example, 2 to 20 μm, and the period ρ 1 of the stripe window 12 2 a is, for example, 6 to 1 2 〇μηι, and the width of the mask portion 1 2c is, for example, When prb' is, for example, P丨=55 μm, and b= is 50 μm. The length r at which the end portions of the stripe window 12a overlap each other is (Pi-bd) + tan30° + 2 ', for example, ρι = 55μηι, b = 5 pm, d = 5 pm, -17 - 201230149 is 3 5 to 40 μm. When the GaN-based semiconductor layer 13 is grown by using the growth mask 1 2 shown in Fig. 2 or Fig. 3, the effect can be obtained. The "000 1" plane growth of the GaN-based semiconductor will be described in detail later, and the lateral growth rate in the direction parallel to the plane is &lt;11 _2〇&gt; the direction is the largest, and the &lt;1-100&gt; direction is the smallest. Or in the growth mask 12 shown in Fig. 3, because the longitudinal direction of the stripe window 12a is the &lt;1 -1 〇〇&gt; direction, Both ends of the stripe window 12a have a small growth rate of the GaN-based semiconductor, and the island-shaped GaN-based semiconductor layers 13 opposed to each other in the &lt;ii〇〇&gt; direction are not aligned with each other, and the island-shaped GaN-based semiconductor layers 13 can be mutually connected. Separation. At this time, the size of the island-shaped GaN-based semiconductor layer 13 in the &lt;1-1〇〇&gt; direction is substantially equal to the length a of the stripe window 12a. On the other hand, since the lateral growth rate from the stripe window 12a toward the &lt;11-20&gt; direction is very large, it is necessary to make the island of the &lt;η_2〇&gt;

GaN系半導體層丨3彼此不合體。為此,第1方法係將 &lt;11-20&gt;方向的條紋窗12a和條紋窗12a之間隔,亦即 &lt;11-20&gt;方向的遮罩部i2c的寬度(pi b),作成比設計上的The GaN-based semiconductor layers 3 do not conform to each other. Therefore, the first method is to design the interval between the stripe window 12a and the stripe window 12a in the &lt;11-20&gt; direction, that is, the width (pi b) of the mask portion i2c in the &lt;11-20&gt; direction. Up

GaN系半導體層13之&lt;112〇&gt;方向的寬度還大。以該方 法而言’與GaN系半導體層13的&lt;11-20&gt;方向正交之方 向的側面係成為(1 L20)面或傾斜的(11_2p)面(β為任意的 整數)。 第2方法係如圖4所示,於&lt;1 1-20&gt;方向之設計上的 GaN系半導體層1 3之兩端部正内側的部分之成長遮罩1 2 上’形成具有和成長速度最小的&lt;1-100&gt;方向等價方向 的邊之Z字形狀的條紋窗1 2a。藉此,可大幅減少GaN系 -18- 201230149 半導體層13朝&lt;1 1-20&gt;方向之橫向成長速度,可防止 &lt;11-20〉方向之島狀的GaN系半導體層13彼此合體。以 該方法而言,GaN系半導體層13的&lt;11-20&gt;方向之兩端 部的側面’係成為Z字的(1-100)面或傾斜的(1-1 0α)面(α 為任思的整數)。 第3方法係如圖5所示,於&lt;1 1-20&gt;方向之設計上的 GaN系半導體層1 3之兩端部正内側的部分之成長遮罩丄2 上’形成條紋窗12a,該條紋窗12a係在遮罩部12c兩側 父互具有平行於成長速度最小的&lt;1-1〇〇&gt;方向的直線部 和平行於&lt;11-20&gt;方向的直線部之段差形狀的邊。在該 情況,使GaN系半導體層1 3成長時,如圖6所示,以條 紋窗1 2 a的遮罩部1 2 c兩側邊的平行於&lt; 1 -1 〇 〇 &gt;方向的直 線部而言’ GaN系半導體層13係在&lt;11-20&gt;方向持續成 長,但無法在平行於&lt;1-100&gt;方向的直線部和平行於 &lt;1 1-20&gt;方向的直線部之交叉角朝 &lt;丨方向成長在 該角支配地出現成長遲緩的(1-1 〇α)面(α為任意的整數) 的結果’ GaN系半導體層13的&lt;11-20&gt;方向之兩端部的 側面係成為Z字的(1-100)面。圖5中,遮罩部i2c之兩側 的條紋窗12a的相互對向之一對的邊之凹凸係在 方向相互錯開半周期,但該錯開量並未特別限定,例如 ,亦可在&lt;1-1〇〇&gt;方向相互錯開1周期。 以第3方法而a ’如圖7所示’於成長遮罩12中,、、儿 著在&lt;1-100&gt;方向延伸的條紋窗12a,方向。 車乂佳為等間隔且相互分離,形成複數個由平行、 &lt;1-1〇〇&gt;方向的邊及平行於&lt;11-20&gt;方向的邊所構成:: •19- 201230149 方形或長方形之點狀的開口(以下稱為點窗)12 d。在今 情況,使GaN系半導體層1 3成長時,在點窗i 2d的位置 ,GaN系半導體層1 3之成長受阻礙,其結果為支配地出 現成長遲緩的(l-ΙΟα)面(α為任意的整數)。 然而’在由含有成長速度小的面之面所包圍之島狀 的GaN系半導體層1 3中’當成長速度小的面彼此對向的 GaN系半導體層1 3和GaN系半導體層13之間隔大時,會 產生如下的不良情況。亦即,以GaN系半導體層i 3和 GaN系半導體層13之間的區域之成長遮罩12的遮罩部 1 2c而言,由於原料氣體於該處不被消耗,氣體濃度升 高’在連結GaN系半導體層丨3和GaN系半導體層1 3的方 向上產生濃度梯度,因該濃度梯度導致之擴散,系 半導體層13的邊緣部分被供給較多原料氣體。其結果為 ,GaN系半導體層丨3之邊緣部分的厚度比其它部分大, 成為隆起形狀。更具體言之,以成長速度最小的 &lt;1-100&gt;方向的GaN系半導體層13和GaN系半導體層13之 間的區域之成長遮罩12的遮罩部l2c而言,由於原料氣 體:該處不被消耗,氣體濃度升高,在&lt;1-100〉方向產 生'辰度梯度’因該濃度梯度導致之擴散,GaN系半導體 曰的1 100&gt;方向之邊緣部分被供給較多原料氣體。 其結果為,GaN系半導體層⑽心.方向之邊緣部 分的厚度比其它部分大,成為隆起形狀。該〇·系半導 體層13的邊緣部分之特異的隆^,不僅產生系半導 件的構造上不良情況’還會在光微影術等之後的製 程上產生障礙。 -20- 201230149 欲防止因上述邊緣部分之特異的隆起所致島狀的The width of the GaN-based semiconductor layer 13 in the &lt;112〇&gt; direction is also large. In this method, the side surface in the direction orthogonal to the &lt;11-20&gt; direction of the GaN-based semiconductor layer 13 is a (1 L20) plane or an inclined (11_2p) plane (β is an arbitrary integer). In the second method, as shown in FIG. 4, the growth mask is formed on the growth mask 1 2 at the inner side of the both ends of the GaN-based semiconductor layer 13 in the &lt;1 1-20&gt; direction. The smallest &lt;1-100&gt; direction of the equilateral direction of the zigzag-shaped stripe window 12a. Thereby, the lateral growth rate of the GaN-based -18-201230149 semiconductor layer 13 in the &lt;1 1-20&gt; direction can be greatly reduced, and the island-shaped GaN-based semiconductor layers 13 in the &lt;11-20&gt; direction can be prevented from being combined with each other. In this method, the side faces ' of the both ends of the GaN-based semiconductor layer 13 in the <11-20> direction are Z-shaped (1-100) planes or inclined (1-1 0α) planes (α is Ren Si's integer). In the third method, as shown in FIG. 5, the stripe window 12a is formed on the growth mask 丄2 of the portion on the inner side of the both ends of the GaN-based semiconductor layer 13 in the &lt;1 1-20&gt; direction. The stripe window 12a has a stepped shape in which the straight portions of the &lt;1-1〇〇&gt; direction parallel to the growth rate and the straight line portion parallel to the &lt;11-20&gt; direction are parallel to each other on both sides of the mask portion 12c The side. In this case, when the GaN-based semiconductor layer 13 is grown, as shown in FIG. 6, the sides of the mask portion 1 2 c of the stripe window 1 2 a are parallel to the direction of &lt; 1 -1 〇〇&gt; In the straight portion, the GaN-based semiconductor layer 13 continues to grow in the &lt;11-20&gt; direction, but cannot be in a straight line parallel to the &lt;1-100&gt; direction and a line parallel to the &lt;1 1-20&gt; The result of the (1-1 〇α) plane (α is an arbitrary integer) in which the growth angle of the gradation of the GaN-based semiconductor layer 13 is increased in the direction of the 交叉-direction of the GaN-based semiconductor layer 13 The side faces at both ends are Z-shaped (1-100) faces. In Fig. 5, the concavities and convexities of the sides of the stripe window 12a on both sides of the mask portion i2c are shifted by half a period in the direction, but the amount of the offset is not particularly limited. For example, it may be in &lt; The 1-1〇〇&gt; directions are shifted by one cycle. In the third method, a' is shown in Fig. 7 in the growth mask 12, and the direction of the stripe window 12a extending in the &lt;1-100&gt; direction. The ruts are equally spaced and separated from each other to form a plurality of sides parallel to the &lt;1-1〇〇&gt; direction and sides parallel to the &lt;11-20&gt; direction:: 19- 201230149 square or A rectangular dot-shaped opening (hereinafter referred to as a dot window) 12 d. In the present case, when the GaN-based semiconductor layer 13 is grown, the growth of the GaN-based semiconductor layer 13 is hindered at the position of the point window i 2d, and as a result, the growth retardation (l-ΙΟα) plane (α) Is an arbitrary integer). However, 'in the island-shaped GaN-based semiconductor layer 13 surrounded by the surface including the surface having a small growth rate, the distance between the GaN-based semiconductor layer 13 and the GaN-based semiconductor layer 13 where the surfaces having a small growth rate face each other When it is large, the following problems will occur. In other words, in the mask portion 1 2c of the growth mask 12 in the region between the GaN-based semiconductor layer i 3 and the GaN-based semiconductor layer 13, since the source gas is not consumed there, the gas concentration rises. A concentration gradient occurs in the direction in which the GaN-based semiconductor layer 丨3 and the GaN-based semiconductor layer 13 are connected, and is diffused by the concentration gradient, and a large amount of material gas is supplied to the edge portion of the semiconductor layer 13. As a result, the thickness of the edge portion of the GaN-based semiconductor layer 3 is larger than that of the other portions, and it has a raised shape. More specifically, the mask portion l2c of the growth mask 12 in the region between the GaN-based semiconductor layer 13 and the GaN-based semiconductor layer 13 having the smallest growth rate in the &lt;1-100&gt; direction is due to the material gas: This portion is not consumed, the gas concentration is increased, and the 'think gradient' is diffused in the <1-100> direction due to the concentration gradient, and the edge portion of the 1 100&gt; direction of the GaN-based semiconductor germanium is supplied with more raw materials. gas. As a result, the thickness of the edge portion of the core direction of the GaN-based semiconductor layer (10) is larger than that of the other portions, and it has a raised shape. The specific ridges of the edge portion of the bismuth-based semiconductor layer 13 not only cause structural defects in the semiconductor structure, but also cause an obstacle in the process after photolithography or the like. -20- 201230149 To prevent island-like damage due to the specific bulging of the above edge parts

GaN系半導體層! 3的厚度不均一性必需使系半導 體層和GaN系半導體層13極力接近…成長的初期 即不產生原料氣體的面内不均—性。為此,於圖2所示 的成長遮罩12中,在&lt;ιι_2〇&gt;方向相互鄰接之一對的條 紋窗12a之間的區域之二等分線上,以和在&lt;11〇〇&gt;方向 相互鄰接之一對的條紋窗i 2a之相互對向的末端部分別 重合長度q般,換言之,在四個條紋窗12a的四個末端部 近接之區域的中心部形成輔助條紋窗丨2b,藉由島狀的GaN-based semiconductor layer! The thickness unevenness of 3 must be such that the semiconductor layer and the GaN-based semiconductor layer 13 are in close proximity to each other. In the initial stage of growth, no in-plane unevenness of the material gas is generated. For this reason, in the growth mask 12 shown in Fig. 2, in the &lt;ιι_2〇&gt; direction adjacent to one another, the bisector of the region between the stripe windows 12a, and the &lt;11〇〇 &gt; The opposite end portions of the stripe window i 2a adjacent to each other in the direction are overlapped by the length q, respectively, in other words, the auxiliary stripe window is formed at the center portion of the region where the four end portions of the four stripe windows 12a are close to each other. 2b, by island

GaN系半導體層1 3亦可從該輔助條紋窗i 2b成長所導欵 之原料氣體消耗,得到氣體濃度之面内均一性。又,在 圖3所示的成長遮罩12中,將條紋窗123在&lt;112〇&gt;方向 相互錯開半周期P i /2地配列’且 &lt; 丨_ i 〇〇&gt;方向的條紋窗 12a之末端部彼此僅重合長度r,換言之,藉由使在 &lt;11-20&gt;方向相互錯開半周期Pi/2配列的條紋窗i2a彼此 在&lt;1-100&gt;方向僅重合長度r以得到氣體濃度之面内均— 性。 使用圖2所示的成長遮罩12並利用MOCVD法成長為 島狀的GaN系半導體層1 3,此處將〇aN層的表面之掃描 式電子顯微鏡像(SEM像)示於圖8。然而,作為基底基板 U’是採用C面藍寶石基板上成長有厚度2μηι的GaN層者 °成長遮罩12係藉由厚度⑴邛出的Si〇2膜形成,條紋窗 l2a的長度a為800μιη、寬度b為5μιη,條紋窗12a的周期Pl 為55μηι、周期?2為810μιη,遮罩部12c的寬度為5〇μϊη,辅 助條紋窗12b的長度c為80μπι、寬度d為5μιη,&lt;1-1〇〇&gt;方 -21 · 201230149 向的條紋窗12a和條紋窗12a之間隔為1〇μιη,條紋窗i2a 的末端部和輔助條紋窗12b之相互重合的長度9為35μηι 。輔助條紋窗12b的長度c = 8〇[xm,係遮罩部12c的寬度 50μιη除以tan30。所求得。成長為島狀的GaN層的厚度為 5μηι。該GaN層的成長係在溫度丨1〇〇β(:、壓力3〇kpa下進 行。在該GaN層成長時,使用三甲基鎵(TMG)及氨(Nh3) 作為原料氣體,使用氫(HQ及氮(NO作為載體氣體。如 圖8所示,GaN系半導體層13以各條紋窗i2a為中心成長 為t長之六角形的島狀,GaN系半導體層1 3以各輔助條 紋窗12b為中心成長為菱形的島狀,細長之六角形 狀的GaN系半導體層13在&lt;11〇〇&gt;方向之邊緣部的 受到抑制。圖8中的箭頭符號係表示方向。另一 方面,使用未設置輔助條紋窗12b的成長遮罩12,成 島狀GaN系半導體層13的表面之SEM像係示於圖9。士、、 所不,細長之六角形的島狀的GaN系半導體層丨3 &lt;Kl00&gt;方向之兩端的邊緣部隆起。 在藉由與方向正交的方向之面,形成 :Ν系半導體層i 3之一側面的情況,由於側面成 :般停止,在鄰接之GaN系半導體層13彼 心 方向的GaN系半導體層13之邊緣二 會在之後的光微影術步驟中產生障礙。 必要極力縮小鄰接之GaN系半導體層&quot;彼此之 聚貫驗②間隔為20μιη以下,較佳為1〇μιη以下。 其-人,針對GaN系半導體的(0001)面成長中,平― 4面的方向之橫向成長速度是&lt;u_20&gt;方向最^丁 -22- 201230149 &lt; 1 -100&gt;方向最小一事作詳細說明。 作為基底基板,是採用於C面藍寶石基板上利用 MOCVD法成長有厚度2μιη的GaN層者。其次,在該基底 基板上利用電漿CVD法形成厚度0.3μιη的Si02膜。其次 ’如圖1 0所示,利用光微影術及蚀刻方式將長度800μιη 、寬度20μιη的條紋窗i2a按每ι〇。的角度形成扇狀。圖1〇 的橫軸方向是角度〇。。該角度〇。的方向係條紋窗1 2a的 縱向呈&lt;11-20&gt;方向的方向,亦係GaN恰好從條紋窗12a 在&lt;1-100&gt;方向成長的方向。將如此形成於基底基板上 之扇狀條紋窗12a再導入MOCVD裝置内,利用MOCVD 法使GaN層從條紋窗i2a選擇成長,測定成長遮罩12上 之GaN層的橫向成長量(長度)。該GaN層的成長係在溫 度1100 °C、壓力30 kP a下進行。該GaN層成長時,使用 TMG及NH3作為原料氣體,使用I及N2作為載體氣體。 其結果示於圖11。圖11的橫軸表示條紋窗12a的縱向與 GaN&lt;ll-20&gt;*向所成的角度’縱軸表示成長遮罩12上 的橫向成長量。如圖11所示,在條紋窗1 2 a的縱向與 &lt;11-20&gt;方向所成的角度是3〇。及90。的情況,換言之, 在條紋窗12a的縱向是&lt;1-100&gt;方向的情況,&lt;1 1-20&gt;方 向的成長遮罩12上之GaN層的橫向成長量為約14 μιη。相 對地,在條紋窗i 2a的縱向與&lt; 1 1 -2〇&gt;方向所成的角度是 〇 °及6 0。的情況,換言之,在條紋窗1 2 a的縱向是 &lt;n-2〇&gt;方向的情況,&lt;1-1〇〇&gt;方向的成長遮罩12上之橫 向成長量約為極小的3μπι。因此,可以說GaN層在 &lt;1-1〇〇&gt;方向實質上未成長。此外,該&lt;1-1〇〇&gt;方向之 -23- 201230149The GaN-based semiconductor layer 13 can also consume the material gas guided by the growth of the auxiliary stripe window i 2b to obtain in-plane uniformity of gas concentration. Further, in the growth mask 12 shown in Fig. 3, the stripe window 123 is arranged in the &lt;112〇&gt; direction by a half period P i /2, and the stripe of the &lt; 丨 _ i 〇〇 &gt; The end portions of the window 12a overlap each other only by the length r, in other words, the stripe windows i2a arranged in the &lt;11-20&gt; direction by the half period Pi/2 are overlapped with each other only in the &lt;1-100&gt; direction. The in-plane uniformity of the gas concentration is obtained. The GaN-based semiconductor layer 13 which was grown into an island shape by the MOCVD method using the growth mask 12 shown in Fig. 2 is shown in Fig. 8 as a scanning electron microscope image (SEM image) of the surface of the 〇aN layer. However, as the base substrate U', a GaN layer having a thickness of 2 μm is grown on the C-plane sapphire substrate, and the growth mask 12 is formed by the Si〇2 film which is formed by the thickness (1), and the length a of the stripe window l2a is 800 μm. The width b is 5 μm, and the period P1 of the stripe window 12a is 55 μm, period? 2 is 810 μm, the width of the mask portion 12c is 5 〇μϊη, the length c of the auxiliary stripe window 12b is 80 μm, the width d is 5 μm, &lt;1-1〇〇&gt; square-21 · 201230149 is the stripe window 12a and The interval between the stripe windows 12a is 1 μm, and the length 9 at which the end portions of the stripe window i2a and the auxiliary stripe window 12b overlap each other is 35 μm. The length of the auxiliary stripe window 12b is c 〇 [xm, and the width of the mask portion 12c is 50 μm divided by tan 30. Asked for. The thickness of the GaN layer grown into an island shape is 5 μm. The growth of the GaN layer is performed at a temperature of 丨1 〇〇 β (:, pressure of 3 〇 kpa. When the GaN layer is grown, trimethylgallium (TMG) and ammonia (Nh3) are used as source gases, and hydrogen is used ( HQ and nitrogen (NO is used as a carrier gas. As shown in FIG. 8 , the GaN-based semiconductor layer 13 is formed into a hexagonal island shape of t length around the stripe window i2a, and the GaN-based semiconductor layer 13 is provided with each auxiliary stripe window 12b. The GaN-based semiconductor layer 13 having an elongated hexagonal shape is suppressed in the edge portion of the &lt;11〇〇&gt; direction. The arrow symbol in Fig. 8 indicates the direction. The growth mask 12 of the auxiliary stripe window 12b is not provided, and the SEM image of the surface of the island-shaped GaN-based semiconductor layer 13 is shown in Fig. 9. The elongated hexagonal island-shaped GaN-based semiconductor layer 丨3 &lt;Kl00&gt; The edge portions of both ends of the direction are raised. When one side surface of the lanthanide semiconductor layer i 3 is formed by the surface in the direction orthogonal to the direction, the side surface is stopped as it is, and the adjacent GaN system is The edge of the GaN-based semiconductor layer 13 in the direction of the semiconductor layer 13 is in the There is an obstacle in the photolithography step. It is necessary to reduce the adjacent GaN-based semiconductor layer as much as possible. The interval between the two is less than 20 μm, preferably less than 1 μmη. It is for humans, for GaN-based semiconductors ( 0001) In the face growth, the lateral growth rate in the direction of the flat-to-four faces is the smallest in the direction of the <u_20&gt; direction ^-22- 201230149 &lt; 1 -100&gt; The minimum direction is used as the base substrate. A GaN layer having a thickness of 2 μm was grown by a MOCVD method on a surface sapphire substrate. Next, a SiO 2 film having a thickness of 0.3 μm was formed on the base substrate by a plasma CVD method. Next, as shown in FIG. 10, photolithography was performed. And the etching method is to form a stripe window i2a having a length of 800 μm and a width of 20 μm in a fan shape at an angle of ι. The horizontal axis direction of Fig. 1 is an angle 〇. The angle 〇 is oriented in the longitudinal direction of the stripe window 12a. The direction of the direction of the &lt;11-20&gt; is also the direction in which the GaN grows from the stripe window 12a in the &lt;1-100&gt; direction. The fan-shaped stripe window 12a thus formed on the base substrate is introduced into the MOCVD apparatus. MOCVD method makes Ga The N layer was selected and grown from the stripe window i2a, and the lateral growth amount (length) of the GaN layer on the growth mask 12 was measured. The growth of the GaN layer was performed at a temperature of 1100 ° C and a pressure of 30 kP a. Using TMG and NH3 as raw material gases, I and N2 were used as carrier gases. The results are shown in Fig. 11. The horizontal axis of Fig. 11 indicates the longitudinal direction of the stripe window 12a and the angle GaN&lt;ll-20&gt; The axis represents the amount of lateral growth on the growth mask 12. As shown in Fig. 11, the angle formed in the longitudinal direction of the stripe window 1 2 a and the &lt;11-20&gt; direction is 3 〇. And 90. In other words, in the case where the longitudinal direction of the stripe window 12a is the &lt;1-100&gt; direction, the lateral growth amount of the GaN layer on the growth mask 12 of the &lt;1 1-20&gt; direction is about 14 μm. Oppositely, the angle formed by the longitudinal direction of the stripe window i 2a and the &lt; 1 1 -2 〇&gt; direction is 〇 ° and 60. In other words, in the case where the longitudinal direction of the stripe window 1 2 a is the &lt;n-2〇&gt; direction, the lateral growth amount on the growth mask 12 in the &lt;1-1〇〇&gt; direction is about extremely small. 3μπι. Therefore, it can be said that the GaN layer does not substantially grow in the &lt;1-1〇〇&gt; direction. In addition, the &lt;1-1〇〇&gt; direction -23- 201230149

GaN層的側面係有傾斜的傾向且為(1_1〇α)面,α在_2至2 之間’ α = 〇是垂直面。因此’在使島狀的GaN系半導體層 成長的情況,能以(1_ 1〇〇)面作區劃。 依據該第1實施形態,從成長遮罩丨2的複數個條紋 窗12a成長於成長遮罩丨2上的GaN系半導體層13之、纟士 b 性極為良好。又,由於複數個島狀的GaN系半導體層i 3 係在相互分離的狀態形成’所以在成長時及回歸室溫時 ,各GaN系半導體層1 3發生的拉伸應力或壓縮應力僅限 於該GaN系半導體層13内,其它的(jaN系半導體層13不 受此等拉伸應力或壓縮應力所影響。又,由於成長遮罩 1 2和GaN系半導體層1 3未形成化學鍵結,GaN系半導體 層13内的應力可藉由在成長遮罩12和GaN系半導體層13 之界面引起的滑動來緩和。又’由於島狀的GaN系半導 體層1 3彼此之間存在間隙,成長GaN系半導體層1 3的基 底基板1 1整體具有柔軟性’外力施加時可容易地變形、 撓曲。因此’即使基底基板11稍微存在麵曲、彎曲、變 开&gt; 專’仍可谷易地以小的外力將其等績正,可利用真空 夾頭搬運基底基板11等’容易地執行GaN系半導體元件 的製程。 藉由以上,可抑制基底基板丨丨的彎曲,使由高品質 半導體結晶所構成的島狀的GaN系半導體層13成長,瓦 即使GaN系半導體層1 3極厚亦可抑制裂縫等之發生,$ 容易地實現大面積的GaN系半導體元件。 [第2實施形態] 針對第2只施形態之GaN系蕭特基二極體及其製造 201230149 方法作說明。 首先’與第1實施形態同樣地,如圖丨2 Α所示,在基 底基板21上形成成長遮罩22。作為基底基板21,係採用 於C面藍寶石基板上成長有厚度2μϊη的GaN層者。成長遮 罩22係與圖2所示的成長遮罩12同樣具有條紋窗22a及輔 助條紋窗(未圖示)’於&lt;1 1_2〇&gt;方向之設計上的GaN系半 導體層之兩端部正内側的部分之成長遮罩22的條紋窗 22a ’係如圖4所示具有和 &lt;〗“〇()&gt;方向等價方向的邊的z 字狀。例如’成長遮罩22是藉由厚度0.3μιη的Si02膜形 成’條紋窗22a的長度a為8〇〇μιη、寬度b為5μιη,條紋窗 22a的周期ρ^55μπι、周期?2為81(^111,遮罩部的寬度為 50μηι ’輔助條紋窗的長度^為8〇μπι、寬度d為5μπι, &lt;1-100&gt;方向的條紋窗22&amp;和條紋窗22a之間隔為5μηι,條 紋窗22a的末端部和輔助條紋窗22b之相互重合的長度q 為 3 5 μηι。 其次’如圖12Β所示,使用成長遮罩22利用MOCVD 法使摻雜有作為11型雜質的“之11 +型(3以層2 3在(0 001)面 方位呈島狀成長。該n+型GaN層23的厚度例如設為8μπι ’雜質濃度例如設為5xl018cnT3。該η+型GaN層23和η + 型GaN層23之間隔例如約設為ιομπ!。該η+型GaN層23的 成長係例如在溫度i 100°c、壓力30kPa下進行。該n+塑 GaN層23成長時,例如是使用TMG及NH3作為原料氣體 ’使用I及N2作為載體氣體,使用經氮稀釋的矽烷 (SiH4)作為η型摻雜物。在該情況,一個島狀的n +型GaN 層23係從5道條紋窗22a成長。又,此等5道條紋窗22a當 -25- 201230149 中的&lt;1 1-20&gt;方向之兩側的2道條紋窗12a係具有.如圖4所 示的Z字狀’擔任使n+型GaN層23停止朝&lt;11-20&gt;方向橫 向成長的任務。其次’為促進朝縱向成長而使成長壓力 增加至例如80kPa,調節結晶成長條件並利用m〇CVD法 使η型GaN層24在n+型GaN層23上成長。該η型GaN層24 的厚度例如設為5 μιη,雜質濃度例如設為1 x i 〇 16cm-3。η 型GaN層24如此成長之後的η+型GaN層23及η型GaN層24 之整體的&lt; 1 1 - 2 〇 &gt;方向之間隔例如約為5 μ m。如圖1 2 B所 示,於n+型GaN層23及η型GaN層24,在條紋窗22a的正 上部分及從相互鄰接之條紋窗22a橫向成長的n+型GaN層 23彼此會合的部分形成有穿透差排25。 其次,如圖13A所示,例如利用電漿CVD法全面地 形成絕緣膜,例如形成厚度為Ιμπι的Si02膜26之後,將 該Si02膜26利用光微影術及蝕刻方式圖案化成規定形狀 ,使η型GaN層24部分地露出。其次,將如此圖案化成 規定形狀的Si〇2膜26作為遮罩,將η型GaN層24藉由例如 採用氣系的蝕刻氣體的電感耦合電漿(ICP)-反應性離子 蝕刻(RIE)予以蝕刻除去,使n +型GaN層23露出。 其次,如圖1 3 B所示’例如在利用真空蒸鍵法全面 地形成歐姆金屬膜之後,將該歐姆金屬膜利用光微影術 及蝕刻方式圖案化成規定形狀,在既露出的n +型GaN層 23上形成歐姆電極27。之後,進行例如800°C、30秒的 RTA(Rapid thermal annealing ;快速退火),使歐姆電極 27和n+型GaN層23歐姆接觸。作為歐姆金屬膜,例如使 用由下算起依序是鈦(Ti)/鋁(A1)/鈦(Ti)/金(Au)的多層膜 -26- 201230149 ’各膜的厚度係設成例如第一層的Ti膜為l〇nm、A1膜為 300nm、第三層的Ti膜為3〇nm、Au膜為500nm。 其次’將Si〇2膜26利用光微影術及蝕刻方式圖案化 成規定形狀’使穿透差排25以外的部分之η型GaN層24 部分地露出。其次,在將利用光微影術形成的阻劑圖案 (未圖示)維持原樣殘留的狀態,例如利用真空蒸鍍法全 面开&gt; 成蕭特基電極形成用的金屬膜。之後,將阻劑圖案 連同形成於其上的蕭特基電極形成用的金屬膜一起除去 (掀離)。如此,在和n型GaN層24接觸的狀態形成蕭特基 電極28。作為蕭特基電極形成用的金屬膜,例如使用鎳 (Νι)/金(Au)的兩層膜’各膜的厚度例如Ni膜是5〇nm、Au 膜為lOOOnm。蕭特基電極28係藉由以〇2膜26防止和穿透 差排25直接接觸,故可防止沿著穿透差排25的電流漏洩 〇 其次’如圖14所示,在歐姆電極27上形成由Au所構 成的銲墊電極29,在蕭特基電極28上形成由AU所構成的 鲜塾電極3 0。 之後’將上述般形成二極體構造的基底基板2丨以例 如一個晶片含有一個島狀的n+型GaN層23及η型GaN層24 般晶片化,製造目的之GaN系蕭特基二極體。 依據第2貫施形態,GaN系蕭特基二極體可獲得和 第1實施形態同樣的優點。_ [第3實施形態] 針對第3實施形態之GaN系蕭特基二極體及其製造 方法作說明。 -27- 201230149 首先’與第1實施形態同樣地,如圖丨5 A所示,在基 底基板31上形成成長遮罩32。作為基底基板31,是採用 在C面藍寶石基板上成長有厚度2μηι的GaN層者。成長遮 罩32係與成長遮罩12同樣地具有條紋窗32a及輔助條紋 窗(未圖示)。例如,成長遮罩32是藉由厚度〇邛111的 Si〇2膜形成’條紋窗32a的長度a為ι〇〇〇μιη、寬度b為 ΙΟμπι,條紋窗 32a的周期 ρΑ9〇μιη、周期?2為1〇1(^111, 遮罩部的寬度為80μιη,輔助條紋窗的長度(:為12〇μιη、寬 度d為ΙΟμπι,〈丨-丨⑼〉方向的條紋窗32M〇條紋窗32&amp;之間 隔為ΙΟμηι,條紋窗32a的末端部和輔助條紋窗32b之相 互重合的長度q為55μιη。 使用成長遮罩32利用MOCVD法使摻雜有作為η型雜 質的Si之η+型GaN層33在(0001)面方位呈島狀成長。該 n+型GaN層33的厚度例如設為10μιη,雜質濃度例如設為 5xl018Cm_3。該η+型GaN層33和η+型33之間隔例如 約為ΙΟμηι。該η +型GaN層33的成長例如係在溫度丨i〇〇t&gt;c 、壓力30kPa下進行。在該型GaN層33成長時,例如 使用TMG及NH3作為原料氣體,使用^及作為載體氣 體’使用經氮稀釋的Sit作為n型摻雜物。在該情況, 一個島狀的η+型GaN層33係從一個條紋窗32a成長。其次 ’為促進朝縱向成長而調節結晶成長條件並利用 MOCVD法在n+型GaN層33上成長11型〇^層M。該11型 GaN層34的厚度例如設為5μπι,雜質濃度例如設為 lxl016cnT3。η型GaN層34如此成長之後的η+型〇以層33 隔例如約為 及η型GaN層34之整體的&lt;11-20&gt;方向之間 -28- 201230149 5μπι °於n+型GaN層33及η型GaN層34,在條紋窗32a的正 上部分形成穿透差排,其圖示省略。 其次’例如在藉由電漿CVD法全面地形成絕緣膜, 形成例如厚度為丨^的“⑴膜”之後,將該si〇2膜35利 用光微影術及蝕刻方式圖案化成規定形狀,使η型GaN 層34部分地露出。其次,將如此圖案化成規定形狀的 Si〇2膜35作為遮罩,將η型GaN層34藉由例如採用氯系的 雀虫刻氣體的ICP-RIE予以蝕刻除去,如圖15B所示,使n + 型GaN層33露出。 其次’例如在利用真空蒸鍍法全面地形成歐姆金屬 膜之後’將該歐姆金屬膜利用光微影術及蝕刻方式圖案 化成規定形狀,在既露出的n+型GaN層33上形成歐姆電 極36。之後,進行例如8〇〇t:、3〇秒的rta,使歐姆電 極3 6和η型GaN層3 3歐姆接觸。作為歐姆金屬膜,例如 係使用由下算起依序為Ti/A1/Ti/Au的多層膜,各膜的厚 度係例如第一層的Ti膜為iOnm、A1膜為300nm、第三層 的 Τι膜為 3〇nrn、Au膜為 500nm。 用光微影術形成的阻劑圖案(未圖 態,例如利用真空蒸鍍法全面地? 的金屬膜。之後,將阻劑圖亲 其次,將Si〇2膜35利用光微影術及蝕刻方式圖案化 成規定形狀,使—GaN層34部分地露出。其次,在利 示)維持原樣殘留的狀The side of the GaN layer has a tendency to be inclined and is a (1_1 〇 α) plane, and α is between _2 and 2 ' α = 〇 is a vertical plane. Therefore, when the island-shaped GaN-based semiconductor layer is grown, the (1 - 1 〇〇) plane can be used for the division. According to the first embodiment, the GaN-based semiconductor layer 13 which is grown on the growth mask yoke 2 from the plurality of stripe windows 12a of the growth mask 2 is extremely excellent in gentleman's b. In addition, since a plurality of island-shaped GaN-based semiconductor layers i 3 are formed in a state of being separated from each other, the tensile stress or compressive stress generated in each GaN-based semiconductor layer 13 is limited to the growth time and the room temperature. In the GaN-based semiconductor layer 13, the other (the ja-based semiconductor layer 13 is not affected by such tensile stress or compressive stress. Further, since the growth mask 12 and the GaN-based semiconductor layer 13 do not form a chemical bond, the GaN system The stress in the semiconductor layer 13 can be alleviated by the sliding caused by the interface between the growth mask 12 and the GaN-based semiconductor layer 13. Further, since the island-shaped GaN-based semiconductor layer 13 has a gap therebetween, the GaN-based semiconductor is grown. The base substrate 1 1 of the layer 13 has flexibility as a whole. When the external force is applied, it can be easily deformed and flexed. Therefore, even if the base substrate 11 is slightly curved, curved, and opened, it is still small. In the external force, the base substrate 11 or the like can be transported by a vacuum chuck, and the process of the GaN-based semiconductor element can be easily performed. Thereby, the bending of the base substrate 丨丨 can be suppressed, and the high-quality semiconductor can be crystallized. The island-shaped GaN-based semiconductor layer 13 is grown, and even if the GaN-based semiconductor layer 13 is extremely thick, the occurrence of cracks or the like can be suppressed, and a large-area GaN-based semiconductor device can be easily realized. [Second embodiment] The GaN-based Schottky diode of the second embodiment and the method of manufacturing the same are described in Japanese Patent Application No. 201230149. First, as in the first embodiment, as shown in FIG. 2, a growth mask 22 is formed on the base substrate 21. As the base substrate 21, a GaN layer having a thickness of 2 μϊ is grown on a C-plane sapphire substrate. The growth mask 22 has a stripe window 22a and an auxiliary stripe window as in the growth mask 12 shown in Fig. 2 (not shown). The stripe window 22a' of the growth mask 22 of the portion on the inner side of the both ends of the GaN-based semiconductor layer in the design of the &lt;1 1_2〇&gt; direction has a &lt;〗 〇()&gt; The z-shape of the side in the direction of the equivalent direction. For example, the 'growth mask 22 is formed by a SiO 2 film having a thickness of 0.3 μm. The length a of the stripe window 22a is 8 μm and the width b is 5 μm. The period of the stripe window 22a is ρ^55μπι, and the period ?2 is 81 (^111, the mask portion The width of the auxiliary stripe window is 8 μm, the width d is 5 μm, and the spacing between the stripe window 22 & and the stripe window 22a is 5 μm, the end portion of the stripe window 22a and the auxiliary stripe The length q of the window 22b coincident with each other is 3 5 μη. Next, as shown in FIG. 12A, the growth mask 22 is used to dope the 11+ type as the type 11 impurity by the MOCVD method (3 is in the layer 2 3 (0 001) The surface orientation grows in an island shape. The thickness of the n + -type GaN layer 23 is, for example, 8 μπι ', and the impurity concentration is, for example, 5 × 10 018 cn T3. The interval between the n + -type GaN layer 23 and the n + -type GaN layer 23 is, for example, approximately ιομπ!. The growth of the η + -type GaN layer 23 is carried out, for example, at a temperature of i 100 ° C and a pressure of 30 kPa. When the n+ plastic GaN layer 23 is grown, for example, TMG and NH3 are used as a material gas, and I and N2 are used as a carrier gas, and nitrogen-diluted decane (SiH4) is used as an n-type dopant. In this case, an island-shaped n + -type GaN layer 23 grows from the five-striped window 22a. Further, these five stripe windows 22a have two stripe windows 12a on both sides of the &lt;1 1-20&gt; direction in -25-201230149. The z-shaped shape as shown in Fig. 4 serves as the n+ type. The GaN layer 23 stops the task of lateral growth in the &lt;11-20&gt; direction. Next, in order to promote the growth in the vertical direction and increase the growth pressure to, for example, 80 kPa, the crystal growth conditions are adjusted, and the n-type GaN layer 24 is grown on the n + -type GaN layer 23 by the m〇CVD method. The thickness of the n-type GaN layer 24 is, for example, 5 μm, and the impurity concentration is, for example, 1 x i 〇 16 cm-3. The interval of the &lt;1 1 - 2 〇 &gt; direction of the entire n + -type GaN layer 23 and the n-type GaN layer 24 after the n-type GaN layer 24 is grown is, for example, about 5 μm. As shown in FIG. 1 2B, the n + -type GaN layer 23 and the n-type GaN layer 24 are formed in a portion where the upper portion of the stripe window 22a and the n + -type GaN layer 23 laterally grown from the adjacent stripe window 22a meet each other. There is a penetration difference of 25. Next, as shown in FIG. 13A, for example, an insulating film is formed entirely by a plasma CVD method, for example, a SiO 2 film 26 having a thickness of Ιμπι is formed, and then the SiO 2 film 26 is patterned into a predetermined shape by photolithography and etching. The n-type GaN layer 24 is partially exposed. Next, the Si〇2 film 26 thus patterned into a predetermined shape is used as a mask, and the n-type GaN layer 24 is subjected to inductively coupled plasma (ICP)-reactive ion etching (RIE) using, for example, a gas-based etching gas. The etching is removed to expose the n + -type GaN layer 23 . Next, as shown in FIG. 13B, for example, after the ohmic metal film is completely formed by the vacuum evaporation bonding method, the ohmic metal film is patterned into a predetermined shape by photolithography and etching, and the exposed n + type is formed. An ohmic electrode 27 is formed on the GaN layer 23. Thereafter, RTA (Rapid Thermal Annealing) of, for example, 800 ° C for 30 seconds is performed to bring the ohmic electrode 27 and the n + -type GaN layer 23 into ohmic contact. As the ohmic metal film, for example, a multilayer film -26-201230149 in which titanium (Ti)/aluminum (A1)/titanium (Ti)/gold (Au) is sequentially used is set as follows: The Ti film of one layer was l〇nm, the A1 film was 300 nm, the Ti film of the third layer was 3 〇 nm, and the Au film was 500 nm. Next, the Si〇2 film 26 is patterned into a predetermined shape by photolithography and etching, and the n-type GaN layer 24 of the portion other than the diffusion row 25 is partially exposed. Then, a resist pattern (not shown) formed by photolithography is maintained in a state of remaining as it is, for example, by a vacuum deposition method, and a metal film for forming a Schottky electrode is formed. Thereafter, the resist pattern is removed (without separation) together with the metal film for forming the Schottky electrode formed thereon. Thus, the Schottky electrode 28 is formed in a state of being in contact with the n-type GaN layer 24. As the metal film for forming the Schottky electrode, for example, a two-layer film of nickel (U) or gold (Au) is used. The thickness of each film is, for example, 5 nm for the Ni film and 100 nm for the Au film. The Schottky electrode 28 is prevented from directly contacting the penetrating row 25 by the 〇2 film 26, so that the current leakage along the penetrating row 25 can be prevented. Secondly, as shown in FIG. 14, on the ohmic electrode 27 A pad electrode 29 made of Au is formed, and a neodymium electrode 30 made of AU is formed on the Schottky electrode 28. Then, the base substrate 2 having the diode structure as described above is wafer-formed, for example, in which one wafer includes an island-shaped n + -type GaN layer 23 and an n-type GaN layer 24, and the GaN-based Schottky diode of the purpose is manufactured. . According to the second embodiment, the GaN-based Schottky diode can obtain the same advantages as those of the first embodiment. [Third Embodiment] A GaN-based Schottky diode of the third embodiment and a method of manufacturing the same will be described. -27-201230149 First, as in the first embodiment, as shown in Fig. 5A, a growth mask 32 is formed on the base substrate 31. As the base substrate 31, a GaN layer having a thickness of 2 μm is grown on a C-plane sapphire substrate. Similarly to the growth mask 12, the growth mask 32 has a stripe window 32a and an auxiliary stripe window (not shown). For example, the growth mask 32 is formed by a Si〇2 film having a thickness of 〇邛111. The length a of the stripe window 32a is ι〇〇〇μηη, the width b is ΙΟμπι, and the period of the stripe window 32a is ρΑ9〇μηη, period? 2 is 1〇1 (^111, the width of the mask portion is 80 μm, the length of the auxiliary stripe window (: 12〇μιη, width d is ΙΟμπι, <丨-丨(9)> direction of the stripe window 32M〇 stripe window 32& The interval is ΙΟμηι, and the length q at which the end portion of the stripe window 32a and the auxiliary stripe window 32b overlap each other is 55 μm. The η+-type GaN layer 33 doped with Si as an n-type impurity is grown by the MOCVD method using the growth mask 32. The (0001) plane orientation is grown in an island shape. The thickness of the n + -type GaN layer 33 is, for example, 10 μm, and the impurity concentration is, for example, 5×10 18 cm·3. The interval between the n + -type GaN layer 33 and the n + -type 33 is, for example, about ΙΟμηι. The growth of the η + -type GaN layer 33 is performed, for example, at a temperature of 丨i 〇〇 t &gt; c and a pressure of 30 kPa. When the GaN layer 33 is grown, for example, TMG and NH 3 are used as source gases, and as a carrier gas, 'Sit diluted with nitrogen is used as the n-type dopant. In this case, an island-shaped n + -type GaN layer 33 is grown from one stripe window 32a. Secondly, the crystal growth condition is adjusted and promoted in order to promote the growth in the longitudinal direction. The MOCVD method grows an 11-type layer M on the n + -type GaN layer 33. The thickness of the 11-type GaN layer 34 is, for example, 5 μm, and the impurity concentration is, for example, 1×1016cnT3. The n+ type germanium after the n-type GaN layer 34 is grown is separated by a layer 33, for example, about the entire n-type GaN layer 34. 11-20&gt; between directions -28 - 201230149 5μπι ° in the n + -type GaN layer 33 and the n-type GaN layer 34, a gap is formed in the upper portion of the stripe window 32a, the illustration is omitted. The insulating film is formed entirely by the plasma CVD method to form, for example, a "(1) film having a thickness of 丨^, and the Si〇2 film 35 is patterned into a predetermined shape by photolithography and etching so that the n-type GaN layer 34 is formed. Partially exposed. Next, the Si〇2 film 35 thus patterned into a mask is used as a mask, and the n-type GaN layer 34 is removed by ICP-RIE using, for example, a chlorine-based gas, as shown in FIG. 15B. As shown, the n + -type GaN layer 33 is exposed. Next, for example, after the ohmic metal film is entirely formed by vacuum evaporation, the ohmic metal film is patterned into a predetermined shape by photolithography and etching, and is exposed. An ohmic electrode 36 is formed on the n + -type GaN layer 33. Thereafter, For example, 8 〇〇t:, 3 sec of rta, the ohmic electrode 36 and the n-type GaN layer are 3 ohmically contacted. As the ohmic metal film, for example, Ti/A1/Ti/Au is used in order from the bottom. For the multilayer film, the thickness of each film is, for example, the Ti film of the first layer is iOnm, the film of A1 is 300 nm, the film of the third layer is 3 〇 nrn, and the film of Au is 500 nm. A resist pattern formed by photolithography (not shown, for example, a metal film that is fully formed by vacuum evaporation). Thereafter, the resist pattern is followed, and the Si〇2 film 35 is photolithographically and etched. The pattern is patterned into a predetermined shape, and the GaN layer 34 is partially exposed. Secondly, it is retained in the original state.

-29- 201230149 膜的厚度係设成例如Ni膜為5〇ηιη、au膜為500nm。 其-入’在蕭特基電極37上形成比該蕭特基電極37大 的鲜塾電極38 ’在歐姆電極36上形成銲墊電極39。 之後’將上述般形成二極體構造的基底基板3丨以例 如個s曰片含有一個島狀的n +型GaN層33及η型GaN層34 般晶片化,製造目的之GaN系蕭特基二極體。 依據第3貫施形態,GaN系蕭特基二極體可獲得和 第1貫施形態同樣的優點。 [第4實施形態] 針對第4實施形態之GaN系蕭特基二極體及其製造 方法作說明。 首先’如圖16A所示,在(1 1 1)面方位的si基板41a 上’例如厚度5nm的A1N膜和厚度20nm的GaN膜交互積層 之例如厚度約1 μιη左右的AlN/GaN多層膜41b而成的基底 基板41’形成與第1實施形態同樣的成長遮罩42。成長 遮罩42係與成長遮罩12同樣具有條紋窗42a及輔助條紋 窗(未圖示)。例如,成長遮罩42是藉由厚度0.3 μιη的 Si〇2膜形成’條紋窗42a的長度a為looopm、寬度b為 ΙΟμπι,條紋窗42a的周期卩1為9〇0111、周期p2為1〇1〇μιη, 遮罩部的寬度為80μιη,輔助條紋窗的長度c為ΐ2〇μιη、寬 度d為ΙΟμηι ’〈卜100&gt;方向的條紋窗42a和條紋窗42a之間 隔為ΙΟμηι,條紋窗42a的末端部和輔助條紋窗42b之相 互重合的長度q為55μιη。 其次,使用成長遮罩42利用MOCVD法使摻雜有作為 η型雜質的Si之η+型GaN層43在(〇〇〇1)面方位呈島狀成長 -30- 201230149 。該η型GaN層43的厚度例如為8μηι,雜質濃度例如為 5χ 10 cm 3。該η+型GaN層43和η+型GaN層43之間隔例如 約為ΙΟμηι。該n+型GaN層43的成長係例如在溫度丨ioot 、壓力30kPa下進行。在該n+型(^以層43成長時,例如 使用TMG及NH3作為原料氣體,使用仏及a作為載體氣 體,使用經氮稀釋的SiH4作為n型摻雜物。在該情況’ 一個島狀的η +型GaN層43係從一個條紋窗42a成長。其次 ’為促進朝縱向成長而將成長壓力增加至例如8〇kPa, 調節結晶成長條件並利用M〇CVD法使η型GaN層44成長 於n+型GaN層43上。該n型GaN層44的厚度例如設為5μηι ,雜質濃度例如設為lxl0i6cm-、I^GaN層44如此成長 之後的n+型GaN層43及η型GaN層44之整體的&lt;n_2〇&gt;方 向的間隔例如約為5 μηι。如圖16A所示,於n+型GaN層43 及η型GaN層44,在條紋窗42a的正上部分形成穿透差排 45 ° 其次’如圖16B所示,例如塗布有機s〇G(Spin on glass)液(未圖示)並填埋n+型GaN層43及^型GaN層44間 的間隙而將表面平坦化後,例如在利用電漿CVD法全面 地形成絕緣膜,形成例如厚度為1 的si〇2膜46後,將 3亥Si〇2膜46利用光微影術及蝕刻方式圖案化成規定形狀 ’僅殘留穿透差排45上的部分之Si〇2膜46。 其次,例如利用真空蒸鍍法全面地形成蕭特基電極 形成用的金屬膜,並形成作為蕭特基電極的上部電極47 。作為蕭特基電極形成用的金屬膜,例如使用Ni/Au的 兩層膜’各膜的厚度係設成例如Ni膜為50nm、Au膜為 -31 - 201230149 500nm 〇 其次,將基底基板4 1的Si基板4 1 a背面側利用研磨 等薄化成例如厚度50〜ΙΟΟμηι左右之後,在與成長遮罩 42的條紋窗42a對應的部分之Si基板4 1 a上,形成例如寬 度為約2 0 μιη左右的條紋狀的通孔4 8,使該通孔4 8的底 部之AlN/GaN多層膜41b露出。 其次’經由通孔48將AlN/GaN多層膜41b利用例如 採用氯系#刻氣體的電漿钮刻予以除去,接著經由通孔 48將成長遮罩42触刻除去而使n +型GaN層43露出。 其次’從S i基板4 1 a的背面側利用例如真空蒸錄法 形成歐姆金屬膜並形成下部電極49。作為歐姆金屬膜, 例如使用Ti/Al/NiAu多層膜。 之後,將上述般形成二極體構造的基底基板4丨以例 如一個晶片含有一個島狀的n +型GaN層43及η型GaN層44 般地晶片化’製造目的之GaN系蕭特基二極體。 此外’亦可因應需要,在通孔4 8的内部藉由例如鍍 敷Au、Cu等予以完全地填埋,將Si基板41 a的背面側之表 面平坦化後形成下部電極49。如此,藉由通孔48的内部 以Au、Cu等填埋可使熱傳導性提升,可抑制GaN系蕭特 基二極體動作時之發熱所導致的溫度上升。 依據第4實施形態,GaN系蕭特基二極體可獲得和 第1實施形態同樣的優點。 [第5實施形態] 針對第5實施形態之GaN系MIS(金屬-絕緣體_半導體 )場效電晶體(FET)及其製造方法作說明。 -32- 201230149 首先,如圖17A所示,在(111)面方位的^基板51a 上成長例如厚度5nm的A1N膜和厚度20nm的GaN膜交互 積層之例如厚度約Ιμηι左右的AlN/GaN多.層膜51b而成的 基底基板5 1上,與第1實施形態同樣地形成成長遮罩52 。成長遮罩52係與成長遮罩12同樣地具有條紋窗52a及 辅助條紋窗(未圖示)。例如,成長遮罩52是藉由厚度 0·3μπι的Si〇2膜形成’條紋窗52a的長度&amp;為1〇〇〇叫、寬度 b為ΙΟμηι,條紋窗52a的周期?1為9〇μιη、周期?2為1010μπ1 ’遮罩部的寬度為80μιη ’輔助條紋窗的長度^為Ι20μπι 、寬度d為ΙΟμιη,&lt;1-1〇〇&gt;方向的條紋窗52a和條紋窗52a 之間隔為ΙΟμηι ’條紋窗52a的末端部和輔助條紋窗52b 之相互重合的長度q為55μηι。 其次,使用成長遮罩52利用MOCVD法使摻雜有作為 η型雜質的Si之η+型GaN層53在(0001)面方位呈島狀成長 。該n+型GaN層53的厚度例如設為8μιη,雜質濃度例如 設為5x l〇18cm-3。該η+型GaN層53和η+型GaN層53之間隔 例如約為1〇μη^該n+型GaN層53的成長例如係在丨1〇〇。〇 、30kPa下進行。在該n+型GaN層53成長時,例如係使 用TMG及NH3作為原料氣體’使用仏及n2作為載體氣體 ’使用經氮稀釋的SiHU作為n型摻雜物。在該情況,— 個島狀的η +型GaN層53係從一個條紋窗52a成長。其次, 以可促進朝縱向成長般地將成長壓力增加至例如80kPa ’ 5周節結晶成長條件並利用MOCVD法使η型GaN層54在 η型GaN層5 3上成長。該n型GaN層5 4的厚度例如設為 雜質浪度例如設為lx1016cm·3。η型GaN層54如此 -33- 201230149 成長之後的n+型GaN層53及η型GaN層54之整體的 &lt;11-20&gt;方向之間隔例如約為5μιη。 其次’如圖17Β所示,緊接於η型GaN層54的成長之-29- 201230149 The thickness of the film is set to, for example, a Ni film of 5 〇ηηη and an au film of 500 nm. A pad electrode 39 is formed on the ohmic electrode 36 by forming a fresh ruthenium electrode 38' on the Schottky electrode 37 which is larger than the Schottky electrode 37. Then, the base substrate 3 having the above-described diode structure is formed into a wafer-like n + -type GaN layer 33 and an n-type GaN layer 34, for example, and the GaN-based Schottky is produced. Diode. According to the third embodiment, the GaN Schottky diode can obtain the same advantages as the first embodiment. [Fourth embodiment] A GaN-based Schottky diode of the fourth embodiment and a method for producing the same will be described. First, as shown in FIG. 16A, an AlN/GaN multilayer film 41b having a thickness of about 1 μm, for example, is alternately laminated on the (1 1 1) plane-oriented si substrate 41a, for example, an A1N film having a thickness of 5 nm and a GaN film having a thickness of 20 nm. The base substrate 41' is formed into a growth mask 42 similar to that of the first embodiment. The growth mask 42 has a stripe window 42a and an auxiliary stripe window (not shown) similarly to the growth mask 12. For example, the growth mask 42 is formed by a Si〇2 film having a thickness of 0.3 μm. The length a of the stripe window 42a is looopm, the width b is ΙΟμπι, and the period 卩1 of the stripe window 42a is 9〇0111, and the period p2 is 1〇. 1〇μιη, the width of the mask portion is 80 μm, the length c of the auxiliary stripe window is ΐ2〇μηη, the width d is ΙΟμηι '<布100>, the interval between the stripe window 42a and the stripe window 42a is ΙΟμηι, and the stripe window 42a The length q at which the tip end portion and the auxiliary stripe window 42b overlap each other is 55 μm. Next, the n + -type GaN layer 43 doped with Si as an n-type impurity is grown in an island shape by the MOCVD method using the growth mask 42 in the (〇〇〇1) plane orientation -30 - 201230149 . The n-type GaN layer 43 has a thickness of, for example, 8 μm and an impurity concentration of, for example, 5 χ 10 cm 3 . The interval between the n + -type GaN layer 43 and the n + -type GaN layer 43 is, for example, about ΙΟμηι. The growth of the n + -type GaN layer 43 is performed, for example, at a temperature of 丨ioot and a pressure of 30 kPa. In the case of the n + type (for the growth of the layer 43 , for example, TMG and NH 3 are used as the material gases, and a and a are used as the carrier gas, and SiH 4 diluted with nitrogen is used as the n-type dopant. In this case, an island-like The η + -type GaN layer 43 is grown from one stripe window 42 a. Next, in order to promote the growth in the longitudinal direction, the growth pressure is increased to, for example, 8 kPa, the crystal growth condition is adjusted, and the n-type GaN layer 44 is grown by the M CVD method. On the n + -type GaN layer 43 , the thickness of the n-type GaN layer 44 is, for example, 5 μm, and the impurity concentration is, for example, lx10i6 cm-, and the entire n+-type GaN layer 43 and the n-type GaN layer 44 after the I^GaN layer 44 is grown. The interval of the &lt;n_2〇&gt; direction is, for example, about 5 μm. As shown in Fig. 16A, in the n + -type GaN layer 43 and the n-type GaN layer 44, a penetration difference row 45 is formed in the upper portion of the stripe window 42a. Next, as shown in FIG. 16B, for example, an organic s〇G (Spin on glass) liquid (not shown) is applied and a gap between the n+ type GaN layer 43 and the GaN layer 44 is filled to planarize the surface, for example, After the insulating film is integrally formed by the plasma CVD method to form, for example, a Si 〇 2 film 46 having a thickness of 1, a 3 〇 Si 〇 2 film 46 is formed. By patterning and etching, it is patterned into a predetermined shape of the Si〇2 film 46 which is only partially penetrated through the difference row 45. Next, a metal film for forming a Schottky electrode is integrally formed by, for example, vacuum deposition. The upper electrode 47 is formed as a Schottky electrode. As the metal film for forming the Schottky electrode, for example, a two-layer film of Ni/Au is used, and the thickness of each film is set to, for example, a Ni film of 50 nm and an Au film. -31 - 201230149 500 nm. Next, the back surface of the Si substrate 4 1 a of the base substrate 4 1 is thinned to a thickness of 50 to ΙΟΟ μηι by polishing or the like, and then a portion of the Si substrate corresponding to the stripe window 42 a of the growth mask 42 is formed. On the 4 1 a, a stripe-shaped via hole 4 8 having a width of about 20 μm or so is formed, and the AlN/GaN multilayer film 41b at the bottom of the via hole 48 is exposed. Next, 'AlN/GaN is passed through the via hole 48. The multilayer film 41b is removed by, for example, a plasma button using a chlorine-based gas, and then the growth mask 42 is removed by contact with the via hole 48 to expose the n + -type GaN layer 43. Next, 'from the Si substrate 4 1 The back side of a forms a Europe by, for example, vacuum evaporation The metal film is formed into a lower electrode 49. As the ohmic metal film, for example, a Ti/Al/NiAu multilayer film is used. Thereafter, the base substrate 4 having the above-described diode structure is formed such that one wafer contains an island-shaped n + type. The GaN layer 43 and the n-type GaN layer 44 are wafer-formed into a GaN-based Schottky diode for manufacturing purposes. Further, if necessary, the inside of the through hole 48 may be completely filled with, for example, Au, Cu, or the like, and the surface of the back surface side of the Si substrate 41a may be flattened to form the lower electrode 49. By filling the inside of the through hole 48 with Au, Cu or the like, the thermal conductivity can be improved, and the temperature rise due to heat generation during the operation of the GaN Schottky diode can be suppressed. According to the fourth embodiment, the GaN-based Schottky diode can obtain the same advantages as those of the first embodiment. [Fifth Embodiment] A GaN-based MIS (Metal-Insulator-Semiconductor) field effect transistor (FET) and a method of manufacturing the same according to the fifth embodiment will be described. -32- 201230149 First, as shown in FIG. 17A, an AlN/GaN having a thickness of about Ιμηι is grown on the substrate 51a of the (111) plane orientation, for example, an A1N film having a thickness of 5 nm and a GaN film having a thickness of 20 nm. A growth mask 52 is formed on the base substrate 51 of the layer film 51b in the same manner as in the first embodiment. The growth mask 52 has a stripe window 52a and an auxiliary stripe window (not shown) similarly to the growth mask 12. For example, the growth mask 52 is formed by a Si〇2 film having a thickness of 0·3 μm. The length of the stripe window 52a is 1 〇〇〇, the width b is ΙΟμηι, and the period of the stripe window 52a is? 1 is 9〇μιη, cycle? 2 is 1010μπ1 'the width of the mask portion is 80μιη' The length of the auxiliary stripe window is Ι20μπι, the width d is ΙΟμιη, and the interval between the stripe window 52a and the stripe window 52a in the &lt;1-1〇〇&gt; direction is ΙΟμηι' stripe The length q at which the end portion of the window 52a and the auxiliary stripe window 52b coincide with each other is 55 μm. Then, the n + -type GaN layer 53 doped with Si as an n-type impurity is grown in an island shape in the (0001) plane direction by the MOCVD method using the growth mask 52. The thickness of the n + -type GaN layer 53 is, for example, 8 μm, and the impurity concentration is, for example, 5 × l 〇 18 cm -3 . The interval between the n + -type GaN layer 53 and the n + -type GaN layer 53 is, for example, about 1 μm, and the growth of the n + -type GaN layer 53 is, for example, 丨1〇〇. 〇, 30kPa. When the n + -type GaN layer 53 is grown, for example, TMG and NH 3 are used as a material gas, and ruthenium and n 2 are used as a carrier gas. As a n-type dopant, nitrogen-diluted SiHU is used. In this case, the island-shaped η + -type GaN layer 53 grows from one stripe window 52a. Then, the n-type GaN layer 54 is grown on the n-type GaN layer 53 by MOCVD by increasing the growth pressure to, for example, 80 kPa '5 cycles of crystal growth conditions. The thickness of the n-type GaN layer 504 is, for example, an impurity wave degree of, for example, 1×10 16 cm·3. The n-type GaN layer 54 is such that the interval of the &lt;11-20&gt; direction of the entire n+-type GaN layer 53 and the n-type GaN layer 54 after growth is, for example, about 5 μm. Next, as shown in Fig. 17A, the growth of the n-type GaN layer 54 is followed.

後’例如在使摻雜有作為p型雜質的鎂(Mg)的〆型GaN 層56全面地成長之後,將該p +型GaN層56利用光微影術 及蝕刻方式圖案化成規定形狀。該p +型GaN層56的厚度 設成例如約500nm,雜質濃度設成例如5Xl〇i9cm-\該 p型GaN層56的成長例如係在溫度丨1〇〇〇c、壓力3〇kPa 下進行。在該p +型GaN層56成長時,例如係使用TMG及 NH3作為原料氣體,使用^及n2作為載體氣體,使用雙( 環戊二烯)鎂(CpaMg)作為p型摻雜物。該p+型〇以層56之 #刻’例如係利用採用氣系的蝕刻氣體之ICp_RIE進行 〇 其次,例如利用MOCVD法,以覆蓋既圖案化成規定 形狀的p+型GaN層56般,全面地成長摻雜有作為η型雜質 的Si之η型GaN層57 ’接著同樣地使摻雜有作為η型雜質 的Si之η型GaN層5 8成長。η型GaN層57的厚度設成例如 lOOOnm ’雜質濃度設成例如lxl0i7cm-3,n+型〇^層58 的厚度設成例如lOOnm,雜質濃度設成例如5xl〇18cm-3。 其次’將η型GaN層57及n+型GaN層58利用光微影術 及钮刻方式圖案化成規定形狀後’利用光微影術及敍刻 方式將n+型GaN層58的一部分除去。該蝕刻係例如利用 採用氯系氣體的ICP-RIE進行。 其次’例如利用電漿C V D法全面地形成例如§丨〇 2膜 或SiN膜等之絕緣膜後,將該絕緣膜利用光微影術及姓 -34- 201230149 刻方式圖案化成規定形狀’於η型GaN層57上形成閘極絕 緣膜59。該問極絕緣膜59的厚度例如約為5〇ηιη左右。 其次’例如在利用真空蒸鍍法全面地形成Ni膜之後 t ’藉由將該Ni膜利用例如光微影術及蝕刻方式圖案化成 規定形狀,在閘極絕緣膜5 9上形成閘極電極6 0。 其次’例如在利用真空蒸鍍法全面地形成Ti/A1/Au 多層膜之後’藉由將該Ti/Al/Au多層膜例如利用光微影 術及蝕刻方式圖案化成規定形狀,在n +型〇以層58上形 成源極電極6 1。 其次’藉由將基底基板51的Si基板51a從背面側研 磨等而薄化成例如厚度5〇〜1 〇〇μηι左右之後,在與成長 遮罩5 2的條紋窗5 2 a對應的部分之S i基板5 1 a上,形成例 如寬度為約20μιη左右的條紋狀的通孔62,使AlN/GaN多 層膜51b在該通孔62的底部露出。 其次,經由通孔62將AlN/GaN多層膜51b利用例如 採用氯系蝕刻氣體的電漿蝕刻予以除去,接著經由通孔 62將成長遮罩52蝕刻除去而使n +型GaN層53露出。 其次’藉由從基底基板5 1的背面側利用例如真空蒸 鐘法形成歐姆金屬膜並形成汲極電極63。作為歐姆金屬 膜’例如係使用Ti/Al/NiAu多層膜。 藉由以上,製造目的之GaN系MISFET。 此外’因應需要,n +型GaN層58例如能以η型AlGaN 層或未摻雜的A1 GaN層置換。 又’亦可因應需要,在藉由通孔6 2的内部以例如鍍 敷Au、Cu等予以完全地填埋,將基底基板5丨的背面側之 -35- 201230149 表面平坦化後形成汲極電極6 3。如此,藉由通孔6 2的内 部以Au、Cu等予以填埋可使熱傳導性提升,可抑制因 GaN系MISFET動作時之發熱所··致溫度上升。 針對該GaN系MISFET的動作進行說明。 該GaN系MISFET中,n+型GaN層58成為源極區域, η型GaN層53成為汲極區域,η型GaN層54、57成為通道 £域。在作為通道區域的n型GaN層57之下部設有高雜 質濃度的P +型GaN層56。由於在閘極電極60之源極電極 6 1側的端部正下未形成n+型GaN層5 8,故作為通道區域 的η型GaN層57因p +型GaN層56導致空乏層擴大。因此, 該GaN系MISFET是常關構造。藉由對閘極電極6〇施加 正(+ )的偏電壓’會在與該閘極電極60之正下的閘極絕 缘膜59的界面附近之n型GaN層57感應電子,其結果為 ’在源極電極6 1和汲極電極63之間形成通道,故該GaN 系MISFET成為導通狀態’電流流通於源極電極6丨和汲 極電極63之間。該GaN系MISFET中,藉由p+型GaN層56 所擁有的高能障壁,可獲得高的汲極耐壓。又,由於高 雜質濃度的n+型GaN層5 8形成源極區域,故可縮小源極 電阻。又’儘管p +型GaN層56之下的η型GaN層54的厚度 薄至5μπι左右,由於GaN的破壞電壓是相當大的 3〇〇ν/μηι,故可獲得高的汲極耐壓。 依據該第5實施形態,GaN系MISFET可獲得和第1 實施形態同樣的優點。 [第6實施形態] 第6實施形態中’係在第3實施形態之GaN系蕭特基 -36- 201230149 二極體的製造方法中,特別針對使用c面藍寶石基板作為 基底基板3 1的情ί兄作說明。 首先,與第3實施形態同樣地,如圖丨5Α所示,在基 底基板31的C面藍寶石基板上直接形成成長遮罩32。 其次,將如此形成成長遮罩32的C面藍寶石基板導 入MOCVD裝置,例如,藉由在由Η2和之混合氣體所 構成的載體氣體中於1 l00〇c下保持5分鐘而進行表面清 淨化。 其次’例如’將溫度降至55〇〇C之後,供給NH3及 TMG,使非結晶狀的GaN層成長約30nm的厚度。 其次,一邊流通NH3—邊使溫度上升至i150°c,在 5亥/m度下保持1 0分鐘後,在例如1 〇 5 0〜1 1 〇 〇 °C的溫度下 供給TMG及SiH4,使n+型GaN層33及η型GaN層34成長。 藉此’可使島狀的n +型GaN層33及η型GaN層34成長。 之後的步驟和第3實施形態相同。 依據該第6實施形態’除了和第3實施形態同樣的優 點以外’由於可使用C面藍寶石基板作為基底基板31, 故無需在C面藍寶石基板上成長GaN層,光是如此就可 謀求簡化GaN系蕭特基二極體的製造步驟,可獲得能謀 求減低GaN系蕭特基二極體的製造成本之優點。 [第7實施形態] 針對第7實施形態之GaN系半導體元件的製造方法 作說明。 該第7實施形態中,與第1實施形態同樣地,如圖 18A所示,在基底基板11上使用圖3所示的成長遮罩12, -37- 201230149 使GaN系半導體層13在(_υ面方位呈島狀成長後,在 該GaN系半導體層13上面(以下稱為「第!面丨^」)上形成 必要的第1電極14。該第!電極14的材料及該第i電極 之形成方法係因應需要而選擇。該第丨電極14的材料係 因應於該第!電極14是歐姆電極或蕭特基電極,或該第工 電極14所接觸之GaN系半導體層13的最上層之導電型而 I且選擇具體而s ,該第1電極丨4例如係使用由下算 起依序是Ni/Au/Ni的多層膜,各膜的厚度例如,設成第 一層的Ni膜為5nm、Au膜為5〇〇nm、第二層的犯膜為 100nm。又,該第i電極M係藉由在利用例如真空蒸鍍 法或濺鍍法等全面地形成第丨電極14形成用的金屬膜^ 合金膜之後,將此等金屬膜或合金膜利用光微影術及蝕 刻方式圖案化成規定形狀而形成。圖丨8a中,第^電極Μ 係形成在除了 GaN系半導體層13的第!面13a之周邊部以 外的部分,例如和緣部相距6μπι以上内側的部分但亦 可形成於GaN系半導體層13的第1面133的整體。 、其次,如圖18B所示,將成長遮罩12利用濕式蝕刻 法等予以除去。例如,成長遮罩12是由Si〇2膜所構成的 情況,利用採用緩衝氟酸的濕式蝕刻予以除去。該成長 遮罩12之除去並非必需,但在用以提升後述的系斗 導體層13之分離的良率上是有效的。 其次,如圖19所示,準備一主面上形成接著用金屬 b的第1支持基板16,使該第丨支持基板16的接著用金屬 15,和形成在基底基板η上的GaN系半導體層η之第1面 13a上的第i電極14對向。作為接著用金屬15,可使用銲 -38 - 201230149 膏,更具體言之,例如使用Au/Sn銲膏薄膜。又,作為 第1支持基板16,例如,可使用Si等之元素半導體、sic 、GaAs、GaP、AIN ' GaN、ZnO等之化合物半導體、 各種的金屬、合金、氮化物系陶瓷、氧化物系陶瓷、金 剛石、碳、塑膠等所構成者,因應需要作選擇。若要舉 出第1支持基板1 6的典型例,則為Si基板。 其次,如圖20所示,使第!支持基板丨6的接著用金 屬15和形成在基底基板n上的GaN系半導體層13上之第 1電極14接觸,在該狀態進行加熱使接著用金屬15熔融 藉以與第1電極14銲著。如此,第丨支持基板16被接著於 形成在基底基板11上的GaN系半導體層13之第1面13&amp;上 =第:電極14。例如,在作為接著用金屬15是使用Au/sn 銲膏薄膜、第1電極14是由上述的Ni膜、Au膜及其上的 Ni膜所構成多層金屬膜所構成的情況,藉由使第i支持 基板16的接著用金屬15和第1電極14接觸的狀態下加熱 約〇C使接著用金屬15炼融以與第i電極14銲著, 將第1支持基板1 6接著於該第1電極1 4。 其次,如圖2 1所示,如上述般將藉由接著而一體化 的基底基板11及第1支持基板16,在基底基板1H„GaN系 :導3層13之間剝離。具體而言’例如,藉由對成為一 其的土底基板1 1及第1支持基板1 6予以超音波刺激,而在 二士土板1 1和GaN系半導體層i 3之間剝離。或者,亦可 I一Γί為—體的基底基板11及第1支持基板16的端面 ^ 加機械力刺激,而在基底基板1 1和GaN系半 曰13之間剝離。將如此藉由在基底基板&quot;和。-系 -39- 201230149 半導體層1 3之間被剝離而露出之GaN系半導體層1 3的面 稱為第2面1 3 b » 其次,如圖22所示,在GaN系半導體層13的第2面 13b上形成必要的第2電極17。該第2電極17的材料及該 第2電極1 7之形成方法係因應需要而選擇。該第2電極i 7 的材料係因應於該第2電極1 7是歐姆電極或蕭特基電極 ’或該第2電極17所接觸之GaN系半導體層13的最上層 之導電型而適宜選擇。具體而言,該第2電極17係例如 使用由下算起依序是Ti/Al/Au的多層膜,各膜的厚度例 如。又Ti膜為5nm ' A1膜為45nm、Au膜為1 〇nm。又,該第 2電極1 7係藉由在利用例如真空蒸鍍法或濺鍍法等全面 地形成第2電極17形成用的金屬膜或合金膜之後,將此 等金屬膜或合金膜利用光微影術及触刻方式圖案化成規 定形狀而形成。圖22中,第2電極17係形成於GaN系半 導體層13的第2面13b之整體,但亦可形成在除了 GaN系 半導體層1 3的第2面1 3 b之周邊部以外的部分,例如和緣 部相距6μιη以上内側的部分。在第2電極1 7是歐姆電極 的情況’因應需要’在GaN系半導體層13的第2面13b上 形成第2電極1 7後’對該第2電極1 7照射雷射光進行雷射 退火’藉此可使第2電極1 7以比GaN系半導體層1 3更低 電阻進行歐姆接觸。例如,第2電極1 7是由上述的Ti膜 、A1膜及Au膜所構成之合計的厚度為50nm的多層金屬膜 所構成的情況’藉由使用波長2 6 6 n m的雷射光,由於該 多層金屬膜的光透過率為〜20%左右且雷射光會被充分 地吸收’故可將GaN系半導體層13和第2電極17之界面 -40- 201230149 充分地加熱,可進行充分的雷射退火。 其次’如圖23所示’準備一主面形成接著用金屬( 未圖示)的第2支持基板1 8,使該第2支持基板1 8的接著 用金屬,和形成在第1支持基板16上的GaN系半導體層13 的第2面13b上之第2電極17接觸,在該狀態進行加熱使 接著用金屬熔融藉以與第2電極17銲著。如此,第2支持 基板18被接著於形成在第1支持基板16上的GaN系半導 體層13的第2面13b之第2電極17。例如,在作為接著用 金屬疋使用Au/Sn鲜膏薄膜、第2電極14是由上述的Ni膜 、Au膜及其上的Ni膜所構成之多層金屬膜所構成的情況 ’藉由使第2支持基板18的接著用金屬和第2電極17接觸 的狀態下加熱至約250°C,使接著用金屬熔融以與第2電 極17銲著’將第2支持基板18接著於該第2電極17。作為 接著用金屬可使用銲膏’更具體言之,例如使用Au/sn 銲膏薄膜。又’作為第2支持基板1 8,係可和第1支持基 板16同樣地’例如可使用Si等之元素半導體、Sic GaAs、GaP、AIN、GaN、ZnO等之化合物半導體、各種 的金屬、合金、氮化物系陶瓷、氧化物系陶瓷、金剛石 、碳、塑膠等所構成者,雖可因應需要來選擇,但其中 以使用富放熱性之例如Cu等之金屬或合金者較佳。舉出 第2支持基板1 8的典型例,例如在以板(厚度例如i 鍍 敷Au及形成Au/Sn銲膏薄膜者,或,形成金屬線路的 A1N陶瓷基板。 藉由以上,如圖23所示,在GaN系半導體層丨3的第 1面13a形成第1電極14、而在第2面13b形成第2電極丨了所 -41- 201230149 形成的2端子GaN系半導體元件,具體而言,GaN系二極 體係以被夾於第1支持基板1 6和第2支持基板1 8之間的狀 態形成。第1電極14及第2電極17係陽極或陰極。該GaN 系二極體係pn接合二極體或蕭特基二極體,在pn接合二 極體中第1電極14及第2電極17皆是歐姆電極,在蕭特基 二極體中第1電極14及第2電極17其中之一是蕭特基電極 ,另一個是歐姆電極。第1支持基板16和第2支持基板18 之間的間隔例如為20μιη左右。 將基底基板1 1剝離後的第1支持基板丨6上之GaN系 半導體層13侧的表面之SEM像的一例係示於圖24。其中 ,作為基底基板11,是採用在C面藍寶石基板上成長厚 度2μιη的GaN層者。GaN層成長後作為GaN系半導體層1 3 。作為成長遮罩12是使用具有和圖3所示同樣圖案者。 成長遮罩12是藉由利用電漿CVD法所形成之厚度〇 3μιη 的Si〇2膜形成’條紋窗1 2a的長度a為1 2〇〇pm、寬度b為 5μιη,條紋窗12a的周期ρ^85μηι,遮罩部i2c的寬度為 80μιη ’條紋窗12a的末端部彼此之相互重合的長度1為 6 5 μηι。作為第1支持基板16是使用si基板,於其上形成 作為接著用金屬15的Au/Sn銲膏薄膜。在GaN層成長之 際,首先,於形成成長遮罩12的基底基板η上利用以往 周知的技術使低溫GaN緩衝層(未圖示)成長。具體而言 ,利用MOCVD法,使用TMG及NH3作為原料氣體,使用 %及N2作為載體氣體,在溫度53(rc不成長厚度3〇nm的 低溫GaN緩衝層。之後,停止TMG之供給,例如,使溫 度上升至115(TC後’再供給TMG ’在壓力3〇kPa下進行 -42- 201230149After the 〆-type GaN layer 56 doped with magnesium (Mg) as a p-type impurity is entirely grown, for example, the p + -type GaN layer 56 is patterned into a predetermined shape by photolithography and etching. The thickness of the p + -type GaN layer 56 is set to, for example, about 500 nm, and the impurity concentration is set to, for example, 5×10 μm 9 cm − the growth of the p-type GaN layer 56 is performed, for example, at a temperature of 〇〇〇1〇〇〇c and a pressure of 3〇kPa. . When the p + -type GaN layer 56 is grown, for example, TMG and NH 3 are used as source gases, and n and n 2 are used as carrier gases, and bis(cyclopentadienyl)magnesium (CpaMg) is used as a p-type dopant. The p+ type 〇 is formed by the ICp_RIE using a gas-based etching gas, for example, by using an ICp_RIE using a gas-based etching gas, for example, by MOCVD, covering the p+-type GaN layer 56 which is patterned into a predetermined shape, and is fully grown. The n-type GaN layer 57' of Si mixed with an n-type impurity is grown in the same manner as the n-type GaN layer 58 doped with Si as an n-type impurity. The thickness of the n-type GaN layer 57 is set to, for example, 100 nm. The impurity concentration is set to, for example, lxl0i7 cm-3, the thickness of the n+ type germanium layer 58 is set to, for example, 100 nm, and the impurity concentration is set to, for example, 5 x 10 〇 18 cm -3 . Next, the n-type GaN layer 57 and the n + -type GaN layer 58 are patterned into a predetermined shape by photolithography and button etching, and a part of the n + -type GaN layer 58 is removed by photolithography and patterning. This etching is performed, for example, by ICP-RIE using a chlorine-based gas. Next, for example, an insulating film such as a §2 film or a SiN film is integrally formed by a plasma CVD method, and then the insulating film is patterned into a prescribed shape by photolithography and a surname -34-201230149. A gate insulating film 59 is formed on the GaN layer 57. The thickness of the polarity insulating film 59 is, for example, about 5 〇ηηη. Next, for example, after the Ni film is completely formed by vacuum evaporation, t' is formed into a prescribed shape by, for example, photolithography and etching, and a gate electrode 6 is formed on the gate insulating film 59. 0. Next, 'for example, after the Ti/A1/Au multilayer film is integrally formed by vacuum evaporation, 'by patterning the Ti/Al/Au multilayer film into a prescribed shape by, for example, photolithography and etching, in the n + type The source electrode 61 is formed on the layer 58. Then, the thickness of the portion corresponding to the stripe window 5 2 a of the growth mask 5 2 is thinned by, for example, polishing the Si substrate 51 a of the base substrate 51 from the back surface side to a thickness of, for example, about 5 〇 to 1 μm. On the i substrate 5 1 a, for example, a stripe-shaped through hole 62 having a width of about 20 μm is formed, and the AlN/GaN multilayer film 51b is exposed at the bottom of the through hole 62. Then, the AlN/GaN multilayer film 51b is removed by plasma etching using, for example, a chlorine-based etching gas through the via hole 62, and then the growth mask 52 is removed by the via hole 62 to expose the n + -type GaN layer 53. Next, the ohmic metal film is formed by, for example, vacuum evaporation from the back side of the base substrate 51, and the gate electrode 63 is formed. As the ohmic metal film, for example, a Ti/Al/NiAu multilayer film is used. From the above, a GaN-based MISFET for the purpose is manufactured. Further, the n + -type GaN layer 58 can be replaced with, for example, an n-type AlGaN layer or an undoped A1 GaN layer, as needed. In addition, it is also possible to completely fill the inside of the through hole 6 2 by, for example, plating Au, Cu, etc., and flatten the surface of the back side of the base substrate 5 - -35 - 201230149 to form a bungee. Electrode 63. By filling the inside of the via hole 6 2 with Au, Cu or the like, the thermal conductivity can be improved, and the temperature rise due to the heat generated during the operation of the GaN-based MISFET can be suppressed. The operation of this GaN-based MISFET will be described. In the GaN-based MISFET, the n + -type GaN layer 58 serves as a source region, the n-type GaN layer 53 becomes a drain region, and the n-type GaN layers 54 and 57 serve as a channel £ region. A P + -type GaN layer 56 having a high impurity concentration is provided under the n-type GaN layer 57 as a channel region. Since the n + -type GaN layer 5 is not formed directly under the end portion of the gate electrode 60 on the source electrode 61 side, the n-type GaN layer 57 as the channel region is enlarged by the p + -type GaN layer 56. Therefore, the GaN-based MISFET is a normally-off structure. By applying a positive (+) bias voltage to the gate electrode 6A, electrons are induced in the n-type GaN layer 57 near the interface of the gate insulating film 59 directly under the gate electrode 60, and the result is ' Since a channel is formed between the source electrode 161 and the drain electrode 63, the GaN-based MISFET is turned on, and a current flows between the source electrode 6A and the drain electrode 63. In the GaN-based MISFET, a high barrier voltage of the p+ type GaN layer 56 can be obtained, and a high threshold withstand voltage can be obtained. Further, since the n + -type GaN layer 58 having a high impurity concentration forms a source region, the source resistance can be reduced. Further, although the thickness of the n-type GaN layer 54 under the p + -type GaN layer 56 is as thin as about 5 μm, since the breakdown voltage of GaN is considerably large, 3 〇〇 ν / μη, a high threshold withstand voltage can be obtained. According to the fifth embodiment, the GaN-based MISFET can obtain the same advantages as those of the first embodiment. [Embodiment 6] In the sixth embodiment, the method of manufacturing a GaN-based Schottky-36-201230149 diode of the third embodiment is particularly directed to the use of a c-plane sapphire substrate as the base substrate 3 1 . ί brother to explain. First, as shown in Fig. 5, a growth mask 32 is directly formed on the C-plane sapphire substrate of the base substrate 31 as in the third embodiment. Next, the C-plane sapphire substrate on which the growth mask 32 is formed is introduced into the MOCVD apparatus, for example, by surface retention at 1 l00 〇 c for 5 minutes in a carrier gas composed of 混合2 and a mixed gas. Next, for example, after the temperature is lowered to 55 〇〇C, NH3 and TMG are supplied, and the amorphous GaN layer is grown to a thickness of about 30 nm. Next, while circulating NH3, the temperature is raised to i150 ° C, and after holding at 5 Hz / m for 10 minutes, TMG and SiH 4 are supplied at a temperature of, for example, 1 〇 5 0 to 1 1 ° C. The n + -type GaN layer 33 and the n-type GaN layer 34 grow. Thereby, the island-shaped n + -type GaN layer 33 and the n-type GaN layer 34 can be grown. The subsequent steps are the same as in the third embodiment. According to the sixth embodiment, in addition to the advantages similar to those of the third embodiment, since a C-plane sapphire substrate can be used as the base substrate 31, it is not necessary to grow a GaN layer on the C-plane sapphire substrate, and light can be simplified. In the manufacturing process of the Schottky diode, the advantage of reducing the manufacturing cost of the GaN Schottky diode can be obtained. [Seventh embodiment] A method of manufacturing a GaN-based semiconductor device according to the seventh embodiment will be described. In the seventh embodiment, as shown in Fig. 18A, as shown in Fig. 18A, the GaN-based semiconductor layer 13 is placed on the base substrate 11 using the growth mask 12 shown in Fig. 3, -37-201230149. After the surface orientation is grown in an island shape, a necessary first electrode 14 is formed on the upper surface of the GaN-based semiconductor layer 13 (hereinafter referred to as "the first surface"). The material of the first electrode 14 and the ith electrode are The formation method is selected as needed. The material of the second electrode 14 is based on the first electrode 14 being an ohmic electrode or a Schottky electrode, or the uppermost layer of the GaN-based semiconductor layer 13 to which the working electrode 14 is in contact. Conductive type I and specifically s, the first electrode 丨4 is, for example, a multilayer film sequentially Ni/Au/Ni, and the thickness of each film is, for example, a Ni film of the first layer. 5 nm, the Au film is 5 〇〇 nm, and the film of the second layer is 100 nm. Further, the ith electrode M is formed by comprehensively forming the second electrode 14 by, for example, a vacuum deposition method or a sputtering method. After the metal film is alloyed, the metal film or alloy film is patterned by photolithography and etching. In Fig. 8a, the second electrode is formed in a portion other than the peripheral portion of the first surface 13a of the GaN-based semiconductor layer 13, for example, a portion spaced apart from the edge portion by 6 μm or more, but may be formed in GaN. The entire first surface 133 of the semiconductor layer 13 is formed. Next, as shown in Fig. 18B, the growth mask 12 is removed by a wet etching method or the like. For example, the growth mask 12 is composed of a Si 2 film. In this case, it is removed by wet etching using buffered hydrofluoric acid. The removal of the growth mask 12 is not essential, but is effective in improving the yield of the separation of the bucket conductor layer 13 to be described later. As shown in FIG. 19, the first support substrate 16 on which the metal b is formed on the main surface is prepared, and the metal 15 for the second support substrate 16 and the first GaN-based semiconductor layer η formed on the base substrate η are prepared. The i-th electrode 14 on the surface 13a is opposed to each other. As the subsequent metal 15, a solder-38 - 201230149 paste can be used, and more specifically, for example, an Au/Sn solder paste film is used. Further, as the first support substrate 16, for example, , can use elemental semiconductors such as Si, sic For compounds such as GaAs, GaP, AIN 'GaN, ZnO, etc., various metals, alloys, nitride-based ceramics, oxide-based ceramics, diamond, carbon, plastics, etc., it is necessary to choose. A typical example of the support substrate 16 is a Si substrate. Next, as shown in Fig. 20, the succeeding metal 15 of the first support substrate 丨6 and the GaN-based semiconductor layer 13 formed on the base substrate n are provided. The first electrode 14 is brought into contact with each other, and is heated in this state so as to be subsequently melted by the metal 15 to be welded to the first electrode 14. In this manner, the second support substrate 16 is next to the first surface 13 &amp; top = the first electrode 14 of the GaN-based semiconductor layer 13 formed on the base substrate 11. For example, when the Au-sn solder paste film is used as the adhesive metal 15 and the first electrode 14 is composed of the Ni film described above and the Ni film and the Ni film formed thereon, The i-support substrate 16 is heated by the metal 15 and the first electrode 14 in contact with each other, and then heated by the metal 15 to be soldered to the i-th electrode 14, and the first support substrate 16 is followed by the first Electrode 1 4. Next, as shown in FIG. 21, the base substrate 11 and the first support substrate 16 which are integrated by the above are peeled off between the base substrate 1H GaN system and the conductive layer 13 as described above. For example, by ultrasonically stimulating the soil substrate 1 1 and the first support substrate 16 which are formed, the soil is separated between the two soil plates 1 1 and the GaN semiconductor layer i 3 . The end faces of the base substrate 11 and the first support substrate 16 are mechanically stimulated, and are peeled off between the base substrate 11 and the GaN-based semiconductor 13 so as to be formed on the base substrate. - the system-39-201230149 The surface of the GaN-based semiconductor layer 13 in which the semiconductor layer 13 is peeled off and exposed is referred to as a second surface 1 3 b » Next, as shown in FIG. 22, in the GaN-based semiconductor layer 13 The necessary second electrode 17 is formed on the two faces 13b. The material of the second electrode 17 and the method of forming the second electrode 17 are selected as needed. The material of the second electrode i 7 is adapted to the second electrode. 17 is an ohmic electrode or a Schottky electrode or a conductive type of the uppermost layer of the GaN-based semiconductor layer 13 in contact with the second electrode 17 Specifically, the second electrode 17 is, for example, a multilayer film in which Ti/Al/Au is sequentially used, and the thickness of each film is, for example, the Ti film is 5 nm, the A1 film is 45 nm, and the Au film is In addition, the second electrode 17 is formed by forming a metal film or an alloy film for forming the second electrode 17 in a comprehensive manner by, for example, a vacuum deposition method or a sputtering method. The alloy film is formed by patterning by photolithography and lithography into a predetermined shape. In FIG. 22, the second electrode 17 is formed on the entire second surface 13b of the GaN-based semiconductor layer 13, but may be formed in addition to the GaN system. A portion other than the peripheral portion of the second surface 1 3 b of the semiconductor layer 13 is, for example, a portion spaced apart from the edge portion by 6 μm or more. When the second electrode 17 is an ohmic electrode, the GaN-based semiconductor layer 13 is required. After the second electrode 17 is formed on the second surface 13b, the laser beam is irradiated to the second electrode 17 by laser annealing, whereby the second electrode 17 can be made lower in electrical resistance than the GaN-based semiconductor layer 13 Ohmic contact. For example, the second electrode 17 is a total thickness composed of the above Ti film, A1 film, and Au film. In the case of a 50 nm multilayer metal film, by using laser light having a wavelength of 266 nm, the light transmittance of the multilayer metal film is about 2020% and the laser light is sufficiently absorbed, so the GaN system can be used. The interface 40 - 201230149 of the semiconductor layer 13 and the second electrode 17 is sufficiently heated to perform sufficient laser annealing. Next, as shown in Fig. 23, 'the preparation of a main surface is followed by the formation of a metal (not shown). The supporting substrate 18 is in contact with the second electrode 17 on the second surface 13b of the GaN-based semiconductor layer 13 formed on the first supporting substrate 16 by the bonding metal of the second supporting substrate 18, and is in this state. Heating is followed by welding with the second electrode 17 by metal melting. In this manner, the second support substrate 18 is next to the second electrode 17 of the second surface 13b of the GaN-based semiconductor layer 13 formed on the first support substrate 16. For example, in the case where the Au/Sn fresh paste film is used as the metal crucible, and the second electrode 14 is composed of the above-described Ni film, the Au film, and the Ni film formed thereon, 2, the support substrate 18 is heated to about 250 ° C in a state where the metal and the second electrode 17 are in contact with each other, and then the metal is melted to be soldered to the second electrode 17. The second support substrate 18 is attached to the second electrode. 17. As the metal paste, the solder paste can be used. More specifically, for example, an Au/sn solder paste film is used. In the same manner as the first support substrate 16, the elemental semiconductor such as Si, a compound semiconductor such as Sic GaAs, GaP, AIN, GaN or ZnO, or various metals and alloys can be used. The nitride ceramic, the oxide ceramic, the diamond, the carbon, the plastic, and the like may be selected as needed, but it is preferable to use a metal or alloy such as Cu which is rich in heat release property. A typical example of the second support substrate 18 is, for example, a plate (a thickness of, for example, i-plated Au and an Au/Sn solder paste film, or an A1N ceramic substrate on which a metal line is formed.) The two-terminal GaN-based semiconductor device in which the first electrode 14 is formed on the first surface 13a of the GaN-based semiconductor layer 3 and the second electrode 13b is formed on the second surface 13b is specifically formed by -41 to 201230149. The GaN-based two-pole system is formed between the first support substrate 16 and the second support substrate 18. The first electrode 14 and the second electrode 17 are an anode or a cathode. The GaN-based diode system pn In the pn junction diode, the first electrode 14 and the second electrode 17 are ohmic electrodes, and the first electrode 14 and the second electrode 17 in the Schottky diode are connected to the diode or the Schottky diode. One of them is a Schottky electrode, and the other is an ohmic electrode. The interval between the first support substrate 16 and the second support substrate 18 is, for example, about 20 μm. The first support substrate 丨6 after the base substrate 11 is peeled off An example of the SEM image of the surface on the side of the GaN-based semiconductor layer 13 is shown in Fig. 24. As the base substrate 11, A GaN layer having a thickness of 2 μm is grown on a C-plane sapphire substrate. The GaN layer is grown as a GaN-based semiconductor layer 13. As the growth mask 12, the same pattern as that shown in Fig. 3 is used. The growth mask 12 is borrowed. The length a of the stripe window 1 2a formed by the Si 〇 2 film having a thickness of μ 3 μm formed by the plasma CVD method is 12 pm, the width b is 5 μm, and the period of the stripe window 12a is ρ 85 μm, and the mask portion The width of i2c is 80 μm. The length 1 of the end portions of the stripe window 12a overlapping each other is 6 5 μm. As the first supporting substrate 16, a Si substrate is used, and an Au/Sn solder paste as a bonding metal 15 is formed thereon. When the GaN layer is grown, first, a low-temperature GaN buffer layer (not shown) is grown on the base substrate η on which the growth mask 12 is formed by a conventional technique. Specifically, TMG is used by the MOCVD method. NH3 is used as a material gas, and % and N2 are used as carrier gases, and at a temperature of 53 (rc does not grow a low-temperature GaN buffer layer having a thickness of 3 〇 nm. Thereafter, the supply of TMG is stopped, for example, the temperature is raised to 115 (re-supply after TC) TMG 'under pressure 3 kPa Conducted -42- 201230149

GaN之成長。如此使GaN層呈島狀成長。該GaN層的厚 度為15μηι。如圖24所示’可看見因剝離而出現的條紋 狀之島狀GaN層的群。圖24的條紋狀之島狀GaN層的端 部之放大圖示於圖25A,該島狀GaN層的中央部之放大 圖示於圖25B。 兹針對使圖3所示的成長遮罩12之條紋窗12a的寬度 b及遮罩部12c的寬度進行各種變化,並調查GaN系半導 體層1 3從基底基板11剝離的程度之結果作說明。成長遮 罩12係由利用電漿CVD法所形成之厚度〇.3μιη的Si02膜 所形成。有關基底基板丨丨、GaN系半導體層丨3,該GaN 系半導體層13的成長條件、第1支持基板16及接著用金 屬1 5是和圖24所示的試料相同。在作為〇aN系半導體層 13的GaN層之第ί面13a,形成作為第1電極丨4之Ni/Au/Ni 的多層膜(各膜的厚度為,第一層的Ni膜是5nm、Au膜是 500nm、第一層的Νι膜是i〇〇nm)。作為GaN系半導體層13 的條紋狀GaN層和與其鄰接之條紋狀GaN層的間隔係概 略5〜8μιη左右。由於當周期卜是ι〇μηι以下時,鄰接之 GaN層彼此容易合體,為防止該情況,在成長遮罩丨之形 成圖5所示般的部分。條紋窗12a的寬度b係在Ιμηι、3μιη 、5μπι、1〇μιη、20μη^5階段變化,遮罩部Uc的寬度係 在 3μιη 5 μιη、1 Mm、5 0μηι、80μπι、1 〇〇μηι 的 6 階段變 化。 计算從作為基底基板丨丨的藍寶石基板剝離之條紋狀 GaN層的條數,計測相對於總條數之比例。其結果示於 表1此外’表1的斜線部係未進行實驗的部分。 -43- 201230149 [表i] 窗寬度 遮罩寬 1 μτη 3// m 5jU m 10jU m 20 μ m 3jU m m 5% / / / 5ju m 100% / 1% 10jU m 100% 95% 20% 1% 0% 50//m / 100% 100% 60% 3% 80jt/ m / 100% 100% 60% 3% 100//m / 100% 60% / 200m / z 100% 95% 由表1可知,在條紋窗12a的寬度b是2〇μιη時幾乎無 法剝離GaN層。其理由可認為是,相對於GaN層的第1面 13a,比較作為第1電極14的Ni/Au/Ni多層膜的接著強度 、與寬度b是20 μιη的條紋窗12a中藍寶石基板和GaN層之 接著強度時,後者比前者強的緣故。由於條紋狀GaN層 的寬度實用上為300μηι以下,所以可說條紋窗12a的寬 度b為2 0 μιη以下者較理想。又,由表1可知,當遮罩部 1 2c的寬度比條紋窗1 2a的寬度b還小時無法剝離GaN層 。據此,可以說成長遮罩12中(條紋窗12a的寬度b/遮罩 部1 2c的寬度)S 1者較理想。 依據該第7實施形態,除了和第1實施形態同樣的優 點以外,還可獲得以下各種優點。亦即,在成長於基底 基板11上的GaN系半導體層13之第1面13a接著第1支持 基板1 6,將該第1支持基板16及GaN系半導體層丨3自基 底基板11剝離’之後,於GaN系半導體層13的第2面13b 接著第2支持基板1 8。為此’例如’藉由使用高熱傳導 性基板作為第2支持基板1 8 ’可謀求大幅提升被夾在第1 -44- 201230149 支持基板16和第2支持基板18之間的2端子GaN系半導體 το件之放熱性’可實現高放熱性2端子GaN系半導體元 件。 又,依據該第7實施形態,由於在藍寶石基板上成 長GaN系半導體層後,無需使用自昔所採用的雷射掀離 技術作為剝離藍寶石基板的方法,所以並無採用雷射掀 離技術時之各種問題。亦即,以雷射掀離技術而言,從 藍寶石基板側照射藉由脈衝高輸出雷射震盪的波長 266nm的雷射光,透過從藍寶石基板和系半導體層 之界面起至數⑺化瓜的深度的GaN系半導體層之吸收, 使該部分的溫度急遽上升至高溫而熱分解,藉由生成的 氮(N2)氣之屡力,使藍寶石基板在藍寶石基板和㈣系 半導體層之界面剝離。該雷射掀離技術雖能有效將藍寶 石基板局部地剝離,但在控制所產生之氮氣的壓力時有 困難奴大面積將藍寶石基板剝離時,剝離的壓力在藍 寶石基板的面内變得不均―,由於局部的壓力上升所導 致不均-的上推效果,會在導體層產生裂縫而 引起破壞。因此’難以在GaN系半導體層保持無損傷下 ’剝離雷射光遍及的照射面積全面的藍f石基板。相對 地’依據該第7實施形態,可保持㈣系半導體層無損 傷地將藍寶石基板等之基底基板u全面從⑽系半導體 層B容易地剝離’故無此等問題。又,相對於雷射掀離 技術需要使用尚價的脈衝高輸出雷射,依據該第7實施 形態’由於無需使用這種脈衝高輸出雷射,故 低GaN系半導體元件的製造成本。 ’、‘ -45- 201230149 [第8實施形態] 針對第8實施形態之縱傳導型GaN系蕭特基二極體 的製造方法作說明。 首先,如圖26所示,在基底基板31上形成和圖3所 示的成長遮罩12同樣的成長遮罩32。 其次’使用成長遮罩32利用MOCVD法使摻雜有作為n 型雜質的Si之n +型GaN層33在(〇〇〇1)面方位呈島狀成長。 在該情況,一個島狀的n+型GaN層33係從一個條紋窗32a 成長。該n+型GaN層33和n+型GaN層33之間隔例如約為 ΙΟμπι。該n+型GaN層33的成長例如係在溫度為11〇代, 壓力是以橫向成長模式為主體的3 0kpa下進行。在該n+型 GaN層33成長時,例如係使用TMG及NH3作為原料氣體 ,使用I及&amp;作為載體氣體’使用經氮稀釋的SiH4作為η 型摻雜物。透過原料氣體供給條件(例如,TMG的供給量 和NH3的供給量之比等)的控制,例如,作成相對於n+型 GaN層33的寬度70μπι,n+型GaN層33的厚度為約Ι5μιη左 右。η + .型GaN層33的雜質濃度例如設為lxl〇18cm·3。 其次,減少S i Η 4的供給量,接著成長壓力設為例如 60kPa ’且TMG供給量例如增加至2倍,以縱向成長為主 體的成長條件,利用MOCVD法使η型GaN層34成長於n + *型ΘάΝ層33上。該η型GaN層3 4的厚度例如設為5 μιη,雜 質濃度例如設為3xl016cm-3。從η型GaN層34如此成長後 的n +型GaN層33之側面朝橫向的η型GaN層34之突出距離 ,單側約為4 μιη。於n+型GaN層3 3及η型GaN層3 4,在條 紋窗32a的正上部分形成穿透差排。 201230149 其次’例如利用電漿CVD法全面地形成絕緣膜,形 成例如厚度為Ιμπι的SiCh膜35之後,將該以〇2膜35利用 光微影術及姓刻方式圖案化成規定形狀,在與η型〇 — 層34上面的1!型〇心層34之側面相距約5μιη的範圍的周邊 部’及條紋窗32a正上的寬度8μιη的部分,形成條紋狀的 Si02膜35。該3丨02膜35係為了擔任場板(fieid pUte)的任 務而設置,用以緩和後述之蕭特基電極37之端部中的電 場集中。 其次’例如利用真空蒸鍍法全面地形成蕭特基電極 形成用的金屬膜之後,將該金屬膜利用光微影術及蝕刻 方式圖案化成規定形狀。作為該金屬膜,形成Ni/Au/ Ni/Au的多層膜(各膜的厚度為,第-層的Ni膜是2〇nm、 第一層的Au膜是l〇〇nm、第二層的Ni膜是20nm、第二層 的Αιι膜是500nm)。如此,以在Si〇2膜35的開口部和n型 GaN層34接觸的狀態下形成蕭特基電極37。此處, Ni/Au/Ni/Au多層膜中之第二層的Ni膜,係作為防止來自 Au/Sn銲膏薄膜的Sn之擴散的障壁層而設置,該Au/Sn銲 用薄膜係作為形成於苐1支持基板16的一主面的接著用 金屬15使用。 之後’與第7實施形態同樣地,實行形成接著用金 屬15的第1支持基板16之接著、基底基板31之剝離、以 及形成接著用金屬的第2支持基板18之接著等步驟,製 造目的之GaN系蕭特基二極體。在如此製造的GaN系蕭 特基二極體中,於η型GaN層34的一面形成蕭特基電極 37’而於n+型GaN層33的一面形成歐姆電極。因此,在 -47- 201230149 該GaN系蕭特基二極體中,電流於蕭特基電極37和歐姆 電極之間的11+型GaN層33及η型GaN層34的積層方向,換 言之在縱向流通。亦即,該GaN系蕭特基二極體是縱向 傳導型。 依據該第8實施形態,縱向傳導型GaN系蕭特基二 極體可獲得和第7實施形態同樣的優點。 [第9實施形態] 針對第9實施形態之大面積功率GaN系蕭特基二極 體的製造方法作說明。 首先’如圖27所示,在基底基板(未圖示)上形成成 長遮罩71。該成長遮罩71最終是在每成為一個元件的長 方形的晶片區域72 ’具有和圖2所示的成長遮罩12的條紋 窗1 2 a同樣的條紋窗7 1 a。於一個晶片區域7 2上,在 &lt; 1 1 -20&gt;方向包含複數條紋窗7 i a,例如6〇〇條。例如, 條紋窗71a的長度a為ΐ2〇〇μιη、寬度b為ιμηι,遮罩部71c 的寬度為3#!11,條紋窗713的周期1)1為4卜111。在該情況, 例如,晶片區域72之大小為,在&lt;η·2〇&gt;方向為24〇〇μπι ,在&lt;1-100&gt;方向為1300μιη。在該情況,成長遮罩71除 了條紋窗71a以外,還具有:沿著相互鄰接之晶片區域 72的相互對向之一對的邊,使從各條紋窗7丨&amp;成長之島狀 的GaN系半導體層13彼此在&lt;η·2〇&gt;方向不合體的合體 防止用窗71d。該合體防止用窗71d係藉由在和條紋窗 71a同樣的形狀之窗的一邊,設置例如以2〇卜爪的間距形 成、且具有平行於&lt;U_20&gt;方向及&lt;^00〉方向的邊之大 *SlxS2(例如,Sl=4_’ S2=10_)的長方形窗所構成。 -48- 201230149 沿著相互鄰接的晶片區域72之相互對向的一對邊,所形 成之合體防止用窗71d間的間隔例如設為。 其次’使用成長遮罩71利用M0CVD法使捧雜有作為 η型雜質的Si之n、GaN層73在(〇〇〇1)面方位呈島狀成長 :该η型GaN層73的成長例如係在溫度為i 1〇〇。。,壓力 係在成長是縱向及橫向一起進行的成長模式6〇kpa下進 打。在該情況,各晶片區域72中從各條紋窗71&amp;成長之 H+型GaN層73彼此合體,作為整體可得一個大的〇+型 GaN層73。在該型GaN層73成長時,例如係使用丁mg 及ΝΑ作為原料氣體,使用仏及A作為載體氣體,使用 經氮稀釋的SiH4作為n型摻雜物.n +型GaN層73的雜質濃 度例如設為lxl018cm·3。例如在n+型GaN層73的厚度到 達ΙΟμπι時’使SiH4的供給量減少,使η型^㈣層成長厚 度約8μπι。η型GaN層的雜質濃度係設成例如ixl〇i6cm_3 合體防止用窗71d會阻礙n+型GaN層73的&lt;11-20&gt;方 向之成長的理由,和使用圖5所示的成長遮罩丨2之情況 本質上是相同的。亦即,以該合體防止用窗7 1 d作為起 點在n+型GaN層73形成成長速度遲缓的{丨_丨00丨面。 {1-100}面係和{1 1-20}面傾斜30。或90。,由於如圖27所 示成為三角形狀,故成長停止。該結果為,如圖27所示 ’相互鄰接的晶片區域72之間的n+型G aN層7 3及η型G aN 層係隔著元件分離帶部分相互分離。 之後’與第7實施形態同樣地,實行形成接著用金 屬15的第1支持基板16之接著、基底基板之剝離、以及 -49- 201230149 形成接著用金屬的第2支持基板18之接著等步驟,製造 目的之大面積功率GaN系蕭特基二極體。在如此製造的 大面積功率GaN系蕭特基二極體中,於n型GaN層74的一 面形成蕭特基電極,而於n +型GaN層73的一面形成歐姆 電極。因此’以該大面積功率GaN系蕭特基二極體而言 ’電流在蕭特基電極和歐姆電極之間的n+型GaN層73及 η型GaN層的積層方向,換言之在縱向流通。亦即,該 大面積功率GaN系蕭特基二極體是縱向傳導型。 依據該第9實施形態,縱向傳導型的大面積功率〇aN 系蕭特基二極體可獲得和第7實施形態同樣的優點。 [第10實施形態] 針對第1 0實施形態之GaN系蕭特基二極體的製造方 法作說明。 首先’在和第4實施形態同樣的(1 1 1)面方位的si基 板41a上’使例如厚度30nm的ain膜及厚度20nm的GaN 膜,藉由例如MOCVD法以例如1 i〇〇°c的溫度依序成長, 在如此獲得之基底基板上,與第1實施形態同樣地形成 成長遮罩42。成長遮罩42係與第J實施形態的成長遮罩 1 2同樣地具有條紋窗42a及輔助條紋窗(未圖示)。例如 ’成長遮罩42是藉由厚度〇邛爪的Si〇2膜形成,條紋窗 42a的長度a為ΙΟΟΟμΓη、寬度^^為1〇μ〇1,條紋窗42a的周 期…為90μιη、周期p2為1〇1〇μΓη,遮罩部的寬度為8〇μιη ’輔助條紋窗的長度c為κομίη、寬度d為ΐ〇μιη, &lt;1-100&gt;方向的條紋窗42&amp;和條紋窗42&amp;之間隔為ι〇μιη, 條紋窗42a的末端部和輔助條紋窗42b之相互重合的長度 -50- 201230149 q 為 5 5 μιη 〇 其次’使用成長遮罩42利用MOCVD法使摻雜有作 為η型雜質的Si之n+型GaN層43在(0001)面方位呈島狀成 長。s亥η型GaN層43的厚度例如設為8μι^,雜質濃度例 如設為5xl018cm·3。該η +型GaN層43和η+型GaN層43之間 隔例如約為1 Ομιη。該n+型GaN層43的成長例如係在溫度 1100°C、壓力30kPa下進行。在該n +型GaN層43成長時, 例如使用T M G及N Η3作為原料氣體’使用η 2及n 2作為載 體氣體,使用經氮稀釋的SiH4作為η型摻雜物。在該情 況,一個島狀的η +型GaN層43係從一個條紋窗42a成長。 其次,以可促進朝縱向成長般地將成長壓力增加至例如 80kPa,調節結晶成長條件並利用m〇CVD法使n型GaN 層44在n +型GaN層43上成長。該!!型GaN層44的厚度例如 s史為5μιη ’雜質濃度例如設為ixi〇i6crn-3。^型GaN層44 如此成長之後的n+型GaN層43及η型GaN層44之整體的 &lt;1 1-20&gt;方向之間隔例如約為5(im。如圖丨6A所示,於γ 型GaN層43及η型GaN層44,在條紋窗42a的正上部分形 成穿透差排45。 之後,於η型GaN層44上形成蕭特基電極(未圖示), 然後’與第7實施形態同樣地’實行形成接著用金屬丄5 的第1支持基板1 6之接著、基底基板之剝離、以及形成 接著用金屬的第2支持基板之接著等步驟,製造目的之 GaN系蕭特基二極體。 依據該第10實施形態’ GaN系蕭特基二極體可獲得 和第7實施形態同樣的優點。 -51 - 201230149 [第11實施形態] 針對第11實施形態之GaN系發光二極體的製造方法 作說明。 . 首先,與第1實施形態同樣地,如圖28所示,在基 底基板81上形成成長遮罩82。作為基底基板81,是採用 在C面藍寶石基板上成長厚度2μηι的GaN層者。成長遮罩 82係與成長遮罩12同樣地具有條紋窗82a及辅助條紋窗( 未圖示)。例如,成長遮罩82是藉由厚度〇.3μιη的Si02膜 形成’條紋窗82a的長度a為ΙΟΟΟμιπ、寬度b為1 〇 μ m,條 紋窗82a的周期ρΑ90μπι、周期p2為ΐΟίΟμιη,遮罩部的 寬度為80μπι,辅助條紋窗的長度c為ΐ2〇μπι、寬度d為 ΙΟμιη,&lt;1-1〇〇&gt;方向的條紋窗32a和條紋窗32a之間隔為 10μιη,條紋窗32a的末端部和輔助條紋窗32b之相互重 合的長度q為55μιη。 其次’使用成長遮罩82利用MOCVD法使掺雜有作 為η型雜質的Si之η+型GaN層83在(〇〇〇1)面方位呈島狀成 長。該n+型GaN層83的厚度例如設為ι〇μιη,雜質濃度例 如a又為5x10 cm3。該η型GaN層83和η +型GaN層83之間 隔例如約為ΙΟμιη。該n+型GaN層83的成長例如係在溫度 1100°C、壓力30kPa下進行。該n+型GaN層83成長時,使 用TMG及NH3作為原料氣體’使用I及N2作為載體氣體 ,使用經氮稀釋的SiH4作為η型摻雜物◊在該情況,一 個島狀的η +型GaN層83係從一個條紋窗32a成長。其次, 以可促進朝縱向成長般地調節結晶成長條件並利用 MOCVD法使η型GaN層84在n+型〇心層83上成長。該11型 -52- 201230149The growth of GaN. Thus, the GaN layer grows in an island shape. The GaN layer has a thickness of 15 μm. As shown in Fig. 24, a group of striped island-shaped GaN layers which are observed by peeling can be seen. An enlarged view of the end portion of the stripe-shaped island-shaped GaN layer of Fig. 24 is shown in Fig. 25A, and an enlarged view of the central portion of the island-shaped GaN layer is shown in Fig. 25B. The result of varying the width b of the stripe window 12a of the growth mask 12 shown in Fig. 3 and the width of the mask portion 12c, and examining the extent to which the GaN-based semiconductor layer 13 is peeled off from the base substrate 11 will be described. The growth mask 12 is formed of a SiO 2 film having a thickness of 〇3 μm formed by a plasma CVD method. The base substrate 丨丨 and the GaN-based semiconductor layer 丨3, the growth conditions of the GaN-based semiconductor layer 13, the first support substrate 16 and the subsequent metal 15 are the same as those of the sample shown in Fig. 24 . A multilayer film of Ni/Au/Ni as the first electrode 丨4 is formed on the λ surface 13a of the GaN layer as the 〇aN-based semiconductor layer 13 (the thickness of each film is 5 nm of the first layer of Ni, Au) The film was 500 nm, and the first layer of Ν1 film was i〇〇nm). The interval between the stripe-shaped GaN layer of the GaN-based semiconductor layer 13 and the stripe-shaped GaN layer adjacent thereto is approximately 5 to 8 μm. When the period is ι〇μηι or less, the adjacent GaN layers are easily combined with each other, and in order to prevent this, a portion as shown in Fig. 5 is formed in the growth mask. The width b of the stripe window 12a is changed in stages of Ιμηι, 3μιη, 5μπι, 1〇μιη, 20μη^5, and the width of the mask portion Uc is 3 μm 5 μιη, 1 Mm, 5 0 μηι, 80 μπι, 1 〇〇μηι 6 Stage changes. The number of stripe-shaped GaN layers peeled off from the sapphire substrate as the base substrate was counted, and the ratio with respect to the total number of strips was measured. The results are shown in Table 1. In addition, the portion of the oblique line of Table 1 was not tested. -43- 201230149 [Table i] Window width mask width 1 μτη 3// m 5jU m 10jU m 20 μ m 3jU mm 5% / / / 5ju m 100% / 1% 10jU m 100% 95% 20% 1% 0% 50//m / 100% 100% 60% 3% 80jt / m / 100% 100% 60% 3% 100 / / m / 100% 60% / 200m / z 100% 95% As shown in Table 1, in When the width b of the stripe window 12a is 2 μm, the GaN layer is hardly peeled off. The reason for this is that the sapphire substrate and the GaN layer in the stripe window 12a of the Ni/Au/Ni multilayer film as the first electrode 14 and the stripe window 12a having the width b of 20 μm are compared with respect to the first surface 13a of the GaN layer. At the next strength, the latter is stronger than the former. Since the width of the stripe-shaped GaN layer is practically 300 μm or less, it can be said that the width b of the stripe window 12a is preferably 20 or less. Further, as is clear from Table 1, when the width of the mask portion 12c is smaller than the width b of the stripe window 12a, the GaN layer cannot be peeled off. Accordingly, it can be said that the growth mask 12 (the width b of the stripe window 12a/the width of the mask portion 12c) S1 is preferable. According to the seventh embodiment, in addition to the advantages similar to those of the first embodiment, the following various advantages can be obtained. In other words, after the first support substrate 16 of the GaN-based semiconductor layer 13 grown on the base substrate 11 is separated from the base substrate 11 by the first support substrate 166, the first support substrate 16 and the GaN-based semiconductor layer 丨3 are separated from the base substrate 11 On the second surface 13b of the GaN-based semiconductor layer 13, the second support substrate 18 is followed. For this reason, the use of a high thermal conductivity substrate as the second support substrate 18' can significantly increase the 2-terminal GaN-based semiconductor sandwiched between the first -44-201230149 support substrate 16 and the second support substrate 18. The exothermicity of τ's can realize a highly exothermic 2-terminal GaN-based semiconductor device. Further, according to the seventh embodiment, since the GaN-based semiconductor layer is grown on the sapphire substrate, it is not necessary to use the laser separation technique used in the past as a method of peeling off the sapphire substrate, so that the laser separation technique is not used. Various problems. That is, in the laser separation technique, the laser light having a wavelength of 266 nm oscillated by a pulse high output laser is irradiated from the side of the sapphire substrate, and the depth from the interface between the sapphire substrate and the semiconductor layer is increased to a depth of (7). The absorption of the GaN-based semiconductor layer causes the temperature of the portion to rise to a high temperature and thermally decomposes, and the sapphire substrate is peeled off at the interface between the sapphire substrate and the (tetra)-based semiconductor layer by the generated nitrogen (N2) gas. Although the laser separation technique can effectively peel off the sapphire substrate locally, it is difficult to control the pressure of the generated nitrogen gas. When the sapphire substrate is peeled off, the pressure of the peeling becomes uneven in the surface of the sapphire substrate. ―, due to the uneven pressure-induced push-up effect, cracks may occur in the conductor layer and cause damage. Therefore, it is difficult to peel off the blue f-stone substrate having a full irradiation area over which the laser light is spread without damaging the GaN-based semiconductor layer. According to the seventh embodiment, the base layer u such as a sapphire substrate can be easily peeled off from the (10)-based semiconductor layer B in a manner that the (four)-based semiconductor layer is not damaged. Further, it is necessary to use a pulsed high-output laser with respect to the laser detachment technique. According to the seventh embodiment, since the pulse high-output laser is not required, the manufacturing cost of the GaN-based semiconductor device is low. </ RTI> </ br> - 45 - 201230149 [Embodiment 8] A method of manufacturing a vertical conduction type GaN Schottky diode according to the eighth embodiment will be described. First, as shown in Fig. 26, a growth mask 32 similar to that of the growth mask 12 shown in Fig. 3 is formed on the base substrate 31. Next, the n + -type GaN layer 33 doped with Si as an n-type impurity is grown in an island shape by the MOCVD method using the growth mask 32 in the (〇〇〇1) plane orientation. In this case, an island-shaped n + -type GaN layer 33 grows from one stripe window 32a. The interval between the n + -type GaN layer 33 and the n + -type GaN layer 33 is, for example, about ΙΟμπι. The growth of the n + -type GaN layer 33 is performed, for example, at a temperature of 11 〇, and the pressure is performed at 30 kPa mainly in a lateral growth mode. When the n + -type GaN layer 33 is grown, for example, TMG and NH 3 are used as a material gas, and I and & as a carrier gas are used, and nitrogen-diluted SiH 4 is used as an n-type dopant. By the control of the material gas supply conditions (for example, the ratio of the supply amount of TMG and the supply amount of NH3), for example, the thickness of the n + -type GaN layer 33 is about μ5 μm with respect to the width of the n + -type GaN layer 33 of 70 μm. The impurity concentration of the η + . type GaN layer 33 is, for example, 1×10 〇18 cm·3. Then, the supply amount of S i Η 4 is reduced, and then the growth pressure is, for example, 60 kPa', and the TMG supply amount is increased by, for example, twice, and the growth condition is mainly grown in the longitudinal direction, and the n-type GaN layer 34 is grown to n by MOCVD. + * Type ΘάΝ layer 33. The thickness of the n-type GaN layer 34 is, for example, 5 μm, and the impurity concentration is, for example, 3 x 1016 cm-3. The protruding distance from the side surface of the n + -type GaN layer 33 thus grown in the n-type GaN layer 34 toward the lateral n-type GaN layer 34 is about 4 μm on one side. In the n + -type GaN layer 3 3 and the n-type GaN layer 34, a penetration row is formed in the upper portion of the stripe window 32a. 201230149 Next, for example, an insulating film is integrally formed by a plasma CVD method to form, for example, a SiCh film 35 having a thickness of Ιμπι, and then the 〇2 film 35 is patterned into a predetermined shape by photolithography and surname, and The side surface of the 1!-type core layer 34 on the layer 34 is spaced apart from the peripheral portion of the range of about 5 μm and the portion of the stripe window 32a having a width of 8 μm, forming a stripe-shaped SiO 2 film 35. The 3 丨 02 film 35 is provided to serve as a field plate (fieid pUte) for mitigating the concentration of electric field in the end portion of the Schottky electrode 37 to be described later. Next, for example, a metal film for forming a Schottky electrode is integrally formed by a vacuum deposition method, and then the metal film is patterned into a predetermined shape by photolithography and etching. As the metal film, a multilayer film of Ni/Au/Ni/Au is formed (the thickness of each film is such that the Ni film of the first layer is 2 〇 nm, the Au film of the first layer is 10 〇〇 nm, and the second layer The Ni film was 20 nm, and the second layer of Αι film was 500 nm). In this manner, the Schottky electrode 37 is formed in a state where the opening of the Si〇2 film 35 is in contact with the n-type GaN layer 34. Here, the Ni film of the second layer in the Ni/Au/Ni/Au multilayer film is provided as a barrier layer for preventing diffusion of Sn from the Au/Sn solder paste film, and the Au/Sn solder film is used as The main surface formed on one main surface of the crucible 1 support substrate 16 is used by the metal 15. In the same manner as in the seventh embodiment, the first supporting substrate 16 for forming the bonding metal 15 is subsequently formed, the base substrate 31 is peeled off, and the second supporting substrate 18 for forming the metal is formed. GaN-based Schottky diode. In the GaN-based Schottky diode manufactured in this manner, the Schottky electrode 37' is formed on one surface of the n-type GaN layer 34, and the ohmic electrode is formed on one surface of the n+-type GaN layer 33. Therefore, in the GaN-based Schottky diode of -47-201230149, the lamination direction of the 11+-type GaN layer 33 and the n-type GaN layer 34 between the Schottky electrode 37 and the ohmic electrode, in other words, in the longitudinal direction Circulation. That is, the GaN Schottky diode is of a longitudinal conduction type. According to the eighth embodiment, the vertical conduction type GaN-based Schottky diode can obtain the same advantages as those of the seventh embodiment. [Ninth embodiment] A method of manufacturing a large-area power GaN Schottky diode of the ninth embodiment will be described. First, as shown in Fig. 27, a long mask 71 is formed on a base substrate (not shown). The growth mask 71 finally has a stripe window 7 1 a similar to the stripe window 1 2 a of the growth mask 12 shown in Fig. 2 in the rectangular wafer region 72' which becomes one element. On a wafer area 7.2, a plurality of stripe windows 7 i a, for example, 6 〇〇 strips, are included in the &lt; 1 1 -20&gt; direction. For example, the length a of the stripe window 71a is ΐ2〇〇μηη, the width b is ιμηι, the width of the mask portion 71c is 3#!11, and the period 1)1 of the stripe window 713 is 4b111. In this case, for example, the size of the wafer region 72 is 24 μm in the &lt;η·2〇&gt; direction and 1300 μηη in the &lt;1-100&gt; direction. In this case, in addition to the stripe window 71a, the growth mask 71 has an island-shaped GaN which grows from each of the stripe windows 7 along the side opposite to each other in the wafer region 72 adjacent to each other. The composite prevention window 71d in which the semiconductor layers 13 are not aligned with each other in the &lt;η·2〇&gt; direction. The combined prevention window 71d is formed by, for example, a pitch of two jaws on one side of the window having the same shape as the stripe window 71a, and has a direction parallel to the &lt;U_20&gt; direction and &lt;^00&gt; A rectangular window with a large edge*SlxS2 (for example, Sl=4_'S2=10_). -48-201230149 The interval between the combined prevention windows 71d formed along a pair of mutually opposing sides of the mutually adjacent wafer regions 72 is set, for example. Next, using the growth mask 71, the GaN layer 73 having the n-type impurity as the n-type impurity and the GaN layer 73 are grown in an island shape by the M0CVD method: the growth of the n-type GaN layer 73 is, for example, At a temperature of i 1 〇〇. . In the growth mode, the growth mode is 6纵向kpa in the vertical and horizontal directions. In this case, the H + -type GaN layers 73 grown from the respective stripe windows 71 & each of the wafer regions 72 are combined to each other, and a large 〇 + -type GaN layer 73 can be obtained as a whole. When the GaN layer 73 is grown, for example, butyl mg and yttrium are used as source gases, yttrium and A are used as carrier gases, and nitrogen-diluted SiH4 is used as n-type dopants. The impurity concentration of the n + -type GaN layer 73 is used. For example, it is set to lxl018cm·3. For example, when the thickness of the n + -type GaN layer 73 reaches ΙΟμπι, the supply amount of SiH4 is decreased, and the n-type (four) layer is grown to a thickness of about 8 μm. The impurity concentration of the n-type GaN layer is set to, for example, the reason why the sync window 71d of the ixl〇i6cm_3 hinders the growth of the &lt;11-20&gt; direction of the n+ type GaN layer 73, and the growth mask shown in Fig. 5 is used. The situation in 2 is essentially the same. In other words, the n + -type GaN layer 73 is formed with a {丨_丨00丨 plane whose growth rate is slow with the combined prevention window 7 1 d as a starting point. The {1-100} face and the {1 1-20} face are inclined by 30. Or 90. Since it has a triangular shape as shown in Fig. 27, the growth stops. As a result, as shown in Fig. 27, the n + -type GaN layer 7 3 and the n-type GaN layer between the wafer regions 72 adjacent to each other are separated from each other via the element separation strip portion. Then, in the same manner as in the seventh embodiment, the steps of forming the first supporting substrate 16 for the subsequent metal 15 and the peeling of the base substrate, and the subsequent step of forming the second supporting substrate 18 for forming the metal with -49-201230149 are performed. A large-area power GaN Schottky diode for manufacturing purposes. In the large-area power GaN Schottky diode thus manufactured, a Schottky electrode is formed on one surface of the n-type GaN layer 74, and an ohmic electrode is formed on one surface of the n + -type GaN layer 73. Therefore, in the large-area power GaN-based Schottky diode, the current flows in the lamination direction of the n + -type GaN layer 73 and the n-type GaN layer between the Schottky electrode and the ohmic electrode, in other words, in the longitudinal direction. That is, the large-area power GaN Schottky diode is a longitudinal conduction type. According to the ninth embodiment, the longitudinal conduction type large-area power 〇aN-based Schottky diode can obtain the same advantages as the seventh embodiment. [Tenth embodiment] A method for producing a GaN-based Schottky diode of the tenth embodiment will be described. First, 'ain film having a thickness of 30 nm and a GaN film having a thickness of 20 nm are formed on the si substrate 41a having the same (1 1 1) plane orientation as in the fourth embodiment, for example, by the MOCVD method, for example, 1 i 〇〇 °c The temperature is sequentially increased, and a growth mask 42 is formed on the base substrate thus obtained in the same manner as in the first embodiment. The growth mask 42 has a stripe window 42a and an auxiliary stripe window (not shown) similarly to the growth mask 1 of the Jth embodiment. For example, the 'growth mask 42 is formed by a Si〇2 film having a thickness of a claw, and the length a of the stripe window 42a is ΙΟΟΟμΓη, the width ^1 is 1〇μ〇1, and the period of the stripe window 42a is 90 μm, period p2 1〇1〇μΓη, the width of the mask portion is 8〇μιη 'the length of the auxiliary stripe window c is κομίη, the width d is ΐ〇μιη, &lt;1-100&gt; direction of the stripe window 42&amp; and the stripe window 42&amp; The interval is ι〇μιη, the length of the end portion of the stripe window 42a and the auxiliary stripe window 42b coincide with each other -50 - 201230149 q is 5 5 μηη, and secondly, the growth mask 42 is used to make the doping as the n-type by MOCVD. The Si n + -type GaN layer 43 of the impurity grows in an island shape in the (0001) plane orientation. The thickness of the s-type n-type GaN layer 43 is, for example, 8 μm, and the impurity concentration is, for example, 5 × 10 18 cm·3. The η + -type GaN layer 43 and the n + -type GaN layer 43 are separated by, for example, about 1 μm. The growth of the n + -type GaN layer 43 is carried out, for example, at a temperature of 1,100 ° C and a pressure of 30 kPa. When the n + -type GaN layer 43 is grown, for example, Mn 2 and n Η 3 are used as the material gas ‘ η 2 and n 2 are used as the carrier gas, and nitrogen-diluted SiH 4 is used as the n-type dopant. In this case, an island-shaped η + -type GaN layer 43 grows from one stripe window 42a. Then, the growth pressure is increased to, for example, 80 kPa in the longitudinal direction, and the crystal growth conditions are adjusted, and the n-type GaN layer 44 is grown on the n + -type GaN layer 43 by the m〇CVD method. That! The thickness of the GaN layer 44 is, for example, s history of 5 μm. The impurity concentration is, for example, ixi〇i6crn-3. The interval of the &lt;1 1-20&gt; direction of the n-type GaN layer 43 and the n-type GaN layer 44 after the growth of the ^-type GaN layer 44 is, for example, about 5 (im. As shown in Fig. 6A, in the γ type The GaN layer 43 and the n-type GaN layer 44 form a diffusion gap 45 in the upper portion of the stripe window 42a. Thereafter, a Schottky electrode (not shown) is formed on the n-type GaN layer 44, and then '7' In the same manner, the GaN-based Schottky, which is used for the purpose of forming the first support substrate 16 followed by the metal crucible 5, the separation of the base substrate, and the subsequent formation of the second support substrate for the metal, is performed. According to the tenth embodiment, the GaN-based Schottky diode can obtain the same advantages as the seventh embodiment. -51 - 201230149 [Eleventh Embodiment] The GaN-based light-emitting diode according to the eleventh embodiment First, in the same manner as in the first embodiment, as shown in Fig. 28, a growth mask 82 is formed on the base substrate 81. The base substrate 81 is grown on a C-plane sapphire substrate. a GaN layer having a thickness of 2 μm. The growth mask 82 is the same as the growth mask 12 The stripe window 82a and the auxiliary stripe window (not shown). For example, the growth mask 82 is formed by a SiO 2 film having a thickness of 33 μm, and the length a of the stripe window 82a is ΙΟΟΟμιπ, the width b is 1 〇μm, and the stripe The period of the window 82a is ρΑ90μπι, the period p2 is ΐΟίΟμηη, the width of the mask portion is 80 μm, the length c of the auxiliary stripe window is ΐ2〇μπι, the width d is ΙΟμιη, and the stripe window 32a of the &lt;1-1〇〇&gt; direction is The interval between the stripe windows 32a is 10 μm, and the length q at which the end portions of the stripe window 32a and the auxiliary stripe window 32b overlap each other is 55 μm. Next, the growth of the Si is used as the n-type impurity by the MOCVD method using the growth mask 82. The +-type GaN layer 83 grows in an island shape in the (〇〇〇1) plane orientation. The thickness of the n + -type GaN layer 83 is, for example, ι〇μηη, and the impurity concentration is, for example, a 5×10 cm 3 . The n-type GaN layer 83 and The interval of the η + -type GaN layer 83 is, for example, approximately ΙΟ μηη. The growth of the n + -type GaN layer 83 is performed, for example, at a temperature of 1100 ° C and a pressure of 30 kPa. When the n + -type GaN layer 83 is grown, TMG and NH 3 are used as a material gas. 'Use I and N2 as carrier gases, using nitrogen Diluted SiH4 is used as the n-type dopant ◊ In this case, an island-shaped η + -type GaN layer 83 is grown from one stripe window 32a. Secondly, the crystal growth condition is adjusted to promote the growth in the longitudinal direction and MOCVD is used. The n-type GaN layer 84 is grown on the n+ type core layer 83. The type 11-52-201230149

GaN層84的厚度例如設為5μιη ’雜質濃度例如設為 1x10 cm GaN層84如此成長之後的^型層8 3 及η型GaN層84之整體的&lt;11 _2〇&gt;方向之間隔例如約為 5μιη。於n+型GaN層83及η型GaN層84,在條紋窗82a的正 上部分形成穿透差排,其圖示省略。 接著,利用MOCVD法,在η型GaN層84上成長具有 例如InGaN/GaN多重量子井構造(MQW)之發光層85及p + 型GaN層86。發光層85的厚度一般為50nm以下、p+型 GaN層86的厚度為例如ι〇〇ηιη左右,因為非常薄,故此等 發光層85及p+型GaN層86朝η型GaN層84的側面之成長幾 乎可忽視。 其次’例如利用電漿CVD法全面地形成絕緣膜例如 厚度為Ιμιη的Si〇2膜35之後,將該Si〇2膜87利用光微影 術及蝕刻方式圖案化成規定形狀,使p+型GaN層86部分 地露出。 其次’在例如利用真空蒸鍍法全面形成歐姆金屬膜 之後’將該金屬膜利用光微影術及蝕刻方式圖案化成規 定形狀。如此,在和P+型GaN層86接觸的狀態形成^^則 電極δ8。作為歐姆金屬膜,例如使用Ni/Au的兩層膜, 各膜的厚度例如設Ni膜是50nm、Au膜設為5〇〇nm。 之後,與第7實施形態同樣地,進行形成接著用金 屬15的第丨支持基板16之接著、基底基板81之剝離。 其次’在藉由基底基板81之剝離而露出的n+型GaN 層83的表面上,形成例如Zn〇薄膜以作為透明歐姆電極。 藉由以上,可製造目的之GaN系發光二極體。 -53- 201230149 依據第1 1實施形態,GaN系發光二極體可獲得和第 1及第7實施形態同樣的優.點。 [第12實施形態] 針對第1 2實施形態之2端子.3端子GaN系複合半導 體元件的製造方法作說明。 首先,與第1實施形態同樣地,如圖29所示,在基 底基板91上形成成長遮罩92。作為基底基板91,例如是 採用在C面藍寶石基板上成長厚度2μιη的GaN層者。成長 遮罩92係與成長遮罩12同樣地具有條紋窗92a及輔助條 紋窗(未圖示)。例如,成長遮罩92是藉由厚度0·3μιη的 Si〇2膜形成,條紋窗92a的長度a為ΙΟΟΟμιη、寬度b為 5μιη,條紋窗92a的周期Pl為90μιη、周期p2為1〇1〇μιη, 遮罩部的寬度為80μιη,輔助條紋窗的長度c為1 2〇pm、 寬度d為ΙΟμπι ’ &lt;1-100&gt;方向的條紋窗92a和條紋窗92a之 間隔為1 Ομηι ’條紋窗92a的末端部和輔助條紋窗92b之 相互重合的長度q為55μιη。 其次’使用成長遮罩92利用MOCVD法使摻雜有作 為η型雜質的Si之η +型GaN層93在(0001)面方位呈島狀成 長。該n+型GaN層93的厚度例如設為ι5μπι,雜質濃度例 如設為lxl017cm-3。該η +型GaN層93和η+型GaN層93之間 隔例如約為5〜ΙΟμπι。該n+型GaN層93的成長例如係在 溫度1100°C、壓力30kPa下進行。在該n+型Ga&gt;^ 93成長 時,例如使用TMG及ΝΑ作為原料氣體,使用%及%^ 為載體氣體,使用經氮稀釋的SiH4作為11型摻雜物。在 該情況,一個島狀的n +型GaN層93係從一個條紋窗92&amp;成 -54- 201230149 長。其次,以可促進朝縱向成長般地調節結晶成長條件 ,並利用MOCVD法使η型GaN層94在n+型GaN層93上成長 。該η型GaN層94的厚度例如設為4μπι,雜質濃度例如設 為lxl016cm 3。η型GaN層94如此成長之後的η+型GaN層 93及η型GaN層94之整體的&lt;ιΐ-2〇&gt;方向之間隔例如約為 5 μιη。於n +型GaN層93及n型GaN層94,在條紋窗92a的正 上部分形成穿透差排,其圖示省略。 接著’利用MOCVD法使p+型GaN層95成長於η型 GaN層94上。該ρ+型GaN層95的厚度例如約為500nm, 雜質濃度例如設為1x1019cm-3。其次,將該p+型GaN層 95中的後述的3端子元件(電晶體)之閘極正下的部分利 用蝕刻除去。 其次,利用MOCVD法全面地使n型GaN層96及 AlGaN層97依序成長。η型GaN層96的厚度例如約為 800nm,雜質濃度例如設為i&gt;&lt;i〇i7cm-3e AiGaN層97的厚 度例如設為30nm,A1組成例如設為0.25。 其次’為將3端子元件(電晶體)作成增強模式型,將 閘極部分的AlGaN層97利用乾式蝕刻方式除去。在 AlGaN層97和η型GaN層96之界面附近雖會產生二次元電 子氣體’但藉由除去閘極部分的AlGaN層97,在閘極部 为邊知不存在一次元電子氣體,且藉由p+型GaN層95所 導致的能帶上升效果,使閘極下的η型GaN層96空乏化。 其次’在例如利用電漿CVD法全面地形成絕緣膜, 例如厚度為20nm的SiCh膜之後,將該Si〇2膜利用光微影 術及姓刻方式圖案化成規定形狀。如此,在閘極部分的 -55- 201230149 η型⑽層96上形成由Sl〇2膜所構成的間極絕緣膜98。 其次,在例如利用直空基拍:入 , ” 又錄法全面地形成蕭特基電 極形成用的金屬膜之後’將該金屬膜利用光微影術及蚀 刻方式圖案化成規定形狀。作為該金屬膜,例如,形成 Ni/Au二層膜(各膜的厚度為,第—層的见膜是5〇nm、第 一層的h膜是5〇〇nm)。如此,在閑極絕緣膜⑽上形成 閘極電極9 9。 其次,將η型GaN層96利用光微影術及乾式蝕刻方 式圖案化成規定形狀,使{) +型(5^層95部分地露出。 其次,將成長遮罩92之條紋窗92a的正上部分之p + 型GaN層95蝕刻除去。此乃欲進行2端子元件和3端子元 件之間的元件分離之緣故。 其次,在例如利用真空蒸鍍法全面地形成歐姆金屬 膜之後,將該金屬膜利用光微影術及蝕刻方式圖案化成 規疋形狀。作為該金屬膜,例如,形成Ni/Au二層膜(各 膜的厚度為,例如,第一層的Ni膜是50nm、第一層的Au 膜疋5〇〇nm)。如此,在2端子元件部分,於p +型GaN層95 上形成陽極電極1〇〇,且在3端子元件部分,於p+型GaN 層95上和n型GaN層96連接的狀態形成歐姆電極1〇ι。 其次’在例如利用真空蒸鍍法全面地形成歐姆金屬 膜之後’將該金屬膜利用光微影術及蝕刻方式圖案化成 規疋形狀。作為該金屬膜,例如形成Ti/Al/Au的多層膜( 各膜的厚度為’例如,Ti膜是5nm、A1膜是45nm、Au膜 疋1 〇nm)。如此,在3端子元件部分,於歐姆電極1 〇丨及 A1GaN層97上形成源極電極102。該3端子元件係縱型的 -56- 201230149 趣 趲 增強型絕緣閘極FET。又’ 2端子元件係pn接合 。將該2端子· 3端子GaN系複合半導體元件 〇 '^寻^電敗 示於圖30。如圖30所示’電路上,增強型银祕μ 、,·巴緣閘極pg 的汲極和pn接合二極體的陽極係共同連接。 ' 田於增強细 絕緣閘極FET的源極電極102和p +型GaN層95接觸 部分成為二極體。 &amp; $ 之後,與第7實施形態同樣地,進行形成接著 屬15的第1支持基板16之接著 '基底基板91之剝離、金 形成接著用金屬的第2支持基板18之接著。作為第丨支及 基板16,例如使用A1N基板。在該A1N基板的主面, 了閘極電極99、源極電極102以外,還形成和pn接合= 極體的陽極電極100接觸之線路,再於其上形成約1j — 左右的厚度的Au/Sri銲膏。作為第2支持基板18,例如使 用Au鍍敷銅板❶將該人11鍍敷銅板接著於藉基底基板μ 之剝離而露出之n +型GaN層93的面。 藉由以上元成2端子· 3端子GaN系複合半導體元 件。 此外亦了在作為弟1支持基板1 6的A1N基板之主面 一體形成源極電極丨02和陽極電極丨〇〇。若依如此,可藉 由忒2端j · 3端子GaN系複合半導體元件,構成功率電 路的代表性單元電路。 依據第12實施形態’ 2端子.3端子GaN系複合半導 體π件可獲付和第丨及第7實施形態同樣的優點。 [第1 3實施形態] 針對第1 3實施形態之GaN系半導體元件的製造方法 -57- 201230149 作說明。 S亥第1 3實施形態中,進行和第7實施形態同樣步驟 ’實施到圖1 8B所示的步驟為止。 其次’如圖3 1所示,準備在一主面上形成有機系接 著層111的第1支持基板16,使該第1支持基板16的有機 系接著層111 ’與形成在基底基板U上的GaN系半導體層 13之第1面13a上的第1電極14呈對向。作為有機系接著 層111 ’例如’可使用由熱可塑性的樹脂所構成者。又 ’作為第1支持基板1 6,例如,可使用s i等之元素半導 體、SiC、 GaAs、GaP、AIN、GaN、ZnO 等之化合物半 導體、各種的金屬、合金、氮化物系陶瓷、氧化物系陶 瓷、金剛石、碳、塑膠等所構成者,因應需要作選擇。 可舉出的第1支持基板16的典型例為Si基板。 其次’如圖3 1所示,將第1支持基板1 6的有機系接 著層111朝形成在基底基板11上的GaN系半導體層13上 的第1電極14側按壓,使有機系接著層111遍及GaN系半 導體層1 3間的間隙。例如,在使用熱可塑性的樹脂所構 成的有機系接著層1 1 1之情況,藉由使溫度上升至該樹 脂的軟化點附近,可讓有機系接著層111濕潤GaN系半 導體層1 3間的間隙。如此,如圖32所示,第1支持基板 16被接著於形成在基底基板1 1上的GaN系半導體層13的 第1面13a上的第1電極14側。 其次’如圖3 3 A所示’將如上述般接著而成為—體 的基底基板11及第1支持基板16,在基底基板11和GaN系 半導體層1 3之間剝離。具體而言,例如,藉由對成為一 -58- 201230149 體的基底基板1 1及第1支持基板16予以超音波刺激,而在 基底基板1 1和GaN系半導體層1 3之間剝離。或者亦可透 過對成為一體的基底基板11及第1支持基板16的端面之 一部分施加機械力刺激,而在基底基板丨丨和QaN系半導 體層1 3之間剝離。 其次,如圖33B所示,在GaN系半導體層13的第2面 13b上形成必要的第2電極17。該第2電極17的材料及該 第2電極17之形成方法係因應需要而選擇。該第2電極17 的材料係因應於該第2電極17是歐姆電極或蕭特基電極 ,或該第2電極17所接觸之GaN系半導體層13的最上層 之導電型而適宜選擇。具體而言,該第2電極17係例如 使用由下算起依序是Ti/Al/Au的多層膜,各膜的厚度例 如設為,Ti膜是5nm、A1膜是45nm、Au膜是l〇nm。又, δ玄第2電極1 7係藉由在利用例如真空蒸鑛法或濺鑛法等 全面地形成第2電極17形成用的金屬膜或合金膜之後, 將此等金屬膜或合金膜利用光微影術及蝕刻方式圖案化 成規定形狀而形成。在該情況’由於在〇aN系半導體層 1 3間的間隙形成有機系接著層111,故在系半導體 層1 3的側面未形成金屬膜或合金膜ό較佳為,在形成第 2電極17形成用的金屬膜或合金膜之前,為了使系半 導體層13的第2面13b清淨化,及為了使縱向的導通電阻 更減低,亦可藉由從第2面1 3b側進行乾式蝕刻等以縮小 GaN系半導體層13的厚度。圖33B中,第2電極17形成在 GaN系半導體層13的第2面13b整體,但亦可形成在除了 GaN系半導體層1 3的第2面1 3b的周邊部以外的部分,例 -59- 201230149 如距離緣部6 μηι以上内側的部分。在第2電極1 7是歐姆 電極的情況’因應需要,在G a Ν系半導體層1 3的第2面 1 3 b上形成第2電極1 7後,對該第2電極1 7照射雷射光進 行雷射退火’藉此可使第2電極1 7以相對於GaN系半導 體層1 3更低的電阻進行歐姆接觸。例如,第2電極丨7是 由上述的Ti膜、A1膜及Au膜所構成之合計厚度為5〇nm 的多層金屬膜所構成的情況’將光能高於GaN的能隙的 波長3 65nm以下的脈衝雷射光照射於第2電極丨7,藉由 瞬間加熱和第2電極1 7接觸的GaN系半導體層1 3,可使 第2電極1 7以相對於GaN系半導體層丨3更低的電阻進行 歐姆接觸。作為波長365nm以下的脈衝雷射光,具體而 e ’例如’可使用yag雷射所產生的波長355nm的THG( 一倍頻器)脈衝雷射光或波長266nm的QHD(四倍頻器)脈 衝雷射光。 其次’如圖34A所示’在第2電極17側的表面利用真 空蒸鑛法或電鍍(鍍敷)法等形成金屬層112。該金屬層 1 1 2的居度係因應需要而選擇’例如為3〜3 〇 μ m。作為 該金屬層1 1 2的材料’例如可使用Au或Cu等。該金屬層 1 1 2係作為銲墊電極使用。 其次’為了使之後的步驟中GaN系半導體層1 3彼此 可容易地分離’切割金屬層n 2形成溝丨丨3。該溝}丨3係 因應需要按每一或複數個GaN系半導體層1 3而形成。圖 34A中係按每三個GaN系半導體層13形成溝113。 其次’如圖34B所示,將金屬層Π2側貼附延伸膠帶 1 1 4 ’剝離第1支持基板丨6。例如,在有機系接著層1工i -60- 201230149 是使用熱可塑性的樹脂所構成之情況,藉由進行加熱使 有機系接著層1 1 1軟化的狀態下,將第i支持基板16從金 屬層1 12側拉開,而可剝離第1支持基板16。或者,若有 機系接著層1 1 1具有溶劑可溶性,則藉由浸泡於溶劑中 將有機系接著層1 1 1溶解,而可剝離第i支持基板i 6。之 後,將形成第1電極14及第2電極17的〇心系半導體層13 從延伸膠帶1 14剝離。 藉由以上,可製造以三個GaN系半導體層13為一體 的GaN系半導體元件。該GaN系半導體元件例如是 系二極體。該GaN系二極體係pn接合二極體或蕭特基二 極體,在pn接合二極體中第i電極14及第2電極17皆是歐 姆電極,在蕭特基二極體中第〖電極14及第2電極17其中 之一是蕭特基電極,另一個是歐姆電極。 依據該第1 3實施形態,可獲得和第7實施形態同樣 的優點。 [第14實施形態] 針對第1 4實施形態之GaN系半導體元件的製造方法 作說明。 該第14實施形態中’進行和第7實施形態同樣步驟 ’實施到圖1 8B所示的步驟為止。 其次’如圖35所示,利用真空吸筆(Vacuum Pincette)l 15對第1電極14側進行真空吸附,將真空吸筆 1 1 5朝離開基底基板1 1的方向拉開’藉以從基底基板i丄 將GaN系半導體層13及第1電極14剝離。 其次,如圖3 6所示,將由真空吸筆π 5真空吸附之 -61 - 201230149The thickness of the GaN layer 84 is, for example, 5 μm. The impurity concentration is, for example, 1×10 cm. The interval of the &lt;11 _2 〇&gt; direction of the entire Δ layer 8 3 and the n-type GaN layer 84 after the GaN layer 84 is grown is, for example, about It is 5μηη. In the n + -type GaN layer 83 and the n-type GaN layer 84, a penetration row is formed in the upper portion of the stripe window 82a, and the illustration thereof is omitted. Next, a light-emitting layer 85 having an InGaN/GaN multiple quantum well structure (MQW) and a p + -type GaN layer 86 are grown on the n-type GaN layer 84 by MOCVD. The thickness of the light-emitting layer 85 is generally 50 nm or less, and the thickness of the p + -type GaN layer 86 is, for example, about 10 μm, because the light-emitting layer 85 and the p + -type GaN layer 86 grow toward the side of the n-type GaN layer 84 because they are very thin. Almost negligible. Next, for example, an insulating film such as a Si〇2 film 35 having a thickness of Ιμηη is integrally formed by a plasma CVD method, and then the Si〇2 film 87 is patterned into a predetermined shape by photolithography and etching to form a p+ type GaN layer. 86 is partially exposed. Next, after the ohmic metal film is completely formed by, for example, vacuum evaporation, the metal film is patterned into a predetermined shape by photolithography and etching. Thus, the electrode δ8 is formed in a state of being in contact with the P + -type GaN layer 86. As the ohmic metal film, for example, a two-layer film of Ni/Au is used, and the thickness of each film is, for example, 50 nm for the Ni film and 5 〇〇 nm for the Au film. Then, similarly to the seventh embodiment, the second support substrate 16 on which the metal 15 is subsequently formed is removed, and the base substrate 81 is peeled off. Next, on the surface of the n + -type GaN layer 83 exposed by the peeling of the base substrate 81, for example, a Zn ruthenium film is formed as a transparent ohmic electrode. According to the above, a GaN-based light-emitting diode of interest can be manufactured. -53-201230149 According to the first embodiment, the GaN-based light-emitting diode can be obtained in the same manner as in the first and seventh embodiments. [Twelfth Embodiment] A method of manufacturing a two-terminal, three-terminal GaN-based composite semiconductor device according to the second embodiment will be described. First, as in the first embodiment, as shown in Fig. 29, a growth mask 92 is formed on the base substrate 91. As the base substrate 91, for example, a GaN layer having a thickness of 2 μm grown on a C-plane sapphire substrate is used. The growth mask 92 has a stripe window 92a and an auxiliary strip window (not shown) similarly to the growth mask 12. For example, the growth mask 92 is formed by a Si〇2 film having a thickness of 0.3 μm, and the length a of the stripe window 92a is ΙΟΟΟμηη, the width b is 5 μm, the period P1 of the stripe window 92a is 90 μm, and the period p2 is 1〇1〇. Μιη, the width of the mask portion is 80 μm, the length c of the auxiliary stripe window is 1 2 〇 pm, and the width d is ΙΟμπι ' &lt;1-100&gt; the direction of the stripe window 92a and the stripe window 92a is 1 Ομηι 'stripe window The length q at which the end portion of 92a and the auxiliary stripe window 92b coincide with each other is 55 μm. Next, the η + -type GaN layer 93 doped with Si as an n-type impurity is grown in an island shape in the (0001) plane by the MOCVD method using the growth mask 92. The thickness of the n + -type GaN layer 93 is, for example, ι 5 μm, and the impurity concentration is, for example, lxl017 cm-3. The η + -type GaN layer 93 and the n + -type GaN layer 93 are, for example, about 5 ΙΟ μπι. The growth of the n + -type GaN layer 93 is carried out, for example, at a temperature of 1,100 ° C and a pressure of 30 kPa. When the n + -type Ga &gt; 93 grows, for example, TMG and ruthenium are used as source gases, and % and % are used as carrier gases, and nitrogen-diluted SiH4 is used as the 11-type dopant. In this case, an island-shaped n + -type GaN layer 93 is elongated from a stripe window 92 & -54 - 201230149. Next, the crystal growth condition is adjusted to promote the growth in the vertical direction, and the n-type GaN layer 94 is grown on the n + -type GaN layer 93 by the MOCVD method. The thickness of the n-type GaN layer 94 is, for example, 4 μm, and the impurity concentration is, for example, 1×10 16 cm 3 . The interval of the &lt;ιΐ-2〇&gt; direction of the entire n + -type GaN layer 93 and the n-type GaN layer 94 after the n-type GaN layer 94 is grown is, for example, about 5 μm. In the n + -type GaN layer 93 and the n-type GaN layer 94, a penetration row is formed in the upper portion of the stripe window 92a, and the illustration thereof is omitted. Next, the p + -type GaN layer 95 is grown on the n-type GaN layer 94 by MOCVD. The thickness of the ρ + -type GaN layer 95 is, for example, about 500 nm, and the impurity concentration is, for example, 1×10 19 cm −3 . Then, a portion of the p+ type GaN layer 95 which is a gate of a three-terminal element (transistor) to be described later is removed by etching. Next, the n-type GaN layer 96 and the AlGaN layer 97 are sequentially grown by the MOCVD method in a comprehensive manner. The thickness of the n-type GaN layer 96 is, for example, about 800 nm, and the impurity concentration is, for example, i&gt;&lt;i〇i7cm-3e The thickness of the AiGaN layer 97 is, for example, 30 nm, and the A1 composition is, for example, 0.25. Next, in order to form the three-terminal element (transistor) in an enhancement mode, the AlGaN layer 97 of the gate portion is removed by dry etching. Although a secondary electron gas is generated in the vicinity of the interface between the AlGaN layer 97 and the n-type GaN layer 96, but by removing the AlGaN layer 97 of the gate portion, the primary electron gas is not present in the gate portion, and by The energy band raising effect by the p + -type GaN layer 95 causes the n-type GaN layer 96 under the gate to be depleted. Next, after the insulating film, for example, a SiCh film having a thickness of 20 nm, is formed entirely by, for example, a plasma CVD method, the Si 2 film is patterned into a predetermined shape by photolithography and surname. Thus, an inter-electrode insulating film 98 composed of a S1 〇 2 film is formed on the -55 - 201230149 n-type (10) layer 96 of the gate portion. Next, the metal film is patterned into a predetermined shape by photolithography and etching, for example, by using a direct space basis: ", and then recording a metal film for forming a Schottky electrode." The film, for example, forms a Ni/Au two-layer film (the thickness of each film is 5 〇 nm for the first layer and 5 〇〇 nm for the first layer). Thus, the idle insulating film (10) The gate electrode 9 is formed thereon. Next, the n-type GaN layer 96 is patterned into a predetermined shape by photolithography and dry etching, so that the {) + type (5 layer 95 is partially exposed. Next, the growth mask is formed) The p + -type GaN layer 95 of the upper portion of the stripe window 92a of 92 is etched away. This is to separate the elements between the 2-terminal element and the 3-terminal element. Secondly, it is formed entirely by, for example, vacuum evaporation. After the ohmic metal film, the metal film is patterned into a regular shape by photolithography and etching. As the metal film, for example, a Ni/Au two-layer film is formed (the thickness of each film is, for example, the first layer The Ni film is 50 nm, the first layer of Au film 疋 5 〇〇 nm). In the 2-terminal element portion, an anode electrode 1 is formed on the p + -type GaN layer 95, and in the 3-terminal element portion, an ohmic electrode 1 is formed in a state where the p + -type GaN layer 95 is connected to the n-type GaN layer 96. Next, 'the metal film is patterned into a regular shape by photolithography and etching after the ohmic metal film is completely formed by, for example, vacuum evaporation. As the metal film, for example, a multilayer of Ti/Al/Au is formed. The film (the thickness of each film is 'for example, the Ti film is 5 nm, the A1 film is 45 nm, and the Au film is 1 〇 nm). Thus, in the 3-terminal element portion, the source is formed on the ohmic electrode 1 and the A1GaN layer 97. Electrode 102. The 3-terminal element is a vertical-type -56-201230149 趱Enhanced Insulated Gate FET. The '2-terminal element is pn-bonded. The 2-terminal and 3-terminal GaN-based composite semiconductor device 〇'^ The electrical failure is shown in Fig. 30. As shown in Fig. 30, on the circuit, the enhanced silver secret μ, the drain of the bar edge gate pg and the anode of the pn junction diode are connected together. The source electrode 102 of the gate FET and the contact portion of the p + -type GaN layer 95 become a diode. After that, in the same manner as in the seventh embodiment, the first support substrate 16 of the subordinate 15 is formed, followed by the peeling of the base substrate 91 and the subsequent formation of the metal second support substrate 18. For example, an A1N substrate is used for the substrate 16. On the main surface of the A1N substrate, in addition to the gate electrode 99 and the source electrode 102, a line in contact with the anode electrode 100 of the pn junction=polar body is formed, and a line is formed thereon. 1j - Au/Sri solder paste having a thickness of the left and right sides. As the second support substrate 18, for example, an N-type GaN layer 93 is exposed by peeling off the base 11 by using an Au-plated copper plate. Face. The above elements are formed into 2-terminal and 3-terminal GaN-based composite semiconductor elements. Further, the source electrode 丨02 and the anode electrode 一体 are integrally formed on the main surface of the A1N substrate which is the support substrate 16 of the first substrate. In this case, a representative unit circuit of the power circuit can be constructed by the 端2-terminal j·3 terminal GaN-based composite semiconductor element. According to the twelfth embodiment, the two-terminal, three-terminal GaN-based composite semiconductor π can be obtained in the same manner as in the seventh and seventh embodiments. [Third Embodiment] The method for producing a GaN-based semiconductor device according to the third embodiment is described in -57 to 201230149. In the first embodiment of the first embodiment, the same steps as in the seventh embodiment are carried out until the steps shown in Fig. 18B are performed. Next, as shown in FIG. 31, the first supporting substrate 16 on which the organic bonding layer 111 is formed on one main surface is prepared, and the organic bonding layer 111' of the first supporting substrate 16 is formed on the base substrate U. The first electrode 14 on the first surface 13a of the GaN-based semiconductor layer 13 is opposed to each other. As the organic based layer 111', for example, a thermoplastic resin can be used. Further, as the first support substrate 16, for example, an elemental semiconductor such as Si, a compound semiconductor such as SiC, GaAs, GaP, AIN, GaN, or ZnO, or various metals, alloys, nitride-based ceramics, or an oxide system can be used. Ceramics, diamonds, carbon, plastics, etc., should be selected according to needs. A typical example of the first support substrate 16 which can be mentioned is a Si substrate. Then, as shown in FIG. 31, the organic back layer 111 of the first support substrate 16 is pressed toward the first electrode 14 side of the GaN-based semiconductor layer 13 formed on the base substrate 11, so that the organic-based adhesive layer 111 is pressed. A gap is formed between the GaN-based semiconductor layers 13 . For example, in the case of using the organic binder layer 11 formed of a thermoplastic resin, the organic binder layer 111 can be wetted between the GaN-based semiconductor layers 13 by raising the temperature to the vicinity of the softening point of the resin. gap. As described above, as shown in Fig. 32, the first support substrate 16 is next to the first electrode 14 side formed on the first surface 13a of the GaN-based semiconductor layer 13 on the base substrate 11. Then, as shown in Fig. 3 3A, the base substrate 11 and the first support substrate 16 which are subsequently formed as described above are peeled off between the base substrate 11 and the GaN-based semiconductor layer 13. Specifically, for example, by ultrasonically stimulating the base substrate 1 1 and the first support substrate 16 which are one -58 to 201230149, the base substrate 11 and the GaN-based semiconductor layer 13 are peeled off. Alternatively, a mechanical force stimulus may be applied to a part of the end faces of the base substrate 11 and the first support substrate 16 which are integrated, and the base substrate 丨丨 and the QaN-based semiconductor layer 13 may be peeled off. Next, as shown in Fig. 33B, a necessary second electrode 17 is formed on the second surface 13b of the GaN-based semiconductor layer 13. The material of the second electrode 17 and the method of forming the second electrode 17 are selected as needed. The material of the second electrode 17 is appropriately selected depending on whether the second electrode 17 is an ohmic electrode or a Schottky electrode or a conductive type of the uppermost layer of the GaN-based semiconductor layer 13 to which the second electrode 17 is in contact. Specifically, the second electrode 17 is, for example, a multilayer film in which Ti/Al/Au is sequentially used, and the thickness of each film is, for example, a Ti film of 5 nm, an A1 film of 45 nm, and an Au film of l. 〇nm. In addition, the δ 第 second electrode 17 is formed by using a metal film or an alloy film for forming the second electrode 17 in a comprehensive manner by, for example, a vacuum distillation method or a sputtering method, and then using the metal film or the alloy film. Photolithography and etching are formed by patterning into a predetermined shape. In this case, since the organic back layer 111 is formed in the gap between the 〇aN-based semiconductor layers 13 , it is preferable that the metal film or the alloy film is not formed on the side surface of the semiconductor layer 13 , and the second electrode 17 is formed. Before the formation of the metal film or the alloy film, in order to clean the second surface 13b of the semiconductor layer 13, and to reduce the on-resistance in the vertical direction, dry etching or the like may be performed from the side of the second surface 13b. The thickness of the GaN-based semiconductor layer 13 is reduced. In FIG. 33B, the second electrode 17 is formed on the entire second surface 13b of the GaN-based semiconductor layer 13, but may be formed in a portion other than the peripheral portion of the second surface 13b of the GaN-based semiconductor layer 13, for example, -59 - 201230149 Such as the inner part of the edge of 6 μηι or more. In the case where the second electrode 17 is an ohmic electrode, the second electrode 17 is formed on the second surface 1 3 b of the Ga a bis-based semiconductor layer 13 as needed, and then the second electrode 17 is irradiated with laser light. The laser annealing is performed, whereby the second electrode 17 can be made to be in ohmic contact with a lower resistance with respect to the GaN-based semiconductor layer 13. For example, the second electrode 丨7 is composed of a multilayer metal film having a total thickness of 5 〇 nm composed of the Ti film, the A1 film, and the Au film described above, and the light energy is higher than the energy gap of GaN by 3 65 nm. The following pulsed laser light is applied to the second electrode 丨7, and the second electrode 17 can be made lower with respect to the GaN-based semiconductor layer 藉3 by instantaneously heating the GaN-based semiconductor layer 13 in contact with the second electrode 17 The resistance is ohmic contact. As a pulsed laser light having a wavelength of 365 nm or less, specifically, 'e' can use a THG (one frequency multiplier) pulsed laser light having a wavelength of 355 nm generated by a yag laser or a QHD (quadruple frequency) pulsed laser light having a wavelength of 266 nm. . Next, as shown in Fig. 34A, the metal layer 112 is formed on the surface on the side of the second electrode 17 by a vacuum evaporation method or a plating (plating) method. The occupancy of the metal layer 1 1 2 is selected as needed, for example, 3 to 3 〇 μ m. As the material of the metal layer 112, for example, Au or Cu or the like can be used. This metal layer 1 1 2 is used as a pad electrode. Next, in order to enable the GaN-based semiconductor layers 13 to be easily separated from each other in the subsequent steps, the metal layer n 2 is cut to form the trenches 3. The groove 丨 3 is formed for each or a plurality of GaN-based semiconductor layers 13 as needed. In Fig. 34A, grooves 113 are formed for every three GaN-based semiconductor layers 13. Next, as shown in Fig. 34B, the first support substrate 丨6 is peeled off by attaching the extension tape 1 1 4 ' to the side of the metal layer Π2. For example, in the case where the organic-based adhesive layer 1 i-60-201230149 is made of a thermoplastic resin, the ith support substrate 16 is removed from the metal in a state where the organic-based adhesive layer 11 1 is softened by heating. The layer 1 12 side is pulled apart, and the first support substrate 16 can be peeled off. Alternatively, if the organic binder layer 11 1 is solvent-soluble, the organic binder layer 11 1 is dissolved by immersing in a solvent to peel off the i-th support substrate i 6 . Thereafter, the core semiconductor layer 13 on which the first electrode 14 and the second electrode 17 are formed is peeled off from the extension tape 144. According to the above, a GaN-based semiconductor device in which three GaN-based semiconductor layers 13 are integrated can be manufactured. This GaN-based semiconductor element is, for example, a diode. The GaN-based dipole system pn junction diode or Schottky diode, in the pn junction diode, the ith electrode 14 and the second electrode 17 are both ohmic electrodes, and in the Schottky diode One of the electrode 14 and the second electrode 17 is a Schottky electrode, and the other is an ohmic electrode. According to the thirteenth embodiment, the same advantages as those of the seventh embodiment can be obtained. [Fourteenth embodiment] A method of manufacturing a GaN-based semiconductor device according to the fourteenth embodiment will be described. In the fourteenth embodiment, the same steps as in the seventh embodiment are carried out until the steps shown in Fig. 18B are performed. Next, as shown in FIG. 35, vacuum suction is performed on the first electrode 14 side by a vacuum pen, and the vacuum pen 1 1 5 is pulled away from the base substrate 1 1 to borrow from the base substrate. The GaN-based semiconductor layer 13 and the first electrode 14 are peeled off. Secondly, as shown in Figure 36, vacuum suction by π 5 vacuum suction -61 - 201230149

GaN系半導體層13及第1電極14遞交予另一個直空吸筆 1 1 6 〇 其次,如圖3 7所示,將由真空吸筆1 1 6真空吸附之 G aN系半導體層13及第1電極14移送,接著於形成在第1 支持基板16的一主面之有機系接著層ill。GaN系半導 體層1 3彼此之間隔係因應需要而選擇,例如為數μπι〜 數1 Ομπι左右。 其次,如圖38Α所示,在以覆蓋GaN系半導體層13 般地利用CVD法等全面形成Si〇2膜等之絕緣膜後,將該 絕緣膜例如利用RIE法朝相對於第1支持基板1 6的表面之 垂直方向蝕刻’藉此在GaN系半導體層1 3的侧面形成由 絕緣體所構成的側壁隔離層1 1 7。 其次’如圖3 8B所示,利用真空吸筆11 5將GaN系半 導體層13的第2面13b側真空吸附並移送,接著在形成於 第2支持基板1 8的一主面之有機系接著層11 8,配列複數 個GaN系半導體層1 3。在該情況,GaN系半導體層1 3彼 此係隔著形成在其側面的側壁隔離層1 1 7而相互密貼地 配置。 其次’如圖39 A所示,在GaN系半導體層13的第2面 1 3b上形成必要的第2電極1 7。該第2電極1 7的材料及該 第2電極17之形成方法係因應需要而選擇。該第2電極17 的材料係因應於該第2電極丨7是歐姆電極或蕭特基電極 ,或該第2電極17所接觸之GaN系半導體層13的最上層 之導電型而適宜選擇。具體而言,該第2電極1 7係例如 使用由下异起依序是Ti/Al/Au的多層膜,各膜的厚度設 -62- 201230149 為例如Τι膜是5nm、A1膜是45nm、Au膜是i〇nm。又,該 第2電極1 7係藉由在利用例如真空蒸鍍法或濺鍍法等全 面地形成第2電極17形成用的金屬膜或合金膜之後,將 此等金屬膜或合金膜利用光微影術及蝕刻方式圖案化成 規定形狀而形成。在該情況,由於GaN系半導體層13間 的間隙形成側壁隔離層1 17,GaN系半導體層1 3的側面 未形成金屬膜或合金膜。較佳為,在形成第2電極17形 成用的金屬臈或合金膜之前,為了使GaN系半導體層13 的第2面13b清淨化,及為了使縱向的導通電阻更減低, 亦可透過從第2面1 3b側進行乾式钮刻等縮小GaN系半導 體層13的厚度。圖39A中,第2電極17係形成在GaN系半 導體層13的第2面13b的整體,但亦可形成於除了 GaN系 半導體層13的第2面1 3b之周邊部的部分,例如與緣部相 距6μηι以上内侧的部分。在第2電極17是歐姆電極的情 況,因應需要,在GaN系半導體層13的第2面nb上形成 第2電極17後,對該第2電極17照射雷射光進行雷射退火 ,藉此可使第2電極1 7以相對於GaN系半導體層丨3更低 的電阻進行歐姆接觸。例如,第2電極17是由上述的Ti 膜、A1膜及Au膜所構成之合計厚度為5〇nm的多層金屬 臈所構成的情況,將光能高於GaN的能隙的波長365nm 以下的脈衝雷射光照射於第2電極17,瞬間加熱和第2電 極1 7接觸的GaN系半導體層丨3 ’藉此可使第2電極丨7以 相對於GaN系半導體層13更低的電阻進行歐姆接觸。作 為波長365nm以下的脈衝雷射光,具體而言,例如,可 使用YAG雷射所產生的波長35 5nm的THG(三倍頻器)脈 -63- 201230149 衝雷射光或波長266nm的QHD(四倍頻器)脈衝雷射光。 其次,如圖39B所示’在第2電極17側的表面利用真 空蒸鍵法或電鑛(鑛敷)法等形成金屬層112。該金屬層 112的厚度係因應需要而選擇,例如為3〜3〇μιη。作為 該金屬層112的材料,例如可使用au或Cu等。該金屬層 1 1 2係作為銲墊電極使用。 其次,如圖40A所示,為了使之後的步驟中GaN系 半導體層1 3彼此可容易地分離,切割金屬層n 2以形成 溝1 1 3。該溝1 1 3係因應需要按每一或複數個GaN系半導 體層13而形成。圖40A中係按每一個GaN系半導體層13 形成溝11 3。 其-欠’如圖4 0 B所示,將金屬層1 1 2側貼附延伸膠帶 1 1 4 ’剝離第2支持基板1 8。例如,在有機系接著層1 1 8 是使用由熱可塑性的樹脂所構成之情況,藉由進行加熱 使有機系接著層1 1 8軟化的狀態下,將第2支持基板丨8從 金屬層112侧拉開,可剝離第2支持基板18。或者,若有 機系接著層1 1 8為具有溶劑可溶性,則藉由浸泡於溶劑 中將有機系接著層1 1 8溶解’可剝離第2支持基板丨8。之 後’將形成第1電極14及第2電極17的GaN系半導體層13 從延伸膠帶1 1 4剝離。 藉由以上’可製造採用一個GaN系半導體層丨3的 GaN系半導體元件。該GaN系半導體元件例如是系 二極體。該GaN系二極體係pn接合二極體或蕭特基二極 體’在pn接合二極體中第1電極丨4及第2電極17皆是歐姆 電極’在蕭特基二極體中第1電極14及第2電極π其中之 -64 - 201230149 一是蕭特基電極, 蚀 另一個是歐姆電極。 依據該第丨4每t 貫化形態’可獲得和第7實施形態同樣 的優點。 ‘ 以上,雖P 4丄The GaN-based semiconductor layer 13 and the first electrode 14 are delivered to the other straight-hand pen 1 1 6 〇, and as shown in FIG. 37, the GaN-based semiconductor layer 13 and the first vacuum are vacuum-adsorbed by the vacuum pen 1 16 The electrode 14 is transferred and then formed on the organic adhesive layer ill formed on one main surface of the first support substrate 16. The interval between the GaN-based semiconductor layers 13 is selected as needed, and is, for example, about several μm to several Ομπι. Then, as shown in FIG. 38A, an insulating film such as a Si〇2 film is formed by a CVD method or the like by covering the GaN-based semiconductor layer 13, and then the insulating film is opposed to the first supporting substrate 1 by, for example, RIE. The surface of the GaN-based semiconductor layer 13 is formed with a sidewall spacer 1 17 formed of an insulator. Then, as shown in FIG. 3B, the second surface 13b side of the GaN-based semiconductor layer 13 is vacuum-adsorbed and transferred by the vacuum pen 11 5, and then the organic system formed on one main surface of the second support substrate 18 is followed by The layer 11 8 is provided with a plurality of GaN-based semiconductor layers 13 . In this case, the GaN-based semiconductor layers 13 are disposed in close contact with each other via the sidewall spacers 1 1 7 formed on the side faces thereof. Next, as shown in Fig. 39A, a necessary second electrode 17 is formed on the second surface 13b of the GaN-based semiconductor layer 13. The material of the second electrode 177 and the method of forming the second electrode 17 are selected as needed. The material of the second electrode 17 is suitably selected depending on whether the second electrode 丨7 is an ohmic electrode or a Schottky electrode or a conductive type of the uppermost layer of the GaN-based semiconductor layer 13 to which the second electrode 17 is in contact. Specifically, the second electrode 17 is, for example, a multilayer film in which Ti/Al/Au is sequentially used, and the thickness of each film is -62 to 201230149. For example, the Τ1 film is 5 nm, and the A1 film is 45 nm. The Au film is i〇nm. In addition, the second electrode 17 is formed by using a metal film or an alloy film for forming the second electrode 17 in a comprehensive manner by, for example, a vacuum deposition method or a sputtering method, and then using the metal film or the alloy film. The lithography and the etching method are formed by patterning into a predetermined shape. In this case, the side wall spacer layer 17 is formed by the gap between the GaN-based semiconductor layers 13, and the metal film or the alloy film is not formed on the side surface of the GaN-based semiconductor layer 13. Preferably, before the formation of the metal ruthenium or alloy film for forming the second electrode 17, the second surface 13b of the GaN-based semiconductor layer 13 is cleaned, and the vertical on-resistance is further reduced. The thickness of the GaN-based semiconductor layer 13 is reduced by dry button etching on the two sides 1 3b side. In FIG. 39A, the second electrode 17 is formed on the entire second surface 13b of the GaN-based semiconductor layer 13, but may be formed in a portion other than the peripheral portion of the second surface 13b of the GaN-based semiconductor layer 13, for example, The part is separated from the inside by more than 6μηι. When the second electrode 17 is an ohmic electrode, the second electrode 17 is formed on the second surface nb of the GaN-based semiconductor layer 13 as needed, and the second electrode 17 is irradiated with laser light to perform laser annealing. The second electrode 17 is made to be in ohmic contact with a lower resistance with respect to the GaN-based semiconductor layer 丨3. For example, the second electrode 17 is composed of a multilayer metal crucible having a total thickness of 5 〇 nm composed of the Ti film, the A1 film, and the Au film described above, and has a light energy higher than a wavelength of GaN of GaN of 365 nm or less. The pulsed laser light is irradiated onto the second electrode 17, and the GaN-based semiconductor layer 丨3' which is in contact with the second electrode 17 is instantaneously heated, whereby the second electrode 丨7 can be made ohmic with a lower resistance with respect to the GaN-based semiconductor layer 13. contact. As the pulsed laser light having a wavelength of 365 nm or less, specifically, for example, a THG (triple frequency multiplier) pulse of a wavelength of 35 5 nm generated by a YAG laser can be used, or a QHD of a wavelength of 266 nm (four times Frequency) pulsed laser light. Next, as shown in Fig. 39B, the metal layer 112 is formed on the surface on the side of the second electrode 17 by a vacuum evaporation method or an electric ore (mineralization) method. The thickness of the metal layer 112 is selected as needed, and is, for example, 3 to 3 μm. As the material of the metal layer 112, for example, au or Cu or the like can be used. This metal layer 1 1 2 is used as a pad electrode. Next, as shown in Fig. 40A, in order to allow the GaN-based semiconductor layers 13 to be easily separated from each other in the subsequent step, the metal layer n 2 is cut to form the trenches 1 1 3 . The trenches 1 1 3 are formed for each or a plurality of GaN-based semiconductor layers 13 as needed. In Fig. 40A, a groove 11 3 is formed for each GaN-based semiconductor layer 13. As shown in Fig. 4B, the second support substrate 18 is peeled off by attaching the extension tape 1 1 4 ' to the metal layer 1 1 2 side. For example, in the case where the organic-based adhesive layer 1 18 is made of a thermoplastic resin, the second support substrate 8 is removed from the metal layer 112 in a state where the organic-based adhesive layer 1 18 is softened by heating. When the side is pulled apart, the second support substrate 18 can be peeled off. Alternatively, if the organic binder layer 1 18 is solvent-soluble, the organic binder layer 1 18 is dissolved by immersion in a solvent to peel off the second support substrate 8 . Thereafter, the GaN-based semiconductor layer 13 on which the first electrode 14 and the second electrode 17 are formed is peeled off from the extension tape 1 1 4 . A GaN-based semiconductor device using one GaN-based semiconductor layer 丨3 can be manufactured by the above. The GaN-based semiconductor device is, for example, a diode. The GaN-based dipole system pn junction diode or Schottky diode 'in the pn junction diode, the first electrode 丨4 and the second electrode 17 are both ohmic electrodes' in the Schottky diode 1 electrode 14 and second electrode π -64 - 201230149 One is a Schottky electrode, and the other is an ohmic electrode. According to the fourth embodiment, the same advantages as in the seventh embodiment can be obtained. ‘ Above, although P 4丄

匕針對本發明的實施形態作具體說明,但 本發明未受眼I ;上述實施形態’可基於本發明的技術思 想進行各種變形。 ϋ 士 上述貫施形態中所舉的數值、構造、材料等 不過/、疋例子’亦可因應需要使用異於此等的數值、構 造、材料等。又’亦可因應需要,組合第1〜第14實施 形態中任二個以上。 又’例如’在第1 3實施形態中,亦可取代在第1支持 基板16的主面上形成有機系接著層in,改為在步驟進 行到圖1 8Β所示的狀態後’再於第1電極14側的表面利用 旋轉塗布法等塗布有機系接著層1 1 1。在該情況,將第1 支持基板1 6朝該有機系接著層1 1 1按壓,藉由進行紫外線 照射硬化(紫外線硬化)法硬化有機系接著層丨u。 【圖式簡單說明】 圖1係用以說明本發明第1實施形態之GaN系半導體 元件的製造方法之剖面圖。 圖2係顯示本發明第1實施形態之GaN系半導體元件 的製造方法中,所使用的成長遮罩之一例的平面圖。 圖3係顯示本發明第1實施形態之GaN系半導體元件 的製造方法中,所使用的成長遮罩之其它例的平面圖。 圖4係用以說明本發明第1實施形態之GaN系半導體 元件的製造方法中,用以防止GaN系半導體層彼此合體 -65- 201230149 之第2方法的概略線圖。 圖5係用以說明本發明第i實施形態之GaN系半導體 元件的製造方法中,用以防止GaN系半導體層彼此合體 之第3方法的概略線圖。 圖6係用以說明本發明第i實施形態之GaN系半導體 元件的製造方法中,用以防止GaN系半導體層彼此合體 之第3方法的概略線圖。 圖7係用以說明本發明第!實施形態之GaN系半導體 元件的製造方法中,用以防止GaN系半導體層彼此合體 之第4方法的概略線圖。 圖8係顯示本發明第i實施形態之GaN系半導體元件 的製造方法中,使用圖2所示的成長遮罩成長的GaN系半 導體層之表面的掃描式電子顯微鏡像之圖面代用照片。 圖9係顯示使用未形成輔助條紋窗的成長遮罩所成 長的GaN系半導體層之表面的掃描式電子顯微鏡像之圖 面代用照片。 圖10係顯示測定依據GaN(OOOl)面成長的條紋窗的 縱向與&lt;11-20&gt;方向所成的角度之橫向成長量的變化而 形成的成長遮罩之平面圖。 圖1 1係顯示測定依據GaN(000 1)面成長的條紋窗的 縱向與&lt;11-20&gt;方向所成的角度之橫向成長量的變化結 果之概略線圖。 圖1 2係用以說明本發明第2實施形態之〇aN系蕭特 基二極體的製造方法之剖面圖。 圖1 3係用以說明本發明第2實施形態之GaN系蕭特 201230149 基二極體的製造方法之剖面圖。 圖14係用以說明本發明第2實施形態之GaN系蕭特 基二極體的製造方法之平面圖。 . 圖1 5係用以說明本發明第3實施形態之GaN系蕭特 基二極體的製造方法之剖面圖。 圖1 6係用以說明本發明第4實施形態之GaN系蕭特 基二極體的製造方法之剖面圖。 圖1 7係用以說明本發明第5實施形態之GaN系 MISFET的製造方法之剖面圖。 圖1 8係用以說明本發明第7實施形態之GaN系半導 體元件的製造方法之剖面圖。 圖1 9係用以說明本發明第7實施形態之GaN系半導 體元件的製造方法之剖面圖。 圖2〇係用以說明本發明第7實施形態之GaN系半導 體元件的製造方法之剖面圖。 圖2 1係用以說明本發明第7實施形態之GaN系半導 體元件的製造方法之刮面圖。 圖22係用以說明本發明第7實施形態之GaN系半導 體元件的製造方法之剖面圖。 圖23係用以說明本發明第7實施形態之GaN系半導 體元件的製造方法之斜視圖。 圖24係顯示本發明第7實施形態之GaN系半導體元 件的製造方法中’從基底基板所剝離的GaN系半導體層 之表面的掃描式電子顯微鏡像之圖面代用照片。 圖25係顯示將圖24所示的GaN系半導體層之端部及 -67- 201230149 中央部放大後的掃描型雷;^ π 1 €千顯微鏡像之圖面代用照片。 圖2 6係用以說明本發日月| 〇雇^ &amp;本&amp;令ρ μ么 十《听弟8實施开^悲之GaN系蕭特 基一極體的製造方法之剖面圖。 圖27係用以說明本發明第9實施形態之大面積功率 GaN系蕭特基二極體的製造方法之平面圖。 圖28係用以說明本發明第丨丨實施形態之系發光 二極體的製造方法之剖面圖。 圖29係用以說明本發明第12實施形態之2端子· 3端 子GaN系複合半導體元件的製造方法之剖面圖。 圖3 0係顯不圖2 9所示的2端子· 3端子GaN系複合半 導體元件之等價電路的概略線圖。 圖3 1係用以說明本發明第丨3實施形態之半導體元件 的製造方法之剖面圖。 圖3 2係用以說明本發明第丨3實施形態之半導體元件 的製造方法之剖面圖。 圖3 3係用以說明本發明第丨3實施形態之半導體元件 的製造方法之剖面圖。 圖3 4係用以說明本發明第丨3實施形態之半導體元件 的製造方法之剖面圖。 圖3 5係用以說明本發明第14實施形態之半導體元件 的製造方法之剖面圖。 圖3 6係用以說明本發明第14實施形態之半導體元件 的製造方法之剖面圖。 圖3 7係用以說明本發明第14實施形態之半導體元件 的製造方法之剖面圖。 -68- 201230149 圖3 8係用以說明本發明第1 4實施形態之半導體元件 的製造方法之剖面圖。 圖3 9係用以說明本發明第14實施形態之半導體元件 的製造方法之剖面圖。 圖40係用以說明本發明第14實施形態之半導體元件 的製造方法之剖面圖。 【主要元件符號說明】 11、21、31、41、51、 基底基板 81、91 12 、 22 、 32 、 42 、 52 、 成長遮罩 71 、 82 ' 92 12a、22a、32a、42a、 52a、 71a' 82a、 92a 12b 12c 13 14 15 16 17 18 111、 118 114 115、 116 條紋窗 輔助條紋窗 遮罩部 GaN系半導體層 第1電極 接著用金屬 第1支持基板 第2電極 第2支持基板 有機系接著層 延伸膠帶 真空吸筆 側壁隔離層 -69- 117Although the embodiment of the present invention has been specifically described, the present invention is not subject to the eye I; the above embodiment can be variously modified based on the technical idea of the present invention.数值 数值 数值 数值 数值 数值 上述 数值 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 Further, any two or more of the first to fourteenth embodiments may be combined as needed. Further, in the first embodiment, for example, the organic back layer in may be formed on the main surface of the first support substrate 16, and the step may be changed to the state shown in FIG. The surface of the first electrode 14 is coated with an organic back layer 11 1 by a spin coating method or the like. In this case, the first support substrate 16 is pressed against the organic adhesive layer 1 1 1 , and the organic adhesive layer 丨u is cured by ultraviolet irradiation curing (ultraviolet curing). BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a cross-sectional view showing a method of manufacturing a GaN-based semiconductor device according to a first embodiment of the present invention. Fig. 2 is a plan view showing an example of a growth mask used in the method of manufacturing a GaN-based semiconductor device according to the first embodiment of the present invention. Fig. 3 is a plan view showing another example of the growth mask used in the method of manufacturing the GaN-based semiconductor device according to the first embodiment of the present invention. Fig. 4 is a schematic diagram showing a second method for preventing the GaN-based semiconductor layers from being combined with each other in the method of manufacturing a GaN-based semiconductor device according to the first embodiment of the present invention. Fig. 5 is a schematic diagram for explaining a third method for preventing a GaN-based semiconductor layer from being combined with each other in the method of manufacturing a GaN-based semiconductor device according to the first embodiment of the present invention. Fig. 6 is a schematic diagram for explaining a third method for preventing GaN-based semiconductor layers from being combined with each other in the method of manufacturing a GaN-based semiconductor device according to the first embodiment of the present invention. Figure 7 is a diagram for explaining the present invention! In the method of manufacturing a GaN-based semiconductor device of the embodiment, a schematic diagram of a fourth method for preventing the GaN-based semiconductor layers from being combined with each other is shown. Fig. 8 is a photograph showing a scanning electron microscope image of the surface of a GaN-based semiconductor layer grown using the growth mask shown in Fig. 2 in the method of manufacturing a GaN-based semiconductor device according to the first embodiment of the present invention. Fig. 9 is a photograph showing a scanning electron microscope image of the surface of a GaN-based semiconductor layer grown using a growth mask in which an auxiliary stripe window is not formed. Fig. 10 is a plan view showing a growth mask formed by measuring a change in the lateral growth amount of the angle formed by the longitudinal direction of the stripe window grown in the GaN (Ol) plane and the angle of the &lt;11-20&gt; direction. Fig. 1 is a schematic line diagram showing changes in the lateral growth amount at an angle formed by the longitudinal direction of the fringe window grown in the GaN (000 1) plane and the angle of the &lt;11-20&gt; direction. Fig. 1 is a cross-sectional view for explaining a method of manufacturing the 〇aN Schottky diode according to the second embodiment of the present invention. Fig. 13 is a cross-sectional view for explaining a method of manufacturing a GaN-based Schottky 201230149 base diode according to a second embodiment of the present invention. Fig. 14 is a plan view showing a method of manufacturing a GaN-based Schottky diode according to a second embodiment of the present invention. Fig. 15 is a cross-sectional view showing a method of manufacturing a GaN-based Schottky diode according to a third embodiment of the present invention. Fig. 16 is a cross-sectional view showing a method of manufacturing a GaN-based Schottky diode according to a fourth embodiment of the present invention. Fig. 17 is a cross-sectional view showing a method of manufacturing a GaN-based MISFET according to a fifth embodiment of the present invention. Fig. 18 is a cross-sectional view for explaining a method of manufacturing a GaN-based semiconductor device according to a seventh embodiment of the present invention. Fig. 19 is a cross-sectional view showing a method of manufacturing a GaN-based semiconductor device according to a seventh embodiment of the present invention. Fig. 2 is a cross-sectional view showing a method of manufacturing a GaN-based semiconductor device according to a seventh embodiment of the present invention. Fig. 2 is a plan view showing a method of manufacturing a GaN-based semiconductor device according to a seventh embodiment of the present invention. Figure 22 is a cross-sectional view showing a method of manufacturing a GaN-based semiconductor device according to a seventh embodiment of the present invention. Fig. 23 is a perspective view showing a method of manufacturing a GaN-based semiconductor device according to a seventh embodiment of the present invention. Fig. 24 is a photograph showing a scanning electron microscope image of the surface of the GaN-based semiconductor layer peeled off from the base substrate in the method for producing a GaN-based semiconductor device according to the seventh embodiment of the present invention. Fig. 25 is a photograph showing the substitution of the scanning type of the GaN-based semiconductor layer shown in Fig. 24 and the center portion of -67-201230149; Fig. 2 6 is a cross-sectional view showing the manufacturing method of the GaN-based Schottky-polar body of the singularity of the singularity of the singularity of the singer. Fig. 27 is a plan view showing a method of manufacturing a large-area power GaN Schottky diode according to a ninth embodiment of the present invention. Figure 28 is a cross-sectional view for explaining a method of manufacturing a light-emitting diode according to a second embodiment of the present invention. Figure 29 is a cross-sectional view showing a method of manufacturing a two-terminal, three-terminal GaN-based composite semiconductor device according to a twelfth embodiment of the present invention. Fig. 30 is a schematic diagram showing an equivalent circuit of a two-terminal and three-terminal GaN-based composite semiconductor element shown in Fig. 29. Figure 3 is a cross-sectional view for explaining a method of manufacturing a semiconductor device according to a third embodiment of the present invention. Figure 3 is a cross-sectional view for explaining a method of manufacturing a semiconductor device according to a third embodiment of the present invention. Figure 3 is a cross-sectional view for explaining a method of manufacturing a semiconductor device according to a third embodiment of the present invention. Figure 3 is a cross-sectional view for explaining a method of manufacturing a semiconductor device according to a third embodiment of the present invention. Fig. 3 is a cross-sectional view for explaining a method of manufacturing a semiconductor device according to a fourteenth embodiment of the present invention. Figure 3 is a cross-sectional view for explaining a method of manufacturing a semiconductor device according to a fourteenth embodiment of the present invention. Fig. 3 is a cross-sectional view for explaining a method of manufacturing a semiconductor device according to a fourteenth embodiment of the present invention. -68-201230149 Fig. 3 is a cross-sectional view for explaining a method of manufacturing a semiconductor device according to a fourteenth embodiment of the present invention. Fig. 3 is a cross-sectional view showing a method of manufacturing a semiconductor device according to a fourteenth embodiment of the present invention. Figure 40 is a cross-sectional view showing a method of manufacturing a semiconductor device according to a fourteenth embodiment of the present invention. [Description of main component symbols] 11, 21, 31, 41, 51, base substrate 81, 91 12, 22, 32, 42, 52, growth mask 71, 82' 92 12a, 22a, 32a, 42a, 52a, 71a '82a, 92a 12b 12c 13 14 15 16 17 18 111, 118 114 115, 116 Stripe window auxiliary stripe window mask GaN-based semiconductor layer first electrode followed by metal first support substrate second electrode second support substrate organic system Next layer extension tape vacuum pen side wall isolation layer -69- 117

Claims (1)

201230149 七、申請專利範圍: 1.一種半導體元件,其特徵為 具有:由異於GaN系半導體的物質所構成的基板 直接或間接地設於上述基板上且具有—或複數個 條紋狀的開口之成長遮罩,及 使用上述成長遮罩而於上述基板上朝(〇〇〇1)面方 位成長之一或複數個島狀的GaN系半導體層, 上述成長遮罩之上述條紋狀的開口係在平行於上 述GaN系半導體層的&lt;ι_10〇&gt;方向的方向延伸。 2. 如申凊專利祀圍第1項之半導體元件,其十 上述GaN系半導體層的側面是藉由(1-Ι0α)面(01為 任意的整數)、(11-2β)面(β為任意的整數)或和此等在 結晶學上是等價的面所形成,或者上述⑽系半導體 層的側面包含(1-1〇〇〇面(€1為任意的整數)。 3. 如申請專利範圍第2項之半導體元件,其中 上述成長遮罩具有:在平行於上述GaN系半導體 層的&lt;11-20&gt;方向的第i方向及平行於上述GaN系半導 體層的&lt;1_100&gt;方向的第2方向,分別以第1周期及第2 周期作周期地配列,且在上述第2方向延伸之複數個條 紋狀的開口;及在上述第!方向相互鄰接之一對的^ 述條紋狀的開口之間的區域之二等分線上,以和在上 述第2方向相互鄰接之一對的上述條紋狀的開口之相 互對向的末端部,分別重合規定距離般設置的輔助的 條紋狀的開口。 -70- 201230149 4. 如申請專利範圍第2項之半導體元件,其中 上述成長遮罩具有m亍於上述GaN系半導體 層的&lt;11-20&gt;方向的第!方向作周期地配列,且在平行 於上述GaN系半導體層的〈&quot;,方向的第2方向延伸 之複數個條紋狀的開口;及在上述第1方向上以和上 述條紋狀的開口相同周期,且對上述條紋狀的開口錯 開半周期地作射m和上述第2方向之上述條紋狀 的開口之末端部重合規定距離般地在上述第2方向延 伸之複數個條紋狀的開口。 5. 如申請專利範圍第3或4項之半導體元件,其中 上述GaN系半導體層係由包含n型層、’未摻雜層及 Ρ型層當中至少一個的2層以上的層所構成。 6. —種半導體元件的製造方法,其特徵為 具有:在由異於GaN系半導體的物質所構成的基 =上直接或間接地形成具有複數個條紋狀的開口之成 長遮罩的步驟;及 使用上述成長遮罩使複數個島狀的_系半導體 二:上述基板上朝(。。01)面方位,且上述㈣ 體層的&lt;1-1 〇〇&gt;方向在平行於 ^ u, . „ ^ ^ 丁、上述成長遮罩之上述條 紋狀的開口之方向延伸的方式成長之步驟。 7:申請專利範圍第6項之半導體元件的製造方法,其 上述成長遮罩具有:在平行於上述GaN系 層的&lt;11-20&gt;方向的第!*向及孚&gt; 十仃於上述GaN系半導 層的方向的第2方向,分別以第i周期及第2 -71 - 201230149 周期作周期地配列,且在上述第2方向延伸之複數個條 紋狀的開口;及在上述第1方向相互鄰接之—對的上 述條紋狀的開口之間的區域之二等分線上,以和在上 述第2方向相互鄰接之一對的上述條紋狀的開口之相 互對向的末端部,分別重合規定距離般設置的輔助的 條紋狀的開口。 8. 如申請專利範圍第6項之半導體元件的製造方法,其 中上述成長遮罩具有:在平行於上述GaN系半導體層 的&lt;11-20&gt;方向的第向作周期地配列且在平行於 上述GaN系半導體層的方向的第2方向延伸之 複數個條紋狀的開口;及在上述第丨方向上以和上述 條紋狀的開口相同周期對上述條紋狀的開口錯開半周 期地作周期配列’且和上述第2方向之上述條紋狀的開 口之末端部重合規定距離般地在上述第2方向延伸之 複數個條紋狀的開口。 9. 如申請專利範圍第6項之半導體元件的製造方法,旦 中進一步具有:使上述⑽系半導體層成長於上述基 板上之後’將第1支持基板接著於上述GaN系半導體層 的上面側,將該第1支持基板及上述系半導體層從 上述基板剝離的步驟。 10.如申請專利範圍第9項之半導體元件的製造方法,其 中進步具有.使上述GaN系半導體層成長於上述基 板上之後,在將上述第j支持基板接著於上述_系半 導體層的上面側之前,除去上述成長遮罩的至少一部 分之步驟。 -72- 201230149 請:利範圍第6項之半導體元件的製造方… 板上之後具Γ使上述GaN系半導體層成長於上述基 A灸,在上述GaN系半導體層的上面形成一 數個弟1電極之步驟; 二 在$成上述第1電極之後,除去上.七士、e 至少-部分之步驟; f去上迷成長遮罩的 在除去上述成長遮罩的至少一部分之 GaN系半導體層之 交於上迷 ^ ^ 贋办成上迷第1電極的上述上面側,隔 耆有機系接著層接著第1支持基板之步驟; 將上述第1支持基板及上述GaN系 基板剝離之步驟; 干導體層攸上述 某板第1支持基板及上述^系半導體層從上述 ==雖後,在露出上述GaN系半導體層的面形成一 或複數個第2電極之步驟;及 半導述第1電極及上述第2電極的上述―系 牛導體層攸上述第1支持基板剝離之步驟。 1 2. —種半導體元件的製造方法,其特徵 具有: π · 使上述GaN系半導體層成長於上述基板上之後, 述GaN系半導體層的上面形成—或複數個第1 之步驟; 在形成上述第!電極之後,除去上述成長遮罩 至少一部分之步驟; 在除去上述成長遮罩的至少一部分之後,將形成 上述第1電極的上述GaN系半導體層從上述基板剝離之 -73- 201230149 步驟; 其板=上述第Ύ的上述_系半導體層從上述 後,將形成上述第1電極的上逑GaN系半導 體層之上述第1電極側,朝形成於第^支持基板的一主 面之第1有機系接著層按壓並接著之步驟. 在上述GaN系半導體層的側面形成由絕緣體所構 成的側壁隔離層之步驟; 將側面形成上述側壁隔離層的上述GaN系半導體 層藉由真空吸附從上述第ί支持基板剝離之後,在形 成於第2支持基板的一主面之第2有機系接著層,將複 數個上述GaN系|導體^乂隔著上述側^離層而相 互接近的狀態接著之步驟; 在與上述第2支持基板的上述第2有機系接著層接 著之複數個露出上述GaN系半導體層的面,形成一或 複數個第2電極之步驟;及 將形成上述第1電極及上述第2電極的上述GaN系 半導體層從上述第2支持基板剝離之步驟。 ' -74-201230149 VII. Patent application scope: 1. A semiconductor device characterized in that: a substrate composed of a substance different from a GaN-based semiconductor is directly or indirectly provided on the substrate and has - or a plurality of stripe-shaped openings a growth mask and one or a plurality of island-shaped GaN-based semiconductor layers grown on the substrate in the azimuth direction of the substrate using the growth mask, wherein the stripe-shaped opening of the growth mask is It extends parallel to the direction of the &lt;ι_10〇&gt; direction of the GaN-based semiconductor layer. 2. The semiconductor element according to claim 1, wherein the side surface of the GaN-based semiconductor layer is a (1-Ι0α) plane (01 is an arbitrary integer) and a (11-2β) plane (β is Any of the integers) or the crystallographically equivalent surface, or the side surface of the (10)-based semiconductor layer (1-1) (€1 is an arbitrary integer). The semiconductor device of the second aspect of the invention, wherein the growth mask has an i-th direction parallel to the &lt;11-20&gt; direction of the GaN-based semiconductor layer and a &lt;1_100&gt; direction parallel to the GaN-based semiconductor layer The second direction is arranged in a periodic manner in the first period and the second period, and a plurality of stripe-shaped openings extending in the second direction; and a stripe shape adjacent to each other in the first direction The bisector of the region between the openings is overlapped with the stripe-shaped opening adjacent to the second direction, and the end portions of the strip-shaped openings are overlapped by a predetermined stripe Opening. -70- 201230149 4. The semiconductor device according to the second aspect of the invention, wherein the growth mask has a mean wavelength in the &lt;11-20&gt; direction of the GaN-based semiconductor layer, and is parallel to the GaN-based semiconductor layer. a plurality of stripe-shaped openings extending in the second direction of the direction; and the same period as the stripe-shaped opening in the first direction, and the stripe-shaped opening is shifted by a half period a plurality of stripe-shaped openings extending in the second direction in a predetermined distance from the end portion of the stripe-shaped opening in the second direction. 5. The semiconductor device according to claim 3 or 4, wherein the above The GaN-based semiconductor layer is composed of two or more layers including at least one of an n-type layer, an 'undoped layer, and a Ρ-type layer. 6. A method of manufacturing a semiconductor device, characterized in that: a step of forming a growth mask having a plurality of stripe-shaped openings directly or indirectly on a base of a substance of a GaN-based semiconductor; and using the growth mask to form a plurality of island-shaped _ series Semiconductor 2: the surface orientation of the substrate on the (. 01) plane, and the &lt;1-1 〇〇&gt; direction of the (4) body layer is parallel to ^u, . ^ ^, the stripe shape of the growth mask described above The method of manufacturing a semiconductor device according to the sixth aspect of the invention, wherein the growth mask has a thickness in a direction of &lt;11-20&gt; parallel to the GaN-based layer. The second direction of the direction of the GaN-based semiconductor layer is periodically arranged in the i-th cycle and the second -71 - 201230149 cycle, and is plural in the second direction. a stripe-shaped opening; and the stripe-shaped line on a bisector of a region between the stripe-shaped openings adjacent to each other in the first direction, and a pair of adjacent pairs in the second direction The end portions of the openings facing each other overlap the auxiliary stripe-shaped openings provided at a predetermined distance. 8. The method of manufacturing a semiconductor device according to claim 6, wherein the growth mask has a periodic arrangement in a direction parallel to the &lt;11-20&gt; direction of the GaN-based semiconductor layer and is parallel to a plurality of stripe-shaped openings extending in the second direction of the direction of the GaN-based semiconductor layer; and periodically arranging the stripe-shaped openings in a half cycle at the same period as the stripe-shaped openings in the second direction And a plurality of stripe-shaped openings extending in the second direction in a predetermined distance from the end portion of the stripe-shaped opening in the second direction. 9. The method of manufacturing a semiconductor device according to claim 6, further comprising: after the (10)-based semiconductor layer is grown on the substrate, the first support substrate is followed by the upper surface side of the GaN-based semiconductor layer. The step of peeling the first support substrate and the semiconductor layer from the substrate. 10. The method of manufacturing a semiconductor device according to claim 9, wherein the step of growing the GaN-based semiconductor layer on the substrate is performed after the j-th support substrate is on the upper surface side of the _-type semiconductor layer Previously, the step of growing at least a portion of the matte is removed. -72- 201230149 Please refer to the manufacturer of the semiconductor device of the sixth item of interest. After the board, the GaN-based semiconductor layer is grown on the base A moxibustion, and a plurality of brothers 1 are formed on the GaN-based semiconductor layer. a step of the electrode; a step of removing at least a portion of the upper seventh, e at least after the first electrode; and f removing the GaN-based semiconductor layer of the growth mask at least a portion of the growth mask a step of disposing the upper surface of the first electrode, a step of separating the organic bonding layer from the first supporting substrate, and a step of separating the first supporting substrate and the GaN-based substrate; a step of forming one or a plurality of second electrodes on a surface on which the GaN-based semiconductor layer is exposed from the first support substrate and the above-mentioned semiconductor layer of the above-mentioned one of the first support substrate and the semiconductor layer; and a first electrode and a half-guide The step of peeling off the first support substrate from the above-described "secondary conductor layer" of the second electrode. (2) A method for producing a semiconductor device, comprising: π: forming the GaN-based semiconductor layer on the substrate, and forming a plurality of first steps on the upper surface of the GaN-based semiconductor layer; The first! After the electrode, removing at least a portion of the growth mask; after removing at least a portion of the growth mask, the GaN-based semiconductor layer forming the first electrode is stripped from the substrate - 73 - 201230149; After the _-type semiconductor layer of the first electrode, the first electrode side of the upper germanium GaN-based semiconductor layer forming the first electrode is formed toward the first organic layer formed on one main surface of the second support substrate. a step of layer pressing and subsequent steps. a step of forming a sidewall spacer formed of an insulator on a side surface of the GaN-based semiconductor layer; and forming the GaN-based semiconductor layer on the side surface of the sidewall spacer by vacuum adsorption from the λ support substrate After the peeling, a plurality of the GaN-based conductors formed on one main surface of the second support substrate are in a state in which a plurality of the GaN-based conductors are adjacent to each other via the side separation layer; The second organic via layer of the second support substrate is followed by a plurality of surfaces exposing the GaN-based semiconductor layer to form one or a plurality of second electrodes And a step of separating the GaN-based semiconductor layer forming the first electrode and the second electrode from the second support substrate. '-74-
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