201228012 t λ. ** t-L· 六、發明說明： 【發明所屬之技術領域】 本案是有關於一種晶圓之接合方法、晶粒之製造方法 及晶圓與基體之接合結構，且特別是有關於一種led晶圓 之接合方法、LED晶粒之製造方法及LED晶圓與基體之接 合結構。 【先前技術】 目前主流發光二極體（LED)晶片型態可分為水平式 鲁 結構（Sapphire base structure)、覆晶式結構（Flip-chip structure)與垂直式結構（Vertical structure)等三 種型態。由於藍寶石基材（Sapphire)之機械性質佳且價 格便宜’已成為目前主流氮化鎵（GaN)的成長基板。但 藍寶石基材不導電且導熱性不佳，在發光面上的電極也會 將減少出光效率，且有電流分佈不均的情形產生。 為了改良上述缺點’業界提出以覆晶（Flip-Chip) φ 的形式來封裝LED晶片。其散熱途徑不需經過藍寶石基材 而是由銲錫材料的替代，LED晶片之散熱能力可大幅上 升。且此LED晶片之發光面上沒有電極的阻礙，LED晶片 之發光效率將會大幅提升，但製程將會麻煩許多（包括銲 錫成長、對位等步驟），且還有無鉛銲錫議題需要考量。 另外，垂直式結構之LED晶片則是將LED晶圓先與高 導電與尚導熱材料進行接合，後續再利用準分子雷射將藍 寶石基材剝除，此類型LED晶片具有高散熱能力，高出光 效率，無電流群聚現象等優點。由於垂直式結構之LED晶 201228012 1 1 片具'有許多優點，近年來已成為高功率LED晶片之主流型 態。 晶圓接合製程為製造垂直式結構LED晶片之關鍵步 驟之一 °所謂的晶圓接合製程是指將LED晶圓與高導熱高 導電之材料對接之步驟。習知之晶圓接合方式有三種，第 一種例如是台灣專利公開編號第200839857號「金/銀擴 散低溫晶圓鍵結之方法」所述之固態原子擴散接合法，其 製程為在LED晶圓蒸鍍上金，而在高導熱材上蒸鍍銀，後 續在保護氣氛下，施加高壓力，再將兩者對接。由於金與 銀具有相同之晶體結構’因此金與銀兩種金屬原子易於於 金與銀的基材中進行擴散，達成接合效果，此製程雖可在 低溫（10(TC )環境中進行接合，但由於此製程是固/固擴 散’接合時間冗長（大於半小時另外接合面需要高平 整度，且在接合過程中需要高壓力與保護氣氛，實際操作 將有其困難度。 第二種例如臺灣專利公告號第1261316「晶圓鍵合之 方法」所述之低溫晶圓接合方法。此專利在晶圓接合製程 時’導入超音波使接合表面離子化，如此將可降低加熱溫 度（約需100°C-200°C )’減少熱應力防止晶圓損壞。此專 利雖可降低接合溫度，但其設備極為昂貴複雜且若對位平 整度不佳，超音波震動反而將使晶圓產生裂片之現象。 第三種例如是美國專利公開編號US 2008/0113463 A1 「METHOD OF FABRICATING GAN DEVICE WITH LASER」所 述之低溫晶圓接合方法。晶圓接合材料為銀膠，由於銀膠 固化溫度約150°C左右，因此晶圓可在低溫環境下進行接 201228012 r rv 合，但由於銀膠主要由高分子所組成，因此财熱性、熱傳 導性與機械強度不佳，所製作出來之LED晶片將無法具有 最佳之光學效果。 【發明内容】 本案係有關於一種LED晶圓之接合方法、LED晶粒之 製造方法及LED晶圓與基體之接合結構。 根據本案之第一方面，提出一種發光二極體（LED) | 晶圓之接合方法。LED晶圓之接合方法用以結合一 LED晶 圓及一基體。接合方法包括以下步驟。形成一第一金屬薄 膜層於LED晶圓上。形成一第二金屬薄膜層於基體上。形 成一接合材料層於第一金屬薄膜層表面，接合材料層之熔 點低於攝氏110度（°C )。置放LED晶圓於基體上，使接 合材料層接觸第二金屬薄膜層。以一預固反應溫度加熱接 合材料層一預固時間，以進行一預固反應並於第一金屬薄 膜層及接合材料層之間形成一第一介金屬層，且於第二金 φ 屬薄膜層及接合材料層之間形成一第二介金屬層。以一擴 散反應溫度加熱接合材料層一擴散時間，以進行一擴散反 應，擴散反應後之第一介金屬層及第二介金屬層之熔點高 於攝氏110度。 根據本案之一第二方面，提出一種發光二極體（LED) 晶粒之製造方法。LED晶粒之製造方法包括以下步驟。形 成一第一金屬薄膜層於一 LED晶圓上。形成一第二金屬薄 膜層於一基體上。形成一接合材料層於第一金屬薄膜層表 面，接合材料層之熔點低於攝氏110度。置放LED晶圓於 201228012 1 '201228012 t λ. ** tL· VI. Description of the Invention: [Technical Field of the Invention] The present invention relates to a bonding method of a wafer, a method of manufacturing a die, and a bonding structure of a wafer and a substrate, and particularly A bonding method of a led wafer, a method of manufacturing the LED die, and a bonding structure of the LED wafer and the substrate. [Prior Art] At present, the mainstream LED pattern (LED) wafer type can be divided into three types: horizontal Sapphire base structure, Flip-chip structure and Vertical structure. state. The sapphire substrate (Sapphire) has good mechanical properties and is inexpensive. It has become the growing substrate of the current mainstream gallium nitride (GaN). However, the sapphire substrate is non-conductive and has poor thermal conductivity, and the electrode on the light-emitting surface will also reduce the light-emitting efficiency and the current distribution may be uneven. In order to improve the above disadvantages, the industry has proposed to package LED chips in the form of Flip-Chip φ. The heat dissipation path does not need to pass through the sapphire substrate but is replaced by solder material, and the heat dissipation capability of the LED chip can be greatly increased. Moreover, there is no electrode hindrance on the light-emitting surface of the LED chip, and the luminous efficiency of the LED chip will be greatly improved, but the process will be troublesome (including solder growth, alignment, etc.), and there is also a need for lead-free soldering. In addition, the vertical structure of the LED wafer is to first bond the LED wafer with the highly conductive and heat-conducting material, and then use the excimer laser to strip the sapphire substrate. This type of LED wafer has high heat dissipation capability and high light output. Efficiency, no current clustering and other advantages. Due to the vertical structure of the LED crystal 201228012 1 1 piece has many advantages, it has become the mainstream type of high-power LED chips in recent years. The wafer bonding process is one of the key steps in manufacturing a vertical structure LED wafer. The so-called wafer bonding process is a step of docking an LED wafer with a material that is highly thermally conductive and highly conductive. There are three kinds of conventional wafer bonding methods. The first one is, for example, the solid-state atomic diffusion bonding method described in Taiwan Patent Publication No. 200839857 "Method for Gold/Silver Diffusion Low Temperature Wafer Bonding", which is processed in an LED wafer. Gold is evaporated, and silver is evaporated on the high heat conductive material, and then under a protective atmosphere, high pressure is applied, and the two are butted. Since gold and silver have the same crystal structure', the gold and silver metal atoms are easily diffused in the gold and silver substrates to achieve the bonding effect. Although the process can be bonded in a low temperature (10 (TC) environment, Since the process is solid/solid diffusion, the joining time is tedious (more than half an hour, the other joint surface needs high flatness, and high pressure and protective atmosphere are required during the joining process, the actual operation will have difficulty. The second example is Taiwan patent. Low temperature wafer bonding method as described in Bulletin No. 1261316, "Method of Wafer Bonding". This patent introduces ultrasonic waves during the wafer bonding process to ionize the bonding surface, which reduces the heating temperature (about 100°). C-200°C) 'Reducing thermal stress to prevent wafer damage. Although this patent can reduce the bonding temperature, its equipment is extremely expensive and complicated. If the alignment is not flat, the ultrasonic vibration will cause the wafer to crack. The third type is, for example, the low temperature wafer bonding method described in US Patent Publication No. US 2008/0113463 A1 "METHOD OF FABRICATING GAN DEVICE WITH LASER". The material is silver glue. Since the curing temperature of the silver glue is about 150 °C, the wafer can be connected to the 201228012 r rv combination in a low temperature environment. However, since the silver glue is mainly composed of a polymer, the heat and heat conductivity and the heat conductivity are The mechanical strength is not good, and the fabricated LED chip will not have the best optical effect. [Invention] This is a method for bonding an LED wafer, a method for manufacturing the LED die, and bonding of the LED wafer to the substrate. According to the first aspect of the present invention, a method for bonding a light emitting diode (LED) | wafer is proposed. The bonding method of the LED wafer is used to bond an LED wafer and a substrate. The bonding method comprises the following steps: forming a The first metal thin film layer is formed on the LED wafer, and a second metal thin film layer is formed on the substrate, and a bonding material layer is formed on the surface of the first metal thin film layer, and the melting point of the bonding material layer is lower than 110 degrees Celsius (° C.). Laying the LED wafer on the substrate, contacting the bonding material layer with the second metal film layer, heating the bonding material layer for a pre-solidification time at a pre-solid reaction temperature to perform a pre-solid reaction A first intermetallic layer is formed between the first metal thin film layer and the bonding material layer, and a second intermetallic layer is formed between the second metal φ thin film layer and the bonding material layer. The bonding material is heated at a diffusion reaction temperature. a diffusion time of the layer to perform a diffusion reaction, wherein the melting points of the first metal layer and the second metal layer after the diffusion reaction are higher than 110 degrees Celsius. According to a second aspect of the present invention, a light emitting diode (LED) is proposed. The manufacturing method of the crystal grain comprises the following steps: forming a first metal thin film layer on an LED wafer, forming a second metal thin film layer on a substrate, forming a bonding material layer on the first On the surface of a metal film layer, the melting point of the bonding material layer is lower than 110 degrees Celsius. Place LED wafers on 201228012 1 '
JW6389PA 基體上，使接合材料層接觸第二金屬薄膜層。以一預固反 應溫度加熱接合材料層一預固時間，以進行一預固反應並 於第-金屬薄膜層及接合材料層之間形成一第一介金屬 層，且於第二金屬薄膜層及接合材料層之間形成一第二介 金屬層。以-擴散反應溫度加熱接合材料層一擴散時間， 以進行-擴散反應，擴散反應後之第一介金屬層及第二介 金屬層之炫點高於110度。剝除（Lift Off) LED晶圓之 -基材並切割LED晶圓及基體’以形成數個LED晶粒。 根據本案之-第三方面，提出一種發光二極體（led) 晶圓與基體之接合結構。LED晶圓與基體之接合結構包括 一基體、一第二金屬薄膜層、一第二介金屬層、一第一介 金屬層、-第-金屬薄膜層及—LED晶圓。第二金屬薄膜 層位於基體上，第二金屬薄膜層之材質係選自於金（虬）、 銀（Ag)、銅（Cu)及鎳（Ni )所組成之群組。第二介金 屬層位於第二金屬薄膜層上。第一介金屬層位於第二介金 屬層上，第一介金屬層與第二介金屬的材質係獨立選自於 由銅銦錫（Cu-In-Sn)介金屬、鎳銦錫（Ni_In_ Sn)介 金屬、鎳鉍（Ni-Bi)介金屬、金銦（Au_In)介金屬、銀 銦（Ag-In)介金屬、銀錫（Ag-Sn)介金屬及金鉍（Au Bi) 介金屬所組成的群組。第一金屬薄膜層位於第一介金屬層 之上’第一金屬薄膜層之材質係選自於金（Au)、銀（^)、 銅（Cu)及鎳（Ni)所組成之群組。LED晶圓位於第一金 屬薄膜層上。 為了對本案之上述及其他方面更瞭解，下文特舉實施 例，並配合所附圖式，作詳細說明如下： 201228012 【實施方式】 請參照第1〜8圖，第1圖繪示本實施例發光二極體 ⑽）晶圓110與絲170之接合方法與LED晶粒300 之製造方法的流私圖，第2〜8圖繪示第i圖之各個步驟 示意圖。 其中，步驟S101〜S106為LED晶圓110與基體170 之接合方法。如第7圖所示，待步驟sl〇6完成後，即形 成LED晶圓110與基體Π0之接合結構200。 步驟S101〜S107則為LED晶粒3〇〇之製造方法。如 第8圖所示，待步驟S107完成後，即形成複數個⑽晶 粒 300 〇 如第2圖所示，在步驟S101中，形成一第一金屬薄 膜層120於一 LED晶圓11〇上。LED晶圓11〇例如是包括 一基材111、一 N型半導體層ι12、一發光材料層113及 一 P型半導體層114。發光材料層113設置於N型半導體 _層112及P型半導體層114之間，而構成p-1-N結構。基 材111例如疋一藍寶石基材（Sapph ire)〇N型半導體層 112及P型半導體層114例如是但不侷限於氮化鎵（GaN)、 氮化鎵銦（GalnN)、磷化鋁銦鎵（AlInGaP)、氮化鋁（A1N)、 氮化銦（InN )、氮砷化銦鎵（inGaAsN )、磷氮化銦鎵 (InGaPN)或其組合。 LED晶圓11〇所發出之光線的光譜可以是任何可見光 光譜，例如是380〜760奈米（nm)，或其他光譜。再者， LED晶圓11〇之型態可以是水平式結構、垂直式結構或覆 201228012 1 w〇j〇yr/\ 晶式結構。 第一金屬薄膜層120之材質可以是金（Au)、銀（Ag)、 銅（Cu)及錄（Ni)或其組合。在此步驟中，第一金屬薄 膜層120可以藉由電鍍、濺鍍或電子搶（E_Gun)蒸鍍等 方式形成於LED晶圓110上，第一金屬薄膜層12〇之厚度 可以是但不限於0.2〜2.0微米（um)。 如第3圖所示，在步驟以02中，形成一第二金屬薄 膜層160於一基體17〇上。基體17〇之材質例如是但不偈 限於金（Au)、銀（Ag)、銅（Cu)、鎳（Ni)、鉬（M〇)、 矽（Si)、碳化矽（SiC)、氮化鋁（A1N)、金屬陶瓷複合 材料或其組合。 第二金屬薄膜層160之材質可以是金（Au)、銀（Ag)、 銅（Cu)或錦（Ni)。在此步驟中，第二金屬薄膜層16〇 可以藉由電鍍、濺鍍或蒸鍍等方式形成於基體17〇上，第 二金屬薄膜層160之厚度可以是但不限於G 2〜2 〇微米 (咖）’例如是〇.5〜1.〇微米（11111)。 如第4圖所示，在步驟S1〇3中’形成一接合材料層 於第-金屬薄膜層12〇表面。接合材料層14()之材質 :如是鉍銦（Bi-In)、鉍銦鋅（Bi_In_Zn)、鉍銦錫 (BHn-Sn)、膽錫辞（Bi —In_Sn_Zn)或其組合。其中， =材料層14G德點例如是但不侷限低於攝氏ιι〇度。 二：來說’鉍銦（Bl-In)的熔點約為攝氏ιι〇度，鉍銦 \(Bl-25In-18Zn)的、熔點約為攝氏82度，銀銦錫鋅 Β卜20In-3〇Sn-3Zn)的炼點約為攝氏⑽度軸辞 (Bmo..)的熔點約為攝氏⑴度。在此步驟中， 接合材料層140可以藉由電鍍、濺鍍或蒸鍍等方式形成於 第一金屬薄膜層120上，接合材料層140之厚度可以是但 不限於0.2〜5.0微米（um)’例如是0.5〜1.0微米（um)。 如第5圖所示，置放LED晶圓110於基體170上，使 接合材料層140接觸第二金屬薄膜層160。 如第6圖所示，以一預固反應溫度加熱接合材料層 140 —預固時間，以進行一預固反應並於第一金屬薄膜層 120及接合材料層14〇之間形成一第一介金屬層130，且 • 於第二金屬薄膜層160及接合材料層140之間形成一第二 介金屬層150。其中，本實施例之預固反應可以是一液固 反應。 此步驟之目的在於將LED晶圓110與基體170依當前 的對位關係（Alignment)進行預先固定，俾利後續製程 之進行。預固反應溫度可以是等於或高於接合材料層140 之炫點’例如等於或高於攝氏8〇度，或是例如攝氏8〇到 200度’且預固時間可以相當短，故前述對位關係將能有 • 效被維持’且不會對LED晶圓110產生任何類似熱應力的 影響。 其中右接合材料層140之材質為叙姻锡 (Bi-In-Sn)，則預固反應溫度可以是攝氏82度或攝氏82 度以上。加熱之方式則可以採用雷射加熱、熱風加熱、紅 外線加熱、熱壓加熱或超音波辅助熱壓加熱之方式。加熱 之位置則可以是直接將環境溫度提高到預固反應溫度、或 直接加熱於接合材料層14〇、或直接加熱於基體ι7〇再傳 導熱能至接合材料層140。以第6圖為例，可以採用雷射 201228012On the JW6389PA substrate, the bonding material layer is brought into contact with the second metal thin film layer. Heating the bonding material layer for a pre-solidification time at a pre-solid reaction temperature to perform a pre-solid reaction and forming a first intermetallic layer between the first metal thin film layer and the bonding material layer, and in the second metal thin film layer and A second intermetallic layer is formed between the bonding material layers. The diffusion time of the bonding material layer is heated by the diffusion reaction temperature to carry out a diffusion reaction, and the scattering points of the first metal layer and the second dielectric layer after the diffusion reaction are higher than 110 degrees. Lift Off the substrate of the LED wafer and cut the LED wafer and substrate to form a plurality of LED dies. According to the third aspect of the present invention, a bonding structure of a light-emitting diode (led) wafer and a substrate is proposed. The bonding structure of the LED wafer and the substrate comprises a substrate, a second metal film layer, a second metal layer, a first dielectric layer, a -metal film layer and an LED wafer. The second metal thin film layer is on the substrate, and the material of the second metal thin film layer is selected from the group consisting of gold, silver, copper, and nickel. The second metal layer is on the second metal thin film layer. The first intervening metal layer is located on the second intermetallic layer, and the materials of the first intermetallic layer and the second intermetallic metal are independently selected from the group consisting of copper indium tin (Cu-In-Sn) intermetallic, nickel indium tin (Ni_In_ Sn Metal, nickel-niobium (Ni-Bi) intermetallic, gold-indium (Au_In) intermetallic, silver-indium (Ag-In) intermetallic, silver-tin (Ag-Sn) intermetallic, and Au Bi intermetallic The group formed. The first metal thin film layer is located above the first metal layer. The material of the first metal thin film layer is selected from the group consisting of gold (Au), silver (^), copper (Cu), and nickel (Ni). The LED wafer is on the first metal film layer. In order to better understand the above and other aspects of the present invention, the following detailed description of the embodiments and the accompanying drawings will be described in detail below: 201228012 [Embodiment] Referring to Figures 1-8, Figure 1 illustrates the present embodiment. A light-emitting diode (10)) a method of bonding the wafer 110 to the wire 170 and a method of manufacturing the LED die 300, and FIGS. 2 to 8 are schematic views of respective steps of the second drawing. The steps S101 to S106 are methods of bonding the LED wafer 110 and the substrate 170. As shown in Fig. 7, after the completion of the step sl6, the bonding structure 200 of the LED wafer 110 and the substrate Π0 is formed. Steps S101 to S107 are a method of manufacturing the LED die 3A. As shown in FIG. 8, after the step S107 is completed, a plurality of (10) crystal grains 300 are formed. As shown in FIG. 2, in step S101, a first metal thin film layer 120 is formed on an LED wafer 11 . The LED wafer 11 includes, for example, a substrate 111, an N-type semiconductor layer ι12, a luminescent material layer 113, and a P-type semiconductor layer 114. The luminescent material layer 113 is provided between the N-type semiconductor layer 112 and the P-type semiconductor layer 114 to constitute a p-1-N structure. The substrate 111 such as a sapphire substrate (Sapph ire) 〇 N-type semiconductor layer 112 and P-type semiconductor layer 114 are, for example but not limited to, gallium nitride (GaN), gallium indium nitride (GalnN), aluminum indium phosphide Gallium (AlInGaP), aluminum nitride (A1N), indium nitride (InN), indium gallium arsenide (inGaAsN), indium gallium phosphide (InGaPN), or a combination thereof. The spectrum of the light emitted by the LED wafer 11 can be any visible light spectrum, for example, 380 to 760 nanometers (nm), or other spectrum. Furthermore, the pattern of the LED wafer 11 can be a horizontal structure, a vertical structure or a 201228012 1 w〇j〇yr/\ crystal structure. The material of the first metal thin film layer 120 may be gold (Au), silver (Ag), copper (Cu), and Ni (Ni) or a combination thereof. In this step, the first metal thin film layer 120 may be formed on the LED wafer 110 by electroplating, sputtering, or electron embossing (E_Gun) evaporation. The thickness of the first metal thin film layer 12 may be, but not limited to, 0.2 to 2.0 microns (um). As shown in Fig. 3, in step 02, a second metal thin film layer 160 is formed on a substrate 17A. The material of the substrate 17 is, for example, but not limited to, gold (Au), silver (Ag), copper (Cu), nickel (Ni), molybdenum (M〇), bismuth (Si), tantalum carbide (SiC), nitriding. Aluminum (A1N), cermet composite or a combination thereof. The material of the second metal thin film layer 160 may be gold (Au), silver (Ag), copper (Cu) or bromine (Ni). In this step, the second metal thin film layer 16 can be formed on the substrate 17 by electroplating, sputtering or evaporation. The thickness of the second metal thin film layer 160 can be, but not limited to, G 2~2 〇 micron. (Caf) 'For example, 〇.5~1. 〇micron (11111). As shown in Fig. 4, a bonding material layer is formed on the surface of the first metal thin film layer 12 in step S1〇3. The material of the bonding material layer 14 () is, for example, Bi indium (Bi-In), indium zinc indium (Bi_In_Zn), indium tin oxide (BHn-Sn), gallium (Bi-In_Sn_Zn), or a combination thereof. Wherein, the material layer 14G point is, for example, but not limited to less than Celsius. 2: For the case, 'Bl-In' has a melting point of about 10,000 degrees Celsius, 铋Indium\(Bl-25In-18Zn), the melting point is about 82 degrees Celsius, silver indium tin zinc bismuth 20In-3〇 The melting point of Sn-3Zn) is about Celsius (10) degrees. The melting point of Bmo.. is about Celsius (1) degrees. In this step, the bonding material layer 140 may be formed on the first metal thin film layer 120 by electroplating, sputtering or evaporation, and the thickness of the bonding material layer 140 may be, but not limited to, 0.2 to 5.0 micrometers (um). For example, it is 0.5 to 1.0 micron (um). As shown in Fig. 5, the LED wafer 110 is placed on the substrate 170 such that the bonding material layer 140 contacts the second metal thin film layer 160. As shown in FIG. 6, the bonding material layer 140 is heated at a pre-set reaction temperature for a pre-solidification time to form a pre-solid reaction and form a first dielectric between the first metal thin film layer 120 and the bonding material layer 14A. The metal layer 130, and a second metal layer 150 is formed between the second metal thin film layer 160 and the bonding material layer 140. Among them, the pre-solid reaction of this embodiment may be a liquid-solid reaction. The purpose of this step is to pre-fix the LED wafer 110 and the substrate 170 according to the current alignment, so as to facilitate the subsequent process. The pre-solidification reaction temperature may be equal to or higher than the sleek point of the bonding material layer 140, for example, equal to or higher than 8 degrees Celsius, or for example, 8 to 200 degrees Celsius, and the pre-solidification time may be relatively short, so the foregoing alignment The relationship will be maintained and will not have any similar thermal stress effects on the LED wafer 110. Where the material of the right bonding material layer 140 is Bi-In-Sn, the pre-solid reaction temperature may be 82 degrees Celsius or more than 82 degrees Celsius. The heating method can be performed by laser heating, hot air heating, infrared heating, hot pressing heating or ultrasonic assisted hot pressing heating. The heating may be carried out by directly raising the ambient temperature to the pre-solid reaction temperature, or directly heating the bonding material layer 14 or directly heating the substrate ι7 and transferring the thermal energy to the bonding material layer 140. Take Figure 6 as an example, you can use the laser 201228012
l wo^eyrA 直接加熱於基體Π0之底部，且其翻反應溫8。 =敕.1 時間可以視顧反應的情況而適當地 也就是說，可以在第—金屬賴層⑽及接合 層着:之間形錢夠的第—介金屬層⑽，並且第二金屬 及接合材料層140之間形成足夠的第二介金屬 Β· T止預固反應’而預固反應所需的時間即為預固 時間。而此步料以在形成非常薄的第-介金屬層130及 第二介金制15G m卩停止顧反應，也可以在形成 較厚的第一介金屬層13Q及第二金屬層150時，才停止預 固反應。 Μ 其中，依據不同的第一金屬薄膜層120、接合材料層 140及第二金屬薄膜層16〇，第一介金屬層13〇及第二二 金屬層150之材質也會不同^第―介金屬層13()及第二介 金屬層15G之材質例如是但;^侷限於_錫（Gu_In_Sn) 介金屬、鎳銦錫（Ni-ln-Sn)介金屬、鎳鉍（Ni Bi)介 金屬、金銦（Au-In)介金屬、銀銦（Ag—In)介金屬、銀 錫（Ag-Sn)介金屬、金鉍（Au—Bi)介金屬或其組合。 接著，如第7圖所示，在步驟sl〇6中，以一擴散反 應溫度加熱接合材料層140 —擴散時間，以進行一擴散反 應。其中，擴散反應可以是一液固反應或一固固反應。擴 散反應為液固反應時，擴散反應溫度可以等於或高於接合 材料層140之熔點，例如攝氏8〇到2〇〇度，擴散時間為 30分鐘到3小時。 擴散反應為固固反應時，擴散反應溫度係低於接合材 料層140之熔點。由於此時擴散反應溫度低於接合材料層 140之熔點，所以此步驟之擴散反應對於預固反應已完成 之對位關係不致於會有影響，例如攝氏40到80度，擴散 時間為30分鐘到3小時。 擴散反應為液固反應時，擴散反應溫度係高於接合材 料層140之熔點。由於此時擴散反應溫度高於接合材料層 140之熔點，所以此步驟之擴散反應可以增加定位LED晶 圓110與基體170之動作，以增加LED晶圓110與基體170 φ 之對位關係的精準度。 此步驟之擴散時間可以依據擴散反應溫度的設定而 調整。當擴散反應溫度較高時，擴散時間可以縮短；當擴 散反應溫度較低時，擴散時間可以增加。在本實施例中， 擴散時間例如是3 0分鐘到3小時。 此步驟之擴散反應過程的目的在於讓接合材料層140 之合金元素與第一金屬薄膜層120及第二金屬薄膜層160 的元素相互擴散。擴散時間可設定為大部分接合材料層 φ 140中的合金元素完成擴散所需之時間。也就是說，此步 驟可以進行到擴散反應完畢為止。 在此步驟中，可以採用批次作業來處理，例如是統一 以熱風式、烤箱、紅外線加熱或熱板加熱之方式來進行。 擴散反應後之第一介金屬層130及第二介金屬層150 之熔點例如是高於110攝氏度。第一介金屬層130及第二 介金屬層150之材質不同，其熔點也會不同。舉例來說， 銀銦（Ag-In)介金屬之熔點至少約為攝氏250度以上， 銀錫（Ag-Sn)介金屬之熔點至少約為攝氏450度以上， 11 201228012 ， 金絲（Au-Bi)介金屬之熔點至少約為攝氏35Q度以上， 金錫（Au-Sn)介金屬之㈣至少約為攝氏25()度以上。 在擴散反應完錢，接合材料層14G可能會有部 留於第-介金屬層130及第二介金屬層15〇之間，而形成 中介層140’（如第7圖所示）。在一實施例中，接合材料 層140也有可能被完全反應而消失。中介層14〇，之材質 例如是錫（Sn)、鉍（Bi)、銦（In)、辞（Zn)或其組合。 以第7圖為例，在步驟sl〇1〜sl〇6完成之後，即完 成了 LED晶圓11〇與基體17〇之接合結構2〇〇。此接合結 構200包括基體no、第二金屬薄膜層16〇、第二介金屬 層150、中介層140’ 、第一介金屬層13〇、第一金屬薄膜 層120及LED晶圓11〇。第二金屬薄膜層16〇位於基體17〇 上。第二介金屬層150位於第二金屬薄膜層16〇上。中介 層140’位於第二介金屬層15〇上。第一介金屬層13〇位 於中介層140’上。第一金屬薄膜層12〇位於第一介金屬 層130之上。LED晶圓11〇位於第一金屬薄膜層12〇上。 如第8圖所示，在步驟S107中，剝除（Lift Off) LED晶圓110之基材並切割LED晶圓11〇及基體17〇, 以形成數個LED晶粒300。在此步驟中，更包括電極、點 測、分類等製程。最後則完成一顆顆的LED晶粒300。 本申請案提出一種LED晶圓110之接合方法、LED晶 粒300之製造方法及LED晶圓110與基體170之接合結 構，可以讓LED晶圓11〇在低溫環境（低於n〇°c )下進 行接合’如此將可避免因熱膨脹係數（CTE)不同所造成 之熱應力問題’且接合過程不需高壓力、高平整度，也不 201228012 需保護氣氛。 並且由於接合材料層140為金屬且擴散反應後之第 -介金屬| 13G、第二介金屬層15()及中介層14()’的溶 點可提咼至250C以上，使得本申請案之LED晶圓11〇、 I^ED晶粒300及接合結構2〇〇具有接合熱應力低、高散熱、 高接合強度及耐高溫等特性。 綜上所述，雖然本案已以實施例揭露如上，然其並非 用以限疋本案。本案所屬技術領域巾具有通常知識者在 不脫離本案之精神和範圍内，當可作各種之更動與潤飾。 因此，本案之保護範圍當視後附之中請專利所界定者 為準。 互 【圓式簡單說明】 第1圖繪示本實施例發光二極體（led) 之接合方法與LED晶粒之製造方法的流程圖。，、基體 第2〜8圖繪示第1圖之各個步驟示意圖。 【主要元件符號說明】 110 : LED 晶圓 111 :基材 112 : N型半導體層 U3 :發光材料層 114 : P型半導體層 120 :第一金屬薄膜層 13 201228012l wo^eyrA is directly heated to the bottom of the substrate Π0, and its reaction temperature is 8. =敕.1 The time may be appropriate depending on the reaction, that is, the first metal layer (10) may be formed between the first metal layer (10) and the bonding layer, and the second metal and bonding may be formed. A sufficient amount of the second intermetallic T 预 T pre-solid reaction is formed between the material layers 140 and the time required for the pre-solidification reaction is the pre-set time. In this case, the reaction is stopped in the formation of the very thin first-metal layer 130 and the second layer of 15G m, or when the thick first metal layer 13Q and the second metal layer 150 are formed. The pre-solid reaction is stopped. The material of the first metal layer 13 and the second metal layer 150 may be different according to different first metal film layers 120, bonding material layers 140 and second metal film layers 16 The material of the layer 13 () and the second intermetallic layer 15G is, for example, but limited to _ tin (Gu_In_Sn) meson, nickel indium tin (Ni-ln-Sn) meson, nickel bis (Ni Bi) meso, Gold indium (Au-In) intermetallic, silver indium (Ag-In) intermetallic, silver tin (Ag-Sn) intermetallic, Au (Bi) intermetallic or a combination thereof. Next, as shown in Fig. 7, in step s1, the bonding material layer 140 - diffusion time is heated at a diffusion reaction temperature to carry out a diffusion reaction. Wherein, the diffusion reaction may be a liquid-solid reaction or a solid-solid reaction. When the diffusion reaction is a liquid-solid reaction, the diffusion reaction temperature may be equal to or higher than the melting point of the bonding material layer 140, for example, 8 Torr to 2 Torr, and the diffusion time may be 30 minutes to 3 hours. When the diffusion reaction is a solid reaction, the diffusion reaction temperature is lower than the melting point of the bonding material layer 140. Since the diffusion reaction temperature is lower than the melting point of the bonding material layer 140 at this time, the diffusion reaction in this step does not affect the alignment relationship of the pre-solidification reaction, for example, 40 to 80 degrees Celsius, and the diffusion time is 30 minutes. 3 hours. When the diffusion reaction is a liquid-solid reaction, the diffusion reaction temperature is higher than the melting point of the bonding material layer 140. Since the diffusion reaction temperature is higher than the melting point of the bonding material layer 140 at this time, the diffusion reaction in this step can increase the positioning of the LED wafer 110 and the substrate 170 to increase the alignment of the LED wafer 110 and the substrate 170 φ. degree. The diffusion time of this step can be adjusted according to the setting of the diffusion reaction temperature. When the diffusion reaction temperature is high, the diffusion time can be shortened; when the diffusion reaction temperature is low, the diffusion time can be increased. In the present embodiment, the diffusion time is, for example, 30 minutes to 3 hours. The purpose of the diffusion reaction process in this step is to allow the alloying elements of the bonding material layer 140 to interdiffuse with the elements of the first metal thin film layer 120 and the second metal thin film layer 160. The diffusion time can be set to the time required for the alloying elements in most of the bonding material layer φ 140 to complete the diffusion. That is to say, this step can be carried out until the diffusion reaction is completed. In this step, it can be processed by batch operation, for example, by hot air, oven, infrared heating or hot plate heating. The melting points of the first intermetallic layer 130 and the second intermetallic layer 150 after the diffusion reaction are, for example, higher than 110 degrees Celsius. The materials of the first dielectric layer 130 and the second dielectric layer 150 are different, and the melting points thereof are also different. For example, the silver-indium (Ag-In) mesogen has a melting point of at least about 250 degrees Celsius, and the silver-tin (Ag-Sn) mesogen has a melting point of at least about 450 degrees Celsius, 11 201228012, gold wire (Au- Bi) The melting point of the intermetallic metal is at least about 35 degrees Celsius, and the gold (A) of Au-Sn is at least about 25 degrees Celsius. After the diffusion reaction is completed, the bonding material layer 14G may remain between the first-metal layer 130 and the second metal layer 15A to form the interposer 140' (as shown in Fig. 7). In an embodiment, the bonding material layer 140 may also be completely reacted to disappear. The interposer 14 is made of, for example, tin (Sn), bismuth (Bi), indium (In), bismuth (Zn), or a combination thereof. Taking Fig. 7 as an example, after the completion of steps sl1 to sl6, the bonding structure 2 of the LED wafer 11 and the substrate 17 is completed. The bonding structure 200 includes a substrate no, a second metal thin film layer 16A, a second intermetallic layer 150, an interposer 140', a first intermetallic layer 13A, a first metal thin film layer 120, and an LED wafer 11A. The second metal thin film layer 16 is located on the substrate 17A. The second dielectric layer 150 is located on the second metal thin film layer 16A. The interposer 140' is located on the second intermetallic layer 15A. The first intervening metal layer 13 is positioned on the interposer 140'. The first metal thin film layer 12 is located above the first intermetallic layer 130. The LED wafer 11 is located on the first metal thin film layer 12A. As shown in FIG. 8, in step S107, the substrate of the LED wafer 110 is lifted off and the LED wafer 11 and the substrate 17 are cut to form a plurality of LED dies 300. In this step, it also includes processes such as electrode, point measurement, and classification. Finally, a plurality of LED dies 300 are completed. The present application proposes a bonding method of the LED wafer 110, a manufacturing method of the LED die 300, and a bonding structure of the LED wafer 110 and the substrate 170, so that the LED wafer 11 can be placed in a low temperature environment (less than n〇°c). Under the joint 'this will avoid the thermal stress problem caused by the difference in thermal expansion coefficient (CTE)' and the bonding process does not require high pressure, high flatness, nor 201228012 need to protect the atmosphere. And since the bonding material layer 140 is a metal and the melting point of the first-metal layer | 13G, the second metal layer 15 () and the interposer 14 ()' after the diffusion reaction can be raised to 250 C or more, the application of the present application The LED wafer 11 〇, the I ED die 300, and the bonding structure 2 〇〇 have characteristics of low thermal stress, high heat dissipation, high bonding strength, and high temperature resistance. In summary, although the present case has been disclosed above by way of example, it is not intended to limit the case. The technical field of the present invention has a general knowledge and can be used for various changes and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection in this case is subject to the definition in the patent. [Circular Simple Description] FIG. 1 is a flow chart showing a bonding method of a light emitting diode (LED) and a method of manufacturing an LED die. , Bases Figures 2 to 8 show schematic diagrams of the various steps of Figure 1. [Main component symbol description] 110 : LED wafer 111 : Substrate 112 : N-type semiconductor layer U3 : luminescent material layer 114 : P-type semiconductor layer 120 : First metal thin film layer 13 201228012
IW6389FA 130:第一介金屬層 140 :接合材料層 140’ ：中介層 150 :第二介金屬層 160 :第二金屬薄膜層 170 :基體 200 :接合結構 3 0 0 . LED 晶粒 S101〜S107 :流程步驟IW6389FA 130: first intermetallic layer 140: bonding material layer 140': interposer 150: second intermetallic layer 160: second metal thin film layer 170: substrate 200: bonding structure 300. LED die S101~S107: Process step
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