201225761 六、發明說明： 【發明所屬之技術領域】 [0001] 本發明係有關—種4+壯甘Λ « β & 裡封裝基板及其製法，尤指一種具 開口之封裝基板及其製法。 【先前技術】 剛 《科體封裝技術的演進，半導體裝£ (SemiC〇ndUCt〇r device)已開發出不同的封裝型態’ 而為提升電性功能’遂於封敎基板之表面上佈設被動元 件，再藉由線路層電性連接被動元件與半導體晶片。然 而，此種封裝件卻因封裝基板之表面上伟設被動元件， 而佔用佈線空間，導致電性功能無法提升β因此，業界 遂發展出一種嵌埋被動元件之封裝件，以增加封裝基板 表面之佈線空間。請參閱第1及1’圖，係為習知封裝基 板之示意圖。 [0003] 如第1圖所示，該封裝基板1係包括：具有該開口 100 之核心板10、設於該核心板1〇上之線路層丨2、及設於該 核心板10上且圍繞該開口 100輪麻之金屬環13。 _4] 於製程巾，為了提升對位的精準度，係藉由該金屬 環13以作為雷射鑽孔之預定區域，而確保該開口 1〇〇形成 於該金屬環13内之位置，之後，再將被動元件彳設於該開 口 100中，可避免該被動元件4無法置入開口 1〇〇之問題； 其中，該被動兀件4之左、右兩侧具有正電極4〇、負電極 41 〇 [0005] 惟’習知封裝基板1巾，因該金屬環13之内側輪廊等 099143585 於該開口 100之輪廓，故當該被動元件4埋入 表單編號Α0101 第4頁/共15頁 該開口 1 〇 〇中 0992075500-0 201225761201225761 VI. Description of the Invention: [Technical Field of the Invention] [0001] The present invention relates to a 4+ Zhuangganzi «β & package substrate and a method for manufacturing the same, and more particularly to a package substrate having an opening and a method for manufacturing the same. [Prior Art] Just as the evolution of the body packaging technology, the semiconductor package (SemiC〇ndUCt〇r device) has developed different package types' to enhance the electrical function 'to passively on the surface of the packaged substrate The component is electrically connected to the passive component and the semiconductor wafer by the circuit layer. However, such a package occupies a wiring space due to the passive component on the surface of the package substrate, and the electrical function cannot be improved. Therefore, the industry has developed a package in which a passive component is embedded to increase the surface of the package substrate. Wiring space. Please refer to Figures 1 and 1' for a schematic view of a conventional package substrate. [0003] As shown in FIG. 1 , the package substrate 1 includes a core board 10 having the opening 100, a circuit layer 2 disposed on the core board 1 , and a core board 10 disposed on the core board 10 . The opening is 100 turns of the metal ring 13 of the hemp. _4] In the process towel, in order to improve the accuracy of the alignment, the metal ring 13 is used as a predetermined area for the laser drilling to ensure that the opening 1 is formed in the metal ring 13 and thereafter. The passive component is disposed in the opening 100 to avoid the problem that the passive component 4 cannot be placed in the opening 1; wherein the left and right sides of the passive component 4 have a positive electrode 4〇 and a negative electrode 41. 〇[0005] only the conventional package substrate 1 towel, because the inner ring of the metal ring 13 and the like 099143585 in the outline of the opening 100, when the passive component 4 is buried in the form number Α 0101 page 4 / 15 pages Opening 1 〇〇中0992075500-0 201225761
[0006] [0007] Ο [0008] G 時，若該被動元件4之位置偏移，將使該被動元件4之正 電極40、負電極41均抵靠至該開口 100之側壁面，以致於 該被動元件4之正電極40、負電極41接觸該金屬環13，如 第Γ圖所示，而導致該被動元件4產生短路。 因此，如何避免且克服習知技術中之具短路風險的 問題，實已成目前亟欲解決的課題。 【發明内容】 鑑於上述習知技術之缺失，本發明提供—種具開口 之封裝基板，係包括：核心板，係具有貫穿之開口；線 路層’係設於該梭心板之表面上；以及金屬環，係設於 該核心板之表面上，且圍繞該開口之鉍廓，該金屬環之 内侧輪廓大於該開口之輪廓，以完全外露出該開口。 本發明復提供一種具開口之封装基板之製法，係包 括.提供一核心板’係具有一預定開口區；於該核心板 之二表面上分別形成一電鍍阻層，且該電鍍阻層覆蓋該 預定開口區，並圖案化該_鍍阻層以形成複數開孔與圍 .... . .…. 繞該預定開口區輪廓之開槽；於該電鑛阻層之開孔中形 成線路層，且於該開槽中形成初始金屬環；移除該電鍍 阻層，以外露出該線路層、初始金屬環及該預定開口區 ;移除該核心板之預定開口區，以於該核心板中形成貫 穿之開口；以及微蝕刻該線路層與初始金屬環之表面， 使該初始金屬環形成金屬環，且令該金屬環之内側輪廓 大於該開口之輪廓。 [0009] 099143585 前述之製法復包括以雷射方式移除該核心板之預定 開口區，而形成該開口。 表單編號A0101 第5頁/共15頁 0992075500-0 201225761 [0010] 前述之製法復包括以化學蝕刻方式移除該初始金屬 [0011] [0012] [0013] [0014] [0015] [0016] [0017] 環之部分内側表面。 前述之封裝基板及其製法中，該金屬環之内側輪廓 之長度大於該開口輪廓之長度。 前述之封裝基板及其製法中，該金屬環之内侧表面 與該開口輪廓之間的距離為3至5 // m。 前述之封裝基板及其製法中，復包括嵌埋元件，係 設於該開口中，且該傲埋元件為主動元件或被動元件。 由上可知，本發明係藉由該金屬環之内側輪廓大於 該開口之輪廓，使該金屬環之内侧表面與該開口輪廓之 間保持一定距離，故相較於習知技術，即使該嵌埋元件 之位置於該開口中偏移，該嵌埋元件仍不會接觸該金屬 環，因而避免該嵌埋元件產生短路。 【實施方式】 以下藉由特定的具體實施例說明本發明之實施方式 ，熟悉此技藝之人士可由本說明書所揭示之内容輕易地 瞭解本發明之其他優點及功效。 請參閱第2A至2F圖，係為本發明具開口 200之封裝基 板2之製法之剖視示意圖。 如第2A圖所示，首先，提供一核心板20，係具有一 預定開口區A。 如第2B圖所示，於該核心板20之二表面上分別形成 一電鍍阻層21，且該電鍍阻層21覆蓋該預定開口區A，並 099143585 表單編號A0101 第6頁/共15頁 0992075500-0 [0018] 201225761 [0019] 進行圖案化製程，使該電鍍阻層21形成複數開孔2i〇a與 圍繞該預定開口區A輪廓之開槽2l〇b。 如第2C圖所示’於該錢阻層21之開孔2心中形成 線路層22，且於該開槽21Qb中形成初始金屬環仏。 [0020] 如第2D圖所示，移除該電鍍阻層21， 以外露出該線 [0021] Ο [0022] 〇 [0023] [0024] 099143585 路層22、初始金屬環23a及該預定開口區a。 如第2E圖所示，藉由初始金屬環仏進行對位以雷 射方式移除該核心板20之預定開口區A , 中形成貫穿之開口 200 » 如第2F及2F，圖所示，以化學钱刻方式，微姓刻該 線路層22與該初始金屬環23a之表面，使該初始金屬環 23a形成金屬環23，且令該金屬肋之内側輪廓之長度l 大於该開Π200之輪廓之長度s，以形成本發明之具開口 2默封裝基^於本實施财，該金屬環以内側表 面與该開口 2〇〇輪廓之間的距離&為3至5。 於後續製程中，可設置，埋元件3於該開口 200中 二=Γ3之左右兩側具有正電極3°、負電極31; 於本實施财，料埋元们為主動轉（如 動元件（如電阻）。 曰乃）氧被 本發縣由如職程，使:Γ°°之輪廊，令該金屬環23之内侧表面與該開 門口 之間保持—定距離D，故即使該嵌埋元件3於該 幵口之位置偏移’而使該後埋元件3之正電極3〇、 負電極㈣抵靠至該開口2•側壁面， 表單贼議 ^7 1/^ 151 件3之 而於該核心板20 201225761 正電極30、負電極31均不會接觸該金屬環23，因而避免 该.後埋元件3產生短路。 [0025] 如第2G圖所示，於後續製程中，係可於該核心板20 、線路層22、金屬環23、及該嵌埋元件3上形成增層結構 24。該增層結構24具有至少一介電層240、設於介電層 240上之增層線路241、及設於介電層240中且電性連接 該增層線路241與線路層22之導電盲孔242。 如第2H圖所示，於後續製程中，係可於該增層結構 24上形成防焊層25 ’該防焊層25具有防焊層開孔250， 以外露出部分之增層線路241，俾供接置焊球26, 26，。 於本實施例中，上側之焊球26可接置半導體晶片（圖未 示）’下側之焊球26’可接置電路板（圖未示）。 本發明復提供一種具開口 200之封裝基板，係包括： 具有貫穿之開口 200之核心板20、設於該核心板20之表面 上之線路層22、以及設於該核,¾板g〇之表面上之金屬環 23 〇 所述之金屬環23圍繞該開口 200之輪廓，且該金屬環 23之内側輪廓大於該開口 2〇〇之輪廓，以完全外露出該開 口 200 ;於本實施例中，該金屬環23之内側輪廓之長度L 大於該開口 200輪廓之長度s，且該金屬環23之内側表面 與該開口 200輪廓之間的距離1)為3至5/Ζιη。 [0029] 所述之封裝基板復包括嵌埋元件3，係設於該開口 2〇〇中’且該嵌埋元件3為主動元件或被動元件。 [0030] 細上所述，本發明具開口之封裝基板及其製法，係 099143585 表單編號Α0101 第8頁/共15 i ' 0992075500-0 201225761 藉由該金屬環之内側輪廓大於該開口之輪廓，當該嵌埋 元件之位置於該開口中偏移時，該嵌埋元件仍不會接觸 該金屬環，有效降低嵌埋元件產生短路之風險，以提高 產品良率。 [0031] Ο [0032] [0033] [0034] Ο [0035] [0036] [0037] [0038] [0039] [0040] 上述實施例係用以例示性說明本發明之原理及其功 效，而非用於限制本發明。任何熟習此項技藝之人士均 可在不違背本發明之精神及範疇下，對上述實施例進行 修改。因此本發明之權利保護範圍，應如後述之申請專 利範圍所列。 【圖式簡單說明】 第1圖係為習知封裝結構之剖視示意圖；第Γ圖係 為第1圖之局部上視圖；以及 第2Α至2Η圖係為本發明具開口之封裝基板之製法的 剖視示意圖；第2F’圖係為第2F圖之局部上視圖。 【主要元件符號說明】 1,2 封裝基板 10,20 核心板 1 00,200 開口 12, 22 線路層 13, 23 金屬環 21 電鍍阻層 210a 開孔 099143585 表單編號Α0101 第9頁/共15頁 0992075500-0 201225761 [0041] 210b 開槽 [0042] 23a 初始金屬環 [0043] 24 增層結構 [0044] 240 介電層 [0045] 241 增層線路 [0046] 242 導電盲孔 [0047] 25 防焊層 [0048] 250 防焊層開孔 [0049] 26, 26’ 焊球 [0050] 3 嵌埋元件 [0051] 30, 40 正電極 [0052] 31, 41 負電極 [0053] 4 被動元件 [0054] A 預定開口區 [0055] D 距離 [0056] L, S 長度 099143585 表單編號 A0101 第 10 頁/共 15 頁 0992075500-0[0007] [0008] When the position of the passive component 4 is offset, the positive electrode 40 and the negative electrode 41 of the passive component 4 are both abutted against the sidewall surface of the opening 100, so that The positive electrode 40 and the negative electrode 41 of the passive component 4 contact the metal ring 13, as shown in the figure, resulting in a short circuit of the passive component 4. Therefore, how to avoid and overcome the problem of short-circuit risk in the prior art has become a problem that is currently being solved. SUMMARY OF THE INVENTION In view of the above-mentioned deficiencies of the prior art, the present invention provides an open package substrate, comprising: a core plate having an opening therethrough; a circuit layer 'on the surface of the bobbin; A metal ring is disposed on the surface of the core plate and surrounds the profile of the opening. The inner contour of the metal ring is larger than the contour of the opening to completely expose the opening. The invention provides a method for manufacturing an encapsulated substrate having an opening, comprising: providing a core plate having a predetermined opening region; forming a plating resist layer on each of the two surfaces of the core plate, and the plating resist layer covers the Defining an open area, and patterning the _plating resist layer to form a plurality of openings and surrounding ........ a groove around the contour of the predetermined open area; forming a circuit layer in the opening of the electric resistance layer Forming an initial metal ring in the slot; removing the plating resist layer to expose the circuit layer, the initial metal ring and the predetermined opening region; removing a predetermined opening region of the core plate for the core plate Forming a through opening; and micro-etching the surface of the circuit layer and the initial metal ring such that the initial metal ring forms a metal ring and the inner contour of the metal ring is larger than the contour of the opening. [0009] 099143585 The foregoing method of forming includes removing a predetermined open area of the core board by laser to form the opening. Form No. A0101 Page 5 of 15 0992075500-0 201225761 [0010] The foregoing method includes removing the initial metal by chemical etching [0011] [0014] [0015] [0016] 0017] Part of the inside surface of the ring. In the above package substrate and method of manufacturing the same, the length of the inner contour of the metal ring is greater than the length of the opening profile. In the above package substrate and method of manufacturing the same, the distance between the inner side surface of the metal ring and the opening profile is 3 to 5 // m. In the foregoing package substrate and method of fabricating the same, an embedded component is included in the opening, and the proud component is an active component or a passive component. As can be seen from the above, the present invention maintains a certain distance between the inner surface of the metal ring and the opening contour by the inner contour of the metal ring being larger than the contour of the opening, so that the embedded portion is compared with the prior art. The position of the component is offset in the opening, and the embedded component still does not contact the metal ring, thereby avoiding a short circuit in the embedded component. [Embodiment] The embodiments of the present invention are described below by way of specific embodiments, and those skilled in the art can readily understand other advantages and functions of the present invention from the disclosure of the present disclosure. Referring to Figures 2A through 2F, there is shown a cross-sectional view of the method of fabricating the package substrate 2 having the opening 200 of the present invention. As shown in Fig. 2A, first, a core board 20 is provided having a predetermined opening area A. As shown in FIG. 2B, a plating resist layer 21 is formed on each of the two surfaces of the core board 20, and the plating resist layer 21 covers the predetermined opening area A, and 099143585 Form No. A0101 Page 6 / Total 15 Page 0992075500 [0018] 201225761 [0019] A patterning process is performed such that the plating resist layer 21 forms a plurality of openings 2i 〇 a and a slit 2 〇b surrounding the contour of the predetermined opening area A. As shown in Fig. 2C, the wiring layer 22 is formed in the core of the opening 2 of the money resist layer 21, and an initial metal ring is formed in the opening 21Qb. [0020] As shown in FIG. 2D, the plating resist layer 21 is removed, and the line is exposed outside [0021] [0022] [0023] [0024] 099143585 The road layer 22, the initial metal ring 23a, and the predetermined opening area a. As shown in FIG. 2E, the predetermined opening area A of the core board 20 is laser-removed by the initial metal ring 对, and the opening 200 is formed through the opening, such as the 2F and 2F, as shown in the figure. In the chemical engraving manner, the surface of the circuit layer 22 and the initial metal ring 23a are slightly engraved, so that the initial metal ring 23a forms the metal ring 23, and the length l of the inner contour of the metal rib is greater than the contour of the opening 200. The length s is formed to form the opening 2 of the present invention. The metal ring has a distance & 3 to 5 between the inner side surface and the opening 2 〇〇 profile. In the subsequent process, the buried component 3 has a positive electrode 3° and a negative electrode 31 on the left and right sides of the opening 200 in the opening 200. In this implementation, the buried elements are active (eg, moving components ( Such as resistance). 曰 is) oxygen is used by the county of the county, such as: Γ ° ° wheel corridor, so that the inner surface of the metal ring 23 and the opening of the door to maintain a fixed distance D, so even if the embedded The buried element 3 is offset from the position of the mouthpiece so that the positive electrode 3〇 and the negative electrode (4) of the buried component 3 abut against the opening 2 • the side wall surface, and the form thief discusses ^7 1/^ 151 3 On the core board 20 201225761, the positive electrode 30 and the negative electrode 31 do not contact the metal ring 23, thereby avoiding the short circuit of the buried element 3. [0025] As shown in FIG. 2G, in the subsequent process, the build-up structure 24 can be formed on the core board 20, the circuit layer 22, the metal ring 23, and the embedded component 3. The build-up structure 24 has at least one dielectric layer 240, a build-up line 241 disposed on the dielectric layer 240, and a conductive blind disposed in the dielectric layer 240 and electrically connected to the build-up line 241 and the circuit layer 22. Hole 242. As shown in FIG. 2H, in a subsequent process, a solder resist layer 25 may be formed on the build-up structure 24. The solder resist layer 25 has a solder resist opening 250, and an exposed portion of the build-up layer 241. For soldering balls 26, 26,. In the present embodiment, the solder balls 26 on the upper side can be connected to the solder balls 26' on the lower side of the semiconductor wafer (not shown) to be connected to the circuit board (not shown). The present invention further provides a package substrate having an opening 200, comprising: a core board 20 having an opening 200 therethrough, a circuit layer 22 disposed on a surface of the core board 20, and a core layer disposed on the core, 3⁄4 The metal ring 23 on the surface surrounds the contour of the opening 200, and the inner contour of the metal ring 23 is larger than the contour of the opening 2 to completely expose the opening 200; in this embodiment The length L of the inner contour of the metal ring 23 is greater than the length s of the contour of the opening 200, and the distance 1) between the inner surface of the metal ring 23 and the contour of the opening 200 is 3 to 5/Ζι. [0029] The package substrate comprises an embedded component 3, which is disposed in the opening 2, and the embedded component 3 is an active component or a passive component. [0030] As described above, the package substrate with openings of the present invention and its manufacturing method are 099143585 Form No. 1010101 Page 8 / 15 i ' 0992075500-0 201225761 By the inner contour of the metal ring is larger than the contour of the opening, When the position of the embedded component is offset in the opening, the embedded component still does not contact the metal ring, thereby effectively reducing the risk of the embedded component generating a short circuit to improve the product yield. [0040] [0040] [0040] [0040] The above embodiments are used to exemplarily illustrate the principles of the present invention and its effects, and It is not intended to limit the invention. Any of the above-described embodiments may be modified by those skilled in the art without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be as set forth in the application patents which will be described later. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a cross-sectional view showing a conventional package structure; FIG. 1 is a partial top view of FIG. 1; and FIGS. 2 to 2 are a method for manufacturing an open package substrate of the present invention. A schematic cross-sectional view of the 2F' is a partial top view of the 2F. [Main component symbol description] 1,2 package substrate 10, 20 core board 1 00, 200 opening 12, 22 circuit layer 13, 23 metal ring 21 plating resist layer 210a opening 099143585 Form number Α 0101 Page 9 / 15 page 0992075500-0 201225761 [0041] 210b Slot [0042] 23a Initial metal ring [0043] 24 Additive structure [0044] 240 Dielectric layer [0045] 241 Additive line [0046] 242 Conductive blind hole [0047] 25 Solder mask [ 0048] 250 solder mask opening [0049] 26, 26' solder ball [0050] 3 embedded component [0051] 30, 40 positive electrode [0052] 31, 41 negative electrode [0053] 4 passive component [0054] A Scheduled open area [0055] D Distance [0056] L, S Length 099143585 Form No. A0101 Page 10 of 15 0992075500-0