TW201207612A - Computer system data recovery device - Google Patents

Computer system data recovery device Download PDF

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Publication number
TW201207612A
TW201207612A TW99125833A TW99125833A TW201207612A TW 201207612 A TW201207612 A TW 201207612A TW 99125833 A TW99125833 A TW 99125833A TW 99125833 A TW99125833 A TW 99125833A TW 201207612 A TW201207612 A TW 201207612A
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Taiwan
Prior art keywords
computer system
memory
chip
management controller
output
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TW99125833A
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Chinese (zh)
Inventor
Hung-Ju Chen
Liang-Yan Dai
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Hon Hai Prec Ind Co Ltd
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Priority to TW99125833A priority Critical patent/TW201207612A/en
Publication of TW201207612A publication Critical patent/TW201207612A/en

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Abstract

The present invention discloses a computer system data recovery device which installed in a motherboard of the computer system. The computer system data recovery device includes a baseboard management controller wafer, a switch module and a basic input output system wafer. The basic input output system wafer has a memory. The baseboard management controller wafer communicates with a remote client and makes the switch module connect to the baseboard management controller wafer in control of the remote client. As thus, the program codes of the remote client are stored in the memory of basic input output system wafer.

Description

201207612 六、發明說明: 【發明所屬之技術領域】 [⑽1] 本發明涉及一種電腦系統資料修復裝置,尤其涉及一種 用於電腦系統中基本輸入輸出系統 (basicinputoutputsystem,BIOS)之資料修復裝置。 【先前技術】 [0002] 現今之電腦系統中,主板上之BIOS晶片為電腦提供最基 本、最直接之硬體控制。它主要用於存放自診斷測試程 式、系統自舉裝入程式、系統設置程式和主要輸入/輸出 (INPUT/OUTPUT,I/O)設備之I/O驅動程式及中斷服 務程式等必不可少之基本程式。一旦BIOS晶片出現問題 ,電腦便無法執行大多數基本功能。當BIOS晶片内部程 式之資料受到損壞,而要對其内部之資料進行修復時, 習知之方法一般係於BIOS之快閃記憶體上劃分一開機區 塊(boot block),該開機區塊包含有用於引導之最小 指令集並具有簡單之軟體覆寫功能。當BIOS資料損壞時 ,可藉由硬體或軟體之方式去調用或執行該開機區塊内 之代碼,以啟動其覆寫功能,進而實現BIOS晶片之資料 修復。然而,若該開機區塊内之資料被損壞或者因誤操 作而被覆蓋,則無法利用該開機區塊實現BIOS晶片之修 復。 【發明内容】 [0003] 有鑒於此,有必要提供一種可有效修復基本輸入輸出系 統資料之電腦系統資料修復裝置。 [0004] 一種電腦系統資料修復裝置,設置於一電腦系統内之主 099125833 表單編號A0101 第4頁/共14頁 0992045326-0 201207612 Ο [0005] ❹ [0006] 板上,所《腦系統資料修復褒置包括—基板管理控制 器晶片、-+刀換模組及-基本輸人輸出系統晶片所述 基本輸人輸出系統晶片内設置—記憶體,所述基板管理 控制器晶、切換齡及記_依:欠電性連接,所述基 板管理控㈣晶>|與-遠端客戶機進行通信,並於所述 遠端客戶機之㈣下’將所述切換模組切換至基板管理 控制器晶片’以將該基板管理控制器晶片與記憶體電性 連接,進而將所述遠端客戶㈣之基本輸人輸出系統程 式藉由該基板管理控制器晶片燒錄於該記憶體上,對該 電腦系統内基本輸人輸出^转儲之資料進行修復。 相較於習知技術,本發明所述之電腦“資料修復裝置 藉由設置-切換模組,當需要對基本輸人輸出系統晶片 内之資料進行修復時,僅需將該_模烟換至該BMC晶 片,便可將遠端客戶機内之基本輪人m统程式碼燒 錄至該記憶體上,用以更新該記龍内原f之遭損壞之 基本輸入輸出系統程式,從而修復基本輸人輸出系統晶 片存儲之k料。與習_技術相电,本發明之電腦系統資 料修復裝置操作簡單,可有效避免習知技術巾容易出現 之因開機區塊内之資料被損《者誤操作而導致無法修 復基本輸入輸出系統資料之問題。 【實絶方式】 清參閱圖1 ’本發明較佳實施例之電腦系統資料修復裝置 100可設置於-電腦系統2動之主板2G上,並與一遠端 客戶機300電性連接^該電腦系統⑽藉由習知之通信璋 與該遂端客戶機3〇G建立通信,該電腦系統資料修復裝置 099125833 表單編號A0101 第5頁/共14頁 0992045326-0 201207612 100可於所述遠端客戶機300之控制下,對該電腦系統 200内之基本輸入輸出系統(basicinpUt〇utputsystem ,BIOS)所存儲之資料進行修復或更新。 [00〇7] 該電腦系統資料修復裝置1 〇〇包括一基板管理控制器 (baseboard management controller,BMC)晶片 11 、一主控晶片13、一切換模組15及一BIOS晶片17,該 BIOS晶片17内設置一記憶體172。該BMC晶片11、切換模 組15及記憶體172依次電性連接,所述主控晶片13連接至 該切換模組15。 [0008] 請一併參閱圖2,該BMC晶片11包括一組通用輸入/輸出( general purpose input output ’..GPI0.)引腳 GPI010-GPI013及一控制引腳GPIOJ0 » 該GPIO引腳 GP101 0-GP101 3及控制引腳GP10 J0均電性連接至所述切 換模組15。該BMC晶片11還藉由網卡或其他之通信介面與 該遠端客戶機300進行通信。 [0009] 該主控晶片13包括一組資料傳輪引腳SPI -MOSI、SPI -MIS0、SPI-CS0-N及SPI-CLK。該資料傳輸引腳8卩1-M0SI、SPI-MIS0、SPI-CS0-N及SPI-CLK分別連接至所 述切換模組15。 [0010] 該切換模組15可以為型號為SN74CBT3257DBR之晶片或 具有相同功能之電路,其為一多路輸出選擇器。該切換 模組15包括一組第一訊號輸入端1B1-4B1、一組第二訊 號輸入端1B2-4B2、一組訊號輸出端1A-4A、一工作使能 端0E及一訊號輸入控制端S。其中’該第一訊號輸入端 099125833 表單編號A0101 第6頁/共14頁 0992045326-0 201207612 1Β1-4Β1分別與BMC晶片U中之Gpi〇引腳 GPI010-GPI013電性連接;第二訊號輸入端^2_绌2分 別與主控晶片13中之資料傳輸引腳spi -M0SI 、 SPI- Ο [0011] ❹ MIS0、SPI-CS0-N及SPI-CLK電性連接;所述訊號輸入 控制端S電性連接至控制引腳gp 1〇j〇。於本實施例中,定 義所述訊號輸入控制端S之電壓為低電平時,所述切換模 組15接收來自該BMC晶片11之資料;所述訊號輸入控制端 S之電壓為高電平時,所述切換模組15接收來自該主控晶 片13之資料。可以理解,由於所述切換模組15 —般屬於 工作使能端0E低電平有效,故此處將所述工作使能端〇E 接地。 ,;51' :. .. ;:=·,»>-.. ·; · .該記憶體17 2可以為一快閃記憶體,其内存儲有用於驅動 電腦系統200正常開機及運作之BIOS程式。該記憶體172 包括16個引腳pinl-pinl6。其中,引腳Pinl藉由一第 —電阻R1連接至一電源VCC,引腳pin2連接至所述電源 VCC。該引腳Pinl5、引腳pinS、引腳pin?及引腳Pln16 分別與切換模組15中之訊號輸出端1A-4A— 一對應連接。 另外,該引腳pin2還藉由一組並聯之電容。卜02接地, 該引腳pin7還藉由一第二電阻R2連接至所述電源代6。 當所述訊號輸人控制端S之電壓為低電平所述切換模 組15將該記憶體172切換至BMC晶片11,此時該記憶體 172將BMC晶片11傳送過來之資料進行存儲;當所述讯號 輸入控制端S之電壓為高電平時,所述切換模組15將該°己 憶體172切換至主控晶片13,此時該記憶體172將主控明 片13内之資料進行存儲。該BIOS晶片Π可藉由系統匯流 099125833 表單編號A0101 第7頁/共14頁 0992045326-0 201207612 圖未示)訪問該記憶體172,並調用該記憶體i72内 存健之刪m使得該正㈣機,並使 得電腦系統200内之部件例如記憶體、硬碟、中央處理器 等初始化,並進行正常之運作。 [0012] [0013] 下面詳細介紹本發㈣料齡k電腦⑽f料修復 裝置100之工作原理: 首先’當電腦系統200接通電源卻無法正常開機時一般 說明該趣晶片17出現了問題。此時,該電腦系統200 將藉由習知之通信介面發送一請表訊號給該遠端客戶機 3〇〇 ’該遠端客戶機300接收到該請求訊號後,驅動該 BMC晶片11中之控制引腳GPI〇J〇輸出一低電平。因為該 控制引腳GPIOJO電性連接至切換模組15之訊號輸入控制 端S,故該切換模組15將其輪入端切換至第—訊號輸入端 1B卜4B1。此時,該遠端客戶機3〇〇將其内部主板(圖未 不)内新的BIOS程式碼藉由該gpio引^GpI〇1〇_GpI〇13 輸入給切換模組15,並藉由該切換模組15燒錄於該記憶 體172上,以更新該記憶體172内原有之遭損壞之程 式。這樣該BIOS晶片17便可訪問該記憶體172 ,並調用 該記憶體1 72内新的B10S程式,以使該電腦系統2〇 〇正常 開機。 [0014]當所述BIOS晶片17修復完畢後,所述控制引腳gpi〇j〇之 電壓恢復為高電平。此時,該切換模組15將其輸入端切 換至第一訊虎輸入端1B2-4B2。進而使得該主控晶片13 藉由該切換模組15與記憶體172進行資料之傳送及存儲。 099125833 表單編號A0101 第8頁/共14頁 0992045326-0 201207612 [0015]頌然,本發明所述之電腦系統資料修復裝置1〇〇藉由設置 一切換模組15 ’當需要對8105晶片17内之資料進行修復 時’僅需將該切換模組1 5切換至該BMC晶片11,便可將遠201207612 VI. Description of the Invention: [Technical Field of the Invention] [(10) 1] The present invention relates to a computer system data repair device, and more particularly to a data repair device for a basic input/output system (BIOS) in a computer system. [Prior Art] [0002] In today's computer systems, the BIOS chip on the motherboard provides the most basic and direct hardware control for the computer. It is mainly used to store self-diagnostic test programs, system bootloaders, system setup programs, and I/O drivers and interrupt service programs for main input/output (IN/OUTPUT, I/O) devices. Basic program. Once there is a problem with the BIOS chip, the computer cannot perform most of the basic functions. When the data of the internal program of the BIOS chip is damaged and the internal data is to be repaired, the conventional method generally divides a boot block on the flash memory of the BIOS, and the boot block contains useful information. The minimum instruction set for booting and simple software overwrite function. When the BIOS data is damaged, the code in the boot block can be called or executed by hardware or software to start its overwrite function, thereby realizing the data repair of the BIOS chip. However, if the data in the boot block is damaged or overwritten due to a misoperation, the boot block cannot be used to implement the BIOS chip repair. SUMMARY OF THE INVENTION [0003] In view of the above, it is necessary to provide a computer system data repair device that can effectively repair basic input and output system data. [0004] A computer system data repair device, set in a computer system, the main 099125833 form number A0101 page 4 / a total of 14 pages 0992045326-0 201207612 Ο [0005] ❹ [0006] on the board, "brain system data repair The device includes a substrate management controller chip, a ++ knife replacement module, and a basic input output system chip. The basic input output system is provided in a wafer-memory, the substrate management controller crystal, the switching age and the recording _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The device chip is electrically connected to the memory of the substrate management controller, and the basic input output system of the remote client (4) is programmed on the memory by the substrate management controller chip. In the computer system, the basic input and output data of the dump are repaired. Compared with the prior art, the computer "data repair device" of the present invention only needs to change the data in the basic input output system chip when the data in the basic input output system chip needs to be repaired by the setting-switching module. The BMC chip can burn the basic wheel code of the remote client to the memory to update the basic input and output system program of the damaged dragon, thereby repairing the basic input. The output system chip stores the material of the material. The computer system data repairing device of the invention is simple in operation, and can effectively avoid the fact that the technical towel in the booting block is damaged due to the misoperation of the device. The problem of the basic input/output system data cannot be repaired. [Solid mode] Referring to FIG. 1 'The computer system data repair device 100 of the preferred embodiment of the present invention can be disposed on the motherboard 2G of the computer system 2, and is far away from The end client 300 is electrically connected to the computer system (10) to establish communication with the terminal client 3〇G by a conventional communication device. The computer system data repair device 099125833 Form No. A0101 Page 5 of 14 0992045326-0 201207612 100 can repair the data stored in the basic input/output system (basicinpUt〇utputsystem, BIOS) in the computer system 200 under the control of the remote client 300 [00〇7] The computer system data repair device 1 includes a baseboard management controller (BMC) chip 11, a master chip 13, a switch module 15, and a BIOS chip 17, A memory 172 is disposed in the BIOS chip 17. The BMC chip 11, the switching module 15 and the memory 172 are electrically connected in sequence, and the main control chip 13 is connected to the switching module 15. [0008] Please refer to the figure together. 2. The BMC chip 11 includes a set of general purpose input output '..GPI0. pins GPI010-GPI013 and a control pin GPIOJ0. » GPIO pins GP101 0-GP101 3 and control pins GP10 J0 is electrically connected to the switching module 15. The BMC chip 11 also communicates with the remote client 300 through a network card or other communication interface. [0009] The master wafer 13 includes a set of data transmission wheels. Pin SPI -MOSI, SPI -MIS0 SPI-CS0-N and SPI-CLK. The data transmission pins 8卩1-M0SI, SPI-MIS0, SPI-CS0-N, and SPI-CLK are respectively connected to the switching module 15. [0010] The switching The module 15 can be a wafer of the type SN74CBT3257DBR or a circuit having the same function as a multiple output selector. The switching module 15 includes a set of first signal input terminals 1B1-4B1, a set of second signal input terminals 1B2-4B2, a set of signal output terminals 1A-4A, a work enable terminal 0E and a signal input control terminal S. . Wherein the first signal input end 099125833 form number A0101 page 6 / total 14 page 0992045326-0 201207612 1Β1-4Β1 is electrically connected with the Gpi〇 pin GPI010-GPI013 in the BMC chip U respectively; the second signal input terminal ^ 2_绌2 is electrically connected to the data transmission pins spi - M0SI , SPI - Ο [0011] MIS MIS0, SPI-CS0-N and SPI-CLK in the master chip 13 respectively; the signal input control terminal S is electrically Connected to the control pin gp 1〇j〇. In this embodiment, when the voltage of the signal input control terminal S is low, the switching module 15 receives the data from the BMC chip 11; when the voltage of the signal input control terminal S is high level, The switching module 15 receives the data from the master wafer 13. It can be understood that since the switching module 15 generally belongs to the working enable terminal 0E active low, the working enable terminal 〇E is grounded here. The memory 17 2 can be a flash memory in which the computer system 200 is normally turned on and operated. BIOS program. The memory 172 includes 16 pins pinl-pinl6. The pin Pin1 is connected to a power source VCC through a first resistor R1, and the pin 2 is connected to the power source VCC. The pin Pinl5, the pin pinS, the pin pin?, and the pin Pln16 are respectively connected to the signal output terminals 1A-4A in the switching module 15. In addition, the pin 2 is also connected by a set of parallel capacitors. The 02 pin is grounded, and the pin 7 is also connected to the power source 6 by a second resistor R2. When the voltage of the signal input control terminal S is low, the switching module 15 switches the memory 172 to the BMC wafer 11, and the memory 172 stores the data transmitted from the BMC wafer 11; When the voltage of the signal input control terminal S is at a high level, the switching module 15 switches the phase memory 172 to the master control chip 13, and the memory 172 will control the data in the control chip 13 at this time. Store. The BIOS chip can access the memory 172 by the system sink 099125833 form number A0101 page 7 / 14 page 0992045326-0 201207612 (not shown), and call the memory i72 memory to delete the m (four) machine And the components in the computer system 200, such as a memory, a hard disk, a central processing unit, etc., are initialized and operate normally. [0013] The following is a detailed description of the working principle of the (4) material age k computer (10) f material repairing device 100: Firstly, when the computer system 200 is powered on but cannot be turned on normally, it generally indicates that the interesting chip 17 has a problem. At this time, the computer system 200 will send a request signal to the remote client through the conventional communication interface. After the remote client 300 receives the request signal, the control in the BMC chip 11 is driven. Pin GPI〇J〇 outputs a low level. Since the control pin GPIOJO is electrically connected to the signal input control terminal S of the switching module 15, the switching module 15 switches its wheel-in terminal to the first signal input terminal 1Bb 4B1. At this time, the remote client 3 inputs the new BIOS code in the internal motherboard (not shown) to the switching module 15 by using the gpio reference GpI〇1〇_GpI〇13. The switching module 15 is burned on the memory 172 to update the original corrupted program in the memory 172. Thus, the BIOS chip 17 can access the memory 172 and call the new B10S program in the memory 1 72 to enable the computer system 2 to boot normally. [0014] When the BIOS chip 17 is repaired, the voltage of the control pin gpi〇j〇 returns to a high level. At this time, the switching module 15 switches its input end to the first information input terminal 1B2-4B2. The main control chip 13 further transfers and stores data by the switching module 15 and the memory 172. 099125833 Form No. A0101 Page 8 of 14 0992045326-0 201207612 [0015] Although the computer system data repair apparatus 1 of the present invention is provided by a switching module 15' when needed to the 8105 wafer 17 When the data is repaired, it is only necessary to switch the switching module 15 to the BMC wafer 11 to be far away.

[0016] 端客戶機300内之BIOS程式碼燒錄至該記憶體172上,用 以更新該記憶體172内原有之遭損壞之Bi〇s程式,從而修 復幻〇5晶片17存儲之資料。與習知技術相比,本發明之 電腦系統資料修復裝置100操作簡單,可有效避免習知技 術中容易出現之因開機區塊内之資料被損壞或者誤操〇 而導致無法修復BIOS資料之問題。 、乍 【圖式簡單說明】 圖1為本發明較佳實施方式之電躅系統資料修復裴置 能框圖。 -\ [0017] 圖2為圖1所示電腦系統資料修復裝置之電氣連接 圖[0016] The BIOS code in the end client 300 is burned to the memory 172 to update the damaged Bi〇s program in the memory 172, thereby repairing the data stored in the Magic 5 chip 17. Compared with the prior art, the computer system data repair device 100 of the present invention is simple in operation, and can effectively avoid the problem that the BIOS data in the boot block is damaged or mishandled due to the damage in the prior art. . BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of an apparatus for repairing data of a power system according to a preferred embodiment of the present invention. -\ [0017] FIG. 2 is an electrical connection diagram of the data repair device of the computer system shown in FIG.

【主要元件符號說明】 [0018] 電腦系統資料修復裝置:100 ... ::i ; ::;1.:::::中 [0019] 電腦系統:200 <"'· 1 ::;||I || [0020] 遠端客戶機:300 -..坪t [0021] BMC 晶片·· 11 [0022] 主控晶片:13 [0023] 切換模組:15 [0024] BIOS晶片:17 [0025] 主板:20 099125833 表單編號A0101 第9頁/共14頁 〇992〇45326~〇 201207612 [0026]記憶體:172 [0027] GPIO引腳:GPIO10-GPIO13[Main component symbol description] [0018] Computer system data repair device: 100 ... ::i ; ::;1.::::: [0019] Computer system: 200 <"'· 1 :: ;||I || [0020] Remote client: 300 -.. ping t [0021] BMC chip · 11 [0022] Master chip: 13 [0023] Switching module: 15 [0024] BIOS chip: 17 [0025] Motherboard: 20 099125833 Form No. A0101 Page 9 / Total 14 Page 〇992〇45326~〇201207612 [0026] Memory: 172 [0027] GPIO Pin: GPIO10-GPIO13

[0028] 控制引腳:GPIO JO[0028] Control pin: GPIO JO

[0029] 資料傳輸引腳:SPI-MOSI、SPI-MISO、SPI-CSO-N、 SPI-CLK[0029] Data Transfer Pin: SPI-MOSI, SPI-MISO, SPI-CSO-N, SPI-CLK

[0030] 第一訊號輸入端·· 1B1、2B1、3B1、4B1 [0031] 第二訊號輸入端:1B2、2B2、3B2、4B2[0030] The first signal input terminal · 1B1, 2B1, 3B1, 4B1 [0031] The second signal input terminal: 1B2, 2B2, 3B2, 4B2

[0032] 訊號輸出端:ΙΑ、2A、3A、4A[0032] Signal output: ΙΑ, 2A, 3A, 4A

[0033] 工作使能端:0E[0033] Work Enable: 0E

[0034] 訊號輸入控制端:S[0034] Signal input control terminal: S

[0035] 引腳:pinl- pinl6 [0036] 第一電阻:R1 [0037] 第二電阻:R2[0035] Pin: pinl-pinl6 [0036] First resistor: R1 [0037] Second resistor: R2

[0038] 電源:VCC[0038] Power: VCC

[0039] 電容:C1-C2 099125833 表單編號A0101 第10頁/共14頁 0992045326-0[0039] Capacitor: C1-C2 099125833 Form No. A0101 Page 10 of 14 0992045326-0

Claims (1)

201207612 七、申請專利範圍: 1 . 一種電腦系統資料修復裝置,設置於一電腦系統内之主板 上,用於對電腦系統内之基本輸入輸出系統存儲之資料進 行修復,其改良在於:所述電腦系統資料修復裝置包括一 基板管理控制器晶片、一切換模組及一基本輸入輸出系統 晶片,所述基本輸入輸出系統晶片内設置一記憶體,所述 基板管理控制器晶片、切換模組及記憶體依次電性連接, 所述基板管理控制器晶片與一遠端客戶機進行通信,並於 ^ 所述达端客戶機之控制下.,.將所述切換模組切換至基板管 理控制器晶片,以期F該基板管理控制器晶片與記憶體電性 連接,進而將所述遠端客戶機内之基本輸入輸出系統程式 藉由該基板管理控制器晶片燒錄於該,記憶體上,對該電腦 系統内基本輸入輸出系統存儲之資料進行修復。 2 .如申請專利範圍第1項所述之電腦系統資料修復裝置,其 中所述記憶體為一快閃記憶體。 3 .如申請專利範圍第1項所述之電腦系統資料修復裝置,其 中所述基板管理控制器晶片包括一組通用輸入/輸出引腳 Q ,該切換模組包括一組第一訊號輸入端及一訊號輸入控制 端’所述通用輸入/輸出引腳與該組第一訊號輸入端對應 連接,當訊號輸入控制端之電壓為低電平時,所述切換模 組之輸入端切換至所述通用輸入/輸出引腳。 4 .如申請專利範圍第3項所述之電腦系統資料修復裝置,其 中所述電腦系統資料修復裝置還包括一主控晶片,所述主 控晶片包括一組資料傳輸引腳,該切換模組包括一組第二 訊號輸入端,所述資料傳輸引腳與第二訊號輸入端對應連 099125833 表單編號A0101 第11頁/共14頁 0992045326-0 201207612 接,當所述訊號輸入控制端之電壓為高電平時,所述切換 模組之輸入端切換至所述資料傳輸引腳。 5 .如申請專利範圍第4項所述之電腦系統資料修復裝置,其 中所述記憶體包括若干引腳,其中二引腳均連接至一電源 ,所述切換模組包括一組訊號輸出端,所述記憶體之部分 引腳分別與所述訊號輸出端對應連接。 6 .如申請專利範圍第5項所述之電腦系統資料修復裝置,其 中當訊號輸入控制端之電壓為低電平時,所述遠端客戶機 内之基本輸入輸出系統程式從所述通用輸入/輸出引腳輸 出,進而燒錄於所述記憶體上。 7 .如申請專利範圍第5項所述之電腦系統資料修復裝置,其 中當所述訊號輸入控制端之電壓為高電平時,該主控晶片 藉由該切換模組與記憶體進行資料之傳送及存儲。 8 .如申請專利範圍第3項所述之電腦系統資料修復裝置,其 中所述基板管理控制器晶片包括一控制引腳,所述控制引 腳連接至訊號輸入控制端,所述基板管理控制器晶片於遠 端客戶機之控制下,使得所述控制引腳輸出所述低電平。 9 .如申請專利範圍第8項所述之電腦系統資料修復裝置,其 中所述遠端客戶機與該電腦系統建立通信,當所述電腦系 統發送一請求訊號給遠端客戶機時,所述遠端客戶機對所 述基板管理控制器晶片進行控制。 099125833 表單編號A0101 第12頁/共14頁 0992045326-0201207612 VII. Patent application scope: 1. A computer system data repair device is installed on a motherboard in a computer system for repairing data stored in a basic input/output system in a computer system, and the improvement is as follows: The system data repairing device comprises a substrate management controller chip, a switching module and a basic input/output system chip, wherein the basic input/output system chip is provided with a memory, the substrate management controller chip, the switching module and the memory The substrate management controller chip is in communication with a remote client, and under the control of the terminal client, the switching module is switched to the substrate management controller chip. The substrate management controller chip is electrically connected to the memory, and the basic input/output system program in the remote client is burned on the memory by the substrate management controller chip, and the computer is The data stored in the basic input/output system of the system is repaired. 2. The computer system data repair device of claim 1, wherein the memory is a flash memory. 3. The computer system data repair device of claim 1, wherein the baseboard management controller chip comprises a set of universal input/output pins Q, the switch module comprising a set of first signal inputs and a signal input control terminal 'the universal input/output pin is correspondingly connected with the first signal input end of the group, and when the voltage of the signal input control terminal is low level, the input end of the switching module is switched to the universal Input/output pin. 4. The computer system data repair device of claim 3, wherein the computer system data repair device further comprises a master control chip, the master control chip includes a set of data transmission pins, the switch module A set of second signal input end, the data transmission pin and the second signal input end are connected to 099125833, form number A0101, page 11 / total 14 page 0992045326-0 201207612, when the voltage of the signal input control terminal is When the level is high, the input end of the switching module is switched to the data transmission pin. 5. The computer system data repair device of claim 4, wherein the memory comprises a plurality of pins, wherein two pins are connected to a power source, and the switching module comprises a set of signal outputs. Portions of the memory are respectively connected to the signal output end. 6. The computer system data repair device of claim 5, wherein the basic input/output system program in the remote client is from the universal input/output when the voltage of the signal input control terminal is low The pin is output and then burned on the memory. 7. The computer system data repair device of claim 5, wherein when the voltage of the signal input control terminal is a high level, the master control chip transmits data by using the switching module and the memory. And storage. 8. The computer system data repair device of claim 3, wherein the substrate management controller chip comprises a control pin, the control pin is connected to a signal input control terminal, and the substrate management controller The chip is under the control of the remote client such that the control pin outputs the low level. 9. The computer system data repair device of claim 8, wherein the remote client establishes communication with the computer system, and when the computer system sends a request signal to the remote client, The remote client controls the substrate management controller wafer. 099125833 Form No. A0101 Page 12 of 14 0992045326-0
TW99125833A 2010-08-04 2010-08-04 Computer system data recovery device TW201207612A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9600370B2 (en) 2014-11-25 2017-03-21 Inventec (Pudong) Technology Corporation Server system
US9710334B2 (en) 2014-11-25 2017-07-18 Inventec (Pudong) Technology Corporation Automatic restart server system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9600370B2 (en) 2014-11-25 2017-03-21 Inventec (Pudong) Technology Corporation Server system
US9710334B2 (en) 2014-11-25 2017-07-18 Inventec (Pudong) Technology Corporation Automatic restart server system

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