201205714 六、發明說明： 【發明所屬之技術領域】 本發明是有關於一種載板，特別是指一種用於半導體 製程之玻璃載板。 【先前技術】 在半導體製程中’石夕晶圓會以可剝離式膠材固定在一 片玻璃載板上，藉由移動玻璃載板的方式，來進行晶圓之 移動輸送，或者是藉由將該玻璃載板固定，以利矽晶圓薄 化或是蝕刻穿孔製程之進行。並於完成製程程序後，以特 定波長之光波由玻璃載板底部照射該可剝離式膠材，使玻 璃載板脫離矽晶圆。而這類玻璃載板之輸送與固定，一般 情況下，都是以一負壓吸盤透過負壓吸附的方式，吸住玻 璃載板背向該矽晶圓之底面，藉由控制裝有負壓吸盤之機 械手臂的作動，進行玻璃載板與矽晶圓之移動與定位。但 是當有要進行鍍膜或蝕刻製程時，由於製程是在真空環境 中進行，所以負壓吸盤無法再適用。 如圖1所示，為解決此問題，目前市面上已有開發出 所謂的靜電吸盤1〇〇，該靜電吸盤1〇〇包括一内電極1〇1， 及一絕緣地環繞於内電極1〇1徑向外側之環狀外電極1〇2， 透過在該内電極l〇i與外電極1〇2間施加一預定大小之直 流電’使内電極101與外電極1〇2分別帶正電與負電，藉 此使該靜電吸盤100與玻璃載板2〇〇間產生相互吸引之靜 電力，但因玻璃載板200為阻值高之玻璃材質，所以施加 於靜電吸盤100之直流電通常得要高達3~5 KV，其產生之 201205714 靜電力才足以吸附玻璃載板200 ’然而，一般半導體製程設 備δχ 3十上可能無法施加此南電壓，而且此高電壓可能會相 對影響半導體製程之鍍膜/蝕刻程序品質。因此，如何降低 靜電吸盤100吸附玻璃載板200所需施加之電壓，而且又 同時保有玻璃載板200對特定波長之光波的透光率，以利 離型分離矽晶圓與玻璃載板200，是目前亟待克服之重點。 【發明内容】 因此’本發明之目的，即在提供一種可降低靜電吸盤 所需施加之電壓，並具有較佳透光率的玻璃載板。 修 於是’本發明半導體用之玻璃載板，適用於被一靜電 吸盤吸附固定’並包含一透明之玻璃板層，及一被覆於玻 璃板層底面並可被所述靜電吸盤之靜電力吸附固定之透明 的靜電吸附層。 · 本發明之功效：透過於該玻璃板層底面被覆該靜電吸 附層的設計’可利用該靜電吸附層之導電特性或半導體特 性’大幅降低施加於靜電吸盤之電壓，並可大幅降低靜電 吸盤對鍵膜或姓刻程序之影響，有助於提高鍍膜或蝕刻品鲁 質。 【實施方式】 有關本發明之前述及其他技術内容、特點與功效，在 以下配合參考圖式之二個較佳實施例的詳細說明中，將可 清楚的呈現。 . 在本發明被詳細描述之前，要注意的是’在以下的說 明内谷中，類似的元件是以相同的編號來表示。 4 201205714 —如圖2所示’本發明半導體用之玻璃載板的第一較佳 實她例’適用於承載晶圓（圖未示）’並可被-靜電吸盤 900吸附固定，該靜電吸盤9⑼具有一内電極術，及一絕 U於内電極9G1徑向外側之外電極9G2 ^該玻璃載板3 包含-玻璃板層31 ’及—被覆固定於該玻璃板層31底面之 透明的靜電吸附層32。該玻璃板層31為習知用於承載晶圓 之玻璃板’厚度範圍介於〇」mm〜3 2mm，因此不再詳述。 »亥靜電吸附層32為雙層結構物，包括—被覆固定於玻 璃板層Μ底面之透明導電膜321，及—被覆蚊於該透明 導電膜321底面之透明絕緣膜322。 該透明導電膜321是由透明導電氧化物（transparent conductive oxide，TC〇)構成，其厚度範圍介於〇 〇1叫〜5 〇 μηι。在本實施例中，該透明導電膜321是銦錫氧化物 (indium tin oxide ’ ΙΤΟ) ’厚度為〇12 _，但實施時，該透 明導電薄膜321也可選自於由銦錫氧化物（ΙΤ〇 )、銦辞氧 化物（ιζο)、氧化鋅鎵（GZ0)、氧化鋁鋅（GA〇)以及銦 錫氧化物、銦辞氧化物、氧化鋅鎵與氧化鋁鋅之混合所構 成的群體。 該透明絕緣膜322是由不導電氧化物構成，厚度範圍 介於0.01 μηι〜5.0 μηι，其目的在於避免該透明導電膜32丄 與該靜電吸盤900之内、外電極901、902電連接。在本實 施例中’該透明絕緣膜322為氧化石夕，但實施時，也可選 用氧化IS、過渡金屬氧化物’或氧化;5夕、氧化銘與過渡金 屬氧化物的一組合。該過渡金屬氧化物是選自於氧化鉻、 201205714 氧化锆、氧化鈮、氧化钽、氧化铪或此等一組合。 透過在該玻璃板層31底面先被覆一層導電之透明導電 膜321，然後再被覆一層絕緣之透明絕緣膜322的雙層靜電 吸附層32設計’可利用該透明導電膜321之導電特性，使 得該靜電吸盤900吸附該玻璃載板3時，僅須對該靜電吸 盤900施加一般半導體製程設備的工作電壓，便可誘使該 透明導電膜321的電子與電洞分別隨内電極9〇1與外電極 902之極性分布’而產生足以吸附該玻璃載板3之靜電力。 在本實施例中’施加於該靜電吸盤9〇〇之電壓介於 _ 500〜800 V，已低於1 KV，且遠低於吸附傳統玻璃載板所需 之高電壓（3〜5 KV)，除了可降低整體設備之能耗外，也可 大幅降低施加於靜電吸盤900之電壓對鍍膜或蝕刻製程品 質的影響。 - 配合圖3，以本發明玻璃載板3進行透光率測試時，其 透光率依然相當高，所以於玻璃載板3脫離晶圓之製程時 ，用以剝除黏著晶圓與玻璃板層31間之可剝離式膠材的雷 射依然可大量穿透，不會影響玻璃載板3之剝離程序。 · 如圖4所示，本發明半導體用之玻璃載板的第二較佳 實施例與第一實施例的差異處僅在於：該靜電吸附層32之 材質δ又6十。為方便說明’以下將僅針對本實施例與第一實 施例差異處進行說明。 配合圖5，在本實施例中，該靜電吸附層32是由具半 導體特性之金屬氧化物塗覆構成的單層結構物，其厚度範-圍介於0.01 μηι〜5 μηι。在本實施例中，該靜電吸附層32為 6 201205714 氧化辞（ZnO )，其厚度為丨μπι，且以被覆氧化辞之玻璃載 板3進行光穿透率測試時，其光穿透率依然相當高。 實施時，靜電吸附層32也可用氧化錫、雜質摻入之氧 化鋅、雜貝摻入之氧化錫，或氧化辞、氧化錫、雜質摻入 之氧化辞與雜質摻入之氧化錫的一組合。由於氧化錫薄膜 、雜質摻入之氧化鋅薄膜與雜質摻入之氧化錫薄膜也具高 透光性，所以上述材料製成之玻璃載板3也會具有很高之 光穿透率。 該玻璃載板3使用時’主要是藉由該靜電吸附層32的 半導體特性，來降低玻璃載板3供該靜電吸盤9〇〇吸附之 一側的阻值，進而使施加於該靜電吸盤900之電壓可相對 降低，有助於降低靜電吸盤9〇〇對鍍膜或蝕刻程序之影響 〇 综上所述，透過於該玻璃板層3丨底面被覆該靜電吸附 層32的设計，可利用該透明導電膜32丨之導電特性，或者 是該靜電吸附層32之半導體特性，使得用以吸附玻璃載板 3之靜電吸盤_，僅需於該内電極901與外電極902間施 加較低之直流電，便可產生足以吸附該玻璃載板3之靜 電力，所以可大幅降低靜電吸盤9〇〇之能耗，並可大幅降 低靜電吸盤9GG之電壓對鑛膜或姓刻程序之影響，有助於 β门鑛模或姓刻0口質’而該高光穿透率之靜電吸附I Μ設 °十’也不會影響半導體製程中之玻璃載板3剝離程序。因 此，確實可達到本發明之目的。 惟以上所述者’僅為本發明之較佳實施例而已，當不 201205714 能以此限定本發明實施之範圍，即大凡依本發明申請專利 範圍及發明說明内容所作之簡單的等效變化與修飾，皆仍 屬本發明專利涵蓋之範圍内。 【圖式簡單說明】 圖1是一般玻璃載板被靜電吸盤吸附時的側視示意圖 圖2是本發明半導體用之玻璃載板的第一較佳實施例 的側視示意圖’並說明被一靜電吸盤吸附時的電荷分布情 況； 圖3是該第一較佳實施例之光穿透率曲線圖； 圖4是本發明半導體用之玻璃載板的第二較佳實施例 之側視示意圖；及 圖5是第二較佳實施例之光穿透率曲線圖。 201205714 【主要元件符號說明】 3....... ....玻璃載板 322.... ....透明絕緣膜 31 ….· ....玻璃板層 900..·. ....靜電吸盤 32 …·. ....靜電吸附層 901..·· ....内電極 321.... ....透明導電膜 902.... ....外電極201205714 VI. Description of the Invention: [Technical Field] The present invention relates to a carrier, and more particularly to a glass carrier for a semiconductor process. [Prior Art] In the semiconductor process, the Shishi wafer will be fixed on a glass carrier with a peelable adhesive, and the wafer can be moved by moving the glass carrier, or by The glass carrier is fixed to facilitate wafer thinning or etching. After the process is completed, the strippable glue is irradiated from the bottom of the glass carrier with a light wave of a specific wavelength to disengage the glass carrier from the wafer. The transport and fixation of such glass carrier plates are generally carried out by a vacuum suction cup through a vacuum suction method, and the glass carrier plate is sucked back to the bottom surface of the silicon wafer, and the negative pressure is controlled by the control. The movement of the mechanical arm of the suction cup moves and positions the glass carrier and the silicon wafer. However, when there is a coating or etching process, the vacuum chuck can no longer be used because the process is carried out in a vacuum environment. As shown in FIG. 1, in order to solve this problem, a so-called electrostatic chuck 1 has been developed on the market, and the electrostatic chuck 1 includes an inner electrode 1〇1 and an insulating surrounding the inner electrode 1〇. a radially outer annular outer electrode 1〇2, through which a predetermined amount of direct current is applied between the inner electrode 10i and the outer electrode 1〇2 to positively charge the inner electrode 101 and the outer electrode 1〇2, respectively. Negatively, thereby causing electrostatic attraction between the electrostatic chuck 100 and the glass carrier 2, but since the glass carrier 200 is made of a glass material having a high resistance value, the direct current applied to the electrostatic chuck 100 is usually as high as possible. 3~5 KV, the 201205714 electrostatic force generated is enough to adsorb the glass carrier 200' However, the semiconductor voltage may not be applied to the semiconductor process equipment δχ3, and this high voltage may affect the coating/etching of the semiconductor process. Program quality. Therefore, how to reduce the voltage required for the electrostatic chuck 100 to adsorb the glass carrier 200, and at the same time, maintain the transmittance of the glass carrier 200 to light waves of a specific wavelength to facilitate separation and separation of the wafer and the glass carrier 200, It is the key point that needs to be overcome. SUMMARY OF THE INVENTION Therefore, it is an object of the present invention to provide a glass carrier which can reduce the voltage required for electrostatic chuck application and which has a preferable light transmittance. The invention relates to a glass carrier for a semiconductor of the invention, which is suitable for being adsorbed and fixed by an electrostatic chuck, and comprises a transparent glass plate layer, and is covered on the bottom surface of the glass plate layer and can be adsorbed and fixed by the electrostatic force of the electrostatic chuck. A transparent electrostatic adsorption layer. The effect of the present invention is that the design of the electrostatic adsorption layer is coated on the bottom surface of the glass plate layer, and the voltage applied to the electrostatic chuck can be greatly reduced by using the conductive property or the semiconductor property of the electrostatic adsorption layer, and the electrostatic chuck can be greatly reduced. The influence of the bond film or the surname process helps to improve the coating or etching quality. The above and other technical contents, features and effects of the present invention will be apparent from the following detailed description of the preferred embodiments of the invention. Before the present invention is described in detail, it is to be noted that in the following description, similar elements are denoted by the same reference numerals. 4 201205714 - As shown in FIG. 2, 'the first preferred example of the glass carrier for semiconductors of the present invention is applied to a carrier wafer (not shown)' and can be adsorbed and fixed by an electrostatic chuck 900, the electrostatic chuck 9(9) has an internal electrode, and a U is on the radially outer side of the inner electrode 9G1. The electrode 9G2. The glass carrier 3 comprises a glass plate layer 31' and a transparent static electricity fixed to the bottom surface of the glass plate layer 31. Adsorption layer 32. The glass sheet layer 31 is a conventional glass sheet for carrying a wafer, and has a thickness ranging from 〇 mm to 32 mm, and therefore will not be described in detail. The galvanic electrostatic adsorption layer 32 is a two-layer structure comprising a transparent conductive film 321 which is fixed to the bottom surface of the glass plate layer, and a transparent insulating film 322 which is covered with mosquitoes on the bottom surface of the transparent conductive film 321 . The transparent conductive film 321 is made of a transparent conductive oxide (TC〇) and has a thickness ranging from 〇 〇1 to 5 〇 μηι. In the present embodiment, the transparent conductive film 321 is indium tin oxide (ΙΤΟ)' thickness 〇12 _, but in practice, the transparent conductive film 321 may also be selected from indium tin oxide ( ΙΤ〇), indium oxide (ιζο), zinc gallium oxide (GZ0), aluminum oxide zinc (GA〇), and indium tin oxide, indium oxide, zinc gallium oxide and aluminum oxide zinc mixed group . The transparent insulating film 322 is made of a non-conductive oxide and has a thickness ranging from 0.01 μm to 5.0 μm, in order to prevent the transparent conductive film 32 from being electrically connected to the inner and outer electrodes 901 and 902 of the electrostatic chuck 900. In the present embodiment, the transparent insulating film 322 is oxidized, but in practice, oxidized IS, transition metal oxide or oxidation may be used; a combination of oxidized and transition metal oxides may be used. The transition metal oxide is selected from the group consisting of chromium oxide, 201205714 zirconia, cerium oxide, cerium oxide, cerium oxide or a combination thereof. The two-layer electrostatic adsorption layer 32, which is first coated with a conductive transparent conductive film 321 on the bottom surface of the glass plate layer 31 and then coated with an insulating transparent insulating film 322, can be designed to utilize the conductive characteristics of the transparent conductive film 321 When the electrostatic chuck 900 adsorbs the glass carrier 3, only the working voltage of the general semiconductor processing device is applied to the electrostatic chuck 900, and the electrons and holes of the transparent conductive film 321 are induced to follow the internal electrodes 9〇1 and The polarity distribution of the electrode 902 produces an electrostatic force sufficient to adsorb the glass carrier 3. In the present embodiment, the voltage applied to the electrostatic chuck 9 is between _500 and 800 V, which is less than 1 KV, and is much lower than the high voltage (3 to 5 KV) required to adsorb the conventional glass carrier. In addition to reducing the energy consumption of the overall device, the effect of the voltage applied to the electrostatic chuck 900 on the quality of the coating or etching process can be greatly reduced. - With the light transmittance test of the glass carrier 3 of the present invention, the light transmittance is still relatively high, so that when the glass carrier 3 is detached from the wafer, the adhesive wafer and the glass plate are peeled off. The laser of the peelable adhesive between the layers 31 can still penetrate a large amount without affecting the peeling process of the glass carrier 3. As shown in Fig. 4, the second preferred embodiment of the glass carrier for a semiconductor of the present invention differs from the first embodiment only in that the material δ of the electrostatic adsorption layer 32 is sixty. For convenience of explanation, the following description will be made only on the difference between the present embodiment and the first embodiment. 5, in the present embodiment, the electrostatic adsorption layer 32 is a single-layer structure composed of a metal oxide coated with a semiconducting property, and has a thickness ranging from 0.01 μm to 5 μm. In the present embodiment, the electrostatic adsorption layer 32 is 6 201205714 oxidized (ZnO), the thickness of which is 丨μπι, and the light transmittance is still tested when the light transmittance test is performed on the glass carrier 3 coated with the oxidized word. Quite high. In practice, the electrostatic adsorption layer 32 may also be a combination of tin oxide, zinc oxide doped with impurities, tin oxide doped with impurities, or a combination of oxidation, tin oxide, oxidized impurities incorporated by impurities and tin oxide doped with impurities. . Since the tin oxide film, the zinc oxide film doped with the impurities, and the tin oxide film doped with the impurities are also highly transparent, the glass carrier 3 made of the above material also has a high light transmittance. When the glass carrier 3 is used, the resistance of one side of the glass carrier 3 to the electrostatic chuck 9 is reduced by the semiconductor characteristics of the electrostatic adsorption layer 32, and the electrostatic chuck 900 is applied to the electrostatic chuck 900. The voltage can be relatively reduced, which helps to reduce the influence of the electrostatic chuck 9 on the coating or etching process. As described above, the design of the electrostatic adsorption layer 32 can be utilized by the bottom surface of the glass layer 3 The conductive property of the transparent conductive film 32 or the semiconductor characteristic of the electrostatic adsorption layer 32 is such that the electrostatic chuck for adsorbing the glass carrier 3 only needs to apply a lower direct current between the inner electrode 901 and the outer electrode 902. The electrostatic force sufficient to adsorb the glass carrier 3 can be generated, so that the energy consumption of the electrostatic chuck 9 can be greatly reduced, and the influence of the voltage of the electrostatic chuck 9GG on the film or the surname process can be greatly reduced. The β-gate model or the surname is 0-portion' and the electrostatic adsorption of the high-light transmittance I °°° does not affect the glass carrier 3 stripping procedure in the semiconductor process. Therefore, the object of the present invention can be achieved. However, the above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the practice of the present invention, that is, the simple equivalent variation of the scope of the invention and the description of the invention. Modifications are still within the scope of the invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a side elevational view showing a general glass carrier plate being adsorbed by an electrostatic chuck. FIG. 2 is a side elevational view showing a first preferred embodiment of a glass carrier plate for a semiconductor according to the present invention. FIG. 3 is a schematic diagram of a light transmittance of the first preferred embodiment; FIG. 4 is a side elevational view of a second preferred embodiment of the glass carrier for a semiconductor of the present invention; Figure 5 is a graph showing the light transmittance of the second preferred embodiment. 201205714 [Explanation of main component symbols] 3............. Glass carrier plate 322.....Transparent insulating film 31 ......... Glass plate layer 900..·. .... electrostatic chuck 32 ..... ... electrostatic adsorption layer 901... .... internal electrode 321 ..... transparent conductive film 902.... electrode