201205686 六、發明說明： 【發明所屬之技術領域】 [0001] 本發明係有關一種電子裝置 材面積較小之電子裝置及其製法 及其製法，尤指一種基 【先前彳支術】 [0002] [0003] 曰新月異，半導體的 電子裝置的内部都包 隨著科技的發展，電子產品的 使用也愈來愈普遍，現在幾乎所有 含許多電子元件或半導體晶片。 一般電子元件或半導趙晶片是切基板上形成多層 的介電層與金屬層以構成能處理電子訊號的積體電路（ lntegrated circuit，_〇，接著再將已完成的 電子7G件或半賴晶片接置於封裝基板上，並使該電子 元件或半電性連接轉料基板。 _] 請參閱第1圖，係習知之例如為⑽S影像感測器的電 子裝置之剖視圖。如圖所示，習知之電子裝置係包括： 承載板10，係具有相對之第-表面l〇a與第二表面10b; 第-電性接觸墊η，係設於該表面1Qa上；配線層12 ’係設於該第-表面1Ga與第—電性接觸塾u上且該配 線層12電性連接該第-電性接觸塾n ;⑪層13，係設於 該配線層12上；彩色〉慮光層14，係設於财層13上；微 透鏡層15，係設於該彩色濾光層14上，令該彩色濾光層 14與微透鏡層丨5所佈設區域為作用區A，而該作用區A以 外的區域為非作用區B，且該第一電性接觸墊丨丨係位於該 作用區A外；第二電性接觸墊16，係設於該第二表面1〇b 上；玻璃層17，係設於該第二表面1〇b上、且具有外露該 099123520 表單編號A0101 第4頁/共29頁 0992041454-0 201205686 第二電性接觸墊16之開孔170 ;以及導電通孔18，係穿設 於該承載板10中、且電性連接該第一電性接觸墊11與第 二電性接觸墊16。 [0005] 惟，由於習知之電子裝置中用以電性連接至封裝基 板的第二電性接觸墊係設於電子裝置的作用區外，因而 使得整體電子裝置佔用較大之基材（包括承載板、配線 層、與矽層等）面積，且最終的封裝結構佔用較大之基 板版面，亦即習知之電子裝置的第二電性接觸墊造成電 子裝置及其封裝結構的基材面積的增加與浪費，進而不 利於電子產品的輕薄化。 [0006] 因此，如何避免習知技術中之電子裝置及其封裝結 構佔用較多基材面積、以及較難以微小化等問題，實已 成為目前亟欲解決的課題。 【發明内容】 [0007] 鑑於上述習知技術之種種缺失，本發明之主要目的 係提供一種基材面積較小之電子裝置及其製法。 ❹ [0008] 為達上述及其他目的，本發明揭露一種電子裝置， 係包括：矽基板，係具有相對之第一表面與第二表面； 第一介電層，係設於該矽基板之部份第一表面上；第一 電性接觸墊，係設於該第一介電層上；通孔，係貫穿該 矽基板與第一介電層，且該通孔之一端連接該第一電性 接觸墊；第二線路層，係設於該第二表面上方；以及導 電通孔，係設於該通孔中、且電性連接該第二線路層與 第一電性接觸墊。 099123520 表單編號A0101 第5頁/共29頁 0992041454-0 201205686 [0009] 於上述之電子裝置中，復可包括影像擷取單元，係 設於該第一介電層與第一電性接觸墊上；其中，該影像 擷取單元係可包括配線層、光電二極體層、抗反射層、 彩色濾光層、第二介電層、與微透鏡層；該配線層係可 設於該第一介電層與第一電性接觸墊上，該配線層係可 包括堆疊之複數個配線，該配線電性連接該第一電性接 觸墊，該配線層之頂層處可具有複數個閘極，該光電二 極體層係可設於該配線層上，該抗反射層係可設於該光 電二極體層上，該彩色濾光層係可設於該抗反射層上， 該第二介電層係可設於該抗反射層與彩色濾光層上，該 微透鏡層係可設於該第二介電層上。 [0010] 依上所述之電子裝置，該彩色濾光層、介電層與微 透鏡層所佈設區域為作用區，該第一電性接觸墊係位於 該作用區内。 [0011] 所述之電子裝置中，復可包括黏著層與透明層，該 黏著層係設於該矽基板未被第一介電層覆蓋之第一表面 上，該透明層係設於黏著層上且位於微透鏡層上方。 [0012] 於本發明之電子裝置中，復可包括第三介電層，係 設於該通孔中與第二表面上，於該通孔處可設有貫穿該 第三介電層的介電層通孔，於該介電層通孔中可設有該 導電通孔，該第二線路層係可設於第三介電層上，且該 導電通孔與第三介電層之間、該第二線路層與第三介電 層之間、及該導電通孔與第一電性接觸墊之間復可設有 導電層。 099123520 表單編號A0101 第6頁/共29頁 0992041454-0 201205686 [0013] [0014] ❹ [0015] [0016] ❹ [0017] 又於上述之電子裝置中，該第一電性接觸墊可嵌埋 於第一介電層並顯露於該第一介電層之表面，且該第一 電性接觸墊可為柱（pillar)狀，並貫通該第一介電層 〇 於本實施例中，該第二線路層復可具有第二電性接 觸墊，於該第二電性接觸墊上設有金屬層或第一金屬柱 ，並復可包括絕緣保護層，係設於該第二表面上方與第 二線路層上，且該絕緣保護層中設有外露該第二電性接 觸墊的絕緣保護層開孔。 又依上述之電子裝置，復可包括焊料凸塊，係設於 該金屬層或第一金屬柱上。 本發明復提供一種電子裝置之製法，係包括：提供 一矽基板，係具有相對之第一表面與第二表面；於該矽 基板之部份第一表面上形成第一介電層；於該第一介電 層上形成第一電性接觸墊；形成貫穿該矽基板與第一介 電層之通孔，該通孔之一端連接該第一電性接觸墊；以 及於該第二表面上方形成第二線路層，並於該通孔中形 成電性連接該第二線路層與第一電性接觸墊的導電通孔 〇 於上述之電子裝置之製法中，復可包括於該第一介 電層與第一電性接觸墊上形成影像擷取單元，其中，該 影像擷取單元係具有配線層，該配線層係設於該第一介 電層與第一電性接觸墊上，該配線層係包括堆疊之複數 個配線，該配線電性連接該第一電性接觸墊，該配線層 099123520 表單編號A0101 第7頁/共29 1 0992041454-0 201205686 [0018] [0019] [0020] [0021] [0022] [0023] 之頂層處具有複數個閘極，復包括於該配線層上形成光 電二極體層，復包括於該光電二極體層上形成抗反射層 ，復包括於該抗反射層上形成彩色濾光層，復包括於該 抗反射層與彩色濾光層上形成第二介電層，復包括於該 第二介電層上形成微透鏡層。 又依上述之電子裝置之製法，該彩色濾光層、介電 層與微透鏡層所佈設區域為作用區，該第一電性接觸墊 係可位於該作用區内。 前述之電子裝置之製法中，復可包括於該矽基板未 被第一介電層覆蓋之第一表面上形成黏著層，並於該黏 著層上形成透明層，該透明層係位於微透鏡層上方。 於本發明之電子裝置之製法中，於形成該通孔前， 復可包括從第二表面薄化該矽基板。 又於上述之電子裝置之製法中，該第二線路層與導 電通孔之製法係可包括：於該通孔中與第二表面上形成 第三介電層；於該通孔處形成貫穿該第三介電層的介電 層通孔；於該第三介電層與第一電性接觸墊上形成導電 層；以及於該導電層上形成該導電通孔與該第二線路層 ，並移除未被該導電通孔與第二線路層所覆蓋的導電層 〇 又於前述之電子裝置之製法中，該第一電性接觸墊 係可嵌埋於第一介電層並顯露於該第一介電層之表面， 該第一電性接觸墊可為柱狀，並貫通該第一介電層。 又於本發明之電子裝置之製法中，該第二線路層復 099123520 表單編號AOiOl 第8頁/共29頁 0992041454-0 201205686 可具有第二電性接觸墊，於該第二電性接觸墊上形成金 屬層或第一金屬柱，且於形成該金屬層或第一金屬柱之 前，復可包括於該第二表面上方與第二線路層上形成絕 緣保護層，並於該絕緣保護層中形成外露該第二電性接 觸墊的絕緣保護層開孔。 [0024] 又於上述之電子裝置之製法中，復可包括於該金屬 層或第一金屬柱上形成焊料凸塊。 [0025] 由上可知，本發明之電子裝置係將第一電性接觸墊 置於作用區内，因而可省去非作用區的基材面積，並能 縮減整體電子裝置的體積；另外，本發明之電子裝置係 將用以電性連接至封裝基板的第二電性接觸墊設於電子 裝置的作用區内，所以最終的封裝結構將佔用較小之基 板版面，進而有利於電子產品的微型化；再者，本發明 之第一電性接觸墊可為導電柱形式，因而在電子裝置的 結構設計上將具有較佳之彈性。 【實施方式】 [0026] 以下藉由特定的具體實施例說明本發明之實施方式 ，熟悉此技藝之人士可由本說明書所揭示之内容輕易地 瞭解本發明之其他優點及功效。 [0027] 請參閱第2A至2K圖，係本發明之電子裝置與其封裝 結構及其製法的剖視示意圖，其中，第2Γ圖係第21圖 之其他實施態樣，第2J’與2J”圖係第2J圖之其他實施 態樣，第2K圖係第2Γ圖之一應用例子。 [0028] 如第2A圖所示，提供一矽基板20，係具有相對之第 099123520 表單編號A0101 第9頁/共29頁 0992041454-0 201205686 一表面20a與第二表面20b。 [0029] 如第2B圖所示，於該矽基板20之部份第一表面20a上 形成第一介電層21，並於該第一介電層21上形成第一電 性接觸墊22，於該第一介電層21與第一電性接觸墊22上 形成影像擷取單元3，該影像擷取單元3係包括配線層23 、光電二極體層24、抗反射層25、彩色濾光層26、第二 介電層27、與微透鏡層28，該配線層23係設於該第一介 電層21與第一電性接觸墊22上，該配線層23係包括堆疊 之複數個配線231，該配線231電性連接該第一電性接觸 墊22，該配線層23之頂層處具有複數個閘極232，於該配 線層23上形成該光電二極體層24，於該光電二極體層24 上形成該抗反射層25，於該抗反射層25上形成該彩色濾 光層26，於該抗反射層25與彩色濾光層26上形成該第二 介電層27，於該第二介電層27上形成該微透鏡層28。 [0030] 如第2C圖所示，於該矽基板20未被第一介電層21覆 蓋之第一表面20a上形成黏著層29，並於該黏著層29上形 成透明層30，該透明層30係位於微透鏡層28上方。 [0031] 如第2D圖所示，從第二表面20b薄化該矽基板20。 [0032] 如第2E圖所示，形成貫穿該矽基板20與第一介電層 21之通孔200，該通孔200之一端連接該第一電性接觸墊 22 ° [0033] 如第2F圖所示，於該通孔200中與第二表面20b上形 成第三介電層31。 [0034] 如第2G圖所示，於該通孔200處形成貫穿該第三介電 099123520 表單編號A0101 第10頁/共29頁 0992041454-0 201205686 [0035] [0036]Ο [0037] ❹ [0038] [0039] 層31的介電層通孔31〇。 如第2Η圖所示，於該第三介電層31與第一電性接觸 墊22上形成導電層32，於該導電層32上形成導電通孔 331與第二線路層332 ,並移除未被該導電通孔331與第 二線路層332所覆蓋的導電層32，該導電通孔331係形成 於該通孔200中且電性連接該第二線路層332與第—電性 接觸塾2 2 ^ 承上述，該彩色濾光層26、介電層27與微透鏡層28 所佈設區域為作用區Α，而該作用區1以外的區域為非作 用區B，該第一電性接觸墊22係位於該作用區a内。 如第2Ι、2Γ圖所示，該第二線路層332復具有第_ 電性接觸塾332卜於該第二表础b上方與第二線路層 332上形成絕緣保護層36，並於該絕緣保護層％中形成外 露該第二電性接觸墊3321的絕緣保護相孔36q，於 二電性接觸墊3321上形成金屬層34 (第21圖）或第 屬枉35 (第21，圓）。 "—金 如第2J圖所示，其係延續自第21圖，於該金屬 上形成焊料凸物；或者，亦可於該第—金耻& 成焊料㈣37 (未圖示），至此即完成本發明之電子F 置2。 屐 如第2J’圖所示，係第2J圖之另一實施態樣 ，該第一電性接觸紐额册第—介電層2露 該第-介電層21之表面。 貝露於 [0040] 099123520 二困之又-實施態樣，其 〇992〇41454-〇 201205686 中，該第—電性接觸墊22, 通該第一介電層21。 係為柱（pi 1 lar )狀，並貫 [0041] [0042] [0043] 099123520 弟2K圖所示，其係本發明第21，圖實施例之一應 J子其中另提供一具有第二金屬柱41的電子裴置4〇 亚藉由焊料凸塊37以電性連接該第-金屬柱35與第二 金屬柱41。 本發明復提供—種電子裝置，係包括：#基板20， 糸具有相對之第—表面20a與第二表面20b;第-介電層 21係°又於該石夕基板2〇之部份第-表面20a上；帛一電性 接觸塾2卜係設於該第_介電層21上；通孔咖，係貫穿 Θ石夕基板2G與第—介電層21，且該通孔_之—端連接該 第一電性接觸墊22 ;第二線路層332，係設於該第二表面 2〇b上方，以及導電通孔331，係設於該通孔20〇中、且 電性連接該第二線路層332與第一電性接觸墊22。 於上述之電子装置中，復包括影像擷取單元3，係設 於該第一介電層21與第一電性接觸墊22上，其令，該影 像擷取單元3係包括配線層23、光t二極體層24、抗反射 層25先色;慮光層26、第二介電層27、與微透鏡層28， 该配線層23係設於該第一介電層21與第一電性接觸墊22 上，該配線層23係包括堆疊之複數個配線231，該配線 231電性連接該第—電性接觸墊22，該配線層23之頂層處 具有複數個閘極232，該光電二極體層24係設於該配線層 23上’該抗反射層25係設於該光電二極體層24上，該彩 色渡光層2 6係設於該抗反射層2 5上，該第二介電層2 7係 設於該抗反射層25與彩色濾光層26上，該微透鏡層28係 表單編號A0101 第12頁/共29頁 0992041454-0 201205686 [0044] [0045] Ο [0046]201205686 VI. Description of the Invention: [Technical Field] [0001] The present invention relates to an electronic device having a small area of an electronic device, a method for manufacturing the same, and a method for manufacturing the same, and more particularly to a base [previous branching technique] [0002] [0003] With the rapid development of the semiconductor electronic devices, the use of electronic products has become more and more common. Now almost all of them contain many electronic components or semiconductor wafers. Generally, an electronic component or a semiconductor wafer is formed by forming a plurality of dielectric layers and metal layers on a substrate to form an integrated circuit capable of processing electronic signals (integrated circuit, _〇, and then completing the completed electronic 7G pieces or The wafer is placed on the package substrate, and the electronic component or semi-electrically connected to the transfer substrate. _] Please refer to FIG. 1 , which is a cross-sectional view of an electronic device such as a (10) S image sensor. The electronic device of the prior art comprises: a carrier plate 10 having opposite first-surfaces la and a second surface 10b; a first-electro-contact pad η disposed on the surface 1Qa; and a wiring layer 12' The first surface 1Ga and the first electrical contact 塾u and the wiring layer 12 are electrically connected to the first electrical contact 塾n; the 11 layer 13 is disposed on the wiring layer 12; 14 is disposed on the financial layer 13; the microlens layer 15 is disposed on the color filter layer 14, such that the area where the color filter layer 14 and the microlens layer 丨5 are disposed is the active area A, and the effect The area other than the area A is the inactive area B, and the first electrical contact pad is located in the role A second outer contact pad 16 is disposed on the second surface 1 〇 b; the glass layer 17 is disposed on the second surface 1 〇 b and has an exposed portion of the 099123520 Form No. A0101 Page 4 / 29 pages 0992041454-0 201205686 the second electrical contact pad 16 of the opening 170; and the conductive through hole 18, through the carrier plate 10, and electrically connected to the first electrical contact pad 11 and The second electrical contact pad 16 is disposed outside the active area of the electronic device in the electronic device of the prior art, so that the overall electronic device is occupied. The area of the large substrate (including the carrier board, the wiring layer, the germanium layer, etc.), and the final package structure occupies a large substrate layout, that is, the second electrical contact pad of the conventional electronic device causes the electronic device and its package The increase and waste of the substrate area of the structure is not conducive to the thinning of the electronic product. [0006] Therefore, how to avoid the electronic device and its package structure in the prior art occupy more substrate area, and it is more difficult to miniaturize, etc. The problem has become SUMMARY OF THE INVENTION [0007] In view of the above-described various deficiencies of the prior art, the main object of the present invention is to provide an electronic device having a small substrate area and a method of manufacturing the same. And other objects, the present invention discloses an electronic device comprising: a germanium substrate having opposite first and second surfaces; a first dielectric layer disposed on a portion of the first surface of the germanium substrate; An electrical contact pad is disposed on the first dielectric layer; a through hole is formed through the germanium substrate and the first dielectric layer, and one end of the through hole is connected to the first electrical contact pad; the second line The layer is disposed above the second surface; and the conductive via is disposed in the via and electrically connected to the second circuit layer and the first electrical contact pad. 099123520 Form No. A0101 Page 5 of 29 0992041454-0 201205686 [0009] In the above electronic device, the image capturing unit is disposed on the first dielectric layer and the first electrical contact pad; The image capturing unit may include a wiring layer, a photodiode layer, an anti-reflection layer, a color filter layer, a second dielectric layer, and a microlens layer; the wiring layer may be disposed on the first dielectric layer On the first electrical contact pad, the wiring layer may include a plurality of stacked wires electrically connected to the first electrical contact pad, and the top layer of the wiring layer may have a plurality of gates, the photodiode The electrode layer may be disposed on the wiring layer, the anti-reflective layer may be disposed on the photodiode layer, the color filter layer may be disposed on the anti-reflection layer, and the second dielectric layer may be disposed The microlens layer may be disposed on the second dielectric layer on the anti-reflective layer and the color filter layer. [0010] According to the electronic device, the color filter layer, the dielectric layer and the region where the microlens layer is disposed are active regions, and the first electrical contact pads are located in the active region. [0011] In the electronic device, the adhesive layer includes an adhesive layer and a transparent layer, and the adhesive layer is disposed on the first surface of the germanium substrate not covered by the first dielectric layer, and the transparent layer is disposed on the adhesive layer Above and above the microlens layer. [0012] In the electronic device of the present invention, the third dielectric layer is disposed on the second surface of the through hole, and the through hole may be provided through the third dielectric layer. The electrical layer via hole may be disposed in the through hole of the dielectric layer, and the second circuit layer may be disposed on the third dielectric layer, and between the conductive via and the third dielectric layer A conductive layer may be disposed between the second circuit layer and the third dielectric layer and between the conductive via and the first electrical contact pad. 099123520 Form No. A0101 Page 6 / 29 Page 0992041454-0 201205686 [0013] [0016] [0016] In the above electronic device, the first electrical contact pad can be embedded The first electrical contact layer is exposed on the surface of the first dielectric layer, and the first electrical contact pad may be in the shape of a pillar and penetrate the first dielectric layer in the embodiment. The second circuit layer has a second electrical contact pad, and the second electrical contact pad is provided with a metal layer or a first metal pillar, and further includes an insulating protective layer, which is disposed above the second surface The insulating layer is provided with an insulating protective layer opening exposing the second electrical contact pad. According to the above electronic device, the solder bump may be included on the metal layer or the first metal pillar. The invention provides a method for manufacturing an electronic device, comprising: providing a substrate having opposite first and second surfaces; forming a first dielectric layer on a portion of the first surface of the substrate; Forming a first electrical contact pad on the first dielectric layer; forming a through hole penetrating the germanium substrate and the first dielectric layer, the one end of the through hole being connected to the first electrical contact pad; and above the second surface Forming a second circuit layer, and forming a conductive via hole electrically connected to the second circuit layer and the first electrical contact pad in the through hole, in the manufacturing method of the electronic device, the complex may be included in the first An image capturing unit is formed on the first electrical contact layer, and the wiring layer is disposed on the first dielectric layer and the first electrical contact pad, the wiring layer The system includes a plurality of stacked wires electrically connected to the first electrical contact pad, the wiring layer 099123520 Form No. A0101, page 7 / total 29 1 0992041454-0 201205686 [0018] [0019] [0020] [0023] [0023] The top layer has a complex a gate electrode is formed on the wiring layer to form a photodiode layer, and is further included on the photodiode layer to form an anti-reflection layer, and is further included on the anti-reflection layer to form a color filter layer, which is included in the anti-reflection layer A second dielectric layer is formed on the reflective layer and the color filter layer, and the second dielectric layer is formed on the second dielectric layer to form a microlens layer. According to the method of manufacturing the electronic device, the color filter layer, the dielectric layer and the region where the microlens layer is disposed are active regions, and the first electrical contact pad can be located in the active region. In the above method of manufacturing the electronic device, the adhesive layer may be formed on the first surface of the germanium substrate not covered by the first dielectric layer, and a transparent layer is formed on the adhesive layer, and the transparent layer is located on the microlens layer. Above. In the manufacturing method of the electronic device of the present invention, before forming the through hole, the method further comprises thinning the germanium substrate from the second surface. In the above method of manufacturing the electronic device, the second circuit layer and the conductive via may be formed by: forming a third dielectric layer in the via hole and the second surface; forming a through hole at the through hole a dielectric layer via hole of the third dielectric layer; forming a conductive layer on the third dielectric layer and the first electrical contact pad; and forming the conductive via hole and the second circuit layer on the conductive layer, and moving In addition to the conductive layer not covered by the conductive via and the second circuit layer, the first electrical contact pad can be embedded in the first dielectric layer and exposed in the first a surface of a dielectric layer, the first electrical contact pad may be columnar and penetrate the first dielectric layer. In the manufacturing method of the electronic device of the present invention, the second circuit layer complex 099123520 form number AOiOl page 8 / 29 pages 0992041454-0 201205686 may have a second electrical contact pad formed on the second electrical contact pad a metal layer or a first metal pillar, and before forming the metal layer or the first metal pillar, further comprising forming an insulating protective layer on the second wiring layer over the second surface, and forming an exposed layer in the insulating protective layer The insulating protective layer of the second electrical contact pad is opened. [0024] In the above method of manufacturing the electronic device, the complex may include forming a solder bump on the metal layer or the first metal pillar. [0025] It can be seen from the above that the electronic device of the present invention places the first electrical contact pad in the active area, thereby eliminating the area of the substrate in the inactive area and reducing the volume of the overall electronic device; The electronic device of the invention is provided with a second electrical contact pad electrically connected to the package substrate in the active area of the electronic device, so that the final package structure will occupy a small substrate layout, thereby facilitating the miniature of the electronic product. Furthermore, the first electrical contact pad of the present invention can be in the form of a conductive post, and thus will have better flexibility in the structural design of the electronic device. [Embodiment] The embodiments of the present invention are described below by way of specific embodiments, and those skilled in the art can readily understand other advantages and functions of the present invention from the disclosure. 2A to 2K are schematic cross-sectional views showing an electronic device, a package structure thereof, and a method for fabricating the same according to the present invention, wherein the second embodiment is a second embodiment of FIG. 21, and FIGS. 2J' and 2J" Another embodiment of Figure 2J, Figure 2K is an application example of Figure 2. [0028] As shown in Figure 2A, a substrate 20 is provided with a relative number 099123520 Form No. A0101 Page 9 / 29 pages 0992041454-0 201205686 a surface 20a and a second surface 20b. [0029] As shown in FIG. 2B, a first dielectric layer 21 is formed on a portion of the first surface 20a of the germanium substrate 20, and A first electrical contact pad 22 is formed on the first dielectric layer 21, and an image capturing unit 3 is formed on the first dielectric layer 21 and the first electrical contact pad 22. The image capturing unit 3 includes wiring. a layer 23, a photodiode layer 24, an anti-reflective layer 25, a color filter layer 26, a second dielectric layer 27, and a microlens layer 28, the wiring layer 23 is disposed on the first dielectric layer 21 and the first On the electrical contact pad 22, the wiring layer 23 includes a plurality of stacked wires 231 electrically connected to the first electrical contact. The pad 22 has a plurality of gates 232 at the top layer of the wiring layer 23, and the photodiode layer 24 is formed on the wiring layer 23, and the anti-reflection layer 25 is formed on the photodiode layer 24 for anti-reflection. The color filter layer 26 is formed on the layer 25, the second dielectric layer 27 is formed on the anti-reflection layer 25 and the color filter layer 26, and the microlens layer 28 is formed on the second dielectric layer 27. As shown in FIG. 2C, an adhesive layer 29 is formed on the first surface 20a of the germanium substrate 20 not covered by the first dielectric layer 21, and a transparent layer 30 is formed on the adhesive layer 29, the transparent layer 30. It is located above the microlens layer 28. [0031] As shown in Fig. 2D, the germanium substrate 20 is thinned from the second surface 20b. [0032] As shown in Fig. 2E, the through substrate 20 and the first dielectric are formed. a through hole 200 of the electrical layer 21, the one end of the through hole 200 is connected to the first electrical contact pad 22[0033] as shown in FIG. 2F, a third medium is formed in the through hole 200 and the second surface 20b. The electric layer 31. [0034] As shown in FIG. 2G, the third dielectric 099123520 is formed through the through hole 200. Form No. A0101 Page 10 / Total 29 Page 0992041454-0 201 [0036] [0039] [0039] The dielectric layer via 31 of the layer 31. As shown in FIG. 2, the third dielectric layer 31 is in electrical contact with the first dielectric layer 31. A conductive layer 32 is formed on the pad 22, and a conductive via 331 and a second wiring layer 332 are formed on the conductive layer 32, and the conductive layer 32 not covered by the conductive via 331 and the second wiring layer 332 is removed. The conductive via 331 is formed in the via 200 and electrically connected to the second wiring layer 332 and the first electrical contact , 2 2 , the color filter layer 26, the dielectric layer 27 and the microlens layer. 28 is disposed in the active area B, and the first electrical contact pad 22 is located in the active area a. As shown in FIG. 2 and FIG. 2, the second circuit layer 332 has a first electrical contact 332, and an insulating protective layer 36 is formed on the second circuit layer 332 over the second surface b, and the insulating layer 36 is formed thereon. An insulating protective phase hole 36q exposing the second electrical contact pad 3321 is formed in the protective layer %, and a metal layer 34 (FIG. 21) or a first 枉35 (21st, circle) is formed on the second electrical contact pad 3321. "—Gold as shown in Figure 2J, which continues from Figure 21 to form solder bumps on the metal; or, in the first - gold shame & solder (4) 37 (not shown), That is, the electronic F set of the present invention is completed. As shown in Fig. 2J', in another embodiment of Fig. 2J, the first electrical contact first dielectric layer 2 exposes the surface of the first dielectric layer 21. In the case of 困992〇41454-〇 201205686, the first electrical contact pad 22 is connected to the first dielectric layer 21. [0040] 099123520. The column is in the shape of a column (pi 1 lar ), and is shown in Fig. 2, which is shown in Fig. 21 of the present invention, and one of the embodiments of the figure should be provided with a second The electrons of the metal pillars 41 are electrically connected to the first metal pillars 35 and the second metal pillars 41 by solder bumps 37. The present invention provides an electronic device comprising: a substrate 20 having a first surface 20a and a second surface 20b; a first dielectric layer 21 and a second portion of the substrate - on the surface 20a; an electrical contact 塾 2 is disposed on the first dielectric layer 21; the through hole coffee is through the Θ石夕 substrate 2G and the first dielectric layer 21, and the through hole _ The second circuit layer 332 is disposed on the second surface 2〇b, and the conductive via 331 is disposed in the through hole 20〇 and electrically connected. The second circuit layer 332 is connected to the first electrical contact pad 22 . In the above electronic device, the image capturing unit 3 is disposed on the first dielectric layer 21 and the first electrical contact pad 22, wherein the image capturing unit 3 includes a wiring layer 23, The light-t diode layer 24 and the anti-reflection layer 25 are colored first; the light-receiving layer 26, the second dielectric layer 27, and the microlens layer 28, the wiring layer 23 is disposed on the first dielectric layer 21 and the first electricity On the contact pad 22, the wiring layer 23 includes a plurality of stacked wires 231 electrically connected to the first electrical contact pad 22, and the top layer of the wiring layer 23 has a plurality of gates 232. The diode layer 24 is disposed on the wiring layer 23. The anti-reflective layer 25 is disposed on the photodiode layer 24. The color light-emitting layer 26 is disposed on the anti-reflective layer 25, and the second The dielectric layer 27 is disposed on the anti-reflection layer 25 and the color filter layer 26, and the microlens layer 28 is in the form number A0101. Page 12/29 pages 0992041454-0 201205686 [0044] [0045] Ο [0046 ]
[0047] [0048] 099123520 設於該第二介電層27上。 依上所述之電子裝置，該彩色濾光層26、介電層27 與微透鞔層28所佈設區域為作用區A，該第—電性接觸墊 22係位於該作用區a内。 所述之電子裝置中，復可包括黏著層29與透明層3〇 ’該黏著層29係設於該矽基板20未被第一介電層21覆蓋 之第—表面20a上，該透明層30係設於黏著層29上且位於 微透鏡層28上方。 於本發明之電子裝置中，聲可包括第三介電層3 i， 係設於該通孔200中與第二表面2〇b上，於該通孔2〇〇處 設有貫穿該第三介電層31的介電層通孔31〇，於該介電層 通孔310中設有該導電通孔331，該第二線路層3犯係設 於第三介電層31上，且該導電通孔331與第三介電層“之 間、該第二線路層332與第三介電層31之間、及該導電通 孔331與第一電性接觸墊22之間復設有導途層犯^ 又於上述之電子裝置巾，« —紐接觸墊22可喪 埋於第-介電層21並顯露於該第一介電扣之表面，且 該第-電性接觸墊22’可為柱（piUar)狀，並貫通該 第一介電層21。 於本實施例中’該第二線路層332復可具有第二電性 接觸墊332卜於該第：電性接觸墊3321上設有金屬廣34 或第一金屬柱35 ’並復可包括絕㈣護層Μ，係設於該 第二表面20b上方與第二線路層3犯上，且該絕緣保護層 36中設有外露該H轉觸細2丨的絕緣保護層開孔 表單編號A0101 第13頁/共29頁 0992041454-0 360。201205686 [0049] [0050] [0051] [0052] [0053] [0054] 又依上述之電子裝置，復可包括焊料凸塊37，係設 於該金屬層34或第一金屬柱35上。 請參閱第3A至3C圖，係習知與本發明之電子裝置的 基材面積的比較示意圖，其中，第3A圖係習知之電子裝 置的基材面積的平面圖，第3B圖係本發明之電子裝置的 基材面積的平面圖，第3C圖係本發明所節省之基材面積 的平面圖。 如第3A圖所示，習知之電子裝置係將第一電性接觸 墊11置於作用區A外的非作用區B中，因而整體基材面積 較大。 如第3B圖所示，本發明之電子裝置係將第一電性接 觸墊22 (相當於習知之第一電性接觸墊11 )置於作用區A 内，因而整體基材（包括矽基板20、配線層23、與光電 二極體層24等）面積較小。 如第3C圖所示，係將第3A圖所示之基材面積減去第 3B圖所示之基材面積後的面積差5，由圖可知，本發明之 電子裝置係節省許多基材面積。 综上所述，相較於習知技術，本發明之電子裝置係 將第一電性接觸墊置於作用區内，因而可省去非作用區 的基材面積，並能縮減整體電子裝置的體積；另外，本 發明之電子裝置係將用以電性連接至封裝基板的第二電 性接觸墊設於電子裝置的作用區内，所以最終的封裝結 構將佔用較小之基板版面，進而有利於電子產品的微型 099123520 表單編號A0101 第14頁/共29頁 0992041454-0 201205686 化；再者，本發明之第一電性接觸墊可為導電柱形式， 因而在電子裝置的結構設計上將具有較佳之彈性。 [0055] 上述實施例係用以例示性說明本發明之原理及其功 效，而非用於限制本發明。任何熟習此項技藝之人士均 可在不違背本發明之精神及範疇下，對上述實施例進行 修改。因此本發明之權利保護範圍，應如後述之申請專 利範圍所列。 【圖式簡單說明】 [0056] 第1圖係習知之例如為CMOS影像感測器的電子裝置之 剖視圖； [0057] 第2A至2K圖係本發明之電子裝置與其封裝結構及其 製法的剖視示意圖，其中，第2Γ圖係第21圖之其他實 施態樣，第2J’與2J”圖係第2J圖之其他實施態樣，第 2K圖係第2 Γ圖之一應用例子；以及 [0058] 第3A至3C圖係習知與本發明之電子裝置的基材面積 的比較示意圖，其中，第3A圖係習知之電子裝置的基材 面積的平面圖，第3B圖係本發明之電子裝置的基材面積 的平面圖，第3C圖係本發明所節省之基材面積的平面圖 〇 【主要元件符號說明】 [0059] 10 承載板 [0060] 10a > 20a 第一表面 [0061] 10b 、20b 第二表面 099123520 表單編號A0101 第15頁/共29頁 0992041454-0 201205686 [0062] 11 第一電性接觸墊 [0063] 12 配線層 [0064] 13 矽層 [0065] 14 彩色濾光層 [0066] 15 微透鏡層 [0067] 16 第二電性接觸墊 [0068] 17 玻璃層 [0069] 170 開孔 [0070] 18 導電通孔 [0071] 20 矽基板 [0072] 200 通孔 [0073] 21 第一介電層 [0074] 22、22’ 第一電性接觸墊 [0075] 23 配線層 [0076] 231 配線 [0077] 232 閘極 [0078] 24 光電二極體層 [0079] 25 抗反射層 [0080] 26 彩色濾光層 099123520 表單編號 A0101 第 16 頁/共 29 頁 0992041454-0 201205686 [0081] 27 [0082] 28 [0083] 29 [0084] 30 [0085] 31 [0086] 310 [0087] 32 Ο [0088] 331 [0089] 332 [0090] 332 1 [0091] 34 [0092] 35 [0093] 36 第二介電層 微透鏡層 黏著層 透明層 第三介電層 介電層通孔 導電層 導電通孔 第二線路層[0048] 099123520 is disposed on the second dielectric layer 27. According to the electronic device, the color filter layer 26, the dielectric layer 27 and the micro-transparent layer 28 are disposed in the active area A, and the first electrical contact pad 22 is located in the active area a. In the electronic device, the adhesive layer 29 and the transparent layer 3'' are disposed on the first surface 20a of the germanium substrate 20 not covered by the first dielectric layer 21, and the transparent layer 30 It is disposed on the adhesive layer 29 and above the microlens layer 28. In the electronic device of the present invention, the sound may include a third dielectric layer 3 i disposed in the through hole 200 and the second surface 2 〇 b, and the through hole 2 设有 is provided through the third a dielectric via 31 〇 of the dielectric layer 31, the conductive via 331 is disposed in the dielectric via 310, and the second wiring layer 3 is disposed on the third dielectric layer 31, and the A conductive guide is provided between the conductive via 331 and the third dielectric layer, between the second wiring layer 332 and the third dielectric layer 31, and between the conductive via 331 and the first electrical contact pad 22. In the above electronic device, the contact pad 22 can be buried in the first dielectric layer 21 and exposed on the surface of the first dielectric button, and the first electrical contact pad 22' The second dielectric layer 332 can have a second electrical contact pad 332 in the piUar shape and penetrate the first dielectric layer 21. In this embodiment, the second circuit layer 332 can have a second electrical contact pad 332. The metal cover 34 or the first metal post 35' is disposed thereon and includes a fourth (4) sheath layer, which is disposed above the second surface 20b and the second circuit layer 3, and the insulating protective layer 36 is exposed. The H touch Insulation Protective Layer Opening Form No. A0101 Page 13 of 29 0992041454-0 360. 201205686 [0054] [0054] [0054] Further according to the above electronic device, The solder bumps 37 may be provided on the metal layer 34 or the first metal pillars 35. Referring to FIGS. 3A to 3C, there is a schematic diagram comparing the substrate area of the electronic device of the present invention, wherein 3A is a plan view showing a substrate area of a conventional electronic device, FIG. 3B is a plan view showing a substrate area of the electronic device of the present invention, and FIG. 3C is a plan view showing a substrate area saved by the present invention. As shown, the conventional electronic device places the first electrical contact pad 11 in the inactive area B outside the active area A, and thus the overall substrate area is large. As shown in FIG. 3B, the electronic device of the present invention is The first electrical contact pad 22 (corresponding to the conventional first electrical contact pad 11) is placed in the active area A, thus the whole substrate (including the germanium substrate 20, the wiring layer 23, the photodiode layer 24, etc.) The area is small. As shown in Figure 3C, subtract the area of the substrate shown in Figure 3A. The area difference after the area of the substrate shown in FIG. 3B is 5. As can be seen from the figure, the electronic device of the present invention saves a lot of substrate area. In summary, the electronic device of the present invention is the same as the prior art. An electrical contact pad is placed in the active area, thereby eliminating the area of the substrate in the inactive area and reducing the volume of the overall electronic device; in addition, the electronic device of the present invention is used to electrically connect to the package substrate. The second electrical contact pad is disposed in the active area of the electronic device, so the final package structure will occupy a small substrate layout, thereby facilitating the miniature of the electronic product 099123520 Form No. A0101 Page 14 / 29 Page 0992041454-0 201205686 Furthermore, the first electrical contact pad of the present invention can be in the form of a conductive post, and thus will have better flexibility in the structural design of the electronic device. The above-described embodiments are intended to illustrate the principles of the invention and its advantages, and are not intended to limit the invention. Any of the above-described embodiments may be modified by those skilled in the art without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be as set forth in the application patents which will be described later. BRIEF DESCRIPTION OF THE DRAWINGS [0056] FIG. 1 is a cross-sectional view of an electronic device such as a CMOS image sensor; [0057] FIGS. 2A to 2K are diagrams showing an electronic device of the present invention, a package structure thereof, and a method of manufacturing the same Referring to the schematic diagram, wherein the second diagram is the other embodiment of the 21st diagram, the 2J' and 2J diagrams are the other implementations of the 2J diagram, and the 2K diagram is the application example of the 2nd diagram; and [ 0058] FIGS. 3A to 3C are diagrams showing a comparison of the substrate area of the electronic device of the present invention, wherein FIG. 3A is a plan view of a substrate area of a conventional electronic device, and FIG. 3B is an electronic device of the present invention. Plan view of the substrate area, FIG. 3C is a plan view of the substrate area saved by the present invention 〇 [Main component symbol description] [0059] 10 carrier plate [0060] 10a > 20a first surface [0061] 10b, 20b Second surface 099123520 Form number A0101 Page 15 / Total 29 page 0992041454-0 201205686 [0062] 11 First electrical contact pad [0063] 12 Wiring layer [0064] 13 矽 layer [0065] 14 Color filter layer [0066 ] 15 microlens layer [0067] 16 second electrical connection Pad [0068] 17 Glass Layer [0069] 170 Opening [0070] 18 Conductive Through Hole [0071] 20 矽 Substrate [0072] 200 Through Hole [0073] 21 First Dielectric Layer [0074] 22, 22' First Electrical contact pad [0075] 23 Wiring layer [0076] 231 Wiring [0077] 232 Gate [0078] 24 Photodiode layer [0079] 25 Anti-reflection layer [0080] 26 Color filter layer 099123520 Form No. A0101 No. 16 Page 29 of 0992041454-0 201205686 [0081] 28 [0082] 29 [0084] 31 [0086] 31 [0086] 32 [0086] 32 [0088] 332 [0089] 332 [0090] 332 [0091] 34 [0093] 36 second dielectric layer microlens layer adhesion layer transparent layer third dielectric layer dielectric layer via hole conductive layer conductive via second circuit layer
[0094] 360 [0095] 37 [0096] 2、40 [0097] 3 [0098] 41 [0099] 5 第二電性摟翁管 金屬層 第一金屬柱 絕緣保護層 絕緣保護層開孔 焊料凸塊 電子裝置 影像擷取單元 第二金屬柱 面積差 099123520 表單編號Α0101 第17頁/共29頁 0992041454-0[0096] 360 [0096] 37 [0096] 2 [0096] 2 [0097] 3 [0099] 5 [0099] 5 second electrical 搂 tube metal layer first metal pillar insulation protective layer insulating protective layer open hole solder bump Electronic device image capturing unit second metal column area difference 099123520 Form number Α0101 Page 17 / 29 pages 0992041454-0
201205686 [0100] A [0101] B 作用區 非作用區 099123520 表單編號A0101 第18頁/共29頁 0992041454-0201205686 [0100] A [0101] B active area inactive area 099123520 Form number A0101 Page 18 of 29 0992041454-0