201205606 六、發明說明： 【發明所屬之技術領域】 本發明係關於-種保護元件之製造方法，特别是一種 過電壓保護元件之製造方法。 【先前技術】 -般而言’突波具有強大的_能量，而電路中的電 子設備通常無法承受高能量突波的衝擊。為避免電子設備 因突波衝擊造成損壞，通常係於電路中另設置過電壓保護 元件，用以濾除突波。而過電壓保護元件通常分為積層式 及單層式兩種。 請參照第1圖所示’如中華民國公告第517423號發 明專利「暫態過電壓保護元件結構」中所述，一般習用積 層式過電壓保護元件之製作方法係先提供一基板91，再於 該基板91上設置一訊號導電層92 ;接著，再將導體粉末 及半導體粉末均勻混合於含有結合劑的材料中，並以厚膜 印刷方式印刷於該基板91上’並進行燒結而形成一可變阻 抗材料層93 ’使得該可變阻抗材料層93之一部分覆蓋於 該基板91，另一部份覆蓋於讀訊號導電層92 ;最後，再於 該基板91上設置一接地導電層94，使得該接地導電層94 之一部分覆蓋於該可變阻抗材料層93，另一部份覆蓋於該 基板91。如此，該可變阻抗材料層93係介於該訊號導電 層92及接地導電層94之間’使該訊號導電層92及接地導 電層94之間於縱向高度係形成有一間距t>l，而共同形成 一積層式過電壓保護元件。 201205606 睛參照第2圖所示，一般習用單層式過電壓保護元件 之製作方法係先提供一基板95，再於該基板95上設置一 訊號導電層96及一接地導電層97，且該訊號導電層96及 接地導電層97之間係形成有一間距D2 ;接著，再以前述 之厚膜印刷方式於該間距D2處設置一可變阻抗材料層％ ’使得部分該可變阻抗材料層98分別延伸覆蓋於該訊號導 電層96及接地導電層97之表面，使得該可變阻抗材料層 98分別電性連接至該訊號導電層96及接地導電層97,而 完成單層式過電壓保護元件之製作。 前述之積層式過電壓保護元件或單層式過電壓保護 元件的可變阻抗材料層93、98將使得該過電壓保護元件具 有一崩潰電壓（Breakdown voltage)，在正常狀況下，該習 知積層式或單層式的過電壓保護元件為絕緣狀態；一旦突 波的電壓高於該崩潰電壓時’則該可變阻抗材料層93、98 將形成導通狀態，使得突波可由該訊號導電層92、96傳導 至該接地導電層94、97而接地導出。如此，便可將突波之 能量透過接地方式消散掉，以產生對電路内部元件之保護 效果。 然而，由於前述習用過電壓保護元件之製造方法的可 變阻抗材料層93、98皆係以厚膜印刷方式製成，因此該可 變阻抗材料層93、98内之材料顆粒較大（約2〜3以瓜）。 而該訊號導電層92、96傳導至該接地導電層94、97之間 的間距Dl、D2為固疋之前提下，材料顆粒越大，該間距 Dl、D2之間的材料顆粒數量便相對越少，又每個材料顆 粒僅可吸收承載約2〜3V的電壓，因此材料顆粒數量的減 201205606 少亦將會造成單位體積内的可變阻抗材料層93、98可吸收 的能量變少’而造成對元件之保護效果不佳之缺點。 再且’由独相印刷方式製成財變阻抗材料層93 亦將造成該可變阻抗材料層％％之厚度較厚，而 使得該過賴元狀赌輕上升，造成其具有 吸收效率不佳之缺點。 4 基於上述原因，其有必要進一步改良上 保 元件之製造方法。 ·卡選201205606 VI. Description of the Invention: [Technical Field] The present invention relates to a method of manufacturing a protective element, and more particularly to a method of manufacturing an overvoltage protecting element. [Prior Art] - Generally speaking, the glitch has a strong _ energy, and the electronic equipment in the circuit is usually unable to withstand the impact of high energy surges. In order to avoid damage caused by the surge of electronic equipment, an overvoltage protection component is usually provided in the circuit to filter out the surge. The overvoltage protection components are usually divided into a laminate type and a single layer type. Please refer to the description of the structure of the transient over-voltage protection device of the invention patent No. 517423 of the Republic of China, as described in Figure 1, the conventional method for manufacturing the laminated over-voltage protection device is to provide a substrate 91, and then A signal conductive layer 92 is disposed on the substrate 91. Then, the conductor powder and the semiconductor powder are uniformly mixed in the material containing the bonding agent, and printed on the substrate 91 by thick film printing and sintered to form a film. The variable resistance material layer 93' partially covers one portion of the variable resistance material layer 93 on the substrate 91, and the other portion covers the read signal conductive layer 92. Finally, a ground conductive layer 94 is disposed on the substrate 91. A portion of the ground conductive layer 94 covers the variable resistance material layer 93, and another portion covers the substrate 91. Thus, the variable impedance material layer 93 is interposed between the signal conductive layer 92 and the ground conductive layer 94 to form a pitch t > l between the signal conductive layer 92 and the ground conductive layer 94 at a longitudinal height. Together, a laminated overvoltage protection component is formed. 201205606 Eyes As shown in FIG. 2, a conventional single-layer overvoltage protection device is generally provided with a substrate 95, and then a signal conductive layer 96 and a ground conductive layer 97 are disposed on the substrate 95, and the signal is provided. A spacing D2 is formed between the conductive layer 96 and the grounding conductive layer 97. Then, a variable impedance material layer %' is disposed at the spacing D2 by the thick film printing method described above so that part of the variable impedance material layer 98 is respectively The surface of the signal conducting layer 96 and the grounding conductive layer 97 is extended to electrically connect the variable impedance material layer 98 to the signal conducting layer 96 and the grounding conductive layer 97, respectively, to complete the single-layer overvoltage protection component. Production. The variable voltage material layers 93, 98 of the laminated overvoltage protection component or the single layer overvoltage protection component described above will cause the overvoltage protection component to have a breakdown voltage. Under normal conditions, the conventional laminate The over-voltage protection element of the single-layer or single-layer type is in an insulated state; once the voltage of the surge is higher than the breakdown voltage, the layer of variable-resistance material 93, 98 will be in an on state, so that the surge can be made by the signal-conducting layer 92. , 96 is conducted to the ground conductive layers 94, 97 and grounded. In this way, the energy of the glitch can be dissipated through the grounding method to create a protection effect on the internal components of the circuit. However, since the variable impedance material layers 93, 98 of the conventional method for manufacturing a voltage protection element are formed by thick film printing, the material particles in the variable resistance material layers 93, 98 are large (about 2 ~3 to melon). The distances D1 and D2 between the signal conducting layers 92, 96 and the grounding conductive layers 94, 97 are lifted before the solid layer is formed. The larger the material particles, the larger the number of material particles between the distances D1 and D2. Less, each material particle can only absorb about 2~3V, so the reduction of the number of material particles less than 201205606 will also cause the energy absorbed by the variable impedance material layers 93, 98 in a unit volume to decrease. The disadvantage of poor protection of components. Moreover, 'the thickness of the variable impedance material layer 93 made by the single-phase printing method will also cause the thickness of the variable-resistance material layer to be thicker, so that the gambling gambling is lightly increased, resulting in poor absorption efficiency. Disadvantages. 4 For the above reasons, it is necessary to further improve the manufacturing method of the above-mentioned components. ·Card selection
【發明内容】 一本發明目的乃改良上述缺點，以提供一種過電壓 造綠’辦低觸電壓雜元件之可變阻抗材 枓層的顆粒尺寸為其發明目的。 本發明次一目的係提供一種過電壓保護元件之製造 方法，以降低該過電壓保護元件之可變阻抗材料層的厚度 、本發明再一目的係提供一種過電壓保護元件之製1 方法，降低該過電壓保護元件之崩潰電壓。 、本發明另一目的係提供一種過電壓保護元件之製造 方法，提升該可變阻抗材料層單位體積之可吸收能量。k 根據本發明的過電壓保護元件之製造方法係包含：一 輸入電極製作步驟，係於一基板上形成一輸入電極層：一 輸出電極層製作步驟，係於該基板上形成—輸出電極層； 及-變崎料驅關製作步驟，仙薄觀積方式於該基 板上形成-由金屬及金屬氧化物材質製成之變阻材料ςς 201205606 層；其中，該變阻材料驅動層電性連接至該輸入電極層 及輸出電極層。藉此，以提升該變阻材料驅動層單位體積 之可吸枚能量。 【實施方式】 為讓本發明之上述及其他目的、特徵及優點能更明顯 易懂，下文特舉本發明之較佳實施例，並配合所附圖式， 作詳細說明如下： 本發明之過電壓保護元件之製造方法係包含：一輸入 電極製作步驟、一輸出電極製作步驟及一變阻材料驅動層 製作步驟以利用薄膜沈積方式製作形成變阻材料驅動層。 其中該二步驟之執行順序係可根據欲製作之過電壓保護元 件的種類進行適當調整，例如應用於積層式或單層式之過 電壓保護元件之步驟順序可適當調整，但並不脫離本發明 以薄膜沈積製程製作形成該變阻材料驅動層之技術手段及 目的。 該輸入電極製作步驟係於一基板上形成一輸入電極 層。更詳s之，該輸入電極層係可選擇以厚膜印刷方式或 薄膜沈積方式製作形成於該基板之表面，以供電路訊號輸 入本發明之過電壓保護元件。其中，該輸入電極層較佳係 以導電性佳之金屬製成，例如金(Au)、銀(Ag)、銅(Cu)、 鎳(Ni)、鉑(Pt)、鈀(pd)或其合金。 該輸出電極製作步驟係於縣板上形成—輸出電極 層:更詳言之’該輸出電極層相同可選擇以厚膜印刷方式 或薄膜沈積方式製作形成於該基板之表面，以供電路訊號 201205606 輪出。該輪出電極層之材料係可選擇與該 該變阻材料驅動層製作步驟，係以薄膜沈積方式於該 基板上形成—由金屬及金屬氧化物材質製成之變阻材料驅 動層’且該變阻材料驅動層電性連接至該輸人電極層及輸 出電極層。更詳言之，該細沈積方式係可選擇為物理氣 相沈積（例如顧）等方式。該金屬射獅為導電性佳 之金屬’例如金(Au)、銀(Ag)、銅(Cu)、鎳⑽、鉑㈣、 叙㈣或其合金，以提升該變崎料狀紐導電性並降 低觸發電a。該金屬氧制祕可獅為由氧、氧化辞 、氧化鎳、氧化鐵、氧化鋁、氧化鈦及氧化鋅所組成之群 組。該變阻材料驅動層係可選擇將該金展及金屬氧化物以 共濺鍍方式製作為單一層的變阻材料驅動層，使得所形成 之變阻材料驅動層内，以重量百分比計金屬所佔之比例為 0.1〜40%，金屬氧化物所佔之比例係為6〇〜99.9% ;或者， 將該金屬及金屬氧化物分別以薄膜沈積方式製作為金屬導 電層及至少一金屬氧化物層，使該金屬氧化物層同時介於 該金屬導電層及該輸入或輸出電極層之間；或者，形成二 金屬氧化物層以分別位於該金屬導電層與輸入電極層之間 ，以及該佘屬導電層與輸出電極層之間。如此，使得該金 屬導電層及金屬氧化物層共同構成該變阻材料驅動層。該 金屬導電層之厚度係為0.1〜20//m，金屬氧化物層之厚度 係為 0.05em〜10Am。 藉此，本實施例之變阻材料層係將金屬及金屬氧化物 選擇以濺鍍方式製作形成該變阻材料驅動層’使得該變阻 201205606 材料驅動層内的材料顆粒尺寸可進一步縮小，例如，本發 明之變阻材料驅動層内的金屬及金屬氧化物材料的顆粒又 寸係為，使得該變阻材料驅動層單位體積内的材料顆粒數 量可增多，由於各材料顆粒約可吸收承載約2〜3V的電壓 ，因此可進一步提升該變阻材料驅動層單位體積的吸收能 量’以及提升對元件的保護效果。再且，由於本發明係以 薄膜沈積方式製作該變阻材料驅動層，可精準控制並降低 該變阻材料驅動層之厚度’例如’本發明之變阻材料驅動 層的厚度係為〇.〇5因此可進一步降低所製作 的過電壓保護元件的崩潰電壓（Breakdown voltage)，因此 ，可提尚其對突波之吸收效率，進而提高對元件之保蠖效 果。 ° 舉例而言’本實施例之變阻材料驅動層濺鍍製程中， 先將該基板及對應之金屬及/或金屬氧化物靶材置於一反 應腔體内，且對該反應腔體抽真空至之壓力達lxl0-6〜 9x10 Torr，再以10〜100sccm之流量將氬氣通入該反應腔 體内，工作壓力為lxlO·3〜lxlO_2Torr ,濺鑛功率係為 〇*lkw〜5kw ’轉變速率（Transfer speed)為 1 〜l〇〇cm/min 。當然’製程條件係可根據製程需求進行適當調整。 以下為本發明之過電壓保護元件之製造方法之各個 實施例’詳述如下。其中下述實施例之濺鍍條件如前述。 1.第一實施例： 請參照第3圖所示，本第一實施例係先進行前述之輸 入電極製作步驟及輸出電極製作步驟，以於一基板1上分 別設置一輸入電極層2及一輸出電極層3，且使得該輸入 201205606 電極層2及輸出電極層3之間係形成有一間距w。 接著，再進行該變阻材料驅動層製作步驟，以共濺鍍 方式將銀（金屬）及氧化鋅（金屬氧化物）製作形成一^ 一層之變阻材料驅動層4，使得該變阻材料驅動層4於該 間隙w内覆蓋於該基板1，且該變阻材料驅動層4之一部 分分別覆蓋於該輸入電極層2及輸出電極層3之表面，而 電性連接至該輸入電極層2及輸出電極層3。如此，便可 如前述提升該變阻材料驅動層4單位體積可吸收的能量， 並降低崩潰電麗，而提升對元件之保護效果。 2·第二實施例： 請參照第4圖所示’本第二實施例係先進行該變阻材 料驅動層製作步驟’以共賤鑛方式將銀（金屬）及氧化辞 (金屬氧化物）於該基板丨之表面製作形成該單一層之變 阻材料驅動層4。 接著，再進行前述之輸入電極製作步驟及輸出電極製 作步驟，膽縣板丨上分別設㈣輸人電極層2及該輸 出電極層3，使得該輸人電極層2及輸出電極層3之一部 分分別覆蓋於該變崎料轉層4之表面，且該輸入電極 層上及輸出電極層3之間仍形成有該間距w。如此，便可 如則述提升該變崎料驅動層4單位體積可吸收的能量， 並降低崩潰電壓，而提升對元件之保護效果。 3.第三實施例： 請參照第5圖所示，本第三實施例係先進行前述之輸 入電極製作步驟及輸出電極製作步驟，以於—基板i上分 別設置-輸人電極層2及-輪出電極層3，且使得該輸入 201205606 電極層2及輸出電極層3之間係形成有該間距w。 接著’再進行該變阻材料驅動層製作步驟，本第三實 施例之變阻材料驅動層製作步驟係先以濺鍍方式將氧化辞 (金屬氧化物）製作形成一金屬氧化物層41，使得該金屬 氧化物層41於該間隙w内覆蓋於該基板丨，且該金屬氧化 物層41之一部分分別覆蓋於該輸入電極層2及輸出電極層 3之表面，再於該金屬氧化物層41之表面，以減錄方式將 銀（金屬）製作形成一金屬導電層42，使該金屬氧化物層 41及金屬導電層42共同構成該變阻材料驅動層4而分別 與該輸入電極層2或輸出電極層3電性連接如.此，該金 屬氧化物層41係同時介於該金屬導電層42與該輸入電極 層2之間，以及介於該金屬導電層42與該輸出電極層3 之間，而可使該金屬導電層42分別與該輸入電極層2或輸 出電極層3絕緣，而避免該過電壓保護元件產生短路之現 象。因此，除了可如前述提升該變阻材料驅動層4單位體 積可吸收的能量，並降低崩潰電壓，而提升對元件之保護 效果外，將該變阻材料驅動層4分開設置為該金屬氧化物 層41及金屬導電層42，因此可透過精準掌控該金屬氧化 物層41及金屬導電層42之厚度而精確調整該過電壓保護 元件之崩潰電壓。 4.第四實施例： 請參照第6圖所示’本第四實施例係先進行該變阻材 料驅動層製作步驟’本第四實施例之變阻材料驅動層製作 步驟係先以激鍍方式將銀（金屬）製作形成一金屬導電層 42而覆蓋於該基板1之表面’再於該金屬導電層42之表 201205606 面，以濺鍍方式將氧化鋅（金屬氧化物）製 氧化物層41，使該金屬氧化物層41復董=導= 42之表面，而共同構成該變阻材料驅動層4。 接著，再進行該輸人電極製作步驟及輸出電極製作步 驟，以分別於該基板1上形成該輸入電極層2及輸出電極 層3，且該輸入電極層2及輸出電極層3之間仍形成有該 間距w，該輸入電極層2及輸出電極層3皆部分覆蓋於該 金屬氧化物層41，使付由該金屬氧化物層々I與金屬導電 層42所共同形成之變阻材料驅動層4可電性連接至該輸入 電極層2及輸出電極層3。 如此，該金屬氧化物層41係同時介於該金屬導電層 42與該輸入電極層2之間，以及介於該金屬導電層42與 該輸出電極層3之間’而如前述可使該金屬導電層42分別 與該輸入電極層2或輸出電極層3絕緣，而避免該過電壓 保護元件產生短路之現象。藉此，可達到與第三實施例相 同之功效。 5.第五實施例： 本實施例係應用於積層式過電壓保護元件之製作。 請參照第7a圖所示’本第五實施例係先進行該輸入電 極製作步驟，於該基板1之表面設置該輸入電極層2。 請參照第7b圖所示，接著再進行該變阻材料驅動層 製作步驟，本第五實施例之變阻材料驅動層製作步驟係先 以錢鑛方式將氧化鋅（金屬氧化物）製作形成一第一金屬 氧化物層41a，使得該第一金屬氧化物層41a之一部分覆 蓋於該輸入電極層2 ;再如第7c圖所示，於該金屬氧化物 201205606 層41a之表面，以濺鍍方式將銀（金屬）製作形成該金屬 導電層42 ;再如第7d圖所示，以濺鐘方式將氧化辞（金 . 屬氧化物）製作形成一第二金屬氧化物層41b，使得該第 二金屬氧化物層41b同時覆蓋該金屬氧化物層41a及該金 屬導電層42，而完成該變阻材料驅動層製作步驟，使該第 一金屬氧化物層41a、第二金屬氧化物層41b及金屬導電 層42共同構成該變阻材料驅動廣4。 請參照第7e圖所示’最後再進行該輸出電極製作步驟 ，於該基板1上設置該輸出電極層3 ’使得該輸出電極層3 φ 部分覆蓋於該第二金屬氧化物層41b，使得該輸出電極層3 實質上係位於該輸入電極層2之上方。如此，該變阻材料 驅動層4便可電性連接至該輸入電極層2及輸出電極層3 ’且該第一金屬氧化物層41a介於該金屬導電層42與該輸 入電極層2之間，該第二金屬氧化物層4ib介於該金屬導 電層42與該輸出電極層3之間，以避免該金屬導電層42 與該輸入電極層2及輸出電極層3接觸而產生短路。 6.第六實施例： · 本實施例係應用於積層式過電壓保護元件之製作。 請參照第8圖所示’本第六實施例之製作步驟係與該 第五實施例相同，主要差異在於該金屬導電層42選擇為以 銅鎳合金（60%銅，40%鎳）作為材質製成，其他材質係與 第五實施例相同。此外，本實施例之輸出電極層3並未覆 蓋延伸至位於該輸入電極層2之上方，使得該輸入電極層 2與該輸出電極層3之間形成有二個串聯之電容，而可有 效降低元件之電容值。 —12 — 201205606 該第一至第六實施例之相關製程參數如表一所示： 表一、第一至第六實施例之相關製程參數：SUMMARY OF THE INVENTION An object of the present invention is to improve the above disadvantages, and to provide a particle size of a variable impedance material layer of an overvoltage greening low-voltage component. A second object of the present invention is to provide a method for manufacturing an overvoltage protection device for reducing the thickness of a variable impedance material layer of the overvoltage protection component, and a further object of the present invention is to provide a method for manufacturing an overvoltage protection component, which reduces The breakdown voltage of the overvoltage protection component. Another object of the present invention is to provide a method of fabricating an overvoltage protection device that enhances the absorbable energy per unit volume of the variable impedance material layer. The method for manufacturing an overvoltage protection device according to the present invention comprises: an input electrode fabrication step of forming an input electrode layer on a substrate: an output electrode layer fabrication step, forming an output electrode layer on the substrate; And the step of making the change of the raw material, the thin film is formed on the substrate - a varistor material made of metal and metal oxide material ςς 201205606 layer; wherein the varistor driving layer is electrically connected to The input electrode layer and the output electrode layer. Thereby, the absorbing energy per unit volume of the varistor driving layer is increased. The above and other objects, features, and advantages of the present invention will become more apparent from the embodiments of the invention. The manufacturing method of the voltage protection component comprises: an input electrode fabrication step, an output electrode fabrication step, and a varistor material drive layer fabrication step to form a varistor material drive layer by thin film deposition. The execution sequence of the two steps may be appropriately adjusted according to the type of the overvoltage protection component to be fabricated. For example, the sequence of steps for applying the overvoltage protection component of the laminate or the single layer may be appropriately adjusted, but does not deviate from the present invention. The technical means and purpose of forming the driving layer of the varistor material are formed by a thin film deposition process. The input electrode fabrication step is performed by forming an input electrode layer on a substrate. More specifically, the input electrode layer can be formed on the surface of the substrate by thick film printing or thin film deposition for inputting the circuit signal into the overvoltage protection component of the present invention. Wherein, the input electrode layer is preferably made of a metal having good conductivity, such as gold (Au), silver (Ag), copper (Cu), nickel (Ni), platinum (Pt), palladium (pd) or an alloy thereof. . The output electrode fabrication step is formed on the county plate-output electrode layer: more specifically, the output electrode layer can be formed by thick film printing or thin film deposition on the surface of the substrate for circuit signal 201205606 Take out. The material of the electrode layer can be selected from the driving layer of the varistor material, and a varistor driving layer made of metal and metal oxide material is formed on the substrate by thin film deposition and the The varistor driving layer is electrically connected to the input electrode layer and the output electrode layer. More specifically, the fine deposition method can be selected by means of physical gas phase deposition (e.g., Gu). The metal lion is a highly conductive metal such as gold (Au), silver (Ag), copper (Cu), nickel (10), platinum (four), Syria (four) or an alloy thereof to enhance the conductivity and reduce the conductivity Trigger the power a. The metal oxygen secret lion is composed of oxygen, oxidized, nickel oxide, iron oxide, aluminum oxide, titanium oxide and zinc oxide. The varistor driving layer may be selected as a single layer of varistor driving layer by co-sputtering the gold alloy and the metal oxide, so that the varistor driving layer is formed, and the metal is in a percentage by weight. The ratio is 0.1 to 40%, and the proportion of the metal oxide is 6 〇 to 99.9%; or the metal and the metal oxide are respectively formed into a metal conductive layer and at least one metal oxide layer by thin film deposition. Having the metal oxide layer between the metal conductive layer and the input or output electrode layer; or, forming a two metal oxide layer between the metal conductive layer and the input electrode layer, and the genus Between the conductive layer and the output electrode layer. Thus, the metal conductive layer and the metal oxide layer together constitute the varistor driving layer. The thickness of the metal conductive layer is 0.1 to 20/m, and the thickness of the metal oxide layer is 0.05 to 10 Am. Thereby, the varistor material layer of the embodiment selectively forms the metal and the metal oxide by sputtering to form the varistor driving layer, so that the material particle size in the driving layer of the varistor 201205606 material can be further reduced, for example, The particles of the metal and the metal oxide material in the driving layer of the varistor material of the present invention are further such that the number of material particles per unit volume of the varistor driving layer can be increased, since each material particle can absorb and carry about The voltage of 2~3V can further enhance the absorption energy per unit volume of the driving layer of the varistor material and improve the protection effect on the component. Moreover, since the varistor driving layer is formed by thin film deposition, the thickness of the varistor driving layer can be precisely controlled and reduced. For example, the thickness of the varistor driving layer of the present invention is 〇.〇 5 Therefore, the breakdown voltage of the fabricated overvoltage protection component can be further reduced, and therefore, the absorption efficiency of the surge can be improved, thereby improving the protection effect on the component. For example, in the sputtering process of the varistor driving layer of the embodiment, the substrate and the corresponding metal and/or metal oxide target are first placed in a reaction chamber, and the reaction chamber is pumped. The pressure is up to lxl0-6~9x10 Torr, and then argon gas is introduced into the reaction chamber at a flow rate of 10~100 sccm. The working pressure is lxlO·3~lxlO_2Torr, and the sputtering power is 〇*lkw~5kw' The transfer speed is 1 to l〇〇cm/min. Of course, the process conditions can be adjusted according to the process requirements. Hereinafter, each embodiment of the method for manufacturing an overvoltage protection element of the present invention will be described in detail below. The sputtering conditions of the following examples are as described above. 1. First Embodiment: Referring to FIG. 3, in the first embodiment, the input electrode fabrication step and the output electrode fabrication step are performed to form an input electrode layer 2 and a substrate 1 respectively. The electrode layer 3 is output, and a gap w is formed between the electrode layer 2 and the output electrode layer 3 of the input 201205606. Then, the varistor driving layer manufacturing step is further performed, and silver (metal) and zinc oxide (metal oxide) are formed into a layer of the varistor driving layer 4 by co-sputtering, so that the varistor material is driven. The layer 4 covers the substrate 1 in the gap w, and a portion of the varistor driving layer 4 covers the surface of the input electrode layer 2 and the output electrode layer 3, and is electrically connected to the input electrode layer 2 and The electrode layer 3 is output. In this way, the energy absorbed per unit volume of the varistor driving layer 4 can be increased as described above, and the collapsed electric power can be reduced, thereby improving the protection effect on the components. 2. Second Embodiment: Please refer to Fig. 4, 'This second embodiment is to perform the step of fabricating the varistor driving layer first' to deposit silver (metal) and oxidized metal (metal oxide) in a bismuth manner. A varistor driving layer 4 forming the single layer is formed on the surface of the substrate. Then, the input electrode fabrication step and the output electrode fabrication step are performed, and the input electrode layer 2 and the output electrode layer 3 are respectively disposed on the plate of the biliary plate so that the input electrode layer 2 and the output electrode layer 3 are partially The surface of the barotropic material transfer layer 4 is respectively covered, and the pitch w is still formed between the input electrode layer and the output electrode layer 3. In this way, the energy absorbed per unit volume of the barotropic material driving layer 4 can be increased, and the breakdown voltage can be lowered to improve the protection effect on the components. 3. Third Embodiment: Referring to FIG. 5, in the third embodiment, the input electrode fabrication step and the output electrode fabrication step are performed first, and the input electrode layer 2 is disposed on the substrate i and - The electrode layer 3 is rotated and the spacing w is formed between the input layer 201205606 electrode layer 2 and the output electrode layer 3. Then, the step of fabricating the varistor driving layer is further performed. The step of fabricating the varistor driving layer of the third embodiment is to first form a metal oxide layer 41 by sputtering (metal oxide). The metal oxide layer 41 covers the substrate 于 in the gap w, and a portion of the metal oxide layer 41 covers the surface of the input electrode layer 2 and the output electrode layer 3, respectively, and the metal oxide layer 41 On the surface, silver (metal) is formed into a metal conductive layer 42 in a subtractive manner, so that the metal oxide layer 41 and the metal conductive layer 42 together constitute the varistor driving layer 4 and respectively with the input electrode layer 2 or The output electrode layer 3 is electrically connected. The metal oxide layer 41 is interposed between the metal conductive layer 42 and the input electrode layer 2, and between the metal conductive layer 42 and the output electrode layer 3. The metal conductive layer 42 can be insulated from the input electrode layer 2 or the output electrode layer 3, respectively, to avoid the short circuit of the overvoltage protection element. Therefore, in addition to the energy that can be absorbed per unit volume of the varistor driving layer 4 as described above, and the breakdown voltage is lowered to improve the protection effect on the element, the varistor driving layer 4 is separately provided as the metal oxide. The layer 41 and the metal conductive layer 42 can accurately adjust the breakdown voltage of the overvoltage protection element by precisely controlling the thickness of the metal oxide layer 41 and the metal conductive layer 42. 4. Fourth Embodiment: Please refer to FIG. 6 'The fourth embodiment is to perform the step of fabricating the varistor driving layer first.' The fourth step of the varistor driving layer is firstly subjected to laser plating. In a manner, silver (metal) is formed into a metal conductive layer 42 to cover the surface of the substrate 1 and then on the surface of the metal conductive layer 42 on the surface of 201205606, a zinc oxide (metal oxide) oxide layer is sputtered. 41. The metal oxide layer 41 is formed to have a surface of the conductive material, and the varistor driving layer 4 is formed. Then, the input electrode fabrication step and the output electrode fabrication step are performed to form the input electrode layer 2 and the output electrode layer 3 on the substrate 1, and the input electrode layer 2 and the output electrode layer 3 are still formed. With the pitch w, the input electrode layer 2 and the output electrode layer 3 partially cover the metal oxide layer 41, so that the varistor material driving layer 4 formed by the metal oxide layer 々I and the metal conductive layer 42 is formed. The input electrode layer 2 and the output electrode layer 3 are electrically connected. As such, the metal oxide layer 41 is simultaneously interposed between the metal conductive layer 42 and the input electrode layer 2, and between the metal conductive layer 42 and the output electrode layer 3, and the metal can be made as described above. The conductive layer 42 is insulated from the input electrode layer 2 or the output electrode layer 3, respectively, to avoid the short circuit of the overvoltage protection element. Thereby, the same effects as those of the third embodiment can be achieved. 5. Fifth Embodiment: This embodiment is applied to the fabrication of a laminated overvoltage protection component. Referring to Fig. 7a, the fifth embodiment performs the input electrode fabrication step, and the input electrode layer 2 is provided on the surface of the substrate 1. Referring to FIG. 7b, the varistor driving layer manufacturing step is further performed. The varistor driving layer manufacturing step of the fifth embodiment is first to form zinc oxide (metal oxide) into a carbonaceous manner. a first metal oxide layer 41a such that one of the first metal oxide layers 41a partially covers the input electrode layer 2; and as shown in FIG. 7c, on the surface of the metal oxide 201205606 layer 41a, by sputtering Silver (metal) is formed to form the metal conductive layer 42; as shown in Fig. 7d, the oxidation word (gold oxide) is formed into a second metal oxide layer 41b in a splash-clock manner, so that the second The metal oxide layer 41b covers the metal oxide layer 41a and the metal conductive layer 42 at the same time, and the varistor driving layer manufacturing step is completed to make the first metal oxide layer 41a, the second metal oxide layer 41b and the metal. The conductive layers 42 collectively constitute the varistor material drive 4 . Referring to FIG. 7e, the output electrode layer 3' is disposed on the substrate 1 such that the output electrode layer 3 φ partially covers the second metal oxide layer 41b. The output electrode layer 3 is substantially above the input electrode layer 2. As such, the varistor driving layer 4 can be electrically connected to the input electrode layer 2 and the output electrode layer 3 ′ and the first metal oxide layer 41 a is interposed between the metal conductive layer 42 and the input electrode layer 2 . The second metal oxide layer 4ib is interposed between the metal conductive layer 42 and the output electrode layer 3 to prevent the metal conductive layer 42 from coming into contact with the input electrode layer 2 and the output electrode layer 3 to cause a short circuit. 6. Sixth Embodiment: This embodiment is applied to the fabrication of a laminated overvoltage protection element. Referring to FIG. 8 , the manufacturing steps of the sixth embodiment are the same as those of the fifth embodiment. The main difference is that the metal conductive layer 42 is selected from copper-nickel alloy (60% copper, 40% nickel). Made of other materials, the same as the fifth embodiment. In addition, the output electrode layer 3 of the embodiment does not cover and extends above the input electrode layer 2, so that two capacitors connected in series are formed between the input electrode layer 2 and the output electrode layer 3, which can effectively reduce The capacitance value of the component. —12 — 201205606 The relevant process parameters of the first to sixth embodiments are as shown in Table 1: Table 1, the relevant process parameters of the first to sixth embodiments:
第一實施例 第二實施例 第三實施例 第四實施例 第五實施例 第六實施例 輸入電極層 及輸出電極 層厚度 (^m) 10 10 10 10 10 10 第一金屬氧 化物層厚度 (^m) - - 3 5 0.5 1 金屬導電層 厚度（ym) - 2 5 1 2 第二金屬氧 化物層厚度 (ym) - 0.5 1 變阻材料驅 動層厚度（ #m) 8 5 5 10 2 4 變阻材料驅 動層之顆粒 尺寸（nm) 2 2 1 1 1 1 變阻材料驅 動層中金屬 所佔比重（ 30 20 - - —13 — 201205606 %) 崩潰電壓（V ) 150 200 150 200 150 150 如前所述，本發明之過電壓保護元件之製造方法中的 輸入電極製作步驟、輸出電極製作步驟及變阻材料驅動層 製作步驟行順序係可依過電壓保護元件的種類適當調 整，仍可達到本發明提升對元件之保護效果之功效。 本發明之過電壓保護元件之製造方法係透過以薄膜 沈積方式將金屬及金屬氧化物製作該變阻材料驅動層，以鲁 降低該變阻材料驅動層中的材料顆粒，進而提升該變阻材 料驅動層單位體積之可吸收能量。 本發明之過電壓保護元件之製造方法係透過以薄膜 沈積方式將金屬及金屬氧化物製作該變阻材料驅動層，以 降低該變阻材料驅動層的厚度，進而降低該變阻材料驅動 層之崩潰電壓，並提升對元件之保護效果^ 雖然本發明已利用上述較佳實施例揭示，然其並非用 以限定本發明，任何熟習此技藝者在不脫離本發明之精神鲁 和乾圍之内’相對上述實施例進行各種更動與修改仍屬本 發明所保護之技術範疇，因此本發明之保護範圍當視後附 之申請專利範圍所界定者為準。 【囷式簡單說明】 第1圖：習知積層式過電壓保護元件之製造方法的示意 圖。 201205606 第2圖：習知單層式過電壓保護元件之製造方法的示意 圖。 第3圖：本發明之過電壓保護元件之製造方法的第一實 施例的不意圖。 第4圖：本發明之過電壓保護元件之製造方法的第二實 施例的示意圖。 第5圖：本發明之過電壓保護元件之製造方法的第三實 施例的示意圖。 第6圖：本發明之過電壓保護元件之製造方法的第四實 施例的不意圖。 第7a圖：本發明之過電壓保護元件之製造方法的第五 實施例的輸入電極製作步驟示意圖。 第7b圖：本發明之過電壓保護元件乏製造方法的第五 實施例形成第一金屬氧化物層的示意圖。 第7c圖：本發明之過電壓保護元件之製造方法的第五 實施例形成金屬導電層的示意圖。 第7d圖：本發明之過電壓保護元件之製造方法的第五 實施例形成第二金屬氧化物層的示意圖。 第7e圖：本發明之過電壓保護元件之製造方法的第五 實施例之輸出電極製作步驟的示意圖。 第8圖：本發明之過電壓保護元件之製造方法的第六實 施例所製得之過電壓保護元件的結構圖。 【主要元件符號說明】 —15 — 201205606 〔本發明〕 1 基板 2 輸入電極 3 輸出電極 4 變阻材料驅動層 41 金屬氧化物層 41a 第一金屬氧化物層 41b 第二金屬氧化物層 42 金屬導電層 w 間距 〔先前技術〕 91 基板 92 訊號導電層 93 可變阻抗材料層 94 接地導電層 95 基板 96 訊號導電層 97 接地導電層 98 可變阻抗材料層 D1 間距 D2 間距First Embodiment Second Embodiment Third Embodiment Fourth Embodiment Fifth Embodiment Sixth Embodiment Input Electrode Layer and Output Electrode Layer Thickness (^m) 10 10 10 10 10 10 First Metal Oxide Layer Thickness ( ^m) - - 3 5 0.5 1 Metal Conductive Layer Thickness (ym) - 2 5 1 2 Second Metal Oxide Layer Thickness (ym) - 0.5 1 Variable Resistance Material Drive Layer Thickness ( #m) 8 5 5 10 2 4 Particle size of the varistor drive layer (nm) 2 2 1 1 1 1 The proportion of metal in the varistor drive layer ( 30 20 - - 13 - 201205606 %) Crash voltage (V ) 150 200 150 200 150 150 As described above, the input electrode fabrication step, the output electrode fabrication step, and the varistor material drive layer fabrication step sequence in the method of manufacturing the overvoltage protection device of the present invention can be appropriately adjusted according to the type of the voltage protection component, and can still be achieved. The invention improves the effect of protecting the components. The method for manufacturing the overvoltage protection device of the present invention is to form the varistor driving layer by metal deposition and metal oxide in a thin film deposition manner to reduce the material particles in the driving layer of the varistor material, thereby improving the varistor material. The energy absorbed by the drive unit per unit volume. The method for manufacturing the overvoltage protection device of the present invention is to reduce the thickness of the varistor driving layer by forming the varistor driving layer by metal and metal oxide in a thin film deposition manner, thereby reducing the varistor driving layer. Crashing the voltage and improving the protection of the components. Although the present invention has been disclosed by the above-described preferred embodiments, it is not intended to limit the invention, and anyone skilled in the art can be without departing from the spirit and scope of the present invention. The various modifications and variations of the above-described embodiments are still within the technical scope of the present invention. The scope of the present invention is defined by the scope of the appended claims. [Simplified description of the 囷 type] Fig. 1 is a schematic view showing a manufacturing method of a conventional laminated overvoltage protection element. 201205606 Figure 2: Schematic diagram of a conventional method of manufacturing a single-layer overvoltage protection device. Fig. 3 is a view showing the first embodiment of the method for manufacturing an overvoltage protection element of the present invention. Fig. 4 is a view showing a second embodiment of a method of manufacturing an overvoltage protection element of the present invention. Fig. 5 is a view showing a third embodiment of a method of manufacturing an overvoltage protection element of the present invention. Fig. 6 is a view showing the fourth embodiment of the method for manufacturing an overvoltage protection element of the present invention. Fig. 7a is a view showing the steps of fabricating the input electrode of the fifth embodiment of the method for manufacturing an overvoltage protection element of the present invention. Fig. 7b is a view showing a fifth embodiment of the method for manufacturing an overvoltage protection element of the present invention to form a first metal oxide layer. Fig. 7c is a view showing a fifth embodiment of the method for manufacturing an overvoltage protection element of the present invention which forms a metal conductive layer. Fig. 7d is a schematic view showing the fifth embodiment of the method for producing an overvoltage protection element of the present invention. Fig. 7e is a view showing the steps of fabricating the output electrode of the fifth embodiment of the method for manufacturing an overvoltage protection element of the present invention. Fig. 8 is a view showing the configuration of an overvoltage protection element obtained in the sixth embodiment of the method for manufacturing an overvoltage protection element of the present invention. [Description of main components] - 15 - 201205606 [Invention] 1 substrate 2 input electrode 3 output electrode 4 varistor material drive layer 41 metal oxide layer 41a first metal oxide layer 41b second metal oxide layer 42 metal conductive Layer w Spacing [Prior Art] 91 Substrate 92 Signal Conductive Layer 93 Variable Impedance Material Layer 94 Ground Conductive Layer 95 Substrate 96 Signal Conductive Layer 97 Ground Conductive Layer 98 Variable Impedance Material Layer D1 Spacing D2 Spacing