201201502 六、發明說明： 【發明所屬之技術領域】 本發明是有關於一種驅動方法，特別是指一種應用於 馬達驅動裝置的驅動方法。 【先前技術】 參閱圖1及圖2，圖1為現今馬達系統900的電路示意 圖，該馬達系統900包含一馬達910、一磁電轉換器（例 如：霍爾元件）920及一馬達驅動裝置930。馬達910係為一 轉子（永久磁鐵）911及定子（線圈組）912的組合；磁電轉換器 920用以感應馬達910在運轉時磁極的變化並產生出一表示 S極磁極位置的第一感應訊號Vhl，及一表示N極磁極位置 的第二感應訊號Vh2，使得馬達驅動裝置930根據第一感應 訊號Vhl及第二感應訊號Vh2調整馬達910的驅動電流 Id ° 理想上，第一感應訊號Vhl及第二感應訊號vh2的貴201201502 VI. Description of the Invention: [Technical Field] The present invention relates to a driving method, and more particularly to a driving method applied to a motor driving device. [Prior Art] Referring to Figures 1 and 2, Figure 1 is a schematic circuit diagram of a prior art motor system 900 including a motor 910, a magnetoelectric transducer (e.g., a Hall element) 920, and a motor drive 930. The motor 910 is a combination of a rotor (permanent magnet) 911 and a stator (coil group) 912; the magnetoelectric converter 920 is used to sense the change of the magnetic pole of the motor 910 during operation and generate a first sensing signal indicating the position of the S pole. Vhl, and a second sensing signal Vh2 indicating the position of the N-pole magnetic pole, so that the motor driving device 930 adjusts the driving current Id ° of the motor 910 according to the first sensing signal Vhl and the second sensing signal Vh2. Ideally, the first sensing signal Vhl and The second induction signal vh2 is expensive
任週期（duty cycle)應皆為50%，即磁電轉換器920感應S 極及N極的時間應相同’如圖2之Vhl (ideal)及Vh2(ideal) 所示。但是實際上，磁電轉換器920感應出的第一感應訊 號Vh 1及第二感應訊號Vh2為高電位的時間並不相同，如 圖2之Vhl及Vh2所示，使得兩者所對應產生的驅動訊號 (圖2中係繪示第一感應訊號Vhl所對應產生的驅動訊號 Vd)的責任週期不相等’因此並無法正確的反應出轉子911 所在的位置，主要係有以下幾點原因： 1.由於製作上的誤差’轉子911的S極及N極的形 201201502 狀並非完全相同，使得磁電轉換器920對於s極以 及N極的磁電反應並不相等； 2. 轉子911上各個磁極的磁力強度（磁通量）亦並非完 全相同； 3. 磁電轉換器920會受外界電磁波干擾或者是磁場干 擾（尤其是線圈組所產生的磁場干擾），使其所感應 的感應訊號產生誤差；及 4. 磁電轉換器920因為組裝的關係而使其相對於轉子 911上各個磁極的位置或擺放方向並非完全一致。 如此將會造成馬達910在運轉時無法達到更高的效 率，且馬達驅動裝置930根據不相等的第一感應訊號VM 及第二感應訊號Vh2所產生的驅動電流Id並不均衡，會使 得馬達910產生不同程度及頻率的電磁波及噪音。 因此，若馬達驅動裝置930能將不相等的第一感應訊 號Vhl及第二感應訊號vh2進行補償，使得馬達9丨〇在正 向旋轉的時間與反向旋轉的時間相同，如此將可改善上述 習知技術所碰到的問題。 【發明内容】 因此，本發明之目的，即在提供一種可以提高馬達的 工作效率及降低馬達運作時的噪音的馬達驅動裝置。 於是，本發明馬達驅動裝置，係與一馬達及一磁電轉 換器配合使用。磁電轉換器根據馬達運作而產生一表示s 極磁極位置的第一感應訊號’及一表示N極磁極位置的第 二感應訊號，該馬達驅動裝置包含：一驅動單元、一比較 201201502 單元及一補償單元。 •驅動單元根據第一感應訊號及第二感應訊號對應產生 第驅動訊號及一第二驅動訊號以驅動該馬達運作；比 較單兀比較第一感應訊號及第二感應訊號之前一週期之間 的責任週期’以得到兩者的一責任週期差距；補償單元根 據該責任週期差距補償第一感應訊號及第二感應訊號其中 責任週期較小者之下一週期的責任週期。 馬達驅動裝置可以「數位」的方式來實現，則較佳地 • 比較單元可包括一第一轉換電路、一第二轉換電路、一計 數電路及一減法電路。 第一轉換電路接收磁電轉換器產生的第一感應訊號， 並將該第一感應訊號轉換成數位形式的一第一數位訊號； 第二轉換電路接收磁電轉換器產生的第二感應訊號，並將 第一感應訊號轉換成數位形式的一第二數位訊號；計數電 路耦接於第一轉換電路及第二轉換電路，並針對第一數位 訊號及第二數位訊號的責任週期進行計數，以產生一第一 9 计數值及一第一计數值，減法電路耗接於計數電路，用以 將第一計數值及第二計數值相減而產生一表示責任週期差 距的計數差值。 較佳地，補償單元包括一相位調整模組、一第一 〇R閉 及一第二OR閘。相位調整模組耦接於減法電路，其根據計 數差值產生對應該計數差值的一第一補償訊號及一第二補 償訊號；第一 OR閘的兩輸入端分別耦接於第一轉換電路及 相位調整模組，且第一 OR閘的輸出端耦接於驅動單元，第 201201502 一 OR閘根據第-數位訊號及第_補償訊號輸出—供驅動單 元產生第-驅動訊號的第一輸出訊號；第二〇R閘的兩輸入 端分別麵接於轉換電路及相位調整模組，^第二〇r間的輸 出端耗接於驅動單元，第二〇R閘根據第二數位訊號及第二 補償訊號輸出-供驅動單元產生第二驅動訊號的第二輸出 訊號。 馬達驅動裝置也可以「類比」的方式來實現，則較佳 地比較單元可包括一第一峰值固定器、一第二峰值固定器 及一峰值比較器。第一峰值固定器偵測磁電轉換器產生的 第一感應訊號的波峰值；第二峰值固定器偵測磁電轉換器 產生的第二感應訊號的波峰值；峰值比較器耦接於第一峰 值固定器及第二峰值固定器，用以比較第一感應訊號的波 峰值及第·一感應§fl 5虎的波峰值之間的差異而產生一可補償 第一驅動訊號及第二驅動訊號其中之一的波峰差值。 較佳地，補償單元包括一類比訊號調整器、一第一轉 換電路、一第一轉換電路、一第一可變電阻組及一第二可 變電阻組。 類比訊號調整器根據峰值比較器輸出的波峰差值產生 一與第一感應訊號的波峰值有關的第一類比調整訊號，及 一與第二感應訊號的波峰值有關的第二類比調整訊號；第 一轉換電路接收磁電轉換器產生的第一感應訊號，並根據 一參考訊號將第一感應訊號轉換成數位形式的一第一數位 訊號；第二轉換電路接收磁電轉換器產生的第二感應訊 號，並根據該參考訊號將第二感應訊號轉換成數位形式的 201201502 一第二數位訊號；第一可變電阻組耦接於第一轉換電路， 並爻第一類比調整訊號而改變其電阻值，以對應改變第一 數位訊號；第二可變電阻組耦接於第二轉換電路，並受第 一類比調整sfl號而改變其電阻值，以對應改變第二數位訊 號。 馬達驅動裝置還可以結合「數位」及「類比」的方式 來實現’則較佳地比較單元可包括一第一轉換電路、一第 二轉換電路、一計數電路及一減法電路。 • 第一轉換電路接收磁電轉換器產生的第一感應訊號， 並將§亥第一感應机號轉換成數位形式的一第一數位訊號； 第二轉換電路接收磁電轉換器產生的第二感應訊號，並將 第二感應訊號轉換成數位形式的一第二數位訊號；計數電 路耦接於第一轉換電路及第二轉換電路，並針對第一數位 成遽及第一數位乱號的責任週期進行計數，以產生一第一 計數值及一第二計數值；減法電路耦接於計數電路，用以 將第一 a十數值及第一什數值相減而產生一表示責任週期差 鲁 距的計數差值。 較佳地，補償單元包括一數位訊號調整、一第一可變 電阻組及一第二可變電阻組^數位訊號調整器耦接於減法 電路，其根據計數差值產生對應該計數差值的一第一數位 補償訊號及一第二數位補償訊號；第一可變電阻組耗接於 第一轉換電路，並受第一數位調整訊號而改變其電阻值， 以對應改變第一數位訊號；第二可變電阻組耦接於第二轉 換電路，並受第二數位調整訊號而改變其電阻值，以對應 201201502 改變第二數位訊號。 此外’本發明之另一目的，即在提供一種可以控制如 剛述馬達驅動裝置的馬達驅動方法。 於疋’本發明馬達驅動方法，係應用於一馬達驅動裝 置’該馬達驅動裝置係與一馬達及一磁電轉換器配合使 用磁電轉換器根據馬達運作而產生一表示s極磁極位置 的第一感應訊號，及一表示N極磁極位置的第二感應訊 號，馬達驅動裝置根據第一感應訊號及第二感應訊號驅動 馬達運作，該驅動方法包含以下步驟： (A) 比較第一感應訊號及第二感應訊號前一週期之間的 責任週期，以得到兩者的一責任週期差距； (B) 根據該責任週期差距，補償第一感應訊號及第二感 應訊號其中責任週期較小者之下一週期的責任週期。 若馬達驅動裝置係以「數位」的方式來實現，則較佳 地’步驟（A)包括以下子步驟： (A-1)分別將第一感應訊號及第二感應訊號轉換成數位 形式的一第一數位訊號及一第二數位訊號； (A-2)分別針對第—數位訊號及第二數位訊號的責任週 期進行計數，以產生-[計數值及__第二計數值；及 (A-3)將第-計數值及第二計數值相減而產生—表示第 -感應訊號及第二感應訊號之間責任週期差距的計數差 值。 較佳地，步驟（B)係根據該計數差值延長第一感庫％ 及第二感應訊號其中責任週期較小者之下一週期的責任週 201201502 期。 若馬達驅動裝置係以「類比」的方式來實現，則較佳 地’步驟（A)係將第一感應訊號的波峰值及第二感應訊號的 波峰值相減以產生一表示第一感應訊號及第二感應訊號之 間責任週期差距的波峰差值。 較佳地’步驟（B)係根據該波峰差值拉升第一感應訊號 及第二感應訊號其中波峰值較小者的波峰值。 本發明之功效在於’透過馬達驅動裝置對磁電轉換器 所感應出的第一感應訊號及第二感應訊號進行補償，使得 馬達的工作效率及使用壽命可以提升，且同時降低馬達運 作時所產生的電磁波及噪音。 【實施方式】 有關本發明之前述及其他技術内容、特點與功效，在 以下配合參考圖式之三個較佳實施例的詳細說明中，將可 清楚的呈現。 在本發明被詳細描述之前，要注意的是，在以下的說 明内容中，類似的元件是以相同的編號來表示。 參閱圖3，為本發明馬連驅動裝置之第一較佳實施例， »亥馬達驅動裝置3〇係與一馬達1〇、一磁電轉換器2〇及一 切換單元40配合使用。在本實施例中，磁電轉換器可 為一霍爾tl件，其根據馬達1〇運轉時磁極的變化而感應出 一表不S極磁極位置的第—感應訊號νΜ，及一表示n極 磁極位置的第二感應訊冑Vh2。本實施例之馬達驅動裝置 3〇係將磁電轉換器2〇受到製程及外界等因素影響而感應出 201201502 不相等的第一感應訊號Vhl及第二感應訊號Vh2進行補 償’使得馬達10在正向旋轉的時間與反向旋轉的時間相 同’以it升馬達10的工作效率及使用哥命’減少馬達1〇 運轉時產生的噪音。 配合參閱圖4，馬達驅動裝置30包括一比較單元31、 一補償單元32及一驅動單元33。比較單元31耦接於磁電 轉換器20，用以接收第一感應訊號Vhi及第二感應訊號 Vh2並比較兩者之間責任週期的差距；補償單元32耦接於 比較單元31，用以補償第一感應訊號Vhl及第二感應訊號 Vh2其中責任週期較小者之責任週期；驅動單元33耦接於 補償單元32，用以根據第一感應訊號Vhl及第二感應訊號 Vh2而對應產生一第一驅動訊號vdl及一第二驅動訊號 Vd2，以驅動馬達1 〇運作。 簡單地說’本實施例的設計概念係先藉由比較單元3 i 比較出第一感應訊號Vhl及第二感應訊號Vh2之間責任週 期的差距，之後再透過補償單元32根據該差距去「延長」 第一感應訊號Vhl及第二感應訊號Vh2其中責任週期較小 者，以使得驅動單元33所輸出的第一驅動訊號vdl及第二 驅動訊號Vd2的責任週期相同（或接近）。 比較單元31包括一用以接收磁電轉換器2〇所感應出 的第一感應訊號Vhl的第一轉換電路311、一用以接收磁電 轉換器20所感應出的第二感應訊號vh2的第二轉換電路 312、一耦接於第一轉換電路311及第二轉換電路312的計 數電路313，及一耗接於計數電路313的減法電路314。 201201502 仙早元32包括-_於比較單元31的減法電路3i4 == 周整缝320、一第一則321及_第二⑽問 〇R閘321的兩輸入端分別柄接於第一轉換電路 311的輸出端及相位調整模組32〇的輸出端，且第一⑽閘 二的輪出端輕接於驅動單元33;第二⑽閘322的兩輸入 端刀別輕接於第二轉換電路312的輸出端及相位調整模組 的輸出端’且第二〇R間322的輸出端輕接於驅動單元 33 °The duty cycle should be 50%, that is, the time when the magnetoelectric converter 920 senses the S pole and the N pole should be the same as shown by Vhl (ideal) and Vh2 (ideal) in FIG. However, in actuality, the time when the first inductive signal Vh 1 and the second inductive signal Vh2 induced by the magnetoelectric converter 920 are at a high potential are not the same, as shown by Vhl and Vh2 in FIG. 2, so that the driving corresponding to the two is generated. The signal (in Figure 2 shows that the duty cycle of the drive signal Vd corresponding to the first inductive signal Vhl) is not equal. Therefore, the position of the rotor 911 cannot be correctly reflected. The main reasons are as follows: 1. Due to the error in fabrication, the shape of the S pole and the N pole of the rotor 911 is not exactly the same, so that the magnetoelectric response of the magnetoelectric converter 920 to the s pole and the N pole is not equal; 2. The magnetic strength of each magnetic pole on the rotor 911 (magnetic flux) is not exactly the same; 3. The magnetoelectric converter 920 is subject to external electromagnetic wave interference or magnetic field interference (especially the magnetic field interference generated by the coil group), causing errors in the induced sensing signals; and 4. Magnetoelectric conversion The 920 is not completely aligned with respect to the position or placement direction of the respective magnetic poles on the rotor 911 due to the assembly relationship. This will cause the motor 910 to fail to achieve higher efficiency during operation, and the driving current Id generated by the motor driving device 930 according to the unequal first sensing signal VM and the second sensing signal Vh2 is not balanced, so that the motor 910 is caused. Generate electromagnetic waves and noise of varying degrees and frequencies. Therefore, if the motor driving device 930 can compensate the unequal first sensing signal Vhl and the second sensing signal vh2, the time of the motor 9 丨〇 in the forward rotation is the same as the time of the reverse rotation, which will improve the above. Problems encountered by conventional techniques. SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a motor driving device that can improve the operating efficiency of a motor and reduce noise during motor operation. Thus, the motor driving device of the present invention is used in conjunction with a motor and a magnetoelectric converter. The magnetoelectric converter generates a first sensing signal indicating a position of the s pole pole and a second sensing signal indicating a position of the magnetic pole of the N pole according to the operation of the motor. The motor driving device comprises: a driving unit, a comparison unit 201201502 unit and a compensation unit. The driving unit generates a driving signal and a second driving signal according to the first sensing signal and the second sensing signal to drive the motor to operate; comparing the responsibility of comparing the single sensing signal with the previous one of the first sensing signal and the second sensing signal The cycle 'obtains a duty cycle gap between the two; the compensation unit compensates the first inductive signal and the second inductive signal according to the gap of the duty cycle, wherein the duty cycle of the lower cycle of the duty cycle is smaller. The motor driving device can be implemented in a "digital" manner. Preferably, the comparing unit can include a first converting circuit, a second converting circuit, a counting circuit and a subtracting circuit. The first conversion circuit receives the first sensing signal generated by the magnetoelectric converter, and converts the first sensing signal into a first digital signal in the form of a digit; the second converting circuit receives the second sensing signal generated by the magnetoelectric converter, and The first sensing signal is converted into a second digit signal in the form of a digit; the counting circuit is coupled to the first converting circuit and the second converting circuit, and counting the duty cycle of the first digital signal and the second digital signal to generate a The first 9 count value and a first count value are subtracted from the counting circuit for subtracting the first count value and the second count value to generate a count difference indicating a duty cycle gap. Preferably, the compensation unit comprises a phase adjustment module, a first 〇R closed and a second OR gate. The phase adjustment module is coupled to the subtraction circuit, and generates a first compensation signal and a second compensation signal corresponding to the difference between the counts according to the difference value; the two input ends of the first OR gate are respectively coupled to the first conversion circuit And a phase adjustment module, wherein the output end of the first OR gate is coupled to the driving unit, and the 201201502 an OR gate is output according to the first-digit signal and the _compensation signal--the first output signal for the driving unit to generate the first driving signal The two input ends of the second R gate are respectively connected to the conversion circuit and the phase adjustment module, wherein the output between the second port is consumed by the driving unit, and the second R gate is based on the second bit signal and the second Compensation signal output - a second output signal for the driving unit to generate a second driving signal. The motor drive can also be implemented in an "analog" manner. Preferably, the comparison unit can include a first peak holder, a second peak holder, and a peak comparator. The first peak fixture detects the peak value of the first sensing signal generated by the magnetoelectric converter; the second peak fixture detects the peak value of the second sensing signal generated by the magnetoelectric converter; and the peak comparator is coupled to the first peak fixed And a second peak fixture for comparing the difference between the peak value of the first sensing signal and the peak value of the first sensing §fl 5 tiger to generate a compensable first driving signal and a second driving signal The peak difference of one. Preferably, the compensation unit comprises an analog signal adjuster, a first conversion circuit, a first conversion circuit, a first variable resistance group and a second variable resistance group. The analog signal adjuster generates a first analog adjustment signal related to the peak value of the first inductive signal and a second analog adjustment signal related to the peak value of the second inductive signal according to the peak difference value of the peak comparator output; a conversion circuit receives the first sensing signal generated by the magnetoelectric converter, and converts the first sensing signal into a first digital signal in the form of a digit according to a reference signal; and the second converting circuit receives the second sensing signal generated by the magnetoelectric converter, And converting the second sensing signal into a digitized 201201502 second digit signal according to the reference signal; the first variable resistor group is coupled to the first conversion circuit, and the first analogy adjusts the signal to change the resistance value thereof, so as to Corresponding to changing the first digital signal; the second variable resistance group is coupled to the second conversion circuit, and is changed by the first analog adjustment sfl number to change the second digital signal. The motor driving device can also be implemented in combination with "digital" and "analog". The preferred comparing unit can include a first converting circuit, a second converting circuit, a counting circuit and a subtracting circuit. • The first conversion circuit receives the first inductive signal generated by the magnetoelectric converter, and converts the first inductive machine number into a first digit signal in the form of a digit; the second conversion circuit receives the second inductive signal generated by the magnetoelectric converter And converting the second sensing signal into a second digit signal in the form of a digit; the counting circuit is coupled to the first converting circuit and the second converting circuit, and performing the duty cycle for the first digit and the first digit chaotic number Counting to generate a first count value and a second count value; the subtraction circuit is coupled to the counting circuit for subtracting the first a ten value and the first even value to generate a count indicating the duty cycle difference Difference. Preferably, the compensation unit includes a digital signal adjustment, a first variable resistance group and a second variable resistance group digital signal adjuster coupled to the subtraction circuit, which generates a corresponding count difference according to the count difference value. a first digital compensation signal and a second digital compensation signal; the first variable resistance group is connected to the first conversion circuit, and is changed by the first digital adjustment signal to change the first digital signal; The two variable resistor groups are coupled to the second conversion circuit and are changed by the second digit adjustment signal to change the second digit signal corresponding to 201201502. Further, another object of the present invention is to provide a motor driving method which can control a motor driving device as just described. The motor driving method of the present invention is applied to a motor driving device. The motor driving device cooperates with a motor and a magnetoelectric converter to generate a first induction indicating the position of the s pole magnetic pole according to the operation of the motor. The signal, and a second sensing signal indicating the position of the N-pole, the motor driving device drives the motor according to the first sensing signal and the second sensing signal. The driving method comprises the following steps: (A) comparing the first sensing signal with the second The duty cycle between the previous periods of the inductive signal to obtain a duty cycle gap between the two; (B) compensate the first inductive signal and the second inductive signal according to the gap of the duty cycle, wherein the duty cycle is lower than the next cycle Cycle of responsibility. If the motor driving device is implemented in a "digital" manner, preferably the step (A) comprises the following sub-steps: (A-1) converting the first sensing signal and the second sensing signal into a digital form a first digital signal and a second digital signal; (A-2) counting the duty cycles of the first digital signal and the second digital signal respectively to generate -[count value and __second count value; and (A -3) Subtracting the first count value and the second count value to generate - a count difference indicating a duty cycle gap between the first sense signal and the second sense signal. Preferably, the step (B) extends the first sense database % and the second sense signal according to the count difference, wherein the duty cycle of the next cycle is less than the 201201502 period. Preferably, if the motor driving device is implemented in an "analog" manner, the step (A) subtracts the peak value of the first sensing signal and the peak value of the second sensing signal to generate a first sensing signal. And the peak difference of the duty cycle gap between the second inductive signals. Preferably, the step (B) is based on the peak difference to pull up the peak value of the first inductive signal and the second inductive signal, wherein the peak value is smaller. The function of the invention is to compensate the first inductive signal and the second inductive signal induced by the magnetoelectric converter through the motor driving device, so that the working efficiency and the service life of the motor can be improved, and at the same time, the motor is generated during operation. Electromagnetic waves and noise. The above and other technical contents, features and effects of the present invention will be apparent from the following detailed description of the preferred embodiments of the drawings. Before the present invention is described in detail, it is noted that in the following description, similar elements are denoted by the same reference numerals. Referring to Fig. 3, a first preferred embodiment of the horse-connected driving device of the present invention is used in conjunction with a motor 1 〇, a magnetoelectric converter 2 〇 and a switching unit 40. In this embodiment, the magnetoelectric converter can be a Hall tl device that induces a first sense signal ν 表 indicating the position of the S pole magnetic pole according to a change in the magnetic pole of the motor 1 〇, and an n pole magnetic pole The second sensing signal of the position is Vh2. In the motor driving device 3 of the present embodiment, the magnetoelectric converter 2 is affected by the process and the external factors to induce the 201201502 unequal first sensing signal Vhl and the second sensing signal Vh2 to compensate 'making the motor 10 in the forward direction The time of rotation is the same as the time of reverse rotation. 'The operating efficiency of the motor 10 and the use of the gods' reduce the noise generated when the motor is running. Referring to FIG. 4, the motor driving device 30 includes a comparing unit 31, a compensating unit 32, and a driving unit 33. The comparison unit 31 is coupled to the magnetoelectric converter 20 for receiving the first sensing signal Vhi and the second sensing signal Vh2 and comparing the difference of the duty cycle therebetween. The compensation unit 32 is coupled to the comparison unit 31 for compensation. a sensing period Vhl and a second sensing signal Vh2, wherein the first period of the duty cycle is the responsibility cycle; the driving unit 33 is coupled to the compensation unit 32 for generating a first corresponding signal according to the first sensing signal Vhl and the second sensing signal Vh2. The driving signal vdl and a second driving signal Vd2 are driven to drive the motor 1 〇. Briefly, the design concept of the present embodiment first compares the difference between the duty cycle between the first inductive signal Vhl and the second inductive signal Vh2 by the comparing unit 3 i, and then "expands" according to the gap by the compensating unit 32. The first sensing signal Vhl and the second sensing signal Vh2 have a smaller duty cycle, so that the duty cycles of the first driving signal vdl and the second driving signal Vd2 output by the driving unit 33 are the same (or close). The comparison unit 31 includes a first conversion circuit 311 for receiving the first sensing signal Vhl induced by the magnetoelectric converter 2, and a second conversion for receiving the second sensing signal vh2 induced by the magnetoelectric converter 20. The circuit 312 is coupled to the counting circuit 313 of the first converting circuit 311 and the second converting circuit 312, and a subtracting circuit 314 that is connected to the counting circuit 313. 201201502 仙早元32 includes -_ the subtraction circuit 3i4 of the comparison unit 31 == the circumferential groove 320, a first 321 and _ second (10), the two input ends of the R gate 321 are respectively connected to the first conversion circuit The output end of the 311 and the output end of the phase adjustment module 32〇, and the wheel end of the first (10) gate 2 is lightly connected to the driving unit 33; the two input ends of the second (10) gate 322 are lightly connected to the second conversion circuit The output end of the 312 and the output end of the phase adjustment module 'and the output end of the second 〇R 322 are lightly connected to the drive unit 33 °
以下將配合圖5之流程圖，詳細說明比較單元31比較 出一感應訊號Vhl、Vh2之間貴任週期的差距及補償單元 32係如何補償二感應訊號Vhl、Vh2的責任週期。 步驟sio，第一轉換電路311及第二轉換電路312分別 將第一感應訊號Vhl及第二感應訊號Vh2轉換成數位形式 的一第一數位訊號Vgl及一第二數位訊號Vg2。 在本實施例中’第一轉換電路311與第二轉換電路312 的電路相同且皆為比較器（comparator)，且配合參閱圖6， 以第一轉換電路311來說，其比較第一感應訊號Vhl與一 參考電壓Vref的電壓準位，若第一感應訊號Vhl的電壓大 於參考電壓Vref的電壓，則第一數位訊號Vgl為高電位 (digit one)，反之則為低電位（digit zero)。當然，第一轉換 電路3U與第二轉換電路M2也可以為不同電路，只要能將 第一感應訊號Vhl及第二感應訊號Vh2轉換成數位形式的 訊號即可。 步驟S20,計數電路313分別針對第一數位訊號Vgl 11 201201502 及第二數位訊號Vg2的責任週期進行計數，以產生一第一 β十數值Vt 1及一第二計數值vt2。計數電路313係為一數位 计數器（counter) ’且如圖6所示，其中係以第一數位訊號 Vgl的貴任週期大於第二數位訊號Vg2的責任週期為例， 因此’第一計數值Vtl會大於第二計數值vt2。 步驟S30，減法電路314將第一計數值Vtl及第二計數 值Vt2相減而產生一表示第一感應訊號VM及第二感應訊 號Vh2之間責任週期差距的計數差值Ver。 步驟S40，補償單元32的相位調整模組32〇根據計數 差值Ver產生對應計數差值Ver的一第一補償訊號Vcl及一 第二補償訊號Vc2。 步驟S50，第一 〇R閘321根據第一數位訊號Vgl及第 一補償訊號Vcl輸出一供驅動單元33產生驅第一動訊號 Vdl的第一輸出訊號V(^，且第二〇R閘322根據第二數位 汛號Vg2及第二補償訊號Vc2輸出一供驅動單元33產生第 二驅動訊號Vd2的第二輸出訊號v〇2。 如圖7所示，在單一週期中，由於第一數位訊號Vgi 的責任週期大於第二數位訊號Vg2的責任週期，因此，相 位調整模組320會對第二數位訊號Vg2進行補償（即延長其 為高電位的時間）。相位調整模組320根據計數差值Ver而 產生第一補償訊號Vc2，並於第二數位訊號Vg2從高電位 降至低電位時輸出，#第二數位訊號Vg2從高電位降至低 電位時’第二補償訊號Ve2從低電位升至高電位（時間⑺）， 使得第一 OR Ffl 321所輸出的第二輸出訊號v〇2可持續維持 12 201201502 在高電位（即t0至t2這段時間）， 一兩，Λ ;直幻第一補償訊號Vc2從 咼電位降至低電位。因此， ^ ^ , 補慣後的第一數位訊號Vg2(即 第一輸出訊號V〇2)的責>f壬柄童日m 週期（tM2)將相較於第二數位訊號 vg2的責任週期(U，為長。此外，因為第—數位訊號Vgi 不需要補償’故第-補償訊號Vcl會維持低電位（圖6)，使 得第-輸出訊號vol會與第一數位訊號Vgl相同。 相反地，右第-數位訊號Vgl的責任週期小於第二數 位訊號Vg2的責任週期，則相位調整模組320會對第-數 位訊號vgl進行補償。相位調整模组32〇根據計數差值· 而產生第一補償訊號Vcl，並於第一數位訊號^從高電 位降至低電位時輸出，即第—數位《 Vgl從高電位降至In the following, with reference to the flowchart of FIG. 5, the comparison unit 31 compares the difference between the noble periods of the inductive signals Vhl and Vh2 and how the compensation unit 32 compensates the duty cycles of the two inductive signals Vhl and Vh2. In the step sio, the first conversion circuit 311 and the second conversion circuit 312 respectively convert the first sensing signal Vhl and the second sensing signal Vh2 into a first digital signal Vgl and a second digital signal Vg2 in a digital form. In the present embodiment, the circuits of the first conversion circuit 311 and the second conversion circuit 312 are the same and are all comparators. Referring to FIG. 6 , the first conversion circuit 311 compares the first sensing signals. The voltage level of Vhl and a reference voltage Vref, if the voltage of the first sensing signal Vhl is greater than the voltage of the reference voltage Vref, the first digital signal Vgl is a digit one, and vice versa is a digit zero. Of course, the first conversion circuit 3U and the second conversion circuit M2 may be different circuits as long as the first sensing signal Vhl and the second sensing signal Vh2 can be converted into digital signals. In step S20, the counting circuit 313 counts the duty cycles of the first digital signal Vgl 11 201201502 and the second digital signal Vg2 to generate a first β-ten value Vt 1 and a second count value vt2. The counting circuit 313 is a digital counter and is shown in FIG. 6, wherein the duty cycle of the first digital signal Vgl is greater than the duty cycle of the second digital signal Vg2, so the first counting The value Vtl will be greater than the second count value vt2. In step S30, the subtraction circuit 314 subtracts the first count value Vtl and the second count value Vt2 to generate a count difference Ver indicating a duty cycle difference between the first sensing signal VM and the second sensing signal Vh2. In step S40, the phase adjustment module 32 of the compensation unit 32 generates a first compensation signal Vcl and a second compensation signal Vc2 corresponding to the count difference Ver according to the count difference Ver. In step S50, the first R gate 321 outputs a first output signal V (^, and the second R gate 322 for driving the first motion signal Vdl according to the first digital signal Vgl and the first compensation signal Vcl. And outputting, by the second digit apostrophe Vg2 and the second compensation signal Vc2, a second output signal v 〇2 for the driving unit 33 to generate the second driving signal Vd2. As shown in FIG. 7, in the single cycle, due to the first digital signal The duty cycle of the Vgi is greater than the duty cycle of the second digital signal Vg2. Therefore, the phase adjustment module 320 compensates the second digital signal Vg2 (i.e., extends the time when it is high). The phase adjustment module 320 is based on the difference value. Ver generates a first compensation signal Vc2, and outputs when the second digital signal Vg2 falls from a high potential to a low potential. When the second digital signal Vg2 falls from a high potential to a low potential, the second compensation signal Ve2 rises from a low potential. To the high potential (time (7)), the second output signal v〇2 output by the first OR Ffl 321 can be maintained for 12 201201502 at a high potential (ie, t0 to t2), one or two, Λ; Compensation signal Vc2 from 咼The bit is reduced to a low potential. Therefore, ^ ^ , the first digital signal Vg2 (ie, the first output signal V〇2) after the reciprocity is used, and the m-day period (tM2) will be compared to the second The duty cycle of the digital signal vg2 (U, is long. In addition, because the first-digit signal Vgi does not need to be compensated', the first-compensation signal Vcl will remain low (Fig. 6), so that the first-output signal vol will be the first digit. The signal Vgl is the same. Conversely, the duty cycle of the right first-digit signal Vgl is smaller than the duty cycle of the second digital signal Vg2, and the phase adjustment module 320 compensates the first-digit signal vgl. The phase adjustment module 32 The difference is generated by the first compensation signal Vcl, and is output when the first digital signal is lowered from a high potential to a low potential, that is, the first digit "Vgl is lowered from a high potential"
低電位時，第—補償訊冑Vel從低電位升至高電位，使第 —輸出訊號Vol的責任週期可被延長，而第二補償訊號 則維持在低電位。 特別說明的是，在本實施例中，第一補償訊號Vcl或 第二補償訊號Vc2為高電位的時間係為計數差值Vei>的1/N 倍，N為大於等於1之整數，也就是說在步驟S5〇中，第 一數位訊號Vgl及第二數位訊號Vg2其中責任週期較小者 之下一週期的責任週期將會被延長計數差值Ver的1/N倍， 而N值可由相關人員透過軟體等方式設定及更改，當然不 只如此，補償訊號為高電位的時間與計數差值Ver之間的關 係同樣可依不同需求而改變，但不以此為限。 步驟S60 ’驅動單元33將第一輸出訊號Vo 1及第二輸 出讯號V〇2進行轉換而對應產生第一驅動訊號vdl及第二 13 201201502 驅動訊號Vd2。 步驟S70，切換單元4〇根據第一驅動訊號德及第二 驅動afl號Vd2而產生可驅動馬達1Q運作的驅動電流μ，使 得下週期的第一感應訊號Vh2的責任週期可與下一週期 的第-感應訊號vhi的貴任週期相同（或接近），即馬達1〇 在正向旋轉（獲得正向驅動電流+Id)的時間與反向旋轉（獲得 反向驅動電流_ I d)的時間相同（或接近）。 換言之，馬達驅動裝置3G係以「數位」的方式對磁電 轉換器2G所感應的第—感應訊號VM及第二感應訊號衝 進订補償’其首先利用計數電路313言十數出第一數位訊號 vgi及第二數位訊號Vg2的責任週期（步驟S2〇)，再將兩者 相減以得知兩感應訊號之間責任週期的差距（步驟s3〇)，相 位調整模組320再根據該差距將第-數位訊號Vgl及第二 數位訊號Vg2之間責任週期較小者的責任週期延長(步驟 S40及S5G) ’使得第—輸出訊號Vg1的責任週期相同（或接 近）於第二輸出訊號v〇2的責任週期，進而使馬達ι〇在正向 旋轉的時間與反向旋轉的時間相同，以提升馬達1〇的工作 效率並降低其運作時產生的噪音。 此外，參閱圖7，相位調整模組32〇係以「延後（delay) 補償」的方式延長第二數位訊號Vg2的責任週期，即在第 一數位訊^ Vg2從高電位降至低電位後，再將第二補償訊 唬Vc2疊加至第二數位訊號Vg2而形成第二輸出訊號 Vo2。 可替換地，相位調整模組32〇也可以「提前…訂丨力補 14 201201502 償」的方式延長第二數位訊號Vg2的責任週期，如圖8所 不。同樣以上述的例子來說明，在單一週期中，第二數位 訊號Vg2的責任週期係小於第—數位訊號％的責任週 期’因此’相位調整模組320會控制第一數位訊號化從 高電位降至低電位時（時間⑴，）且經過一第一預定時間叫 後，將第二補償訊號Vc2從低電位升至高電位（時間⑴）， 使得第二輸出訊號v〇2從低電位升至高電位的時間點將會 早於第二數位訊號Vg2從低電位升至高電位的時間點，故 第二輸出訊號V〇2的責任週期（tl，_t2，）將會大於第二數位气 號Vg2的責任週期（t3_t2，），*第一補償訊號μ則在 低電位。 相反地，若第一數位訊號Vgl的責任週期小於第二數 位訊號Vg2的責任週期，則相位調整模組32〇會於第二數 位訊號Vg2從高電位降至低電位時且經過一第二預定時間 後，將第一補償訊號Vcl從低電位升至高電位，使得第一 數位訊號Vgl的責任週期可被延長，而此時的第二補償訊 號Vc2則維持在低電位。 〇在本實施例之設定中，第一預定時間tpl=(第二數位訊 號Vg2在單一週期中為低電位的時間一計數差值Ver)/N，N 為大於等於-之整數；同樣地，第二預定時間=(第一數位訊 號Vgl在單一週期中為低電位的時間一計數差值Ver)/N，N 為大於等於一之整數，但不以上述的設定為限。 此外，相位調整模組320也可以同時使用「延後補 償」及「提前補償」兩種方式進行補償，而細部的作動皆 15 201201502 與上述相同，故不多加贅述。 _㈤圖3及圖9’圖9為本發明馬達驅動裝置30之第 實施例’在本實施例中，馬達驅動裝置係以「類 =」的方式對磁電轉換器2G所感應㈣—感應訊號vm及 第一感應訊號Vh2進行補償。 馬達驅動裝置30同樣包括一比較單元31、一補償單元 32及一驅動單元33。 比較早兀31包括一耦接於磁電轉換器2〇的第一峰值 固定器315、一耦接於磁電轉換器2〇的第二峰值固定器 316,及一耦接於第一峰值固定器315及第二峰值固定器 316的峰值比較器31厂在本實施例中，第—峰值固定器 315與第一峰值固定器316相同且皆為低通濾波器pass filter)、整流器、峰值價測器（peak detect〇r)及峰值保持電路 (peak & hold circuit)其中之一，但不以此為限。 補償單元32包括-純於峰值比較器317的類比訊號 調整器323、-用以接收磁電轉換器2〇 訊號糧的第-轉換電路324、一用以接收磁電轉換器^ 所產生的第二感應訊號Vh2的第二轉換電路325、一耦接於 第一轉換電路324的第一可變電阻組326，及一耦接於第二 轉換電路325的第二可變電阻組327。 第一可變電阻組326受類比訊號調整器323控制而改 變其電阻值，且其中包括一耦接於一供應電源Vdd與第一 轉換電路324(運算放大器）的非反向端之間的第一可變電阻 R1，及一耦接於第一轉換電路324的非反向端與地之間的 16 201201502 第二可變電阻R2;第二可變電阻組327同樣受類比訊號調 整器323控制而改變其電阻值，且其中包括一耦接於供應 電源Vdd與第二轉換電路325的反向端之間的第三可變電 阻R3，及一耦接於第二轉換電路325的反向端與地之間的 第四可變電阻R4。 接著配合參閱圖1 〇，詳細說明本實施例之馬達驅動裝 置30係如何補償第一感應訊號VM及第二感應訊號vh2， 以及各個電路元件的動作與功能。 • 步驟S81，第一峰值固定器315與第二峰值固定器316 分別接收第一感應訊號Vhl及第二感應訊號Vh2，並分別 债測第一感應訊號Vhl及第二感應訊號vh2的波峰值。 步驟S82，峰值比較器3 17比較第一感應訊號Vh 1的 波峰值及第二感應訊號Vh2的波峰值之間的差異而產生一 可補償第一驅動訊號Vdl及第二驅動訊號Vd2其中之一的 波峰差值Vper。 步驟S83，類比訊號調整器323根據峰值比較器317輸 • 出的波峰差值Vper產生與第一感應訊號Vhl的波峰值有關 的第一類比調整訊號Vacl ’及與第二感應訊號Vh2的波峰 值有關的第二類比調整訊號Vac2 〇 步驟S84，第一可變電阻組326與第二可變電阻組327 分別根據第一類比調整訊號Vac 1與第二類比調整訊號Vac2 而改變其本身的電阻值。 步驟S85，第一轉換電路324及第二轉換電路325分別 將第一感應訊號Vh 1及第二感應訊號Vh2轉換成數位形式 17 201201502 的第一數位訊號Vgl及第二數位訊號Vg2。 配合參閱圖11 ’以第二感應訊號Vh2的波峰值大於第 一感應訊號Vh 1的波峰值為例，在相同充電與放電速度的 情況下’第一轉換電路324所產生的第一數位訊號Vg 1的 責任週期會大於第二轉換電路325所產生的第二數位訊號At low potential, the first compensation signal Vel rises from a low potential to a high potential, so that the duty cycle of the first output signal Vol can be extended while the second compensation signal is maintained at a low potential. Specifically, in the present embodiment, the time when the first compensation signal Vcl or the second compensation signal Vc2 is at a high potential is 1/N times the count difference Vei>, and N is an integer greater than or equal to 1, that is, It is said that in step S5, the duty cycle of the first digital signal Vgl and the second digital signal Vg2, wherein the duty cycle is lower, will be extended by 1/N times of the count difference Ver, and the N value may be related. The setting and change of the person through the software, of course, not only that, the relationship between the time when the compensation signal is high and the difference of the count Ver can also be changed according to different needs, but not limited thereto. In step S60, the driving unit 33 converts the first output signal Vo 1 and the second output signal V〇2 to generate the first driving signal vdl and the second 13 201201502 driving signal Vd2. In step S70, the switching unit 4 generates a driving current μ that can drive the operation of the motor 1Q according to the first driving signal and the second driving afl number Vd2, so that the duty cycle of the first sensing signal Vh2 of the lower cycle can be compared with the next cycle. The noble period of the first-inductive signal vhi is the same (or close), that is, the time during which the motor 1 正向 is rotated in the forward direction (the forward drive current +Id is obtained) and the time of the reverse rotation (the reverse drive current _ I d is obtained) Same (or close). In other words, the motor driving device 3G rushes to the first sensing signal VM and the second sensing signal sensed by the magnetoelectric converter 2G in a "digital" manner. First, the first digital signal is counted by the counting circuit 313. The responsibility period of the vgi and the second digit signal Vg2 (step S2〇), and then subtracting the two to know the difference of the duty cycle between the two inductive signals (step s3〇), the phase adjustment module 320 according to the gap The duty cycle of the lesser duty cycle between the first bit signal Vgl and the second bit signal Vg2 is extended (steps S40 and S5G) 'so that the duty cycle of the first output signal Vg1 is the same (or close) to the second output signal v〇 The duty cycle of 2, in turn, causes the motor to rotate in the forward direction for the same amount of time as the reverse rotation to increase the efficiency of the motor 1 并 and reduce the noise generated during its operation. In addition, referring to FIG. 7, the phase adjustment module 32 extends the duty cycle of the second digital signal Vg2 by "delay compensation", that is, after the first digital signal Vg2 is lowered from a high potential to a low potential. Then, the second compensation signal Vc2 is superimposed to the second digital signal Vg2 to form a second output signal Vo2. Alternatively, the phase adjustment module 32 can also extend the duty cycle of the second digital signal Vg2 by "advance...preplenishing the power compensation 14 201201502 compensation", as shown in FIG. Similarly, in the above example, in a single cycle, the duty cycle of the second digital signal Vg2 is less than the duty cycle of the first digital signal. Therefore, the phase adjustment module 320 controls the first digital signal to be degraded from a high potential. After the low potential (time (1),) and after a first predetermined time, the second compensation signal Vc2 is raised from the low potential to the high potential (time (1)), so that the second output signal v 〇 2 rises from the low potential to the high potential. The time point will be earlier than the time when the second digit signal Vg2 rises from the low potential to the high potential, so the duty cycle (tl, _t2,) of the second output signal V〇2 will be greater than the duty cycle of the second digit gas number Vg2. (t3_t2,), * The first compensation signal μ is at a low potential. Conversely, if the duty cycle of the first digital signal Vgl is less than the duty cycle of the second digital signal Vg2, the phase adjustment module 32 〇 passes the second digital signal Vg2 from the high potential to the low potential and passes through a second predetermined After the time, the first compensation signal Vcl is raised from the low potential to the high potential, so that the duty cycle of the first digital signal Vgl can be extended, and the second compensation signal Vc2 at this time is maintained at a low potential. In the setting of the embodiment, the first predetermined time tpl=(the time when the second digit signal Vg2 is low in a single period - the count difference Ver) /N, N is an integer greater than or equal to -; similarly, The second predetermined time = (the time when the first digital signal Vgl is low in a single cycle - the count difference Ver) / N, N is an integer greater than or equal to one, but is not limited to the above setting. In addition, the phase adjustment module 320 can also use the "delay compensation" and "advance compensation" methods to compensate at the same time, and the details of the operation are the same as the above, and therefore will not be repeated. _ (5) FIG. 3 and FIG. 9' FIG. 9 is a first embodiment of the motor driving device 30 of the present invention. In the present embodiment, the motor driving device senses the magnetoelectric converter 2G in a "class=" manner (4) - the sensing signal vm And the first sensing signal Vh2 is compensated. The motor drive unit 30 also includes a comparison unit 31, a compensation unit 32 and a drive unit 33. The first peak holder 315 is coupled to the first peak holder 315 of the magnetoelectric converter 2 , the second peak holder 316 coupled to the magnetoelectric converter 2 , and the first peak holder 315 . And the peak comparator 31 of the second peak holder 316 is in the present embodiment, the first peak fixture 315 is the same as the first peak fixture 316 and both are low pass filters (pass filter), rectifiers, peak detectors (peak detect〇r) and peak hold circuit (peak & hold circuit), but not limited to this. The compensation unit 32 includes an analog signal adjuster 323 that is pure to the peak comparator 317, a first-to-conversion circuit 324 for receiving the magnetoelectric converter 2, and a second sensing for receiving the magnetoelectric converter. The second conversion circuit 325 of the signal Vh2, the first variable resistance group 326 coupled to the first conversion circuit 324, and the second variable resistance group 327 coupled to the second conversion circuit 325. The first variable resistor group 326 is controlled by the analog signal adjuster 323 to change its resistance value, and includes a first coupling between a supply power source Vdd and a non-inverting terminal of the first conversion circuit 324 (operational amplifier). A variable resistor R1, and a 16 201201502 second variable resistor R2 coupled between the non-inverting end of the first converting circuit 324 and the ground; the second variable resistor group 327 is also controlled by the analog signal adjuster 323 And changing the resistance value thereof, and including a third variable resistor R3 coupled between the supply power source Vdd and the opposite end of the second conversion circuit 325, and a reverse end coupled to the second conversion circuit 325 The fourth variable resistor R4 is connected to the ground. Referring to FIG. 1 , a detailed description of how the motor driving device 30 of the present embodiment compensates for the first sensing signal VM and the second sensing signal vh2, and the operation and function of each circuit component. In step S81, the first peak fixture 315 and the second peak fixture 316 respectively receive the first sensing signal Vhl and the second sensing signal Vh2, and respectively measure the peak values of the first sensing signal Vhl and the second sensing signal vh2. In step S82, the peak comparator 3 17 compares the difference between the peak value of the first sensing signal Vh 1 and the peak value of the second sensing signal Vh2 to generate one of the first driving signal Vd1 and the second driving signal Vd2. The peak difference Vper. In step S83, the analog signal adjuster 323 generates a first analog adjustment signal Vacl ' and a peak value of the second inductive signal Vh2 related to the peak value of the first inductive signal Vhl according to the peak difference Vper outputted by the peak comparator 317. The second analog-type adjustment signal Vac2, in step S84, the first variable resistance group 326 and the second variable resistance group 327 respectively change the resistance value according to the first analog adjustment signal Vac 1 and the second analog adjustment signal Vac2. . In step S85, the first converting circuit 324 and the second converting circuit 325 respectively convert the first sensing signal Vh 1 and the second sensing signal Vh2 into the first digital signal Vgl and the second digital signal Vg2 of the digital form 17 201201502. Referring to FIG. 11 ' taking the peak value of the second inductive signal Vh2 greater than the peak value of the first inductive signal Vh 1 as an example, the first digit signal Vg generated by the first converting circuit 324 in the case of the same charging and discharging speed The duty cycle of 1 is greater than the second digit signal generated by the second conversion circuit 325
Vg2的責任週期。因此配合參閱圖12’峰值比較器317在 比較出第一感應訊號Vh 1與第二感應訊號vh2之間波峰值 的差異後（步驟S82) ’類比訊號調整器323會根據波峰差值Vg2's responsibility cycle. Therefore, referring to FIG. 12' peak comparator 317, after comparing the difference between the peak values of the first sensing signal Vh 1 and the second sensing signal vh2 (step S82), the analog signal adjuster 323 is based on the peak difference.
Vper降低第一可變電阻組326中第一可變電阻R1的電阻值 (步驟S83及S84)’使得第一感應訊號Vhl的波峰值上升 (如圖12之虛線所示），故第一轉換電路324所產生的第一 數位訊號Vg 1的責任週期將會被增加，如此將可與第二數 位訊號Vg2的責任週期相同（或接近），以達到使馬達1〇在 正向旋轉的時間與反向旋轉的時間相同之目的。 特別說明的是，在本實施例中，第一轉換電路324及 第二轉換電路325與第一較佳實施例的第一轉換電路3丨丨及 第二轉換電路312相同，以第一轉換電路324來說，同樣 是將第一感應訊號Vhl與一參考電壓Vref進行比較，若第 一感應訊號Vhl的電壓大於參考電壓Vref的電壓，則第一 數位訊號Vgi為高電位（digit one)，反之則為低電位 zero) ° 步驟S86，驅動單元33將第一數位訊號Vgl及第二數 位訊號Vg2進行轉換而對應產生第一驅動訊號vdi及第二 驅動訊號Vd2。 18 201201502 步驟S87，切換單元40根據第一驅動訊號Vd 1及第二 驅動訊號Vd2而產生可驅動馬達1〇運作的驅動電流Id，使 得下一週期的第二感應訊號Vh2的責任週期可與下一週期 的第一感應ifl號Vh 1的責任週期相同（或接近）。本實施例之 步驟S86及S87與第一較佳實施例之步驟S6〇及S7〇(圖5) 相同，故不在贅述。 因此，本實施例之馬達驅動裝置30係直接針對類比形 式的第一感應訊號Vhl及第二感應訊號Vh2進行比較與補 償，之後才將第一感應訊號Vhl及第二感應訊號Vh2轉換 成數位形式的第一數位訊號Vg丨及第二數位訊號Vg2輸 出；而第一較佳實施例之馬達驅動裝置3〇係先將類比形式 的第一感應訊號Vhl及第二感應訊號Vh2轉換成數位形式 的第一數位訊號Vgl及第二數位訊號vg2，之後才針對第 一數位訊號Vgl及第二數位訊號vg2進行比較與補償，故 兩種方式皆可達成本發明之功效。 參閱圖3及圖13，圖13為本發明馬達驅動裝置之第三 較佳實施例’在本實施例中，馬達驅動裝置30係同時使用 「類比」及「數位」的方式對磁電轉換器20所感應的第一 感應訊號Vhl及第二感應訊號Vh2進行補償。 馬達驅動裝置30包括一比較單元31、一補償單元32 及一驅動單元33。 比較單元31包括一用以接收磁電轉換器2〇所產生的 第一感應说说Vh 1的第一轉換電路311、一用以接收磁電轉 換器20所產生的第二感應訊號Vh2的第二轉換電路312、 19 201201502 一耦接於第一轉換電路311及第二轉換電路312的計數電路 313’及一耦接於計數電路313的減法電路314。本實施例 之比較單元31與第一較佳實施例之比較單元31相同，故 不多加贅述。 補償單元32包括一數位訊號調整器328、一第一可變 電阻組329及一第二可變電阻組330。數位訊號調整器328 耦接於減法電路314，其根據計數差值Ver·產生對應計數差 值Ver的一第一數位補償訊號Vdcl及一第二數位補償訊號 Vdc2 ;第一可變電阻組329耦接於第一轉換電路311，並受 第一數位調整訊號Vdc 1而改變其電阻值，以對應改變第一 轉換電路311所輸出的第一數位訊號vgl ;第二可變電阻組 330耦接於第二轉換電路312’並受第二數位調整訊號vdc2 而改變其電阻值’以對應改變第二轉換電路312所輸出的 第二數位訊號Vdc2。 特別說明的是，第一可變電阻組329及第二可變電阻 組330係與第二較佳實施例之第一可變電阻組326及第二 可變電阻組327相同’差別僅在於本實施例的第一可變電 阻組329及第二可變電阻組330是受數位訊號調整器328 所輪出的數位訊號控制，而第二較佳實施例之第一可變電 阻組326及第二可變電阻組327是受類比訊號調整器323 所輸出的類比訊號控制。 因此’第一感應訊號Vhl與第二感應訊號Vh2藉由第 一轉換電路311與第二轉換電路312轉換成第一數位訊號 vgl與第二數位訊號Vg2後’計數電路313及減法電路314 20 201201502 會計算出兩者之間責任週期的差距（即計數差值Ver)，之後 再透過數位訊號調整器328根據計數差值Ver改變第—可變 電阻組329及第二可變電阻組330的電阻值，如此同樣能 使得下一週期的第二感應訊號Vh2的貴任週期可與下一週 期的第一感應訊號Vhl的責任週期相同（或接近）。 综上所述，本發明馬達驅動裝置3〇藉由其中的比較單 元31及補償單元32針對磁電轉換器20所感應出的第一感 應訊號Vhl及第二感應訊號Vh2進行比較與補償，使得馬 達10在正向旋轉的時間可與在反向旋轉的時間相同（或接 近）’如此將可提升馬達1〇的工作效率及使用壽命，並且減 少電磁波的產生及運作時產生的噪音，故確實能達成本發 明之目的。 惟以上所述者，僅為本發明之較佳實施例而已，當不 能以此限定本發明實施之範圍，即大凡依本發明中請專利 範圍及發明說明内容所作之簡單的等效變化與修飾，皆仍 屬本發明專利涵蓋之範圍内。 【圖式簡單說明】 圖1是說明現今馬達系統的示意圖； 圖2是說明現今磁電轉換器所感應出的第一感應訊號 及第二感應訊號的波形圖； ”圖3是說明本發明馬達驅動裝置係與馬達、磁電轉換 器及切換單元配合的整體示意圖； 圖4是說明本發明馬達驅動裝置之第一較佳實施例的 電路方塊圖； 21 201201502 圖5 運作的流 路所輪出 甘 疋說明第一較佳實施例之馬達驅動裝置驅動馬達 程圖； 疋說明第一較佳實施例之馬達驅動裝置中各個電 的訊號的波形圖； 疋說明第一較佳實施例之相位調整模組係以「延 後」補償的方式對第二數位訊 號進行補償； 此 疋說明第一較佳實施例之相位調整模組係以「提 」補償的方式對第二數位訊號進行補償； 疋說明本發明馬達驅動裝置之第二較佳實施例的 電路方塊圖； 圖〇疋說明第二較佳實施例之馬達驅動裝置驅動馬達 運作的流程圖； 圖11疋說明第二較佳實施例之第—感應訊號、第二感 應訊號、第：數位訊號及第二數位訊號的波形圖； 圖7C說明第一較佳實施例之第一感應訊號與第一數 位訊號在補償前後的波形圖；及 圖&說明本發明馬達驅動裝置之第三較佳實施例的 電路方塊圖。 22 201201502 【主要元件符號說明】 S10〜S70步驟 320 ···· …·相位調整模組 S81- -S87步驟 321 ··· …·第一 OR閘 10··· ……馬達 322 ·_·. …第二OR閘 20.·· ……磁電轉換器 323… …·類比訊號調整器 30..· ……馬達驅動裝置 324… •…第一轉換電路 31.·· ......比較單元 325… •…第二轉換電路 311 · ……第一轉換電路 326… •…第一可變電阻組 312 · ……第二轉換電路 327… •…第二可變電阻組 313 · ……計數電路 328… •…數位訊號調整器 314 · ……減法電路 329… •…第一可變電阻組 315 · ……第一峰值固定器 330… …·第二可變電阻組 316 . ……第二峰值固定器 33••… …·驅動單元 317 · ......峰值比較器 40 •…切換單元 32··· ……補償單元 23Vper lowers the resistance value of the first variable resistor R1 in the first variable resistor group 326 (steps S83 and S84)' such that the peak value of the first inductive signal Vhl rises (as indicated by a broken line in FIG. 12), so the first conversion The duty cycle of the first digital signal Vg 1 generated by the circuit 324 will be increased, so that it can be the same (or close) to the duty cycle of the second digital signal Vg2, so as to achieve the time during which the motor 1 is rotated in the forward direction. The reverse rotation takes the same purpose. Specifically, in the present embodiment, the first conversion circuit 324 and the second conversion circuit 325 are the same as the first conversion circuit 3A and the second conversion circuit 312 of the first preferred embodiment, with the first conversion circuit 324, the first sensing signal Vhl is also compared with a reference voltage Vref. If the voltage of the first sensing signal Vhl is greater than the voltage of the reference voltage Vref, the first digital signal Vgi is digit one, and vice versa. In the step S86, the driving unit 33 converts the first digital signal Vgl and the second digital signal Vg2 to generate the first driving signal vdi and the second driving signal Vd2. 18 201201502 Step S87, the switching unit 40 generates a driving current Id that can drive the motor 1〇 according to the first driving signal Vd 1 and the second driving signal Vd2, so that the duty cycle of the second sensing signal Vh2 of the next cycle can be compared with The duty cycle of the first induction ifl number Vh 1 of one cycle is the same (or close). Steps S86 and S87 of this embodiment are the same as steps S6 and S7 (Fig. 5) of the first preferred embodiment, and therefore are not described again. Therefore, the motor driving device 30 of the present embodiment directly compares and compensates the first sensing signal Vhl and the second sensing signal Vh2 of the analog form, and then converts the first sensing signal Vhl and the second sensing signal Vh2 into a digital form. The first digital signal Vg 丨 and the second digital signal Vg2 are output; and the motor driving device 3 of the first preferred embodiment first converts the analog first form signal Vhl and the second sensing signal Vh2 into a digital form. The first digital signal Vgl and the second digital signal vg2 are compared and compensated for the first digital signal Vgl and the second digital signal vg2, so both methods can achieve the effect of the invention. Referring to FIG. 3 and FIG. 13, FIG. 13 is a third preferred embodiment of the motor driving device of the present invention. In the embodiment, the motor driving device 30 uses the analogy and the "digital" method simultaneously to the magnetoelectric converter 20. The induced first sensing signal Vhl and the second sensing signal Vh2 are compensated. The motor driving device 30 includes a comparing unit 31, a compensating unit 32, and a driving unit 33. The comparing unit 31 includes a first converting circuit 311 for receiving the first sensing theory Vh 1 generated by the magnetoelectric converter 2〇, and a second converting circuit for receiving the second sensing signal Vh2 generated by the magnetoelectric converter 20. The circuit 312, 19 201201502 is coupled to the counting circuit 313' of the first converting circuit 311 and the second converting circuit 312 and a subtracting circuit 314 coupled to the counting circuit 313. The comparison unit 31 of this embodiment is the same as the comparison unit 31 of the first preferred embodiment, and therefore will not be described again. The compensation unit 32 includes a digital signal adjuster 328, a first variable resistor group 329 and a second variable resistor group 330. The digital signal adjuster 328 is coupled to the subtraction circuit 314, which generates a first digital compensation signal Vdcl and a second digital compensation signal Vdc2 corresponding to the count difference Ver according to the count difference Ver·; the first variable resistance group 329 is coupled. Connected to the first conversion circuit 311, and changed by the first digital adjustment signal Vdc 1 to change the first digital signal vgl outputted by the first conversion circuit 311; the second variable resistance group 330 is coupled to The second conversion circuit 312' is changed by the second digit adjustment signal vdc2 to change the resistance value 'to change the second digit signal Vdc2 output by the second conversion circuit 312. Specifically, the first variable resistor group 329 and the second variable resistor group 330 are the same as the first variable resistor group 326 and the second variable resistor group 327 of the second preferred embodiment. The only difference is that The first variable resistor group 329 and the second variable resistor group 330 of the embodiment are controlled by digital signals rotated by the digital signal adjuster 328, and the first variable resistor group 326 and the second preferred embodiment. The two variable resistor group 327 is controlled by analog signals output by the analog signal adjuster 323. Therefore, the first sensing signal Vhl and the second sensing signal Vh2 are converted into the first digital signal vgl and the second digital signal Vg2 by the first converting circuit 311 and the second converting circuit 312, and then the 'counting circuit 313 and the subtracting circuit 314 20 201201502 The difference between the duty cycles between the two is calculated (i.e., the count difference Ver), and then the resistance values of the first variable resistor group 329 and the second variable resistor group 330 are changed by the digital signal adjuster 328 according to the count difference Ver. Therefore, the noble period of the second inductive signal Vh2 of the next cycle can be the same (or close to) as the duty cycle of the first inductive signal Vhl of the next cycle. In summary, the motor driving device 3 of the present invention compares and compensates the first inductive signal Vhl and the second inductive signal Vh2 induced by the magnetoelectric converter 20 by the comparing unit 31 and the compensating unit 32, so that the motor 10 The time of forward rotation can be the same as (or close to) the time of reverse rotation. This will improve the working efficiency and service life of the motor 1〇, and reduce the noise generated during the generation and operation of electromagnetic waves. The object of the invention is achieved. However, the above is only the preferred embodiment of the present invention, and the scope of the invention is not limited thereto, that is, the simple equivalent change and modification according to the scope of the patent and the description of the invention in the present invention. All remain within the scope of the invention patent. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram showing a current motor system; FIG. 2 is a waveform diagram showing first and second sensing signals induced by a magnetoelectric converter; FIG. 3 is a diagram showing the motor driving of the present invention. Figure 4 is a block diagram showing the circuit of the first preferred embodiment of the motor driving device of the present invention; 21 201201502 Figure 5 The flow path of the operation is rotated A motor drive device driving motor diagram of the first preferred embodiment; a waveform diagram of each electric signal in the motor driving device of the first preferred embodiment; and a phase adjustment module of the first preferred embodiment; The second digital signal is compensated in the manner of "delayed" compensation; therefore, the phase adjustment module of the first preferred embodiment compensates the second digital signal by means of "lifting" compensation; BRIEF DESCRIPTION OF THE DRAWINGS FIG. 2 is a circuit block diagram showing a second preferred embodiment of a motor driving device; FIG. FIG. 11 is a waveform diagram showing the first sensing signal, the second sensing signal, the third digit signal, and the second digit signal of the second preferred embodiment; FIG. 7C illustrates the first sensing of the first preferred embodiment. A waveform diagram of the signal and the first digit signal before and after compensation; and a diagram illustrating a circuit of the third preferred embodiment of the motor driving apparatus of the present invention. 22 201201502 [Description of main component symbols] S10~S70 Step 320 ······ Phase adjustment module S81--S87 Step 321 ·····First OR gate 10···...Motor 322 ·_·. ...the second OR gate 20...·...the magnetoelectric converter 323...the analog signal regulator 30........the motor drive device 324...the first conversion circuit 31.··...comparison Unit 325...•...second conversion circuit 311·...first conversion circuit 326...•...first variable resistance group 312·...second conversion circuit 327...•...second variable resistance group 313·...count Circuit 328...•...Digital signal adjuster 314·...subtraction circuit 329...•...first variable resistor group 315·...first peak fixture 330...the second variable resistor group 316.......second Peak holder 33••... drive unit 317·...peak comparator 40•...switch unit 32···...compensation unit 23