201140872 六、發明說明： [0001] 【發明所屬之技術領域】 本發明涉及一種半導體發光元件，特別涉及一種發光二 極體的封裝結構及其製造方法。 [0002] 【先前技術】 作為一種新興的光源，發光二極體憑藉其發光效率高、 體積小、重量輕、環保等優點，已被廣泛地應用到當前 的各個領域當中，大有取代傳統光源的趨勢。 0 [0003] 發光二極體是一種單向導通的電子元件，當經過發光二 極體的電流為正向導通時，可使發光二極體發光。當電 流反向時，發光二極體不能導通，並且若電流過大，有 可能擊穿發光二極體，使發光二極體不能再正常工作。 因此業界多有設置一穩壓二極體與發光二極體並聯，若 有異常的反向電流或靜電產生時，過高的反向電流可經 由該穩壓二極體進行放電，從而保護發光二極體不受到 破壞。目前業界採用打線外置固定的方式，將穩壓二極 ❹ 體與發光二極體並聯。然而，這種外置並聯的穩壓二極 體不但使發光二極體封裝的結構複雜、體積增大，而且 不能保證兩者的電連接的穩定性，這對於發光二極體的 後端使用都是不利因素。因此，業者對此問題多有關注 0 [0004] 【發明内容】 有鑒於此，有必要提供一種利於產業應用的發光二極體 封裝結構及其製造方法。 [0005] 一種發光二極體封裝結構，包括絕緣基板、發光二極體 099114911 表單編號A0101 第3頁/共15頁 0992026463-0 201140872 晶片及二電極層，該絕緣基板的一面上設有凹槽，該發 光二極體晶片設置於該凹槽中，二電極層置於絕緣基板 的所述一面上並分別與發光二極體晶片電性連接，該凹 槽底部設有與二電極層電性連接並與發光二極體晶片並 聯的基納二極體。 [0006] [0007] [0008] [0009] 099114911 一種發光二極體封裝結構的製造方法，其步驟包括：提 供一絕緣基板，該絕緣基板上設有一凹槽；在凹槽底部 設置一基納二極體；提供二電極層，該二電極層設置在 絕緣基板上，並且該二電極層分別與基納二極體電性連 接；提供一發光二極體晶片，該發光二極體晶片設置在 凹槽内與二電極層電性連接，並與基納二極體並聯。 與習知技術相比，本發明發光二極體封裝結構將基納二 極體設置在絕緣基板内，與發光二極體封裝構造一體化 ，可減少物料與人力成本。同時，内置的基納二極體由 於不需要外部打線與電極層形成電性連接，不僅提高基 納二極體與電極層的電性連接的穩定性，還可降低發光 二極體的封裝結構的複雜度。 【實施方式】 第一實施例 請參閱圖1，本發明第一實施例中的發光二極體封裝結構 包括一絕緣基板100，一發光二極體晶片110，一基納二 極體120及二電極層132、134。該基納二極體120設置在 絕緣基板100内並與二電極層132、134電性連接。該發 光二極體晶片110設置在絕緣基板100上並與二電極層 132、134電性連接，同時與基納二極體120並聯。當二 表單編號A0101 第4頁/共15頁 0992026463-0 201140872 電極層132、134與外部電源連接時，該發光二極體晶片 110正向導通後可發光。基納二極體120的極性與發光二 極體晶片110的極性相反，因此若有異常的反向電流或靜 電產生時，過高的反向電流可經由該基納二極體120進行 放電，從而保護發光二極體晶片110不被擊穿。 [0010] 具體的，該絕緣基板100具有一第一表面102及與第一表 面102相對的第二表面104。在第一表面102上形成有一 凹槽103。絕緣基板100可由如下材料中的一種或多種製 _ 成：矽（Si )、砷化鎵（GaAs)、氧化鋅（ZnO)及磷 〇 化銦（I nP )。 [0011] 該基納二極體120可由磊晶摻雜、擴散摻雜或者離子佈植 (I on- Imp lan tat ion )的方式形成在絕緣基板100的凹 槽103底部。該基納二極體120包括一第一電性摻雜層 122和一第二電性摻雜層124，第一電性摻雜層122設置 在第二電性摻雜層124之上。本實施例中，第一電性摻雜 層122為P型摻雜層，第二電性摻雜層124為N型摻雜層， 〇 可以理解地，在不同實施例中，該二電性摻雜層122、 124的形態可以互換，即第一電性摻雜層122亦可以是N型 推雜層。 [0012] 電極層132的一端與第一電性摻雜層122電性連接，且貼 設在凹槽103的側壁（未標示）及絕緣基板100的第一表 面102上。進一步的，該電極層132可彎折延伸至絕緣基 板100的第二表面104，使電極層132的另一端貼設在該 第二表面104上。另一電極層134的一端與第二電性摻雜 層124電性連接，且貼設在凹槽103的側壁（未標示）及 099114911 表單編號A0101 第5頁/共15頁 0992026463-0 201140872 絕緣基板100的第一表面102上。與電極層132類似，該 另一電極層134也可以彎折延伸至絕緣基板100的第二表 面104，使其另一端貼設在該第二表面104上。該二電極 層132、134的末端延伸至絕緣基板100的第二表面104上 ，可方便該發光二極體封裝結構直接與外部電源連接， 形成表面黏貼形態（SMD)。 [0013] [0014] [0015] [0016] [0017] [0018] 發光二極體晶片110具有兩個電極112、114，本實施例 中發光二極體晶片110以覆晶的形式設置在絕緣基板100 的凹槽103内，且電極112與電極層132電性連接，電極 114與電極層134電性連接。 本發明發光二極體封裝結構將基納二極體120設置在絕緣 基板100内，與發光二極體晶片110封裝構造一體化，可 減少物料與人力成本。同時，内置的基納二極體120由於 不需要外部打線與電極層132、134形成電性連接，不僅 提高基納二極體120與電極層132、134的電性連接的穩 定性，還可降低發光二極體的封裝結構的複雜度。 另外，由上述可知，由於絕緣基板100的非導電性，該發 光二極體封裝結構可直接形成表面黏貼形態，相對導電 基板而言，無需在基板上再增加一層絕緣材料，從而省 時省工。 第二實施例 基於絕緣基板100的非導電性，還可在絕緣基板100内設 置導電柱，增加導電路徑。 具體的，請參閱圖2，本發明第二實施例的發光二極體封 099114911 表單編號A0101 第6頁/共15頁 0992026463-0 201140872 Λ [0019] Ο 裝結構在絕緣基板100上設置貫穿第一表面1〇2與第一表 面104的複數通孔105，通孔105内填充金屬材料形成導 電柱150，導電枉150的上端與電極層132、134設置在第 一表面102上的部分電性連接，導電柱150的下端與電極 層132、134設置在第二表面1〇4上的部分電性連接。導 電柱150在絕緣基板100内的排列可有多種樣式，例如可 呈矩陣排列’也可呈兩列排列，或者還可呈無規則排列 ，導電柱150的數量也可視具體需求而變化。 導電柱1 5 0的設置不但可提供附加的導電路徑，避免因外 侧電極層剝落斷裂雨產生斷路，進雨提高可靠性，還可 以作為散熱途徑’提高發光二極體的散熱性能，延長使 用壽命。 [0020] 第三實施例 [0021] Ο 請參閱圖3，本發明第三實施例的發光二極體封裴結構與 第二實施例中的結構相似，也包括一絕緣基板2〇〇，一發 光二極體晶片210，·-基納二極體220及二電極層232、 .... ... ·'： .. ... 234。該基納二極體220包括設置在絕緣基板2〇〇内的一 第一電性摻雜層222和一第二電性摻雜層224，該第一電 性摻雜層222與電極層232電性連接，第二電性摻雜層 224與電極層234電性連接。該發光二極體晶片21〇設置 在絕緣基板200上並與二電極層232、234電性連接，同 時與基納二極體220並聯。絕緣基板2〇〇内設有貫穿其第 一表面202、第二表面204的通孔205，通孔205内形成導 電柱250。本實施例中的發光二極體封裝結構與上一實施 例中的相比，不同之處在於第一電性摻雜層222被第二電 099114911 表單編號Α0101 第7頁/共15頁 0992026463-0 201140872 [0022] [0023] [0024] [0025] [0026] 性摻雜層224包覆於其中。因此在絕緣基板200上延伸設 置有一絕緣層260，該絕緣層260置於第二電性掺雜層 224與電極層232之間。電極層232可藉由該絕緣層260與 第二電性摻雜層224電性隔絕，從而保證基納二極體22{) 與二電極層232、234的連接極性。 下面以本發明的第一實施例的發光二極體封裝結構為例 ’說明該發光二極體封裝結構的製造過程。 第一步驟，提供一絕緣基板1〇〇，該絕緣基板1〇〇可由如 下半導體材料中的一種或多種製成：矽（Si) '砷化鎵 (GaAs)、氧化鋅（Zn〇)及磷化銦（InP)。絕緣基板 100具有一第一表面1〇2和與第一表面1〇2相對的第二表 面104。利用黃光、微影蝕刻等技術在第二表面1〇4上形 成一凹槽103。 第二步驟，在凹槽1〇3底部以磊晶摻雜或者離子佈植的方 式形成弟一電性摻雜層12之與第二電姓摻雜層丨24，從而 在凹槽103内形成一基納二褚雔12〇。 第三步驟，將電極層132設置在絕緣基板1〇〇的第一表面 102上，使電極層132與第一電性掺雜層122電性連接， 與第二電性換雜層U4電性隔絕，並使電極層132延伸至 絕緣基板1〇〇的第二表面104上。將電極層134設置在絕 緣基板1〇〇的第-表面102上，使電極層134與第二電性 摻雜層124電性連接，並使電極層134延伸至絕緣基板 100的第二表面1〇4上。 最後將發光二極體晶片1㈣覆晶的形式與二電極層132 099114911 表單.编號A0101 第8頁/共15頁 0992026463-0 201140872 [0027] [0028]Ο [0029] Ο [0030] [0031] [0032] 、134電性連接，並與基納二極體120並聯。 第二實施例中的通孔105、導電柱150可在第一步驟時形 成。具體的，在絕緣基板100上形成貫穿第一、第二表面 102、104的複數通孔105。在絕緣基板100的通孔105内 填充導電金屬材料，形成導電柱150。金屬材料可為金 (Au)、銀（Ag)、銅（Cu)、鎳（Ni)、銘（Α1)、鈦（Ti)或 者這些金屬的合金。 第三實施例中的絕緣層2 6 0可在第二步驟時形成基納二極 體220後形成。具體的，在凹槽203底部上延伸形成一絕 緣層260，該絕緣層260覆蓋部分第二電性摻雜層224。 綜上所述，本發明確已符合發明專利之要件，遂依法提 出專利申請。惟，以上所述者僅為本發明之較佳實施方 式，自不能以此限制本案之申請專利範圍。舉凡熟悉本 案技藝之人士援依本發明之精神所作之等效修飾或變化 ，皆應涵蓋於以下申請專利範圍内。 【圖式簡單說明】 圖1為本發明第一實施例的發光二極體封裝結構的剖視示 意圖。 圖2為本發明第二實施例的發光二極體封裝結構的剖視示 意圖。 圖3為本發明第三實施例的發光二極體封裝結構的剖視示 意圖。 【主要元件符號說明】 絕緣基板：100、200 099114911 表單編號A0101 第9頁/共15頁 0992026463-0 [0033] 201140872 [0034]第一表面：102、202 [0035] 凹槽：1 0 3、2 0 3 [0036] 第二表面：104、204 [0037] 通孔：105、20 5 [0038] 發光二極體晶片：110、210 [0039] 電極：11 2、11 4 [0040] 基納二極體：120、220 [0041] 第一電性掺雜層：122、222 [0042] 第二電性摻雜層：124、224 [0043] 電極層：132、134、232、234 [0044] 導電柱：150、250 0992026463-0 099114911 表單編號A0101 第10頁/共15頁BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device, and more particularly to a package structure of a light emitting diode and a method of fabricating the same. [0002] As an emerging light source, the light-emitting diode has been widely used in various fields due to its advantages of high luminous efficiency, small size, light weight, environmental protection, etc., and has greatly replaced the conventional light source. the trend of. 0 [0003] A light-emitting diode is a one-way electronic component that allows a light-emitting diode to emit light when the current passing through the light-emitting diode is forward-conducting. When the current is reversed, the light-emitting diode cannot be turned on, and if the current is too large, it is possible to break through the light-emitting diode, so that the light-emitting diode can no longer operate normally. Therefore, in the industry, a voltage stabilizing diode is arranged in parallel with the light emitting diode. If an abnormal reverse current or static electricity is generated, an excessively high reverse current can be discharged through the voltage stabilizing diode, thereby protecting the light. The diode is not damaged. At present, the industry adopts a fixed external line method to connect the regulated two-pole body with the light-emitting diode. However, the externally connected voltage stabilizing diode not only makes the structure of the LED package complicated, increases in volume, but also cannot ensure the stability of the electrical connection between the two, which is used for the rear end of the LED. Both are unfavorable factors. Therefore, the practitioner pays much attention to this problem. [0004] [Invention] In view of the above, it is necessary to provide a light-emitting diode package structure and a method of manufacturing the same that are advantageous for industrial applications. [0005] A light-emitting diode package structure, comprising an insulating substrate, a light-emitting diode 099114911, a form number A0101, a third page, a total of 15 pages 0992026463-0 201140872 a wafer and a two-electrode layer, the insulating substrate is provided with a groove on one side thereof The light emitting diode chip is disposed in the recess, and the two electrode layers are disposed on the one side of the insulating substrate and electrically connected to the LED substrate, respectively, and the bottom of the recess is electrically connected to the second electrode layer A Zener diode connected and connected in parallel with the light emitting diode chip. [0007] [0009] [0009] [0009] 099114911 A method of manufacturing a light emitting diode package structure, the method comprising: providing an insulating substrate, the insulating substrate is provided with a groove; and a base is disposed at the bottom of the groove a two-electrode layer, the two-electrode layer is disposed on the insulating substrate, and the two electrode layers are respectively electrically connected to the base electrode; and a light-emitting diode chip is provided, and the light-emitting diode chip is disposed The second electrode layer is electrically connected in the groove and is connected in parallel with the base electrode. Compared with the prior art, the LED package structure of the present invention has a Zener diode disposed in an insulating substrate and integrated with the LED package structure, thereby reducing material and labor costs. At the same time, the built-in Zener diode not only needs external wiring to form an electrical connection with the electrode layer, but also improves the stability of the electrical connection between the Zener diode and the electrode layer, and also reduces the package structure of the LED. The complexity. [First Embodiment] Referring to FIG. 1 , a light emitting diode package structure according to a first embodiment of the present invention includes an insulating substrate 100 , a light emitting diode chip 110 , a Zener diode 120 , and two Electrode layers 132, 134. The Zener diode 120 is disposed in the insulating substrate 100 and electrically connected to the two electrode layers 132 and 134. The light-emitting diode chip 110 is disposed on the insulating substrate 100 and electrically connected to the two electrode layers 132 and 134 while being connected in parallel with the Zener diode 120. When the electrode layers 132, 134 are connected to an external power source, the light-emitting diodes 110 are illuminating. The polarity of the Zener diode 120 is opposite to the polarity of the LED wafer 110. Therefore, if an abnormal reverse current or static electricity is generated, an excessively high reverse current can be discharged through the Zener diode 120. Thereby, the light-emitting diode wafer 110 is protected from being broken down. [0010] Specifically, the insulating substrate 100 has a first surface 102 and a second surface 104 opposite to the first surface 102. A groove 103 is formed in the first surface 102. The insulating substrate 100 may be made of one or more of the following materials: germanium (Si), gallium arsenide (GaAs), zinc oxide (ZnO), and indium antimonide (I nP ). [0011] The Zener diode 120 may be formed on the bottom of the recess 103 of the insulating substrate 100 by epitaxial doping, diffusion doping, or ion implantation. The Zener diode 120 includes a first electrically doped layer 122 and a second electrically doped layer 124. The first electrically doped layer 122 is disposed over the second electrically doped layer 124. In this embodiment, the first electrically doped layer 122 is a P-type doped layer, and the second electrically doped layer 124 is an N-type doped layer. As can be understood, in different embodiments, the second electrical property The morphology of the doped layers 122, 124 may be interchanged, that is, the first electrically doped layer 122 may also be an N-type doping layer. One end of the electrode layer 132 is electrically connected to the first electrically doped layer 122, and is disposed on the sidewall (not labeled) of the recess 103 and the first surface 102 of the insulating substrate 100. Further, the electrode layer 132 can be bent and extended to the second surface 104 of the insulating substrate 100 such that the other end of the electrode layer 132 is attached to the second surface 104. One end of the other electrode layer 134 is electrically connected to the second electrically doped layer 124 and is attached to the sidewall of the recess 103 (not shown) and 099114911 Form No. A0101 Page 5 / Total 15 Page 0992026463-0 201140872 Insulation On the first surface 102 of the substrate 100. Similar to the electrode layer 132, the other electrode layer 134 may also be bent to extend to the second surface 104 of the insulating substrate 100 such that the other end thereof is attached to the second surface 104. The ends of the two electrode layers 132 and 134 extend to the second surface 104 of the insulating substrate 100, so that the LED package structure can be directly connected to an external power source to form a surface adhesion pattern (SMD). [0018] [0018] The light emitting diode wafer 110 has two electrodes 112, 114. In this embodiment, the light emitting diode wafer 110 is provided in the form of a flip chip in insulation. In the recess 103 of the substrate 100, the electrode 112 is electrically connected to the electrode layer 132, and the electrode 114 is electrically connected to the electrode layer 134. The light-emitting diode package structure of the present invention has the base body diode 120 disposed in the insulating substrate 100 and integrated with the package structure of the light-emitting diode wafer 110, thereby reducing material and labor costs. At the same time, the built-in Zener diode 120 not only needs to be electrically connected to the electrode layers 132 and 134 by external wires, but also improves the stability of the electrical connection between the Zener diode 120 and the electrode layers 132 and 134. Reduce the complexity of the package structure of the light-emitting diode. In addition, as can be seen from the above, due to the non-conductivity of the insulating substrate 100, the LED package structure can directly form a surface adhesion pattern, and the conductive substrate does not need to be further added with an insulating material on the substrate, thereby saving time and labor. . Second Embodiment Based on the non-conductivity of the insulating substrate 100, a conductive post may be provided in the insulating substrate 100 to increase the conductive path. Specifically, referring to FIG. 2, the LED package of the second embodiment of the present invention is 099114911. Form No. A0101 Page 6 of 15 0992026463-0 201140872 Λ [0019] The mounting structure is provided on the insulating substrate 100. a surface 1 〇 2 and a plurality of through holes 105 of the first surface 104. The through holes 105 are filled with a metal material to form a conductive pillar 150. The upper end of the conductive cymbal 150 and the electrode layer 132, 134 are partially electrically connected to the first surface 102. Connected, the lower end of the conductive post 150 is electrically connected to the portion of the electrode layer 132, 134 disposed on the second surface 1〇4. The arrangement of the conductive pillars 150 in the insulating substrate 100 may be in various patterns, for example, may be arranged in a matrix, or may be arranged in two columns, or may be arranged in an irregular manner, and the number of the conductive pillars 150 may also vary depending on specific needs. The arrangement of the conductive column 150 can not only provide an additional conductive path, but also avoid the occurrence of an open circuit due to the peeling of the outer electrode layer, and the rain can improve the reliability, and can also serve as a heat dissipation path to improve the heat dissipation performance of the light-emitting diode and prolong the service life. . [0020] Third Embodiment [0021] Referring to FIG. 3, a light emitting diode sealing structure according to a third embodiment of the present invention is similar to the structure in the second embodiment, and includes an insulating substrate 2 The light-emitting diode chip 210, the +-nano diode 220 and the two-electrode layer 232, ..... The Zener diode 220 includes a first electrically doped layer 222 and a second electrically doped layer 224 disposed in the insulating substrate 2 , the first electrically doped layer 222 and the electrode layer 232 . The second electrically conductive layer 224 is electrically connected to the electrode layer 234. The light-emitting diode chip 21 is disposed on the insulating substrate 200 and electrically connected to the two electrode layers 232 and 234, and is connected in parallel with the base diode 220. A through hole 205 penetrating through the first surface 202 and the second surface 204 is formed in the insulating substrate 2, and a conductive post 250 is formed in the through hole 205. The light emitting diode package structure in this embodiment is different from that in the previous embodiment in that the first electrically doped layer 222 is replaced by a second electric 099114911 form number Α0101 page 7 / 15 pages 0992026463- [0025] [0025] [0025] [0026] The doping layer 224 is coated therein. Therefore, an insulating layer 260 is disposed on the insulating substrate 200, and the insulating layer 260 is disposed between the second electrically doped layer 224 and the electrode layer 232. The electrode layer 232 can be electrically isolated from the second electrically doped layer 224 by the insulating layer 260, thereby ensuring the connection polarity of the base electrode 22{) and the two electrode layers 232, 234. The manufacturing process of the light emitting diode package structure will be described below by taking the light emitting diode package structure of the first embodiment of the present invention as an example. In a first step, an insulating substrate 1〇〇 is provided, which may be made of one or more of the following semiconductor materials: germanium (Si) 'GaAs, Zn, Zn and phosphorus Indium (InP). The insulating substrate 100 has a first surface 1〇2 and a second surface 104 opposite to the first surface 1〇2. A groove 103 is formed on the second surface 1?4 by a technique such as yellow light or lithography. In the second step, the second electric dummy doping layer 12 and the second electric double doping layer 形成 24 are formed at the bottom of the recess 1 〇 3 by epitaxial doping or ion implantation to form in the recess 103. One Kenai two 褚雔 12 〇. In a third step, the electrode layer 132 is disposed on the first surface 102 of the insulating substrate 1 , the electrode layer 132 is electrically connected to the first electrically doped layer 122 , and the second electrically alternating layer U4 is electrically connected. The electrode layer 132 is insulated and extended to the second surface 104 of the insulating substrate 1A. The electrode layer 134 is disposed on the first surface 102 of the insulating substrate 1 , the electrode layer 134 is electrically connected to the second electrically doped layer 124 , and the electrode layer 134 is extended to the second surface 1 of the insulating substrate 100 . 〇 4 on. Finally, the form of the flip-chip of the light-emitting diode 1 (four) and the two-electrode layer 132 099114911 form. No. A0101 Page 8 / 15 pages 0992026463-0 201140872 [0028] [0028] Ο [0029] Ο [0030] [0031 [0032], 134 is electrically connected and connected in parallel with the Kina diode 120. The through hole 105 and the conductive post 150 in the second embodiment can be formed in the first step. Specifically, a plurality of through holes 105 penetrating through the first and second surfaces 102, 104 are formed on the insulating substrate 100. A conductive metal material is filled in the through hole 105 of the insulating substrate 100 to form a conductive pillar 150. The metal material may be gold (Au), silver (Ag), copper (Cu), nickel (Ni), indium (Ti), titanium (Ti) or an alloy of these metals. The insulating layer 206 in the third embodiment can be formed after the formation of the sigma diode 220 in the second step. Specifically, an insulating layer 260 is formed on the bottom of the recess 203, and the insulating layer 260 covers a portion of the second electrically doped layer 224. In summary, the present invention has indeed met the requirements of the invention patent, and the patent application is filed according to law. However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a cross-sectional view showing a light emitting diode package structure according to a first embodiment of the present invention. Fig. 2 is a cross-sectional view showing a light emitting diode package structure according to a second embodiment of the present invention. Fig. 3 is a cross-sectional view showing a light emitting diode package structure according to a third embodiment of the present invention. [Main component symbol description] Insulating substrate: 100, 200 099114911 Form No. A0101 Page 9 / Total 15 page 0992026463-0 [0033] 201140872 [0034] First surface: 102, 202 [0035] Groove: 1 0 3, 2 0 3 [0036] Second surface: 104, 204 [0037] Through-hole: 105, 20 5 [0038] Light-emitting diode wafer: 110, 210 [0039] Electrode: 11 2, 11 4 [0040] Diode: 120, 220 [0041] First electrically doped layer: 122, 222 [0042] Second electrically doped layer: 124, 224 [0043] Electrode layer: 132, 134, 232, 234 [0044 Conductive column: 150, 250 0992026463-0 099114911 Form number A0101 Page 10 of 15