201135242 六、發明說明： 【發明所屬之技術領域】 [0001] 本發明涉及一種DIP芯片之連接裝置。 [先前技術] [0002]雙列直插式封裝（Dual In-lines Package, Dip)々片 係指具有兩列平行引腳之積體電路芯片，其在封裝完成 後需要進行測試，檢測引腳上之訊號係否符合要求。然 而，若每測試一個DIP芯片都需連接檢測裝置與DIp芯片 之引腳，將降低測試效率。因此，目前之檢測裝置一般 包括一個與特定規格之DIP芯::片在.配之連接器，DIp芯片 可以直接插入連接器將引腳與檢測裝置連接或從連接器 拔離而斷開引腳與檢測裝置之連接。然而，如此之檢測 裝置只能檢測特定規格之DIΡ芯片，相容性差。 【發明内容】 [0003] 有鑒於此，有必要提供—種相容性佳之檢測DIP芯片之連 接裝置。 [0004] —種連接裝置，其用於連接一驗待測試之DIP芯片至DIP 怒片檢測裝置。該連接裝置包括一個矩形固定框及兩列 分別設置在該固定框相對兩側之測試端子，同列相鄰之 測試端子間之間距與Dip芯片相鄰之引腳間之間距相同。 該固定框沿平行該兩列測試端子之方向分為兩個半框， 该固定框還包括兩個以螺合方式連接該兩個半框之連接 螺柱。每個半框包括兩個分別設置在對應一列測試端子 兩側之抵靠板及一個螺入其中一個抵靠板之固定螺柱。 [0005] 本發明之連接裝置籍由調節該連接螺柱便可調節該兩列 099111000 表單編號A0101 第4頁/共15頁201135242 VI. Description of the Invention: [Technical Field of the Invention] [0001] The present invention relates to a connection device for a DIP chip. [Prior Art] [0002] Dual In-lines Package (Dip) chip refers to an integrated circuit chip with two columns of parallel pins, which needs to be tested and tested after the package is completed. Whether the signal on the line meets the requirements. However, if each DIP chip is tested, it is necessary to connect the detection device to the pins of the DIp chip, which will reduce the test efficiency. Therefore, the current detection device generally includes a DIP core with a specific specification: a chip in the connector, the DIp chip can be directly inserted into the connector to connect or disconnect the pin from the detecting device and disconnect the pin. Connection to the detection device. However, such a detecting device can only detect a DI chip of a specific specification and has poor compatibility. SUMMARY OF THE INVENTION [0003] In view of the above, it is necessary to provide a connection device for detecting a DIP chip with good compatibility. [0004] A connecting device for connecting a DIP chip to be tested to a DIP foil detecting device. The connecting device comprises a rectangular fixing frame and two rows of test terminals respectively disposed on opposite sides of the fixing frame, and the distance between adjacent test terminals of the same row is the same as the distance between the pins adjacent to the Dip chip. The fixing frame is divided into two half frames along the direction parallel to the two columns of test terminals, and the fixing frame further comprises two connecting studs for screwing the two half frames. Each of the half frames includes two abutting plates respectively disposed on opposite sides of the corresponding one of the test terminals and a fixing stud screwed into one of the abutting plates. [0005] The connecting device of the present invention can adjust the two columns by adjusting the connecting stud. 099111000 Form No. A0101 Page 4 of 15
0992C 201135242 [0006] 測試端子之間之距離。如此，即使DIP芯片之兩列引腳之 間之距離不同’也可籍由調整該連接螺柱來匹配Dlp芯片 。另外，籍由調節該固定螺柱，便能使該連接裝置能固 定具有不同規格之DIP芯片，從而實現連接多種封裝規格 之DIP芯片。 【實施方式】 下面將結合附圖’舉以下較佳實施方式並配合圖式詳細 描述如下。 八 [0007] Ο 請參考圖1至圖4，本發明較佳實施方式之連接裝置10用 於連接一個待測試乏JHP芯片（圖未示）至DIP芯片檢測裝 置（圖未示）’以便測試DIP芯片引腳之訊號:。連接裝置1〇 包括一個矩形之固定框100、及兩列分別設置在固定框 10 0相對兩側之測試端子2 〇 〇。 [0008] G 矩形固定框100包括兩個半框102、四個凸塊104、兩個 連接螺柱106、四個抵靠板1〇8及兩個固定罈柱110。半 框102呈長方體狀’其沿平行兩列測試端子2〇〇的方向並 排設置。半框102包括相互背對的一個頂面i〇2a及一個底 面102b。頂面102a遠離另一半框1〇2的長邊10la上開設 有一列固定凹槽102c。每個固定凹槽l〇2c包括一個遠離 另一半框102的内壁l〇2e，内壁l〇2e向另一半框102的方 向傾斜。同一列的相鄰兩個固定凹槽1 〇2c間的間距等於 DIP芯片相鄰的引腳間的間距。 [0009] 凸塊104自頂面102a垂直凸起，其分別設置在頂面l〇2a 上的兩個短邊101b的邊緣，且位於短邊i〇ib靠近另一半 099111000 框102的一侧上。每個凸塊1〇4沿平行于短邊10lb的方向 表單編號A0101 第5頁/共15頁 0992019314-0 201135242 開設有一個連接螺孔1 0 4 a ’連接螺柱1 〇 6籍由連接螺孔 104a螺合至位於不同半框1〇2上的相鄰的兩個凸塊104， 使得調節連接螺柱106時，便可調節兩個半框1〇2間的距 離，從而使連接裝置1 0適應兩排引腳間寬度不同的DI p芯 片。 [0010] 抵靠板108自底面102b垂直凸起，其分別設置在底面 1 02b對應一列測試端子200的兩侧上。固定螺柱11 〇沿指 向另一個抵靠板108的方向螺合併貫穿抵靠板1〇8，使得 籍由調節固定螺柱110，便能使DIP芯片的兩端分別抵靠 在固定螺柱110與抵靠板1 〇8之間，以使連接裝置1 〇與 DIP芯片固定’從而使得連接裝置1〇可固定不同規格的 DIP芯片上。 [0011] 測試端子200由導電材料（如銅）製成，每個測試端子2〇〇 包括一個連接端202、一個測試端206及一個位於連接端 2 0 2及測试端2 0 6之間的固定部2 0.4。.固定部2 0 4後設在固 定凹槽102c内，連接端202自固定部204遠離長邊l〇la的 一側沿垂直於頂面102a的秦勺延伸至頂面i〇2a之外，測 试端206自固定部204靠近長邊l〇la的一側向底面i〇2b延 伸，並垂直於底面1 02b延伸到底面1 〇2b以下。固定凹槽 102c的内壁102e起到固定測試端子2〇〇的作用。 [0012] 進行測試時’連接裝置10套設在DIP芯片上，調節連接螺 柱1 0 6 ’使不同半框1 〇2上的測試端子2〇〇間的距離與DIP 芯片左右兩排引腳間的距離相互匹配，從而使測試端2 〇 6 099111000 夾緊在DIP芯片的引腳上。再調節固定螺柱11()，使連接 裝置10固定在DIP芯片上。此時，可將波器的探頭（圖未 ' 第6頁/共15頁 表單編號A0101 0992019314-0 201135242 [0013] [0014] 、[0015] G [0016] [0017] 示）分別連接至待測試的引腳所連接的連接端2〇2上，以 對其引腳的訊號進行測試。 可以理解，測試端子200的形狀不限於本實施方式，只要 測試端子包括一個連接端及一個測試端，且該連接端及 測試端分別凸出矩形固定框1 〇 0的兩個背對的側面（即頂 面102a及底面102b)之外以方便連接便可。 可以理解，連接螺柱106也可以直接螺合至兩個半框1〇2 上而實現半框102的相互連接及其距離可調整《此時凸塊 10 4也可不必設置》 優選地，連接裝置10還包括..兩個分別設..置在兩個半框 的底面102b上的接地板300及複數接地端子400。接地板 300包括一個由導電材料（如銅）製成的導電層3〇〇a，導 電層300a緊貼半框102的底面102b。每個半框102上還開 設有一排接地通孔102d，接地通孔102d靠近固定凹槽 102c並與其--對應地並排設置。接地端子400設置在接 地通孔102d中，且其一端連接導電層300a而另一端凸出 頂面102a之外。 由於DIP芯片的每排引腳中一般至少會有一個地引腳，在 本實施方式中，DIP芯片的左下角及右下角的引腳為地引 腳。因此，位於半框102左下角及右下角的固定凹槽102c 連通至底面102b，以使設置在該兩個固定凹槽l〇2c中的 測試端子200接觸到接地板300的導電層3〇〇a，進而使接 地端子400都與該兩個測試端子200連接。 當連接裝置10與DIP芯片連接好後，接地端子均連接至 099111000 表單編號A0101 第7頁/共15頁 0992019314-0 201135242 地引腳。此時，將示波器的探頭(圖未示)分別 -個H相至引腳所連接的測試端子咖及與其並列的 i端子4GG上。由於所有的接地端子係籍由導 電層連接至Dlp芯片的地引腳的，因此由於⑽芯 片的地引腳與各個被測訊號引腳間距離不同而引起的不 同失真里此被平均，進而提高測量資料的精確性。 [0018] [0019] [0020] [0021] [0022] [0023] [0024] [0025] [0026] [0027] 可以理解’可根據具體的DIPW的地引腳的具體位置設 置對應的測試端子與接地板3〇〇的導電層3〇〇3連接。 本技術領域的普通技術人員應當認識到，以上之實施方 式僅係用來說明本發明，而並非用作為對本發明之限定 ’只要在本發明之實質精神範圍之内，對以上實施例所 作的適當改變和變化都落在本，發明要求保護的範圍之内 【圖式簡單說明】 圖1為本發明較佳實施方式之連接裝置冬俯視圖。 圖2為圖1之連接裝置之左視圖。 圖3為圖1之連接裝置之前視圖。 圖4為圖1之連接裝置沿線IV-IV之剖視圖。 【主要元件符號說明】 連接裝置10 固定框100 長邊101a 短邊1 01 b 099111000 表單編號A0101 第8頁/共15頁 0992019314-0 201135242 [0028] 半框102 [0029] 頂面102a [0030] 底面1 0 2b [0031] 固定凹槽102c [0032] 接地通孔102d [0033] 内壁102e [0034] Ο [0035] 凸塊104 連接螺孔104a [0036] 連接螺柱106 [0037] 抵靠板108 . [0038] 固定螺柱110 [0039] 測試端子200 L_」 連接端202 [0041] 固定部204 [0042] 測試端2 06 [0043] 接地板3 0 0 [0044] 導電層300a [0045] 接地端子400 099111000 表單編號A0101 第9頁/共15頁 0992019314-00992C 201135242 [0006] Test the distance between the terminals. Thus, even if the distance between the two columns of pins of the DIP chip is different, the Drop chip can be matched by adjusting the connection stud. In addition, by adjusting the fixing stud, the connecting device can fix DIP chips having different specifications, thereby realizing connection of DIP chips of various package specifications. [Embodiment] Hereinafter, the following preferred embodiments will be described in detail with reference to the accompanying drawings. [0007] Ο Referring to FIG. 1 to FIG. 4, the connecting device 10 of the preferred embodiment of the present invention is used to connect a spent JHP chip (not shown) to a DIP chip detecting device (not shown) for testing. DIP chip pin signal: The connecting device 1A includes a rectangular fixing frame 100, and two columns of test terminals 2 〇 设置 respectively disposed on opposite sides of the fixing frame 100. [0008] The G rectangular fixing frame 100 includes two half frames 102, four bumps 104, two connecting studs 106, four abutting plates 1〇8 and two fixed mandrels 110. The half frame 102 has a rectangular parallelepiped shape which is arranged side by side in the direction parallel to the two test terminals 2〇〇. The half frame 102 includes a top surface i〇2a and a bottom surface 102b which are opposite to each other. The top surface 102a is separated from the long side 10la of the other half frame 1〇2 by a row of fixing grooves 102c. Each of the fixing grooves 10c includes an inner wall 10a away from the other half frame 102, and the inner wall 10e is inclined toward the other half of the frame 102. The spacing between adjacent two fixed grooves 1 〇 2c of the same column is equal to the spacing between adjacent pins of the DIP chip. [0009] The bumps 104 are vertically protruded from the top surface 102a, and are respectively disposed on the edges of the two short sides 101b on the top surface 102a, and are located on the side of the short side i〇ib near the other half of the 099111000 frame 102. . Each bump 1〇4 is parallel to the direction of the short side 10lb. Form No. A0101 Page 5 / Total 15 Page 0992019314-0 201135242 Open a connection screw hole 1 0 4 a 'Connect the stud 1 〇6 by the connection screw The hole 104a is screwed to the adjacent two bumps 104 located on the different half frames 1〇2, so that when the connection stud 106 is adjusted, the distance between the two half frames 1〇2 can be adjusted, thereby connecting the device 1 0 Adapts to the DI p chip with different width between the two rows of pins. [0010] The abutting plates 108 are vertically protruded from the bottom surface 102b, and are respectively disposed on the two sides of the bottom surface 102b corresponding to one column of the test terminals 200. The fixing stud 11 is screwed into the abutting plate 1〇8 in the direction of the other abutting plate 108, so that both ends of the DIP chip can be respectively abutted against the fixing stud 110 by adjusting the fixing stud 110. Between the abutting plates 1 and 8 to fix the connecting device 1 and the DIP chip, so that the connecting device 1 can be fixed on different DIP chips. [0011] The test terminal 200 is made of a conductive material (such as copper), and each test terminal 2 includes a connection end 202, a test end 206, and a connection between the connection end 2 0 2 and the test end 2 0 6 Fixed part 2 0.4. The fixing portion 220 is disposed in the fixing groove 102c, and the connecting end 202 extends from the side of the fixing portion 204 away from the long side l〇la to the top surface i〇2a along the vertical direction perpendicular to the top surface 102a. The test end 206 extends from the side of the fixing portion 204 near the long side l〇la to the bottom surface i〇2b, and extends perpendicularly to the bottom surface 102b to below the bottom surface 1〇2b. The inner wall 102e of the fixing groove 102c functions to fix the test terminal 2''. [0012] When testing, the connection device 10 is set on the DIP chip, and the connection studs 1 0 6 ' are adjusted so that the distance between the test terminals 2 不同 on the different half frames 1 〇 2 and the left and right rows of pins of the DIP chip The distances between the two match each other so that the test terminal 2 〇6 099111000 is clamped to the pins of the DIP chip. The fixing stud 11 () is adjusted to fix the connecting device 10 to the DIP chip. At this time, the probe of the wave device (not shown in Fig. 6 / 15 page form number A0101 0992019314-0 201135242 [0013] [0014], [0015] G [0016] [0017] can be respectively connected to The test pin is connected to the terminal 2〇2 to test the signal of its pin. It can be understood that the shape of the test terminal 200 is not limited to the embodiment, as long as the test terminal includes a connection end and a test end, and the connection end and the test end respectively protrude from the two opposite sides of the rectangular fixing frame 1 〇 0 ( That is, the top surface 102a and the bottom surface 102b) are convenient for connection. It can be understood that the connecting stud 106 can also be screwed directly onto the two half frames 1〇2 to realize the mutual connection of the half frames 102 and the distance can be adjusted. “At this time, the bumps 10 4 may not be set.” Preferably, the connection is The device 10 further includes two grounding plates 300 and a plurality of grounding terminals 400 respectively disposed on the bottom surface 102b of the two half frames. The ground plate 300 includes a conductive layer 3a made of a conductive material such as copper, and the conductive layer 300a abuts the bottom surface 102b of the half frame 102. Each of the half frames 102 is further provided with a row of grounding through holes 102d which are adjacent to the fixing grooves 102c and are arranged side by side corresponding thereto. The ground terminal 400 is disposed in the ground via 102d, and has one end connected to the conductive layer 300a and the other end protruding outside the top surface 102a. Since there is generally at least one ground pin in each row of pins of the DIP chip, in the present embodiment, the pins in the lower left corner and the lower right corner of the DIP chip are ground pins. Therefore, the fixing grooves 102c located at the lower left corner and the lower right corner of the half frame 102 communicate with the bottom surface 102b such that the test terminals 200 disposed in the two fixing grooves 102c contact the conductive layer 3 of the ground plate 300. a, in turn, the ground terminal 400 is connected to the two test terminals 200. When the connection device 10 is connected to the DIP chip, the ground terminal is connected to the 099111000 form number A0101 page 7 / page 15 0992019314-0 201135242 ground pin. At this time, the oscilloscope's probe (not shown) is connected to the H-phase to the test terminal connected to the pin and the i-terminal 4GG along with it. Since all the grounding terminals are connected to the ground pins of the Dlp chip by the conductive layer, the different distortions caused by the distance between the ground pins of the (10) chip and the signals to be tested are averaged, thereby improving Measuring the accuracy of the data. [0020] [0025] [0027] [0027] It can be understood that the corresponding test terminal can be set according to the specific position of the ground pin of the specific DIPW. It is connected to the conductive layer 3〇〇3 of the grounding plate 3〇〇. It is to be understood by those skilled in the art that the present invention is only intended to be illustrative of the invention, and is not intended to be construed as limiting the invention. The changes and modifications are within the scope of the invention and claimed. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a winter top view of a connecting device in accordance with a preferred embodiment of the present invention. Figure 2 is a left side view of the connecting device of Figure 1. Figure 3 is a front elevational view of the connector of Figure 1. Figure 4 is a cross-sectional view of the connecting device of Figure 1 taken along line IV-IV. [Description of main component symbols] Connecting device 10 Fixing frame 100 Long side 101a Short side 1 01 b 099111000 Form number A0101 Page 8 / Total 15 page 0992019314-0 201135242 [0028] Half frame 102 [0029] Top surface 102a [0030] Bottom surface 1 0 2b [0031] fixing groove 102c [0032] grounding through hole 102d [0033] inner wall 102e [0034] bump 104 connecting screw hole 104a [0036] connecting stud 106 [0037] abutting plate [0038] fixing stud 110 [0039] test terminal 200 L_" connecting end 202 [0041] fixing portion 204 [0042] test end 2 06 [0043] ground plate 3 0 0 [0044] conductive layer 300a [0045] Ground Terminal 400 099111000 Form No. A0101 Page 9 of 15 0992019314-0