TW201126333A - Testing module of passive back plane and its passive back plane testing method - Google Patents

Testing module of passive back plane and its passive back plane testing method Download PDF

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Publication number
TW201126333A
TW201126333A TW99101267A TW99101267A TW201126333A TW 201126333 A TW201126333 A TW 201126333A TW 99101267 A TW99101267 A TW 99101267A TW 99101267 A TW99101267 A TW 99101267A TW 201126333 A TW201126333 A TW 201126333A
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TW
Taiwan
Prior art keywords
test
backplane
peripheral component
speed peripheral
expansion
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Application number
TW99101267A
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Chinese (zh)
Inventor
Ying-Fan Chiang
Chien-Chih Chang
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Inventec Corp
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Priority to TW99101267A priority Critical patent/TW201126333A/en
Publication of TW201126333A publication Critical patent/TW201126333A/en

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Abstract

A testing module of a passive back plane includes a circuit board and a micro-controlling unit disposed on the circuit board and electrically connected with a passive back plane and a monitor device. When the micro-controlling unit begins to test the passive back plane, the micro-controlling unit provides power supply to the passive back plane via general purpose Input/Output interfaces, activates the passive back plane via Programmed Input/Output interfaces, tests the passive back plane via system management bus interfaces, and feedbacks a test result to the monitor device.

Description

201126333 六、發明說明: 【發明所屬之技術領域】 本發明是有關於一種測試模組,特別是有關於一種被 動背板之測試模組及其測試被動背板之方法。 【先前技術】 由於咼速周邊元件聯繫 (Peripheral Component201126333 VI. Description of the Invention: [Technical Field] The present invention relates to a test module, and more particularly to a test module for a driven backplane and a method for testing the same. [Prior Art] Due to the idling peripheral component (Peripheral Component)

Interconnect Express,PCI Express 後稱 PCI-E)擴充背 • 板為一被動元件’需要外來之電源及啟動訊號,才可被初 始化以進行工作,因此,傳統對PCI_E擴充背板(raiser card)進行功能測試時,必須搭配一刀鋒伺服器同時進行, 使得PCI-E擴充背板經連接至刀鋒伺服器後,而可被開機 後之刀鋒伺服器喚醒。刀鋒伺服器便對PCI_E擴充背板進 行電源、信號及協定功能之測試,才可得知此pCI E擴充 背板是否合格。 ' 然而,利用刀鋒伺服器來對PCI-E擴充背板進行功能 ♦ 測試時,係存在以下缺點: 1.搭配刀鋒伺服器對PCI-E擴充背板進行功能測試 時,存在著大量的人機交互測試工作,不僅效率低,也常 - 因為人為判斷之誤差而造成測試失敗。 . 2·搭配刀鋒伺服器對PCI-E擴充背板進行功能測試 時,需配合刀鋒伺服器之啟動,將拉長pci_E擴充背板之 測試時間’進而影響生產成本及產品品質。、 3.搭配刀鋒伺服器對PCI_E擴充背板進行功能測試 201126333 時,由於刀鋒伺服器相當昂貴, 之刀鋒伺服器,將提高硬體取得成本。# —專為測試用 如此,如何研發出一種測試模 便及缺點,實乃相關業者目前刻不容緩之^上述種種不 <一重要課題。 【發明内容】 有鑒於此,本發明之一態樣中係 測試模組,不需搭配刀鋒伺服器對p ,破動背板之 能測試,使得降低人機交互測試工 ^充背板進行功 板之測試時間及刀鋒伺服器之硬體取得成本YCI~E擴充背 此種被動背板之測試模組於—實施方式; 板、-第-連接單元及一第二連接單元括-電路 於電路板上,活動地連接—被動背板單元位 電路板上,活動地連接—監控裝置 早讀於 板上’電性連接第-連接單元與第二連心m 輸入輸出界面、—程式化輸人輸出界面及-全系統管^匯 排流界面。當微處理單元對被動背板進行測試時,微處理 單元藉由通用輸入輸出界面對被動背板提供電源、藉由程 式化輸入輸出界面對被動背板進行初始化、藉由全系統管 理匯排流界面對被動背板進行測試,以及藉由第二連接單 元回饋一測試結果至監控裝置。 本發明之另一態樣中係揭露一種測試被動背板之方 法’應用於一被動背板之測試模組。此測試模組連接一 PCI-E擴充卡及一電腦裝置。此方法包括自電腦裝置取得 一測試内容韌體、依據測試韌體資料,藉由一通用輸入輸 201126333 出界面提供電源至PCI-Ε擴充卡、依據測試勒體資料,藉 由-程式化輸人輸出界面對ΡΠ_Ε擴充卡進行初始化、依 據顏㈣資料,藉由制輸人輸出界面檢測PCI_E擴充 卡上之多個測试發光二極管元件、依據測試韌體資料,藉 由通用輸入輸出界面設定PCI-E擴充卡上之多個pci_E裝 置之規格、依據測试勒體資料,藉由一全系統管理匯排流 界面測試PCI-E擴充卡’以及回饋一測試結果至電腦裝置。 表τ、上所述,本發明被動背板之測試模組及其測試被動 • 背板之方法不需搭配主動式電腦,即可對PCI-E擴充背板 進行測試。如此,本發明具有以下優點: >丨.簡化了搭配刀鋒伺服器與PCI-E擴充背板間之人機 交互測試工作,進而提高效率,也降低人為判斷之誤差而 造成測試失敗之機率。 2. 縮短了對pc I-E擴充背板進行功能測試之測試時 間’進而改善生產成本及產品品質。 3. 節省了取得刀鋒伺服器所需之硬體取得成本。 【實施方式】 以下將以圖示及詳細說明清楚說明本發明之精神,如 熟悉此技術之人員在瞭解本發明之實施例後,當可由本發 明所教不之技術,加以改變及修飾,其並不脫離本發明之 精神與範圍。 由於傳統對一被動背板(pass i ve back p 1 ane,例如 高速周邊元件聯繫擴充背板,後稱PCI-E擴充背板)進行 功測试時’需搭配一主動式電腦(act ive device,例如 201126333 刀鋒伺服器)同時進行,係夢 被動背板並提供被動背板心之:作j刀,器喚醒 動背板進行賴,得知此被崎板是^格對此種被 組於二 =:::,, 逆按早凡2 3 0及一與# ?田。口 _Interconnect Express, PCI Express is called PCI-E). The expansion board is a passive component that requires external power and startup signals before it can be initialized for operation. Therefore, the traditional PCI_E expansion board (raiser card) functions. The test must be performed simultaneously with a blade server, so that the PCI-E expansion backplane is connected to the blade server and can be woken up by the blade server after booting. The blade server tests the power, signal, and protocol functions of the PCI_E expansion backplane to see if the pCI E expansion backplane is qualified. However, when using the blade server to perform functions on the PCI-E expansion backplane, there are the following disadvantages: 1. When the PCI-E expansion backplane is tested with the blade server, there are a lot of man-machines. The interactive test work is not only inefficient, but also often - the test fails due to the error of human judgment. 2. When using the blade server to perform functional tests on the PCI-E expansion backplane, it is necessary to cooperate with the start of the blade server to extend the test time of the pci_E expansion backplane, which in turn affects production cost and product quality. 3. When the function of the PCI_E expansion backplane is tested with the blade server, the blade server is quite expensive, and the blade server will increase the hardware cost. #—Designed for testing So, how to develop a test model and shortcomings is really an important issue for the relevant industry. SUMMARY OF THE INVENTION In view of the above, one aspect of the present invention is a test module, which does not need to be matched with a blade server to test the p and break the backplane, so that the human-computer interaction tester can be reduced to perform work. The test time of the board and the hardware acquisition cost of the blade server YCI~E expansion test module of the passive backplane is implemented in the embodiment; the board, the -th connection unit and the second connection unit are included in the circuit On the board, active connection - passive backplane unit circuit board, active connection - monitoring device read on the board 'electrical connection first - connection unit and second connection m input and output interface, - stylized input Output interface and - full system management ^ exchange flow interface. When the micro processing unit tests the passive backplane, the micro processing unit supplies power to the passive backplane through the universal input and output interface, initializes the passive backplane through the stylized input and output interface, and manages the sinking flow through the whole system. The interface tests the passive backplane and feeds back a test result to the monitoring device via the second connection unit. In another aspect of the invention, a method of testing a passive backplane is applied to a test module of a passive backplane. The test module is connected to a PCI-E expansion card and a computer device. The method includes obtaining a test content firmware from a computer device, and according to the test firmware data, providing power to the PCI-Ε expansion card through a universal input and output interface, and extracting the data according to the test, by using the programmatic input. The output interface initializes the ΡΠ_Ε expansion card, and according to the color (4) data, detects a plurality of test LED components on the PCI_E expansion card through the output interface of the input and output, according to the test firmware data, and sets the PCI through the universal input/output interface. The specifications of multiple pci_E devices on the E-expansion card, based on the test data, test the PCI-E expansion card by a system-wide management exchange interface and return a test result to the computer device. Table τ, above, the test module of the passive backplane of the present invention and the method for testing the passive • backplane can test the PCI-E expansion backplane without using an active computer. Thus, the present invention has the following advantages: > 丨 simplifies the human-machine interaction test between the blade server and the PCI-E expansion backplane, thereby improving efficiency and reducing the probability of test failure due to human error. 2. Shortened the test time for functional testing of the pc I-E expansion backplane' to improve production costs and product quality. 3. Saves on the hardware acquisition cost of obtaining a blade server. BRIEF DESCRIPTION OF THE DRAWINGS The spirit of the present invention will be clearly described by the following description and detailed description of the embodiments of the present invention, which may be modified and modified by the teachings of the present invention. The spirit and scope of the invention are not departed. As a result of the traditional passive test (passive ve back, such as high-speed peripheral components connected to the expansion backplane, hereinafter referred to as PCI-E expansion backplane) for the power test, it is necessary to match an active computer (active device) For example, 201126333 Blade Server) is carried out at the same time. It is a passive passive backplane and provides a passive backplane: as a j-knife, the device wakes up the moving backboard, and it is known that this is a kind of Two =:::,, reversely press the early 2 3 0 and one and #? mouth _

=第-連接單元22〇(例如金手指插4等== 板210上’可活動地連接—被動背板⑽之—第 = ^^列如好指插件等等),以供電性連接被動"t板t 板210。第一連接單元230 (例如USB連接器)位於 電路板21G上,可活動地連接—監控裝置細(例如電腦 裝置600)之-第四連接單元31(),以供電性連接監控裝置 300及電路板210。微處理單元240位於電路板21〇上,分 別透過第一連接單元220與第二連接單元23〇電性連接被 動背板100與監控裝置300。 微處理單元240具有多種資訊傳輸界面,包括一通用 輸入輸出界面 241 (General Purpose Input/Output, GPIO )、一程式化輸入輸出界面242 ( Pr〇grammed Input/Output ’ P10 )、一全系統管理匯排流界面243( System Management bus’SMbus)及一内部積體電路界面 244( Inter — Integrated Circuit System,I2C)〇 此外’微處理單元240中具有一測試内容韌體245。 由於微處理單元240不限具備可覆寫特性或不可覆寫特 性,此測試内容韌體245可預先被燒寫於微處理單元240 201126333 中,或被更新至微處理單元240中以覆蓋先前之資料。 • 如此,當微處理單元240對被動背板1〇〇進行測試時’ • 微處理單元240依據此測試内容韌體245之指示’分別藉 由通用輸入輸出(GPIO)界面241對此被動背板100提供 電源、藉由此程式化輸入輸出(PIO)界面242對此被動背 板100進行初始化、藉由此全系統管理匯排流(SMbus)界 面243對被動背板100進行測試。之後’微處理單元240 便可藉由第二連接單元230回饋一測試結果至監控裝置 φ 300。 如此,此測試模組200可取代上述主動式電腦,透過 上述之各種資訊傳輸界面提供喚醒被動背板100之訊號, 以及提供符合被動背板100之工作環境的訊號,使得被動 背板100於不需搭配主動式電腦下即可進行測試。 如第2圖所示,第2圖繪示本發明被動背板之測試模 組於另一實施例下之方塊示意圖。此被動背板100可例如 為一 PCI-E擴充背板400、一硬碟擴充背板或一風扇背板。 φ 本實施例係以下PCI-E擴充背板400為例。 PCI-E擴充背板400為提供一刀鋒伺服器更多擴充服 務之產品,例如具有多個PCI-E連接單元460。此些PCI-E . 連接單元460便可提供多個PCI-E裝置470(例如顯示卡、 音效卡等)進行插設。PCI-E擴充背板400更具有一電壓 調節模組 410 (voltage regulation module)、一 工作電 路420(circuit)、測試發光二極管元件(後稱測試LED元 件)430、一放大電路440(repeater circuit)及多個溫度 感測器 450(temperature sensor) ° 201126333 工作電路420分別電性連接電壓調節模組41〇、放大 電路440及溫度感測器450。此些測試led元件430分布 .於工作電路420中,電性連接工作電路42〇。此放大電路 440電性連接此些PCI-E連接單元460。 此外,見第1圖及第2圖所示,測試模組2〇〇更包括 一界面轉接卡500( interface card),由於界面轉接卡5〇〇 具有夠多之連接腳位(pin),可相容多種被動背板1〇〇之 連接界面之規格,故,界面轉接卡5〇〇可成為被動背板1〇〇 • 士 PCI E擴充背板400 )與測試模組200間之橋樑。因 ^無^^模組之第—連接單^ 22q與被動背板1〇〇 膂之規格’ 背板4〇〇)之第三連接單元110是否具相 ^動背柄ι’ηη\界面轉接卡5〇0之轉接,測試模組200與 的相容性。 擴充背板4〇〇)之間便可具有更高 背板及第3圖所示’第3圖繪示本發明測試被動 連接一 另一實施例下之流裎圖。當此測試模組200 ❿如下: 擴充背板400及一電腦裝置600後,其步驟 試内自此電腦裝置_得一測 * ’測試上由於不同待測物具不同之測試内容,故, 245透過第^接電腦裝置_將一對應之測試内容㈣ 理單元240中^早兀310及第二連接單元230載入微處 韋刃體245之指示對° ^ 元240便依據此測試内容 1 β擴充月板400進行測試步驟( 302 ) 201126333 至步驟(308)。 步驟( 302 )微處理單元240藉由此通用輸入輸出 (GPIO)界面241提供一電源訊號至PCI-E擴充背板4〇〇 : 此步驟中,微處理單元240啟動PCI-E擴充背板4〇〇 之電壓調節模組410,使得微處理單元240可提供電源訊 號至PCI-E擴充背板400。其中電壓調節模組410依據一 電源供電順序,依序為PCI-E擴充背板400之各元件(例 如上述之工作電路420、測試LED元件430、放大電路440 及溫度感測器450等)進行供電及轉換電壓之工作。總之, 此步驟為提供PCI-E擴充背板400各元件合適之電力。 其中通用輸入輸出界面241,例如具有P12V、 P3V3_STBY、PI. 8V 等腳位。 步驟( 303)微處理單元240藉由此程式化輸入輸出 (PIO)界面242對PCI-E擴充背板400進行初始化: 此步驟中,微處理單元240發出一初始化設定訊號至 PCI-E擴充背板400之此些元件進行初始化之設定訊號, 待此些元件進行初始化後,便可取得此PCI-E擴充背板400 被初始化後所發出之初始化回應訊號。 其中程式化輸入輸出界面242,例如具有 (riser_present ’ PWD—G—MLB ’ PWD—G—RISE R , Mezzl—ID , Mezz2_ID,RST_N)等腳位。 步驟( 304 )微處理单元240藉由此通用輸入輸出 (GPIO)界面241檢測此些測試LED元件430 : 此步驟中,微處理單元240發出檢測訊號至工作電路 420,而檢測此些測試LED元件430是否可預期地發亮或熄 201126333 滅,以提供測試人員正確之測試資訊。例如測試LED元件 430發亮代表電源訊號有通過。 其中通用輸入輸出界面241,例如具有HTH_LED_RED, HTH_LED_G REEN 及 U ID_ON 等腳位。 步驟( 305 )微處理單元240藉由此通用輸入輸出 (GPIO)界面241選擇使用PCI-E裝置470及設定其規格: 此步驟中,微處理單元240藉由發出選擇訊號來選擇 PCI-E裝置470之適當規格。例如,通用輸入輸出界面241 具有PCIE_x8/xl6_select等腳位,則微處理單元240所發 出之選擇訊號便可選擇設定PCIE_x8或PCIE_xl6之規格。 此外,微處理單元240亦藉由發出選擇訊號來選擇使 用PCI-E擴充背板400上之任意PCI-E裝置470。例如, 通用輸入輸出界面241具有PCIE_G1/G2_select等腳位, 則微處理單元240所發出之選擇訊號便可選擇使用代表 PCIE_G1 或 PCIE—G2 之任一 PCI-E 裝置 470。 實作上,由於選擇訊號被傳至PCI-E擴充背板400中 會有逐漸衰弱之現象,因此,放大電路440便可加強上述 之選擇訊號,使其能量不致變弱。 步驟( 306 )微處理單元240藉由全系統管理匯排流 (SMbus)界面243發出測試訊號至PCI-E擴充背板400 : 此步驟中,微處理單元240係藉由測試訊號對PCI-E 擴充背板400進測試。其中微處理單元240對PCI-E擴充 背板400上之被測試單元發出一測試訊號,待接收一回應 測試訊號,便可得知其被測試單元是否正常。 舉例而言,微處理單元240發出測試訊號至PCI-E擴 201126333 充背板400之各溫度感測器450,各溫度感測器450分別 收到測試訊號後,便經全系統管理匯排流(SMbus)界面 243 ’回饋一測試回應訊號至微處理單元240中。 其中全系統管理匯排流(SMbus )界面243,例如具有 SMB_DTA,SMB—CLK 等腳位。 步驟( 307 )微處理單元240藉由此通用輸入輸出 (GPIO)界面241停止提供電源訊號至PCI-E擴充背板400: 此步驟中,微處理單元240關閉電壓調節模組410, 以便停止提供電源訊號至PCI-E擴充背板400。 步驟( 308)微處理單元240回饋一測試結果至電腦裝 置 600 : 此步驟中,微處理單元240便回饋被測試單元之名單 及對應之回應測試訊號至電腦裝置6 0 0。如此’測試人貝 便可藉此得知擴充背板上之所有被測試單元是 否正常。 綜上所述,本發明被動背板之測試模組及其測試被動 背板之方法不需搭配主動式電腦,即可對PCI-E擴充背板 進行測試。如此’本發明具有以下優點: i.簡化了搭配刀鋒伺服器與PCI-E擴充背板間之人機 交互測試工作,進而提高效率’也降低人為判斷之誤差而 造成測試失觫之機率。 2縮短了對PCI-E擴充背板進行功能測試之測試時 間,進而改善生產成本及產品品質。 3節劣了取得刀鋒祠服器所需之硬體取得成本。 本發明所揭露如上之各實施例中,並非用以限定本發 [S.1 12 201126333 明,任何熟習此技藝者,在不脫離本發明之精神 當可作各種之更動與潤飾,因此本發明之保。範圍内, 附之申請專鄉m所界定者為準。 D關當視後 【圖式簡單說明】 為讓本發明之上述和其他目的、特徵、優點血 能更明顯易懂,所附圖式之詳細說明如下: 一施例 第1圖緣示本發明被動背板之測試模組於一^ A 之方塊示意圖。 、貫施例下 第2圖繪示本發明被動背板之測試模組於 下之方塊示意圖。 、一實施例 第3圖繪示本發明測試被動背板之方法於 下之流程圖。 貢施例 【主要元件符號說明】 310 第四連接單元 400 PCI-E擴充背板 410 電壓調節模組 420 工作電路 430 測試LED元4牛 440 放大電路 450 溫度感測器 460 PCI-E連接單元 470 PCI-E裝置 500 :界面轉接卡= the first connection unit 22 〇 (for example, the golden finger plug 4 etc. == on the board 210 'actively connected - the passive backplane (10) - the first = ^ ^ column such as a good plug-in, etc.), to connect passively with power supply ;t board t board 210. The first connecting unit 230 (for example, a USB connector) is located on the circuit board 21G, and is movably connected to the fourth connecting unit 31 of the monitoring device (for example, the computer device 600) to electrically connect the monitoring device 300 and the circuit. Board 210. The micro processing unit 240 is located on the circuit board 21, and is electrically connected to the driven backplane 100 and the monitoring device 300 through the first connecting unit 220 and the second connecting unit 23, respectively. The micro processing unit 240 has a plurality of information transmission interfaces, including a general purpose input/output interface 241 (General Purpose Input/Output, GPIO), a stylized input/output interface 242 (Pr〇grammed Input/Output 'P10), and a system-wide management sink. A system interface bus 243 (System Management bus'SMbus) and an internal integrated circuit system 244 (Inter-Integrated Circuit System, I2C) 〇 further includes a test content firmware 245 in the microprocessor unit 240. Since the micro processing unit 240 is not limited to having rewritable characteristics or non-overwrite characteristics, the test content firmware 245 can be pre-programmed in the micro processing unit 240 201126333 or updated to the micro processing unit 240 to overwrite the previous one. data. • As such, when the microprocessor unit 240 tests the passive backplane 1 ' • the microprocessor unit 240 in accordance with the indication of the test content firmware 245 'passes the passive backplane by the general purpose input and output (GPIO) interface 241, respectively The passive backplane 100 is initialized by the programmed input/output (PIO) interface 242, and the passive backplane 100 is tested by the full system management sink (SMbus) interface 243. Thereafter, the micro processing unit 240 can feed back a test result to the monitoring device φ 300 by the second connecting unit 230. In this way, the test module 200 can replace the active computer, provide signals for waking up the passive backplane 100 through the various information transmission interfaces, and provide a signal conforming to the working environment of the passive backplane 100, so that the passive backplane 100 does not Test with a proactive computer. As shown in Fig. 2, Fig. 2 is a block diagram showing another embodiment of the test module of the passive backplane of the present invention. The passive backplane 100 can be, for example, a PCI-E expansion backplane 400, a hard disk expansion backplane, or a fan backplane. φ This embodiment is an example of the following PCI-E expansion backplane 400. The PCI-E expansion backplane 400 is a product that provides a more extended service for a blade server, such as a plurality of PCI-E connection units 460. Such PCI-E. connection unit 460 can provide multiple PCI-E devices 470 (such as display cards, sound cards, etc.) for insertion. The PCI-E expansion backplane 400 further includes a voltage regulation module 410, a working circuit 420, a test LED component (hereinafter referred to as a test LED component) 430, and an amplifier circuit 440. And a plurality of temperature sensors 450 (temperature sensor) ° 201126333 working circuit 420 is electrically connected to the voltage regulating module 41 〇, the amplifying circuit 440 and the temperature sensor 450 respectively. The test led elements 430 are distributed. In the working circuit 420, the working circuits 42 are electrically connected. The amplifying circuit 440 is electrically connected to the PCI-E connecting units 460. In addition, as shown in FIG. 1 and FIG. 2, the test module 2 further includes an interface card 500. Since the interface adapter card 5 has enough connection pins (pins) It can be compatible with the specifications of the connection interface of a variety of passive backplanes. Therefore, the interface riser card can become a passive backplane 1〇〇 PCI E expansion backplane 400) and the test module 200 bridge. Whether the third connection unit 110 of the specification of the module No. ^2 and the passive backplane 1 ''back panel 4') has a phase-moving handle ι'ηη\ interface The adapter is connected to the switch 5, and the compatibility of the test module 200 is tested. The expanded backplane can be provided with a higher backplane and as shown in Fig. 3. FIG. 3 is a flow diagram showing the passive connection of the present invention. When the test module 200 is expanded as follows: After the expansion of the backplane 400 and a computer device 600, the steps are tested from the computer device _ get a test * 'test because different test objects have different test content, therefore, 245 By means of the first computer device _, a corresponding test content (4) of the control unit 240 and the second connection unit 230 are loaded into the indication of the micro-blade body 245. According to the test content 1 β The expansion board 400 performs a test step (302) 201126333 to step (308). Step (302) The microprocessor unit 240 provides a power signal to the PCI-E expansion backplane 4 by using the universal input/output (GPIO) interface 241. In this step, the microprocessor unit 240 activates the PCI-E expansion backplane 4 The voltage regulation module 410 is configured such that the micro processing unit 240 can provide a power signal to the PCI-E expansion backplane 400. The voltage adjustment module 410 sequentially performs the components of the PCI-E expansion backplane 400 (for example, the working circuit 420, the test LED component 430, the amplification circuit 440, and the temperature sensor 450, etc.) according to a power supply sequence. Power supply and conversion voltage work. In summary, this step provides the appropriate power for each component of the PCI-E expansion backplane 400. The general-purpose input/output interface 241 has, for example, pins such as P12V, P3V3_STBY, and PI. 8V. Step (303) The microprocessor unit 240 initializes the PCI-E expansion backplane 400 by using the programmatic input/output (PIO) interface 242. In this step, the microprocessor unit 240 sends an initialization setting signal to the PCI-E expansion back. The components of the board 400 are initialized to set the signal, and after the components are initialized, the initialization response signal sent by the PCI-E expansion backplane 400 after initialization is obtained. The stylized input/output interface 242 has, for example, pins (riser_present ’ PWD—G—MLB ’ PWD—G—RISE R , Mezzl — ID , Mezz 2 — ID , RST — N ). Step (304) The micro processing unit 240 detects the test LED elements 430 by using the general purpose input/output (GPIO) interface 241: in this step, the micro processing unit 240 sends a detection signal to the working circuit 420, and detects the test LED elements. Whether the 430 can be expected to illuminate or extinguish 201126333 to provide the tester with the correct test information. For example, the test LED component 430 is illuminated to indicate that the power signal has passed. The universal input/output interface 241 has, for example, pins such as HTH_LED_RED, HTH_LED_G REEN and U ID_ON. Step (305) The microprocessor unit 240 selects and uses the PCI-E device 470 by using the general-purpose input/output (GPIO) interface 241 and sets its specifications: In this step, the microprocessor unit 240 selects the PCI-E device by issuing a selection signal. The appropriate specifications for 470. For example, if the general-purpose input/output interface 241 has pins such as PCIE_x8/xl6_select, the selection signal sent by the micro-processing unit 240 can select the specification of PCIE_x8 or PCIE_xl6. In addition, the microprocessor unit 240 also selects any PCI-E device 470 on the PCI-E expansion backplane 400 by issuing a selection signal. For example, if the general-purpose input/output interface 241 has pins such as PCIE_G1/G2_select, the selection signal sent by the micro-processing unit 240 can select to use any PCI-E device 470 representing PCIE_G1 or PCIE-G2. In practice, since the selection signal is transmitted to the PCI-E expansion backplane 400, the amplification circuit 440 can enhance the selection signal so that the energy is not weakened. Step (306) The microprocessor unit 240 sends a test signal to the PCI-E expansion backplane 400 via the system-wide management bus flow (SMbus) interface 243: In this step, the microprocessor unit 240 uses the test signal to PCI-E. Expand the backplane 400 into the test. The microprocessor unit 240 sends a test signal to the tested unit on the PCI-E expansion backplane 400. After receiving a response test signal, it can know whether the tested unit is normal. For example, the micro-processing unit 240 sends a test signal to each of the temperature sensors 450 of the PCI-E expansion 201126333 charging backplane 400. After receiving the test signals, each temperature sensor 450 receives the test signal through the whole system. The (SMbus) interface 243' returns a test response signal to the microprocessor unit 240. The system-wide management sink (SMbus) interface 243 has, for example, SMB_DTA, SMB-CLK, and the like. Step (307) The microprocessor unit 240 stops providing the power signal to the PCI-E expansion backplane 400 by using the universal input/output (GPIO) interface 241. In this step, the microprocessor unit 240 turns off the voltage regulation module 410 to stop providing Power signal to PCI-E expansion backplane 400. Step (308) The microprocessor unit 240 feeds back a test result to the computer device 600. In this step, the microprocessor unit 240 feeds back the list of the tested unit and the corresponding response test signal to the computer device 600. In this way, the tester can know whether all the tested units on the expansion backboard are normal. In summary, the test module of the passive backplane of the present invention and the method for testing the passive backplane can test the PCI-E expansion backplane without using an active computer. Thus, the present invention has the following advantages: i. Simplifies the human-machine interaction test between the blade server and the PCI-E expansion backplane, thereby improving the efficiency' and reducing the error of human judgment and causing the test to fail. 2 Reduced the test time for functional testing of the PCI-E expansion backplane to improve production costs and product quality. The third section is inferior to the hardware acquisition cost required to obtain the blade. The present invention has been disclosed in the above embodiments, and is not intended to limit the present invention. [S.1 12 201126333, any person skilled in the art can make various changes and retouching without departing from the spirit of the present invention. Insurance. Within the scope, the one defined by the application for the hometown m shall prevail. BRIEF DESCRIPTION OF THE DRAWINGS In order to make the above and other objects, features and advantages of the present invention more obvious and understandable, the detailed description of the drawings is as follows: The test module of the passive backplane is shown in the block diagram of a ^ A. Figure 2 is a block diagram showing the test module of the passive backplane of the present invention. An embodiment FIG. 3 is a flow chart showing a method for testing a passive backplane according to the present invention. Gongshi example [main component symbol description] 310 fourth connection unit 400 PCI-E expansion backplane 410 voltage adjustment module 420 working circuit 430 test LED element 4 cattle 440 amplification circuit 450 temperature sensor 460 PCI-E connection unit 470 PCI-E device 500: interface adapter card

100 :被動背板 110 :第三連接單元 2 0 0 :測試模組 210 :電路板 220 :第一連接單元 230 :第二連接單元 240 :微處理單元 241 :通用輸入輸出界面 242 :程式化輪入輸出界面 243 :全系統管理匯排流界面 [S.1 13 201126333 244 内部積體電路界面 600 :電腦裝置 245 測試内容韌體 301-308 :步驟 300 監控裝置100: passive backplane 110: third connection unit 200: test module 210: circuit board 220: first connection unit 230: second connection unit 240: micro processing unit 241: universal input and output interface 242: program wheel Input and output interface 243: Full system management exchange flow interface [S.1 13 201126333 244 Internal integrated circuit interface 600: Computer device 245 Test content firmware 301-308: Step 300 Monitoring device

[s.l 14[s.l 14

Claims (1)

201126333 七、申請專利範圍: 1. 一種被動背板之測試模組,包括: 一電路板; 一第一連接單元,位於該電路板上,用以活動地連接 一被動背板; 一第二連接單元,位於該電路板上,用以活動地連接 一監控裝置;以及 一微處理單元,位於該電路板上,電性連接該第一連 接單元與該第二連接單元,具一通用輸入輸出界面、一程 式化輸入輸出界面及一全系統管理匯排流界面, 其中當該微處理單元對該被動背板進行測試時,該微 處理單元藉由該通用輸入輸出界面對該被動背板提供電 源、藉由該程式化輸入輸出界面對該被動背板進行初始 化、藉由該全系統管理匯排流界面對該被動背板進行測 試,以及藉由該第二連接單元回饋一測試結果至該監控裝 置。 2. 如請求項1所述之被動背板之測試模組,其中該微 處理單元更具一測試内容韌體,該微處理單元依據該測試 内容韌體對該被動背板進行測試。 3. 如請求項1所述之被動背板之測試模組,其中該被 動背板為一高速周邊元件聯繫擴充背板、一硬碟擴充背板 或一風扇背板。201126333 VII. Patent application scope: 1. A passive backplane test module, comprising: a circuit board; a first connection unit on the circuit board for movably connecting a passive backplane; a second connection The unit is located on the circuit board for movably connecting a monitoring device; and a micro processing unit is disposed on the circuit board, electrically connecting the first connecting unit and the second connecting unit, and has a universal input and output interface a programmable input/output interface and a full system management sink flow interface, wherein when the micro processing unit tests the passive backplane, the micro processing unit supplies power to the passive backplane by using the universal input/output interface The passive backplane is initialized by the stylized input/output interface, the passive backplane is tested by the system-wide management and exhaust flow interface, and a test result is fed back to the monitoring by the second connection unit. Device. 2. The test module of the passive backplane according to claim 1, wherein the micro processing unit further has a test content firmware, and the micro processing unit tests the passive backplane according to the test content firmware. 3. The passive backplane test module of claim 1, wherein the passive backplane is a high speed peripheral component associated with the expansion backplane, a hard disk expansion backplane or a fan backplane. 15 201126333 4. 如請求項3所述之被動背板之測試模組,其中該高 速周邊元件聯繫擴充背板具有一電壓調節模組,該微處理 單元藉由該通用輸入輸出界面啟動該電壓調節模組,以提 供電源訊號至該高速周邊元件聯繫擴充背板。 5. 如請求項3所述之被動背板之測試模組,其中該高 速周邊元件聯繫擴充背板具有一工作電路及多個測試發光 二極管元件,該些測試發光二極管元件分布於該工作電路 中,並電性連接該工作電路,其中該微處理單元藉由該通 用輸入輸出界面檢測該些測試發光二極管元件是否發亮或 熄滅。 6. 如請求項5所述之被動背板之測試模組,其中該高 速周邊元件聯繫擴充背板具有多個溫度感測器,該些溫度 感測器電性連接該工作電路,其中該微處理單元藉由該全 系統管理匯排流界面發出一測試訊號至該些溫度感測器, 並藉由該全系統管理匯排流界面接收一自該些溫度感測器 所回饋之測試回應訊號。 7. 如請求項3所述之被動背板之測試模組,其中該高 速周邊元件聯繫擴充背板具有多個高速周邊元件聯繫連接 單元,該些高速周邊元件聯繫連接單元分別可供插接一高 速周邊元件聯繫裝置,其中該微處理單元藉由該通用輸入 輸出界面選擇該些高速周邊元件聯繫裝置以及該些高速周 邊元件聯繫裝置之規格。 201126333 8. 如請求項1所述之被動背板之測試模組,更包括一 界面轉接卡,該界面轉接卡連接該第一連接單元與該被動 背板,其中該界面轉接卡之連接規格與該被動背板之連接 規格相容。 9. 一種測試被動背板之方法,應用於一被動背板之測 試模組,該測試模組連接一高速周邊元件聯繫擴充卡及一 電腦裝置,該方法包括: 自該電腦裝置取得一測試内容韌體; 依據該測試韌體資料,藉由一通用輸入輸出界面提供 電源至該高速周邊元件聯繫擴充卡; 依據該測試韌體資料,藉由一程式化輸入輸出界面對 該高速周邊元件聯繫擴充卡進行初始化; 依據該測試韌體資料,藉由另一通用輸入輸出界面檢 測該高速周邊元件聯繫擴充卡上之多個測試發光二極管元 件; 依據該測試韌體資料,藉由又一通用輸入輸出界面設 定該高速周邊元件聯繫擴充卡上之多個高速周邊元件聯繫 裝置之規格; 依據該測試韌體資料,藉由一全系統管理匯排流界面 測試該高速周邊元件聯繫擴充卡;以及 回饋一測試結果至該電腦裝置。 10. 如請求項9所述之測試被動背板之方法,其中發出 17 201126333 測試訊號至該高速周邊元件聯繫擴充卡與回饋該測試結果 * 至該電腦裝置之間,包括: - 依據該測試韌體資料,藉由該通用輸入輸出界面停止 提供該電源至該高速周邊元件聯繫擴充卡。The test module of the passive backplane of claim 3, wherein the high speed peripheral component contact expansion board has a voltage regulation module, and the microprocessor unit activates the voltage regulation by the universal input and output interface. The module provides a power signal to the high speed peripheral component to contact the expansion backplane. 5. The test module of the passive backplane of claim 3, wherein the high speed peripheral component is connected to the expansion backplane and has a working circuit and a plurality of test light emitting diode components, wherein the test light emitting diode components are distributed in the working circuit. And electrically connecting the working circuit, wherein the micro processing unit detects whether the test LED components are illuminated or extinguished by the universal input/output interface. 6. The test module of the passive backplane of claim 5, wherein the high speed peripheral component is connected to the expansion backplane and has a plurality of temperature sensors, wherein the temperature sensors are electrically connected to the working circuit, wherein the micro The processing unit sends a test signal to the temperature sensors through the system-wide management flow-sending interface, and receives a test response signal fed back from the temperature sensors through the system-wide management flow-sending interface. . 7. The test module of the passive backplane according to claim 3, wherein the high speed peripheral component is connected to the expansion backplane and has a plurality of high speed peripheral component connection connection units, and the high speed peripheral component connection connection units are respectively plugged into one The high speed peripheral component contacting device, wherein the micro processing unit selects the high speed peripheral component contacting device and the specifications of the high speed peripheral component contacting devices by the universal input and output interface. The test module of the passive backplane of claim 1 further includes an interface riser card, the interface riser card connecting the first connection unit and the passive backplane, wherein the interface adapter card The connection specifications are compatible with the connection specifications of the passive backplane. 9. A method for testing a passive backplane, the test module being applied to a passive backplane test module, the test module being coupled to a high speed peripheral component to contact an expansion card and a computer device, the method comprising: obtaining a test content from the computer device Firmware; according to the test firmware data, a universal input and output interface is provided to supply power to the high-speed peripheral component to contact the expansion card; according to the test firmware data, the high-speed peripheral component is expanded by a stylized input/output interface The card is initialized; according to the test firmware data, the high-speed peripheral component is connected to the plurality of test LED components on the expansion card by another universal input/output interface; according to the test firmware data, by another general-purpose input and output The interface sets the specifications of the high-speed peripheral components to contact the plurality of high-speed peripheral component contacting devices on the expansion card; according to the test firmware data, the high-speed peripheral component contact expansion card is tested by a full-system management bus drainage interface; and the feedback one is returned Test results to the computer device. 10. The method of testing a passive backplane according to claim 9, wherein a test signal of 17 201126333 is sent to the high speed peripheral component to contact the expansion card and feedback the test result* to the computer device, including: - according to the test The volume data is stopped by the universal input/output interface to supply the power to the high speed peripheral component to contact the expansion card. 18 [S.118 [S.1
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104216809A (en) * 2013-05-30 2014-12-17 鸿富锦精密工业(深圳)有限公司 Signal testing device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104216809A (en) * 2013-05-30 2014-12-17 鸿富锦精密工业(深圳)有限公司 Signal testing device
CN104216809B (en) * 2013-05-30 2016-12-28 中祥电子商务股份有限公司 Signal-testing apparatus

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