TW201007467A - Interface card with hardware monitor and function extension and computer - Google Patents

Interface card with hardware monitor and function extension and computer Download PDF

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Publication number
TW201007467A
TW201007467A TW97129853A TW97129853A TW201007467A TW 201007467 A TW201007467 A TW 201007467A TW 97129853 A TW97129853 A TW 97129853A TW 97129853 A TW97129853 A TW 97129853A TW 201007467 A TW201007467 A TW 201007467A
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Taiwan
Prior art keywords
interface
pcie
interface card
chipset
card
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TW97129853A
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Chinese (zh)
Inventor
hui-yuan Zhang
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Advantech Co Ltd
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Priority to TW97129853A priority Critical patent/TW201007467A/en
Publication of TW201007467A publication Critical patent/TW201007467A/en

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Abstract

An interface card with hardware monitor and function extension is provided. The present invent includes a PCI interface, a PCIe interface, a chipset, a hardware monitor unit and a CPU. The chipset supported with PCI and PCIe function is coupled to the PCI interface and PCIe interface. The hardware monitor is used to detect the interface card and detect temperature and fan status of a case system.. The CPU is used to control the interface card. Whereby the present invention can expend function through the PCIe interface.

Description

201007467 九、發明說明: 【發明所屬之技術領域】 本發明係為一種介面卡’特別是關於一種支援有pCIe 傳輸規格之介面卡及其電腦襞置。 【先前技術】 對於工業電腦或是伺服器而言,其設計方式是與一般 個人電腦有所不同。如第一圖所示係為使用於工業電腦或 _ 是伺服器中的一介面卡9,此介面卡9中主要是在—印刷 電路板90上設置有中央處理單元92、北橋晶片組94、南 橋晶片組96等元件,由於此介面卡9具有電腦中主要運算 的架構,因此又可稱做是CPU卡,而此介面卡9根據功能 上設計之需求,尚可整合其他的電腦元件,例如是顯示單 元、記憶體單元、網路單元、通訊傳輸單元、聲音單元、 周邊裝置輸入單元等其他元件。 而以南橋晶片組96而言目前皆已同時支援pci ❹ (Peripheral Component Interconnect)及 PCIe ( Peripheral201007467 IX. Description of the Invention: [Technical Field] The present invention relates to an interface card, and more particularly to an interface card supporting a pCIe transmission specification and a computer device thereof. [Prior Art] For industrial PCs or servers, it is designed differently from ordinary PCs. As shown in the first figure, it is an interface card 9 used in an industrial computer or a server. The interface card 9 is mainly provided with a central processing unit 92 and a north bridge chip set 94 on the printed circuit board 90. The south bridge chipset 96 and other components, because the interface card 9 has the main computing architecture in the computer, it can also be called a CPU card, and the interface card 9 can integrate other computer components according to the functional design requirements, for example It is a display unit, a memory unit, a network unit, a communication transmission unit, a sound unit, a peripheral device input unit, and the like. The South Bridge Chipset 96 currently supports both Pci al (Peripheral Component Interconnect) and PCIe (Peripheral).

Component Interconnect Express)等傳輸規格,然而以第一 圖所示之介面卡9而言其對外訊號傳輸使用的介面係為 PCI介面98,但對於如何使用南橋晶片組96所支援的pcie 傳輸規格’此介面卡9並未相對提供有可供傳輸之pcie /1面且對於南橋晶片組96而言也並未善加利用其本身所 提供支援PCIe的資源’故如何有效利用南橋晶片組96中 支援的PCIe傳輸規格,同時提升介面卡9的擴充功能已是 一個有待克服的課題。 201007467 【發明内容】 2明所要解決的技術問題,在於提供—種具有監控 擴充功能之介面卡及電腦裝置,以解決習知直 ==线PCIe傳輸規格之介斜無法絲_此pae 2的問題。本發明之目的係使介面卡可以透過pcie介面 來執仃硬體監控指示、方便整線及擴充介面卡之功能。Component Interconnect Express) and other transmission specifications, however, the interface used for external signal transmission in the interface card 9 shown in the first figure is the PCI interface 98, but how to use the pcie transmission specification supported by the south bridge chipset 96 The interface card 9 is not provided with a pcie /1 surface for transmission and does not make good use of the resources for supporting the PCIe for the south bridge chip set 96. Therefore, how to effectively utilize the support of the south bridge chipset 96 The PCIe transmission specification and the expansion of the interface card 9 have been an issue to be overcome. 201007467 [Summary of the Invention] 2 The technical problem to be solved is to provide a kind of interface card and computer device with monitoring and expansion function, so as to solve the problem that the conventional direct == line PCIe transmission specification can not be slanted _ this pae 2 problem . The purpose of the present invention is to enable the interface card to perform the functions of hardware monitoring indication, convenient whole line and extended interface card through the pcie interface.

為了解決上述技術問題,根據本發明的一種方案,提 具有監控指示及介面擴充魏之介面卡,其係適用 機相系統,該介面卡包括:一 PCI介面、一 pcie介面、 2片组、-監控單元及—中央處理單元。其中晶片組輛 ,於PCI介面與PCIe介面’且晶片組支援有ρα介面與 介面;監控單4接於PCIe介面,用以對介面卡及 機箱系統進行硬體監控,並根據監控結果而透過p c J e介面 輸出至>一指示訊號給機箱系統;中央處理單元耦接於晶 片組與監控單元,且用以控制介面卡之運作。 —在本發明的實施例中,該晶片組係於該PCIe介面中 有一配置腳位,該晶片組並根據該配置腳位的訊號來 δ又疋該PCIe介面的傳輸組態。 —在本發明的實施例中,該晶片組係於該PCIe介面中 疋義有一 ATX電源區,以使該介面卡透過該pcie介面來 支援使用ATX電源。 ^在本發明的實施例中,該晶片組係於該PCIe介面中 疋義有一 SMBus訊號區,以使該介面卡透過該pcie介面 來支援使用SMBus。 201007467 在本發明的實施例中,該晶片組係於該PCIe介面中 定義有一面板控制區,以使該介面卡中的電源開關 (PWRBT SW)、重置開關(RESET SW)、電源指示燈 (PWRLED)、硬碟指示燈(HDD LED)的訊號透過該面 板控制區進行傳輸。In order to solve the above technical problem, according to an aspect of the present invention, a monitoring indication and an interface expansion Wei interface card are provided, which is applicable to a machine phase system, and the interface card includes: a PCI interface, a pcie interface, a 2-chip group, Monitoring unit and - central processing unit. The chipset is in the PCI interface and the PCIe interface' and the chipset supports the ρα interface and interface; the monitoring single 4 is connected to the PCIe interface for hardware monitoring of the interface card and the chassis system, and through the monitoring result according to the PC The J e interface outputs an > an indication signal to the chassis system; the central processing unit is coupled to the chip set and the monitoring unit, and is configured to control the operation of the interface card. In the embodiment of the present invention, the chipset has a configuration pin in the PCIe interface, and the chipset is configured according to the signal of the configuration pin and the transmission configuration of the PCIe interface. In an embodiment of the invention, the chipset has an ATX power supply area in the PCIe interface to enable the interface card to support the use of the ATX power supply through the pcie interface. In the embodiment of the present invention, the chipset has a SMBus signal area in the PCIe interface, so that the interface card supports the use of the SMBus through the pcie interface. 201007467 In the embodiment of the present invention, the chipset defines a panel control area in the PCIe interface to enable a power switch (PWRBT SW), a reset switch (RESET SW), and a power indicator light in the interface card ( The signal of the PWRLED) and the hard disk indicator (HDD LED) is transmitted through the panel control area.

為了解決上述技術問題,根據本發明的另一種方案, 提供一種電腦裝置,包括:一機箱及一介面卡。其中機箱 具有一背板(back plane ),且背板設置有一 PCI插槽、一 第一 PCIe插槽及至少一第二PCIe插槽,該第二PCIe插槽 耦接於第一 PCIe插槽,機箱並提供一偵測訊號輸出。介面 卡包括.一 PCI介面、一 PCIe介面、一晶片組、一監控 單元及一中央處理單元,其中晶片組耦接於PCI介面與 PCIe介面,且晶片組支援有pci介面與PCIe介面,ρ(:Ι 介面插接於PCI插槽,PCIe介面插接於第一 PCIe插槽; 監控單元耦接於PCIe介面,並對介面卡及機箱系統進行硬 體監控’並根據監控結果透過PCIe介面輸出至少一指示訊 號給系統機箱;中央處理單元耦接於晶片組與監控單元, 且用以控制介面卡之運作。 因此透過上述實施方式,本發明係透過PCIe介面來 達充擴充介面卡之魏,且在PCIe介面巾定義有Ατ 源區、SMBus訊號區及面板控制區來執行相對的功 作,並使界介面卡中之監控單元可以經由此pc 料 外監控一偵測訊號。 甸衣對 以上之概述與接下來的詳細說明及附圖,皆是 進-步說明本發明為達成預定目的所採取之方式 月匕 功效。而有關本發明的其他目的及優點,將在後續的2 201007467 及圖式中加以闡述。 【實施方式】 倾明係提供-種具有監控指示及介面擴充功能之 - 介面卡,主要透過擴充功能的方式來增加介面卡的功能, 並以介面卡中的PCIe介面作為擴充功能的來源管道,以使 得介©卡可以透過此PCIe介面取得外在硬體訊號來進行 監測指示的功能操作,同時並使Pcie介面可以執行其它額 ® 外的擴充功能,藉以使介面卡執行功能可以更多元化,以 及更有效利用介面卡中之即有資源。 接下來請參閱第二圖,其係為本發明實施例之一具有 監控指示及介面擴充功能之介面卡之功能方塊圖。本實施 例所述之具有監控指示及介面擴充功能之介面卡丨係為一 CPU卡,且此介面卡1係可與工業電腦或伺服器中的一背 板(backplane)插接結合,介面卡i主要包括有一中央處 ,單元12、一北橋晶片組14、一南橋晶片組16、一監控 • 單元18、一 PCI介面17及一 PCIe介面19,而本實二二 所述之介面卡1為了方便說明起見僅對本發明所提及之必 =兀件提出說明,然而對於熟習該項技藝者而言當可知悉 "面卡1 (CPU卡)仍可以包括顯示單元、記憶體單元、 =路單元、通訊傳輸單元、聲音單A、周邊裝置輸 等其他元件。 而前述中央處理單元12、北橋晶片組14、南橋晶片 組16、監控單元18、ρα介面17&pcie介面置 於/印刷電路板(PCB) 1〇上,而此印刷電路板1〇之長 •^係以工業電腦中規範的半長度(Half_sized)作為舉例說 201007467 明,使得本實施例所述之介面卡1為一短卡的規格,但本 發明所述之介面卡1之尺寸並不以此為限,例如此介面卡 1也可以根據使用上的實際需求設計成類似長卡具有高擴 充性的規格。 、 復參閱第二圖,其中北橋晶片組14耦接於中央處理 單元12與南橋晶片組16之間’南橋晶片組16分別與北橋 晶片組14、監控單元18、PCI介面17、PCIe介面19輛接, 中央處理單元12主要控制介面卡1之整體運作,中央處理 ❹ 單元12及北橋晶片組14之功能係屬於習知技術,在此即 不予以詳細說明。本實施例所述之南橋晶片組16除了具有 原的功能之外,同時整合了多個額外擴充的功能,例^本 只施例之南橋晶片組16是可以同時支援pci介面、pcie 介面’且可以透過監控單元18來監控介面卡内、外之硬體 工作狀況並由監控單元18根據偵測結果輸出指示訊號來 顯示硬體是否正常,以及透過Pde介面19來擴充介面卡 1之功能。 鲁 接下來將說明本實施例之介面卡1如何透過PCie介 面19來擴充功能,並請一併參閱第三圖,第三圖所示之 PCle之接腳規格係以pciex 4的傳輸路徑進行舉例說 月,南橋晶片組1 ό同時對此PCIex 4的接腳定義有幾個 , 主要的功能,具體來說這些功能是如下所述:其中的接腳 PBTp〔 〇 ·· 3〕、pETn〔 〇 : 3〕、pERp〔 〇 : 3〕、pERp〔 〇 : 〕、REFCLK〔 0 : 3〕、WAKE#、PERST#、CFG 係用來供 ,仃PCIe的傳輪功能;接腳SMCLK、SMDAT係被南橋 曰日片組16定義成SMBus訊號區190,而可供用來傳輸 SlVlBus 的訊號;接腳 PSON#、PWRGD、+5Vaux 係被南 201007467 橋晶片組16定義成ATX電源區192,而可供用來傳輸Ατχ 的電源訊號;接腳 PWRBT#、HRIjED+、 HDDLED#係被南橋晶片組16定義成面板控制區194,而 可供用來傳輸面板的控制訊號,在此所指面板控制訊號是 指電腦裝置中之控制面板上所傳輸之訊號,如電源開關 (PWRBT SW)、重置開關(RESET sw)、In order to solve the above technical problem, according to another aspect of the present invention, a computer device is provided, including: a chassis and an interface card. The chassis has a backplane, and the backplane is provided with a PCI slot, a first PCIe slot and at least one second PCIe slot, and the second PCIe slot is coupled to the first PCIe slot. The chassis provides a detection signal output. The interface card includes a PCI interface, a PCIe interface, a chipset, a monitoring unit, and a central processing unit. The chipset is coupled to the PCI interface and the PCIe interface, and the chipset supports the pci interface and the PCIe interface, ρ( The 介 interface is inserted into the PCI slot, and the PCIe interface is plugged into the first PCIe slot; the monitoring unit is coupled to the PCIe interface, and performs hardware monitoring on the interface card and the chassis system and outputs at least the PCIe interface according to the monitoring result. An indication signal is sent to the system chassis; the central processing unit is coupled to the chipset and the monitoring unit, and is used to control the operation of the interface card. Therefore, through the above embodiments, the present invention is configured to extend the interface card through the PCIe interface, and The PCIe interface towel defines a 源τ source area, an SMBus signal area, and a panel control area to perform relative functions, and the monitoring unit in the interface card can monitor a detection signal via the PC material. The summary and the following detailed description and the accompanying drawings are a further description of the manner in which the present invention is employed in order to achieve the intended purpose. The purpose and advantages will be explained in the following 2 201007467 and the drawings. [Embodiment] The interface provides a kind of interface card with monitoring indication and interface expansion function, mainly through the expansion function to increase the interface card. Function, and use the PCIe interface in the interface card as the source pipeline of the expansion function, so that the interface card can obtain the external hardware signal through the PCIe interface to perform the function of monitoring indication, and enable the Pcie interface to perform other functions. The expansion function outside the ® can make the interface card execution function more diversified, and more effectively utilize the resources in the interface card. Next, please refer to the second figure, which is a monitoring indication according to one embodiment of the present invention. And a functional block diagram of the interface card of the interface expansion function. The interface card with the monitoring indication and the interface expansion function described in this embodiment is a CPU card, and the interface card 1 can be combined with an industrial computer or a server. a backplane plug-in combination, the interface card i mainly includes a central portion, a unit 12, a north bridge chip set 14, a south bridge chip set 16, A monitoring unit 18, a PCI interface 17 and a PCIe interface 19, and the interface card 1 described in the second embodiment of the present invention is only for the convenience of the description, and the description is only for the reference to the present invention. As far as the skilled person is concerned, the face card 1 (CPU card) can still include other components such as a display unit, a memory unit, a channel unit, a communication transmission unit, a sound list A, and a peripheral device. The unit 12, the north bridge chip set 14, the south bridge chip set 16, the monitoring unit 18, the ρα interface 17 & pci interface are placed on a printed circuit board (PCB) 1 ,, and the printed circuit board is long The specification of the half length (Half_sized) in the computer is as an example, 201007467, so that the interface card 1 described in this embodiment is a short card, but the size of the interface card 1 according to the present invention is not limited thereto. For example, the interface card 1 can also be designed to have a high expandability specification similar to a long card according to actual needs in use. Referring to the second figure, the north bridge chipset 14 is coupled between the central processing unit 12 and the south bridge chipset 16 'the south bridge chipset 16 and the north bridge chipset 14, the monitoring unit 18, the PCI interface 17, and the PCIe interface 19 The central processing unit 12 mainly controls the overall operation of the interface card 1. The functions of the central processing unit 12 and the north bridge chip group 14 are conventional techniques and will not be described in detail herein. The south bridge chip set 16 described in this embodiment has a plurality of additional extended functions in addition to the original functions. For example, the south bridge chip set 16 of the present embodiment can simultaneously support the pci interface and the pcie interface. The monitoring unit 18 can monitor the hardware working conditions inside and outside the interface card, and the monitoring unit 18 outputs an indication signal according to the detection result to display whether the hardware is normal, and expands the function of the interface card 1 through the Pde interface 19. Next, how the interface card 1 of this embodiment is expanded through the PCie interface 19, and please refer to the third figure. The pin specifications of the PCle shown in the third figure are exemplified by the transmission path of the pciex 4. Said the month, the South Bridge chipset 1 ό at the same time there are several pins for this PCIex 4 definition, the main functions, specifically these functions are as follows: the pins PBTp [ 〇·· 3], pETn [ 〇 : 3], pERp [ 〇: 3], pERp [ 〇 : ], REFCLK [ 0 : 3], WAKE #, PERST #, CFG are used for the transmission function of PCIe; pins SMCLK, SMDAT are The south bridge 曰 片 片 16 is defined as the SMBus signal area 190, and is available for transmitting the SlVlBus signal; the pins PSON#, PWRGD, and +5Vaux are defined by the south 201007467 bridge chip set 16 as the ATX power area 192, and are available for use. The power signal of the transmission Ατχ; the pins PWRBT#, HRIjED+, HDDLED# are defined by the south bridge chipset 16 as the panel control area 194, and are used to transmit the control signals of the panel, where the panel control signal refers to the computer device. The signal transmitted on the control panel, A power switch (PWRBT SW), the reset switch (RESET sw),

(PWRLED)、硬碟指示燈(HDD咖)等訊號;接腳 Tem/_LED#、Fan—fail—LED係被南橋晶片組16定義成硬 體監控指示區1%,而可供監控單元18用來傳輸指示訊號 至機箱系統(圖略)中顯示,此指示訊蚊指偵測介面卡 及外部之硬體工作的訊號。 刖述接腳CFG係屬於 —一腳位主要用來設定 介面19β的傳輸組態,而使得南橋晶片組16可透過此配置 接腳來得知背板中關於PCIe插槽的配置。舉例來說pCk X 4與PCIex 1的接腳數量是不同,因此當介面卡工之 PCIe介面19插接於背板之PCIe插槽,南橋晶片组16可 以透過此配置接腳即可得知此pcie插槽是屬於i 或PCIex 4之傳輸路徑,而自動將此pae介面〗9設定成 適合供此PCle插槽傳輸的組態。此外本實施例對於PCIe 介面所使用之傳輸鐘並秘以祕舉例之ρα;χ 1或 ^ ^而是可以根據實施傳輸頻寬操作上的需求而來使 用不同的傳輪路徑。 僅口 於本實施例之介面卡而言,PCIe介面19並非 i執行PCIe的<傳輸舰,而是尚包括前述可支援 管及傳二㈣、可支& ATX電_輸、可傳輸面板控制 …傳輪_硬體讀的勤_料擴充舰的應用。 10 201007467 再者介面卡1中之監控單元18可以從介面卡1及機箱係統 中取得相關硬體的偵測訊號,進而可以對介面卡1及外部 之硬體監控其工作狀況,而此硬體工作訊號係指介面卡工 或是機箱系統中之風扇轉速訊號、電壓偵測訊號、溫度偵 測訊號。而監控單元18取得機箱系統中相關硬體的偵測訊 號可以透過介面卡1本身的介面插接於機箱系統使用時來 取得。最後監控單元18可以將監控結果進一步通知中央處 理單7G 12,以使中央處理單元12於介面卡1之内部元件 或是外部元件出現工作異常時透過發出警訊的方式,而能 儘早使相關人員可以進行相關預防措施。 另外PCIe介面19之ATX電源區192將使介面卡i 直接透過PCIe介面19傳輸ATX電源訊號,而使得介面卡 1不用再透過外接排線(cable)的方式連接至背板來取得 ATX電源支援。而介面卡1中之電源開關(pwRBT sw)、 重置開關(RESET SW)、電源指示燈(PWRLED)、硬碟 指示燈(HDDLED)等訊號傳輸亦是透過PCIe介面19中 之面板控制區194來進行傳輸,如此使得介面卡1不用再 以排線的方式來與背板連接而來傳輸這些訊號。因此本實 施例在PCIe介面19中定義有ATX電源區192及面板控制 區194來傳輸相關訊號,將使介面卡1於組裝在背板使用 時’可避免使用過多的排線,減少組裝複雜度及讓電腦系 統於整線時更方便。 接下來請繼續參閱第四圖,其係為本發明介面卡組展 於電腦裝置之示意圖,並請一併配合參考第二及第三圖。 第四圖所示之電腦裝置2包括有一介面卡1及一機箱系統 20,且機箱系統2〇中具有一背板3,其中此介面卡1的 11 201007467 PCI介面17及PCIe介面19分別對應插接於背板3的PCI 插槽31及第一 pcie插槽32,且本實施例所述之PCI介面 17係為PCI金手指及pcie介面19係為pcie金手指。第 一 PCIe插槽32並與背板3的一第二pcie插槽33耦接, 且背板3中的第一 pcie插槽32與第二pcie插槽33係屬 於PCIex 4的傳輸路徑’而介面卡1的pCIe介面19即可 根據CFG接腳來得知第一 pcie插槽32的傳輸路徑為pcie X 4的傳輸路徑’因此南橋晶片組16即可自動將此 介面19設定為pciex 4的傳輸路徑使用。 另外,機相糸統20中更設置有一溫度感測指示介面 34及一風扇轉速失敗指示介面35,此溫度感測指示介面 34係根據一溫度感測指示訊號來進行顯示及此風扇轉速 失敗指示介面35係根據一風扇轉速失敗指示訊號來進行 指示,溫度感測介面34及風扇轉速失敗指示介面35並以 發光元件(如發光二極體)來顯示指示訊號,且溫度感測 介面34及風扇轉速失敗指示介面35係分別耦接於背板3 上的第一 PCIe插槽32。背板3中更設置有一 SMBus連接 器38,此SMBus連接器38係耦接於第一 PCIe插槽%。 背板3中的面板控制介面36及ATX電源介面37亦分別耦 接於第一 PCIe插槽,其中的面板控制介面36係用來傳輪 電源開關(PWRBT SW)、重置開關(RESET SW)、電源 指示燈(PWRLED)、硬碟指示燈(HDD LED)等訊號, 並且主要是透過跳針(jump)的方式來連接至機箱系統 中的一控制面板(圖略)。 因此介面卡1插接於背板3時,pcie介面19中之 SMBus訊號區190係可與背板3iSMBus連接器%傳輸 12 201007467 訊號,PCIe介面19中之ATX電源區192係可接收背板3 之ATX電源介面37中之電源訊號,PCIe介面19中之面 板控制區194係可與背板3中的面板控制介面36傳輸訊 號,PCIe介面19之硬體監控指示區196所傳送到的指^ 訊號係為介面卡1或機箱系統20中的溫度感測指示訊號及 風扇轉速失敗指示訊號,但本實施例指示訊號並不以此為 限亦可針對其他的硬體元件工作時的訊號來進行監控。 請再參閱第五圖,其係為供本發明介面卡插接使用之 ❹ 另一煮板之示思圖。如第五圖所示之背板3a,其中的第一 PCIe插槽32a係屬於pciex 1的傳輸路徑,因此設置在背 板3a的第二PCIe插槽33a之數量為4組且分別是屬於 PCIex 1的傳輸路徑。而當介面卡丨插接於背板%時,介 面卡1可透過PCIe介面19中CFG接腳來得知第一 PCIe 插槽32a的傳輪路徑為PCIex丨的傳輸路徑。 綜上所述,本發明所提供之介面卡1可以透過pcie 介面19來達成擴充功能的操作,如可以經由硬體監控指示 • 區196所輸出的指示訊號來得知此介面卡或機箱系統如 中關於溫度是否過高及風扇轉速有無失敗的即時硬體工作 狀況’且可以透過SMBus訊號區190來使背板3可以支援 使用SMBus的應用功能,以及透過將Αχχ電源區192與 面板控制區194來直接與背板3傳輸訊號而不用再透過另 外透過排線傳輸這些訊號,使得介面卡丨僅需透過介 面17及PCIe介面19與背板3連接即可,如此可使電腦裝 置2中的排線使用數量減少,讓電腦裝置2内部的整線更 加方便及整齊。再者透過本實施例介面卡i也將使背板3 的應用可以多樣化,而可以滿足不同客戶的需求。 13 201007467 准,上述所揭露之圖式、說明,僅為本發明之實施例 而已,凡精于此項技藝者當可依據上述之說明作其他種種 之改良’例如熟知此項㈣者亦可以將本實施例介面卡i 中之北橋晶片組14與南橋晶片組16整合成單一晶片組’ 且此單m村提供PCI介面及pcie界面的支援, 而透過此種方式的改良亦可得相同的技術效果, 然而這些 改變仍屬於本發明之發明精神及以下所界定之專利範圍 中〇(PWRLED), hard disk indicator (HDD coffee) and other signals; pin Tem/_LED#, Fan-fail-LED is defined by the south bridge chipset 16 as a hardware monitoring indicator area 1%, and can be used by the monitoring unit 18 To transmit the indication signal to the chassis system (not shown), the indicator mosquito detects the signal of the interface card and the external hardware. The pin CFG belongs to - one pin is mainly used to set the transmission configuration of the interface 19β, so that the south bridge chipset 16 can know the configuration of the PCIe slot in the backplane through the configuration pin. For example, the number of pins of the pCk X 4 and the PCIex 1 is different. Therefore, when the PCIe interface 19 of the interface card is plugged into the PCIe slot of the backplane, the south bridge chipset 16 can know this through the configuration pin. The pcie slot is the transmission path of i or PCIex 4, and this pae interface is automatically set to a configuration suitable for transmission in this PCle slot. In addition, this embodiment uses a different transmission path according to the requirements of the implementation of the transmission bandwidth operation for the transmission clock used by the PCIe interface and the secret example ρα; χ 1 or ^ ^. For the interface card of the present embodiment, the PCIe interface 19 is not a transport ship that performs PCIe, but includes the aforementioned supportable tube and the second (four), the supportable & ATX electric_transmission, and the transmittable panel. Control...Transportation_hardware reading of the application of the equipment. 10 201007467 In addition, the monitoring unit 18 in the interface card 1 can obtain the detection signal of the relevant hardware from the interface card 1 and the chassis system, and can monitor the working condition of the interface card 1 and the external hardware, and the hardware is The working signal refers to the fan speed signal, voltage detection signal and temperature detection signal in the interface card or the chassis system. The detection unit 18 obtains the detection signal of the related hardware in the chassis system and can be obtained by inserting the interface of the interface card 1 itself into the chassis system. Finally, the monitoring unit 18 can further notify the central processing unit 7G 12 of the monitoring result, so that the central processing unit 12 can notify the relevant personnel as soon as possible when the internal component or the external component of the interface card 1 is abnormal in operation. Relevant preventive measures can be taken. In addition, the ATX power supply area 192 of the PCIe interface 19 will enable the interface card i to directly transmit the ATX power signal through the PCIe interface 19, so that the interface card 1 is not connected to the backplane through an external cable to obtain ATX power support. The signal transmission (pwRBT sw), reset switch (RESET SW), power indicator (PWRLED), hard disk indicator (HDDLED) in the interface card 1 is also transmitted through the panel control area 194 in the PCIe interface 19. The transmission is performed such that the interface card 1 does not need to be connected to the backplane in a wired manner to transmit the signals. Therefore, in the embodiment, the ATX power supply area 192 and the panel control area 194 are defined in the PCIe interface 19 to transmit related signals, which will enable the interface card 1 to be used in the backplane to avoid excessive use of the cable and reduce assembly complexity. And make the computer system more convenient when it is in the whole line. Please continue to refer to the fourth figure, which is a schematic diagram of the interface card set of the present invention displayed on the computer device, and please refer to the second and third figures together. The computer device 2 shown in FIG. 4 includes an interface card 1 and a chassis system 20, and has a backplane 3 in the chassis system 2, wherein the interface of the interface card 1 201007467 PCI interface 17 and PCIe interface 19 respectively The PCI interface 31 and the first pcie slot 32 are connected to the backplane 3, and the PCI interface 17 described in this embodiment is a PCI gold finger and a pcie interface 19 is a pcie gold finger. The first PCIe slot 32 is coupled to a second pcie slot 33 of the backplane 3, and the first pcie slot 32 and the second pcie slot 33 in the backplane 3 belong to the transmission path of the PCIex 4 The pCIe interface 19 of the interface card 1 can know that the transmission path of the first pcie slot 32 is the transmission path of the pcie X 4 according to the CFG pin. Therefore, the south bridge chipset 16 can automatically set this interface 19 to the transmission of pciex 4. The path is used. In addition, the temperature sensing indication interface 34 and a fan rotation failure indicating interface 35 are further disposed in the camera 20, and the temperature sensing indication interface 34 is displayed according to a temperature sensing indication signal and the fan speed failure indication is performed. The interface 35 is instructed according to a fan speed failure indication signal, the temperature sensing interface 34 and the fan speed failure indicating interface 35 are displayed by the light emitting element (such as the light emitting diode), and the temperature sensing interface 34 and the fan are displayed. The speed failure indicating interface 35 is respectively coupled to the first PCIe slot 32 on the backboard 3. An SMBus connector 38 is further disposed in the backplane 3, and the SMBus connector 38 is coupled to the first PCIe slot. The panel control interface 36 and the ATX power interface 37 in the backplane 3 are also respectively coupled to the first PCIe slot, wherein the panel control interface 36 is used for the transmission power switch (PWRBT SW) and the reset switch (RESET SW). , power indicator (PWRLED), hard disk indicator (HDD LED) and other signals, and mainly through a jump (jump) to connect to a control panel in the chassis system (not shown). Therefore, when the interface card 1 is plugged into the backplane 3, the SMBus signal area 190 in the pcie interface 19 can transmit 12 201007467 signals to the backplane 3iSMBus connector, and the ATX power area 192 in the PCIe interface 19 can receive the backplane 3. The power control signal in the ATX power interface 37, the panel control area 194 in the PCIe interface 19 can transmit signals to the panel control interface 36 in the backplane 3, and the hardware monitoring indication area 196 of the PCIe interface 19 transmits the finger to the ^ The signal is the temperature sensing indication signal and the fan speed failure indication signal in the interface card 1 or the chassis system 20. However, the indication signal in this embodiment is not limited thereto, and may be performed for signals when other hardware components are working. monitor. Please refer to the fifth figure, which is a schematic diagram of another cooking plate for use in the interface card of the present invention. As shown in FIG. 5, the first PCIe slot 32a belongs to the transmission path of the pciex 1, and therefore the number of the second PCIe slots 33a disposed on the backplane 3a is four groups and belongs to PCIex respectively. 1 transmission path. When the interface card is inserted into the backplane, the interface card 1 can learn that the transmission path of the first PCIe slot 32a is a PCIex丨 transmission path through the CFG pin in the PCIe interface 19. In summary, the interface card 1 provided by the present invention can realize the operation of the extended function through the pcie interface 19, for example, the interface signal outputted by the hardware monitoring indication area 196 can be used to know the interface card or the chassis system. Regarding whether the temperature is too high and the fan speed has failed, the real-time hardware working condition can be used to enable the backplane 3 to support the application function of the SMBus through the SMBus signal area 190, and by using the power supply area 192 and the panel control area 194. The signal is transmitted directly to the backplane 3, and the signal is transmitted through the cable. The interface card can be connected to the backplane 3 through the interface 17 and the PCIe interface 19, so that the cable in the computer device 2 can be connected. The reduction in the number of uses makes the entire line inside the computer device 2 more convenient and tidy. Furthermore, the interface card i of this embodiment will also enable the application of the backplane 3 to be diversified, and can meet the needs of different customers. 13 201007467 The above drawings and descriptions are only examples of the present invention, and those skilled in the art may make other improvements according to the above descriptions. For example, those skilled in the art (4) may also In this embodiment, the north bridge chipset 14 and the south bridge chipset 16 are integrated into a single chipset', and the single m village provides support for the PCI interface and the pcie interface, and the same technology can be obtained through the improvement of this method. Effect, however, these changes still fall within the scope of the invention and the patent scope defined below.

【圖式簡單說明】 第一圖係習知介面卡之示意圖; 擴充功 第二圖係為本發明實施例之—具有監控指示及介面 能之介面卡之功能方塊圖; 第二圖係為本發明PCIe介面之接腳功能示意圖; 弟四圖係為本發明介面卡組裝於電腦裝置之示意圖.、 第五圖係為供本發明介面卡插接使用之一告 父及 。 牙才反之示查 【主要元件符號說明】 1 介面卡 10印刷電路板 12中央處理單元 14 北橋晶片組 16南橋晶片組 17 PCI介面 監控單元 19 PCIe介面 190 SMBus訊號區 192 ATX電BRIEF DESCRIPTION OF THE DRAWINGS The first figure is a schematic diagram of a conventional interface card; the second figure of the expansion is a functional block diagram of an interface card with monitoring indication and interface capability according to an embodiment of the present invention; The schematic diagram of the pin function of the PCIe interface is invented; the fourth figure is a schematic diagram of the interface card assembled in the computer device of the present invention. The fifth figure is used for the interface card insertion of the present invention. The opposite direction of the tooth is shown. [Main component symbol description] 1 Interface card 10 Printed circuit board 12 Central processing unit 14 Northbridge chipset 16 Southbridge chipset 17 PCI interface Monitoring unit 19 PCIe interface 190 SMBus signal zone 192 ATX

14 201007467 194 面板控制區 196 硬體監控指示區 2電腦裝置 20機箱系統 3背板 32第一 PCIe插槽 34溫度感測指示介面 36面板控制介面 31 PCI插槽 33 第二PCIe插槽 35 風扇轉速失敗指示介面 37 ATX電源介面 © 9介面卡 90 印刷電路板 92中央處理單元 94 北橋晶片組 96南橋晶片組 98 PCI介面 ❹ 1514 201007467 194 Panel Control Area 196 Hardware Monitoring Indicator Area 2 Computer Device 20 Chassis System 3 Backplane 32 First PCIe Slot 34 Temperature Sensing Indicator Interface 36 Panel Control Interface 31 PCI Slot 33 Second PCIe Slot 35 Fan Speed Failure indication interface 37 ATX power interface © 9 interface card 90 Printed circuit board 92 central processing unit 94 Northbridge chipset 96 Southbridge chipset 98 PCI interface ❹ 15

Claims (1)

201007467 十、申請專利範圍 面擴充功能之介面卡’適用於 一 PCI介面; 一 PCIe介面; 晶片組’轉接於該PCI介面與該PCIe介面,且該 晶片組支援有該PCI介面與該pci4s ;201007467 X. Patent application area interface card for extension function is applied to a PCI interface; a PCIe interface; a chipset is transferred to the PCI interface and the PCIe interface, and the chipset supports the PCI interface and the pci4s; 工單元相接於該PCIe介面,用以對該介面卡 及該機⑽統進行硬體監控,並根據監控結果透過 該PCIe介面輸出至少一指示訊號給該機箱系統; 以及 一中央處理單元’雛於該晶組與該監控單元,用 以控制該介面卡及該機箱系統之運作。 2、 如申請專利範圍第!項所述之具有監控指示及介面擴 充功能之介面卡,其中該晶片組係於該pcie介面中 定義有一配置腳位,該晶片組並根據該配置腳位的訊 號來設定該PCIe介面的傳輸組態。 3、 如申請專利範圍第〗項所述之具有監控指示及介面擴 充功能之介面卡,其中該晶片組係於該pcie介面中 疋義有一 ATX電源區,以使該介面卡透過該pcie介 面來支援使用ATX電源。 4、 如申請專利範圍第1項所述之具有監控指示及介面擴 充功能之介面卡’其中該晶片組係於該pCIe介面中 定義有一 SMBus訊號區,以使該介面卡透過該pcie 介面來支援使用SMBus。 36 201007467 5、 如申請專利範圍第1項所述之具有監控指示及介面擴 充功能之介面卡,其中該晶片組係於該Pde介面中 疋義有一面板控制區’以使該介面卡中的電源開關 (PWRBT SW)、重置開關(RESET SW)、電源指示 燈(PWRLED)、硬磷指示燈(HDD LED)的訊號透 過該面板控制區進行傳輸。 6、 如申請專利範圍第1項所述之具有監控指示及介面擴 充功能之介面卡,其中該監控單元更一步接收該介面 卡或該機箱系統中的硬體工作訊號。 7、 如申請專利範圍第6項所述之具有監控指示及介面擴 充功能之介面卡,其中該硬體工作訊號係為風扇轉速 訊號、電壓偵測訊號或溫度偵測訊號。 8、 如申請專利範圍第丨項所述之具有監控指示及介面擴 充功月b之介面卡,其中該晶片組係為南橋晶片組。 9、 如申請專利範圍第丨項所述之具有監控指示及介面擴 充功能之介面卡,更進一步包括: 一印刷電路板,並設置有該PCI介面、該pCIe介面、 該晶片組、該監控單元及該中央處理單元。 10、 如申請專利範圍第i項所述之具有監控指示及介面擴 充功能之介面卡,其中該PCI介面係為⑽金手指, 該PCIe介面係為PCIe金手指。 11、 一種電腦裝置,包括: 一機相系統,具有一背板(backi>lane),該背板設置 有一 pci插槽、一第一 PCIe插槽及至少一第二 PCIe插槽,該第二PCIe插槽耦接於第一 pcie插 17 201007467 槽;以及 一介面卡’包括: 一 PCI介面,插接於該PCI插槽,· 一 PCIe介面’插接於該第一 pcie插槽; 一晶片組,耦接於該PCI介面與該PCIe介面,且 該晶片組支援有該Pc[介面與該pcie介面; 監控單元,耦接於該PCIe介面,用以對該介面 卡及該機箱系統進行硬體監控,並根據監控結果 β 透過該PCIe介面輸出至少-指示訊號給該系統 機箱進行顯示;以及 一中央處理單元,箱接於該晶片組與該監控單元, 用以控制該介面卡及該機箱系統之運作。 12、如申請專利範圍第11項所述之電腦裝置,其中該晶片 組係於該PCIe介面中定義有一配置腳位,該晶片組並 根據該配置腳位的訊號來設定該PCIe介面的傳輸組 態。 • 13、如申請專利範圍第11項所述之電腦裝置,其中該晶片 組係於該PCIe介面中定義有一 ATX電源區,以使該介 面卡透過該PCIe介面來支援使用ATX電源,且該ΑΤχ 電源區係與該背板的一 ATX電源輸入介面耦接。 14、 如申請專利範圍第丨丨項所述之電腦裝置,其中該晶片 組係於該PCIe介面中定義有一 SMBus訊號區,以使該 介面卡透過該PCIe介面來支援使用SMBus,且該 SMBus訊號區係與該背板的一 SMBus連接器耦接。 15、 如申請專利範圍第11項所述之電腦裝置’其中該晶片 18 201007467 組係於該PCIe介面中定義有_面板控制區,以使兮八 面卡中的電源開關(PWRBTSW)、重置開關(REs£; s w)、電源指邱(PWRLED )、硬碟指㈣⑽d l 的訊號透過該面板控制區進行傳輸,且該面板控 係與該背板的電源開關接腳、重置開關: 示燈接腳及硬碟指示燈接腳耦接。 电你才曰 參 16、 !°申圍第11項所述之電職置,其中該監控 =更v接收該介面卡或該機箱系統中的硬體工作 17、 如申請專利範圍第16項所述之電 工作訊號係為風輕速赠電 ' 广、中該硬體 測訊號。 m就電壓彳貞測訊號或溫度債 I8如申凊專利範圍帛n項所述之電 訊號係輸出至該機箱系統中的指示介H、。中糾不 19、 如申請專利範圍第18 罢 介面係為溫度减測指干今農置,其中該指示 面。 ^則日不"面或風屬轉速失敗指示介 20、 如申請專利範圍第18項所述 21介如面f極_糊4^’其中該指示 組係項所叙電腦聚置,其中該晶片 22ΐ申請專利範圍第11項所述之電驅裝置,更進-步包 -板’並設置有該PCI介 这曰曰片级、該監控料及該中央處理單元。 19 201007467 23、如申請專利範圍第11項所述之電腦裝置,其中該PCI 介面係為PCI金手指,該PCIe介面係為PCIe金手指。The unit is connected to the PCIe interface for hardware monitoring of the interface card and the device (10), and outputs at least one indication signal to the chassis system through the PCIe interface according to the monitoring result; and a central processing unit The crystal group and the monitoring unit are used to control the operation of the interface card and the chassis system. 2. If you apply for a patent scope! An interface card having a monitoring indication and an interface expansion function, wherein the chipset defines a configuration pin in the pcie interface, and the chipset sets the transmission group of the PCIe interface according to the signal of the configuration pin state. 3. The interface card with the monitoring indication and the interface expansion function as described in the application scope of the patent application, wherein the chipset has an ATX power supply area in the pcie interface, so that the interface card passes through the pcie interface. Support for using ATX power. 4. The interface card with the monitoring indication and the interface expansion function as described in the first paragraph of the patent application, wherein the chipset defines an SMBus signal area in the pCIe interface to enable the interface card to support through the pcie interface. Use SMBus. 36 201007467 5. The interface card with the monitoring indication and the interface expansion function as described in claim 1, wherein the chipset is in the Pde interface and has a panel control area to enable the power supply in the interface card. The signals of the switch (PWRBT SW), reset switch (RESET SW), power indicator (PWRLED), and hard phosphor indicator (HDD LED) are transmitted through the panel control area. 6. The interface card with the monitoring indication and the interface expansion function as described in claim 1 , wherein the monitoring unit further receives the hardware working signal of the interface card or the chassis system. 7. The interface card with the monitoring indication and the interface expansion function as described in claim 6 of the patent application, wherein the hardware working signal is a fan speed signal, a voltage detecting signal or a temperature detecting signal. 8. The interface card with the monitoring indication and the interface expansion function b as described in the scope of the patent application, wherein the chipset is a south bridge chipset. 9. The interface card having the monitoring indication and the interface expansion function as described in the scope of the patent application, further comprising: a printed circuit board, and the PCI interface, the pCIe interface, the chip set, the monitoring unit And the central processing unit. 10. The interface card with the monitoring indication and the interface expansion function as described in the scope of the patent application, wherein the PCI interface is a (10) gold finger, and the PCIe interface is a PCIe gold finger. 11. A computer device comprising: a machine phase system having a backplane (backi>lane), the backplane being provided with a pci slot, a first PCIe slot and at least a second PCIe slot, the second The PCIe slot is coupled to the first pcie plug 17 201007467 slot; and the interface card includes: a PCI interface plugged into the PCI slot, a PCIe interface plugged into the first pcie slot; a chip The group is coupled to the PCI interface and the PCIe interface, and the chipset supports the Pc interface and the pcie interface. The monitoring unit is coupled to the PCIe interface for hardening the interface card and the chassis system. Body monitoring, and outputting at least - indicating signal to the system chassis through the PCIe interface according to the monitoring result β; and a central processing unit connected to the chip group and the monitoring unit for controlling the interface card and the chassis The operation of the system. 12. The computer device according to claim 11, wherein the chipset defines a configuration pin in the PCIe interface, and the chipset sets the transmission group of the PCIe interface according to the signal of the configuration pin. state. The computer device according to claim 11, wherein the chipset defines an ATX power supply area in the PCIe interface, so that the interface card supports the use of the ATX power supply through the PCIe interface, and the chip The power zone is coupled to an ATX power input interface of the backplane. 14. The computer device as claimed in claim 2, wherein the chipset defines an SMBus signal area in the PCIe interface, so that the interface card supports the use of SMBus through the PCIe interface, and the SMBus signal The fascia is coupled to an SMBus connector of the backplane. 15. The computer device of claim 11, wherein the wafer 18 201007467 is defined in the PCIe interface with a panel control area to enable a power switch (PWRBTSW) in the eight-sided card. The signal of the switch (REs £; sw), the power supply finger (PWRLED), the hard disk finger (4) (10) d l is transmitted through the control area of the panel, and the panel control system and the power switch pin of the back board, the reset switch: The lamp pins and the hard disk indicator pins are coupled. You are only acquainted with the power account mentioned in Item 11 of the application, which monitors = more v receives the interface card or the hardware work in the chassis system, as in the scope of claim 16 The electric work signal is described as a light and fast gift. m is the voltage measurement signal or temperature debt I8, as described in the scope of application of the patent range 帛n, is output to the indication system H in the chassis system. In the middle of the correction, 19, such as the scope of the patent application, the 18th interface is the temperature reduction test refers to the dry farm, which is the indication. ^日日不"Face or wind is the failure indication of the speed of 20, as described in the 18th paragraph of the patent application scope, such as the face f pole _ paste 4 ^ ', which indicates that the computer group is set up, which The wafer 22 is an electric drive device according to claim 11 of the patent application, and further comprises a PCI-based chip stage, the monitoring material and the central processing unit. The computer device according to claim 11, wherein the PCI interface is a PCI gold finger, and the PCIe interface is a PCIe gold finger. 2020
TW97129853A 2008-08-06 2008-08-06 Interface card with hardware monitor and function extension and computer TW201007467A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI733323B (en) * 2020-01-13 2021-07-11 全何科技股份有限公司 Fake solid state drive circuit board
TWI820334B (en) * 2020-02-13 2023-11-01 美商美超微電腦股份有限公司 Electronic devices for expansion

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI733323B (en) * 2020-01-13 2021-07-11 全何科技股份有限公司 Fake solid state drive circuit board
TWI820334B (en) * 2020-02-13 2023-11-01 美商美超微電腦股份有限公司 Electronic devices for expansion

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