TWI396969B - Error detecting apparatus of server and error detecting method thereof - Google Patents

Description

Server debug device and its debugging method

The present invention relates to a debug device for a server, and more particularly to a debug device and method for reading a boot detect signal.

The computer system includes various components, such as a microprocessor, a motherboard, a memory, a display card, a sound card, a fan, and the like, and the motherboard includes a plurality of wafers, such as a south bridge (SB), a north bridge (north bridge). ) and a basic input/output system (BIOS).

However, the server is different from other consumer electronic products. Due to its long development period and long warranty period, the maintenance requirements for subsequent repairs are also high. In order to meet the above requirements, the host will reserve the relevant debug line or signal connector. The south bridge (SB) will output the power-on detection signal on the motherboard during the boot process, for example, through the low pin count. (Low Pin Count, LPC) interface output. In general, there are two ways to debug the boot process:

1. In the original design of the motherboard, the decoding component and the seven-segment display that will solve the LPC signal are designed on the motherboard. The SB's power-on detection signal is received by the decoding component, and then decoded into an 8-bit signal to control the seven-segment display to generate a corresponding error code. However, the inconvenience of this method is that the maintenance personnel need to open the main body casing and remove other devices to repair the error code.

Second, a connector for receiving the SB boot process signal is additionally designed on the motherboard. When debugging is debugged, the maintenance personnel connect an additional signal cable to the connector and an external debug card to observe the error code. This practice is also quite inconvenient.

The invention provides a debugging device and a method for a server, wherein a Baseboard Management Controller (BMC) converts a Port 80 signal into an RS232 signal, so that a user can pass through an RS232 connector (ie, a serial port on a computer). (serial port), also known as COM Port, usually uses the RS232 standard) to read the Port 80 signal, thereby increasing the user's convenience in maintenance and reducing the design cost of the motherboard.

In view of the above, the present invention provides a debug device for a server, comprising a south bridge chip, a substrate management controller, a signal switching component, and a switch. The south bridge chip outputs a power-on detection signal (such as a Port 80 signal) via a Low Count Pin (LPC) interface, and the substrate management controller is coupled to the south bridge chip to receive the power-on detection signal and convert the signal. For an RS232 signal. The substrate controller has two universal asynchronous transmission and reception communication ports, respectively outputting the RS232 signal converted by the startup detection signal and the original RS232 signal. The signal switching component is coupled between the substrate management controller and the RS232 connector for transmitting the RS232 signal converted by the power-on detection signal or the original RS232 signal to the RS232 connector. The switch is coupled to the signal switching component for determining that the signal transmitted by the signal switching component is an RS232 signal converted by the power-on detection signal or an original RS232 signal.

In an embodiment of the invention, the power-on detection signal is a Port 80 signal, and the signal switching component can be a complex programmable logic component. The switch is, for example, a button. When the button is pressed, the signal switching component outputs the RS232 signal converted by the power-on detection signal to the RS232 connector; when the button is released, the signal switching component outputs the original RS232 signal to the RS232 connector. .

In an embodiment of the invention, the debugging device further includes a display device coupled to the RS232 connector for decoding the RS232 signal converted by the power-on detection signal and displaying the decoded RS232 signal.

In an embodiment of the invention, the display device comprises: an RS232 decoder and a seven-segment display, wherein the RS232 decoder is configured to decode the RS232 signal converted by the power-on detection signal, and then display the signal on the seven-segment display.

From another point of view, the present invention further provides a method for detecting a fault of a server, comprising the steps of: first, outputting a power-on detection signal via a low-pin number interface, and then converting the power-on detection signal into an RS232 signal. Next, a switching signal is generated via a switch, and based on the switching signal, it is determined whether to output the RS232 signal to an RS232 connector.

Based on the above, the present invention converts the Port 80 signal of the LPC interface into a signal of the RS232 interface through the BMC, so that the RS232 connector on the motherboard can output the original RS232 signal or the converted Port 80 signal according to the user's requirement. The internal display state of the device can be known by displaying the signal corresponding to the Port 80 signal on the display device for decoding outside the host, thereby increasing the convenience of the user during maintenance and reducing the design cost.

The above described features and advantages of the present invention will be more apparent from the following description.

First embodiment

Please refer to FIG. 1. FIG. 1 is a block diagram of a debug device of a server according to a first embodiment of the present invention. The debug device 100 mainly includes two parts, and includes a south bridge chip 112 and a substrate management controller in the motherboard 110. 114 (Baseboard Management Controller, BMC), signal switching element 116, RS232 connector and switch 118. The substrate management controller 114 is coupled between the south bridge chip 112 and the signal switching component 116, and the RS232 connector 117 and the switch 118 are coupled to the signal switching component 116, respectively. The display device 150 includes an RS232 decoder 152 and a seven-segment display 154 coupled to the RS232 decoder for displaying the decoded signal of the RS232 decoder 152. When the user needs to read the power-on detection signal, the display device 150 can be connected to the RS232 connector 117 on the motherboard 110 to display an error code. When it is not necessary to read the power-on detection signal, the display device 150 can be detached.

In the motherboard 110, the south bridge chip 112 outputs a power-on detection signal via the LPC interface to inform the user of the hardware operating state in the current boot process in the motherboard 110, and the substrate management controller 114 receives the south bridge wafer 112 through the LPC interface. The power-on detection signal is output, and the power-on detection signal originally conforming to the LPC interface is converted into a signal conforming to the RS232 interface (referred to as RS232 signal). The baseboard management controller 114 has two universal asynchronous communication transceivers (UART1, UART0), and outputs RS232 signals RS1 and RS2 to the signal switching component 116, wherein the RS232 signal RS1 is converted by the LPC signal with the power-on detection message. The RS232 signal, while the RS232 signal RS2 is the original RS232 signal. The signal switching element 116 determines the output RS232 signal RS1 or RS232 signal RS2 to the RS232 connector 117 according to the state of the switch 118. The original RS232 signal refers to the RS232 signal existing in the conventional system, that is, the signal originally transmitted by the RS232 connector 117.

In other words, in this embodiment, the signal switching component 116 on the motherboard 110 can switch between two usage states according to user requirements, one of which is a normal mode, that is, receiving the original RS232 signal RS2, and the RS232 connector 117 and the Generally, the operating state is normal, and the RS232 signal RS2 is normally output; the second is the debugging mode. At this time, the signal switching component 116 receives the converted LPC signal, and the RS232 signal RS1 is output to the RS232 connector 117, so that the user can directly The RS232 signal RS1 is captured by the RS232 connector 117 and displayed. The mode switching of the signal switching element 116 can be switched by the switch 118, which is, for example, a button.

Therefore, the user does not need to open the outer casing of the server, and as long as the display device 150 is connected to the RS232 connector 117, the light signal indicated by the power-on detection signal can be seen by the externally connected display device 150. In addition, in the embodiment, when the switch 118 is a button, the button can be disposed outside the server, so that the user can switch the signal via the outside of the server. When the button is pressed, the signal switching element 116 outputs the RS232 signal RS1 to the RS232 connector 117. When the button is released, the signal switching element 116 outputs the RS232 signal RS2 to the RS232 connector. From another point of view, the state switching of the switch 118 can be regarded as a switching signal, and the signal switching component 116 performs switching of the operating mode according to the switching signal to determine whether to output the converted power-on detection signal to the RS232 connector 117. In this embodiment, the signal switching component 116 can be implemented by the reset button and the power button of the motherboard 110, and the reset button and the power button are electrically connected to the signal switching component 116. When the maintenance personnel decides to put the signal switching element 116 into the debug mode, press and hold the reset button and then press the power button. However, the achievement of the signal switching component 116 can be achieved by using the button cooperation of the original host, not limited to the above.

It should be noted that all components of the present invention may use off-the-shelf components such as south bridge wafer 112, substrate management controller 114, signal switching component 116, RS232 connector and switch 118. Wait. The signal switching component can be realized by using any compilable logic component on the motherboard and adding the function of switching signals to its firmware.

In terms of the display device 150, the RS232 decoder 152 can be used to decode the RS232 signal RS1 and then display through the seven-segment display 154 so that the user can see the power-on detection signal number built into the motherboard 110. The display device 150 and the motherboard 110 can be connected by an RS232 connection line. When no error detection is required, the display device 150 can be removed. In addition, it is worth noting that the function of the signal switching component 116 can be achieved by a complex programmable logic device (CPLD), and the substrate management controller 114 can utilize firmware to achieve the LPC. Signal conversion function of RS232 signal.

Next, the processing flow of the above-mentioned debugging device 100 during debugging is explained with reference to a flowchart. Referring to FIG. 2, FIG. 2 is a flowchart of a debugging method of the server according to the embodiment. First, the south bridge chip 112 transmits the power-on detection signal transmitted through the LPC to the substrate management controller 114 (step S210), and then the substrate management controller converts the power-on detection signal into an RS232 signal (step S220). After the signal conversion is completed, the baseboard management controller 114 transmits the converted power-on detection signal (ie, RS1) and the original RS232 signal RS2 to the signal switching component 116 through the universal asynchronous communication transceiver (UART1 and UART0) (step S230). ). Next, the signal switching component 116 determines whether to enter the debug mode according to the state of the switch 118 (whether the button is pressed by the user).

If the changeover switch 118 is in the debug mode, the signal switching element 116 receives the RS232 signal RS1 outputted by the general asynchronous transmission/reception communication port UART1 (step S260), and then transmits it to the RS232 connector 117 (step S262). The user can display the decoded RS232 signal via the externally connected display device 150 (step S264); if the switch 118 is in the normal mode, the signal switching component 116 receives the RS232 signal RS1 output by the universal asynchronous communication transceiver UART0. (i.e., the original RS232 signal), then the signal switching element 116 transmits the RS232 signal RS1 to the RS232 connector 117 (step S255).

Second embodiment

The operation modes of the above FIG. 1 and FIG. 2 can be further simplified as a method for detecting the error of the server. Referring to FIG. 3, FIG. 3 is a flowchart of a debugging method of the server according to the second embodiment of the present invention. First, a power-on detection signal is output via a low pin count (LPC) interface (step S310), and then the power-on detection signal is converted into an RS232 signal conforming to the RS232 interface (step S320). Then, a switching signal is generated via the switch, which is used to indicate the state of the switch, such as pressing a button or releasing a button (step S330). Then, based on the switching signal, it is determined whether or not the RS232 signal converted by the power-on detection signal is output to the RS232 connector (step S340). If so, the user can display the decoded RS232 signal via an external display device (step S350); if not, the original RS232 signal is output (step S260). For the details of the implementation of the present method, please refer to the descriptions of FIG. 1 and FIG. 2, which are generally known to those skilled in the art, and should be easily inferred after the disclosure of the present invention, and will not be further described herein.

In summary, the present invention converts the power-on detection signal of the LPC interface into a signal conforming to the RS232 interface, so that the RS232 connector on the server can output the power-on detection signal, and the user can directly receive the power-on detection signal and display it by the RS232 connector. Corresponding message. The user does not need to open the outer casing of the server to see the signal of the power-on detection signal and understand the error code on the motherboard, thereby increasing the convenience of maintenance and reducing the development cost.

Another advantage of the present invention is that all components of the present invention use off-the-shelf components such as a south bridge, a substrate control manager, an RS232 connector, and a switch. The signal switching component is achieved by the CPLD, and the CPLD is widely used in the Sever field and can be modified in software using the software language. Only the switching function is added to it. Compared to previous practices, the cost of additional components can be saved.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

100. . . Debugging device

110. . . motherboard

112. . . South Bridge Chip

114. . . Baseboard management controller

116. . . Signal switching element

117. . . RS232 connector

118. . . Toggle switch

150. . . Display device

152. . . RS232 decoder

154. . . Seven-segment display

RS1, RS2. . . RS232 signal

S210~S264. . . Flow chart step

S310~S360. . . Flow chart step

1 is a block diagram of a debug device of a server according to a first embodiment of the present invention.

2 is a flow chart of a method for detecting a debugger of a server according to a first embodiment of the present invention.

3 is a flow chart of a method for detecting a debugger of a server according to a second embodiment of the present invention.

100. . . Debugging device

110. . . motherboard

112. . . South Bridge Chip

114. . . Baseboard management controller

116. . . Signal switching element

117. . . RS232 connector

118. . . Toggle switch

150. . . Display device

152. . . RS232 decoder

154. . . Seven-segment display

RS1, RS2. . . RS232 signal

Claims (8)

A debugging device for a server, comprising: a south bridge chip, which outputs a boot detection signal via a low pin number interface; a substrate management controller coupled to the south bridge chip for receiving the boot detection signal and The power-on detection signal is converted into a first RS232 signal, wherein the base controller has a first universal asynchronous transmission/reception communication port and a second universal asynchronous transmission/reception communication port, and respectively communicates with the first universal asynchronous transmission and reception port. The second universal asynchronous communication transceiver outputs the first RS232 signal and a second RS232 signal; a signal switching component is coupled between the substrate management controller and an RS232 connector for transmitting the first RS232 a signal or the second RS232 signal to the RS232 connector; and a switch coupled to the signal switching component for determining whether the signal output by the signal switching component is the first RS232 signal or the second RS232 signal. The debug device of the server of claim 1, wherein the signal switching component is a complex programmable logic component. The debugging device of the server of claim 1, wherein the switch is a button, and when the button is pressed, the signal switching component outputs the first RS232 signal to the RS232 connector; when released When the button is pressed, the signal switching component outputs the second RS232 signal to the RS232 connector. The debug device of the server of claim 1, further comprising a display device coupled to the RS232 connector for decoding the first RS232 signal and displaying the decoded first RS232 signal. The debug device of the server of claim 4, wherein the display device comprises: an RS232 decoder for decoding the first RS232 signal; and a seven-segment display coupled to the RS232 decoder For displaying the decoded first RS232 signal. A method for detecting a fault of a server includes: outputting a power-on detection signal via a low-pin number interface; converting the power-on detection signal into an RS232 signal; and generating a switching signal via a switch; and according to the switching signal, Decide whether to output the RS232 signal to an RS232 connector. The method for detecting a server according to claim 6, wherein the switch is a button, and when the button is pressed, the RS232 signal is output to the RS232 connector; when the button is released, the output is stopped. RS232 signal to the RS232 connector. The method for detecting a server according to claim 6, further comprising: receiving the RS232 signal via the RS232 connector; decoding the RS232 signal; and displaying the decoded RS232 signal in a seven-segment display.