TW201125166A - Light emitting device package and fabricating method thereof - Google Patents

Light emitting device package and fabricating method thereof Download PDF

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Publication number
TW201125166A
TW201125166A TW99112039A TW99112039A TW201125166A TW 201125166 A TW201125166 A TW 201125166A TW 99112039 A TW99112039 A TW 99112039A TW 99112039 A TW99112039 A TW 99112039A TW 201125166 A TW201125166 A TW 201125166A
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Taiwan
Prior art keywords
wire
light
emitting diode
electrode
conductive layer
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TW99112039A
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Chinese (zh)
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TWI420711B (en
Inventor
Chun-Yao Ni
Chih-Chia Tsai
Wen-Chieh Tsou
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Everlight Electronics Co Ltd
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Priority to TW99112039A priority Critical patent/TWI420711B/en
Publication of TW201125166A publication Critical patent/TW201125166A/en
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Publication of TWI420711B publication Critical patent/TWI420711B/en

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Abstract

A light emitting diode (LED) package and fabricating method thereof are disclosed. The LED package includes a first conductive lead and an insulating substrate extending from the lateral side of the first conductive lead, a second conductive lead disposed on the insulating substrate extending on the top and bottom surfaces of the insulating substrate, wherein the first conductive lead and the second conductive lead are electrically isolated. An LED is disposed on the first conductive lead. A first electrode of the LED couples to the first conductive lead and a second electrode of the LED couples to the second conductive lead. The LED package further includes an encapsulation layer packaging the LED.

Description

201125166 六、發明說明: 【發明所屬之技術領域】 本發明係關於一種發光二極體封裂及其製作方法, ,,尤指一種將 發光二極體設置於基板之凹槽内之發光二極體封裝及其製作方 τ 【先前技術】 發光二極體(light emitting diode,LED)元件,由於具有广 命長、體積小與耗電量低等優點,已逐漸取代傳統螢^燈= 或鎢絲燈泡,而廣泛地應用在照明、液晶顯示器的背光 組、各式電子產品與交通號誌等方面。 、 以封裝型式而言’目前發光二極體的封裝結構主要以表 面黏著型(surface mount device, SMD)發光二極體封裝結槿 爲主、、* AN 、、口傅 * '。然而’由於習知表面黏著型發光二極體封裝結構所 使用的基板係為平面基板,而發光二極體係設置於平面基板 的平垣表面,因此導致習知發光二極體封裝的厚度較厚,而不符 口目月1對於電子元件輕、薄、短、小的需求。 【發明内容】 201125166 本發明之目的之-在於提供一種發光二極體封裝及其製作方 法,以縮減發光二極體封裝的整體厚度。 本發明之—實施例提供—種—種發光二極體封裝的製作方法, 包括下列步驟。提供—基板,該基板包括-絕緣基材及設置於該絕 緣基材上的-上導電層及一下導電層,該基板上包括有複數個树 區。圖案化各該元件區中之該上導電層及該下導電層,以形 第—導線區及—第二導線區,並於各該第-導線區之該上 2層内分卿成-開口,其中該等開口部分暴露出該絕緣基材。 t除位於各該第-導線區中曝露之該絕緣基材而形成—凹槽 形導線區之該圖案化上導電層及該圖案化下導電層以 D圖❾魏。電性連接該各該第二#線區之朗·上導電層 以圖案化下導電層以形成一第二導線。將複數 :::各該凹槽内,並使各該發光二極體之-第-電極二: 線電性2接,以及使各該發光二極體之—第二電極與各該第二導 顿板 該基板上碱—導層封賴轉光二極體。切判 ο土板’而形成複數個發光二極體封裝。 _上述’在另—實施例中,其中 線區中的部分該下導電層。 凹槽曝路出各料-導 依據上述,在另一實施例中,其中 在各該凹射軸—上導電醉4爲t導_步驟包括 战上導欄莱社導電圖案電性連接該各該第 201125166 一導線區之該圖案化上導電層及該圖案化下導電層。 依據上述,在另一實施例中,其中該上導電圖案位於 二極體與該下導電層之間。 依據上述,在另一實施例中,其中該上導電圖案係以係與該凹 槽以共形方式形成。 依據上述,在另一實施例中,其中形成該第二導線的步驟包括 去除位於各5纟第二導線區巾曝露之該絕緣基材而形成—孔洞並曝露 出各該第二導線區中的部分該上導電層,以及在各該孔洞中形成一 下導電圖案,該下導電_電性連接該各該第二導線區之該圖案化 上導電層及該圖案化下導電層。 依據上述,在另一實施例中,其中該等孔洞係利用雷射鑽孔 式形成。 依據上述,在另一實施例中,其中各該孔洞係分別位於各該第 一導線區之一邊緣的一中央區。 依據上述,在另一實施例中,其中圖案化各該元件區令之該上 導電層及該下導電層的步驟係利用蝕刻方式進行。 201125166 依據上述,在另一實施例中,其中該等凹槽係利用雷射鑽孔方 式形成。 依據上述,在另一實施例中’更包括於位於各該第二導線區之 該上導電層的表面形成一識別標記。 依據上述,在另一實施例中,更包括於位於各該第二導線區之 »亥上導電層的表面形成·一識別標S己’其中該識別標記位於該孔洞的 • 上方。 依據上述’在另一實施例中’更包括於各該元件區中形成一下 防銲絕緣層,部分覆蓋該第一導線之一下表面。 依據上述,在另一實施例中,更包括進行下列步驟。去除各該 元件區之四個角落區之該下導電層、該絕緣基材與該上導電層,以 於各該元件區之四個角落區分別形成一孔洞。於各該元件區之四個 角落區之該上導電層上分別形成一上防銲絕緣層,並使各該上防鲜 絕緣層覆蓋相對應之該孔洞。於各該孔洞之一侧壁上形成一導電圖 案,分別電性連接對應於各該孔洞旁之該上導電層與該下導電層, 以於各該第一導線區形成一第一導線,以及於各該第二導線區形成 一第二導線。 依據上述,在另一實施例中,其中各該導電圖案另覆蓋各該凹 7 201125166 槽之側壁以及各該凹槽所暴露出之該下導電層。 依據上述,在另一實施例中,其中該箄莫带 茨寺導電圖案與該等凹槽係 以共形方式形成。 依據上述,在另一實施例中,其中該箄^丨、 视顺機械鑽孔方 式形成。 依據上述’在另一實施例中’其中該導雷圖 丁茨导冤圖案係利用電鍍方式 形成。 依據上述,在另一實施例中,其中該第一電極與該第二電極位 於該發光二極體的同〜側,該第-電極與該第:電極係分別藉由録 線與該第一導線以及該第二導線電性連接。 依據上述’在另-實施例中,其中該第—電極與該第二電極位 於該發光二極體的不同-側,該第1極係直接與該凹槽内之該第 -導線電性連接,該第二電極係藉由一銲線與該第二導線9電性連接。 本發明提供—種發光二極體封裝,包括—第—導線,一絕緣層 自該第一導線之一側向延伸。一第二導線設置於該絕緣層上,並且 延伸於該絕緣層之-上表面及-下表面上,其中該第二導線與該第 一導線之間電性分離。一發光二極體設置該第—導線上,其中嗜發 201125166 光二極體的一第一電極與該第一導線電性連接,且其一第二電極與 έ玄第二導線電性連接。一封膠層封裝該發光二極體。 依據上述,在另一實施例中,其中該第一導線之一側面夾置部 分該絕緣層。 依據上述’在另-實施例巾’其中該第—導線±形成有一凹槽, 且該發光二極體係設置於該凹槽内。 依據上述,在另-實施例中,其中該第—導線包含一上導電圖 :與-下導電層,該上導電圖案形成該凹槽並與該下導電層電性連 位於實施例中’更包括至少一識別標記,設置於201125166 VI. Description of the Invention: [Technical Field] The present invention relates to a light-emitting diode cracking and a manufacturing method thereof, and more particularly to a light-emitting diode in which a light-emitting diode is disposed in a groove of a substrate Body package and its manufacturing method τ [Prior Art] Light emitting diode (LED) components have gradually replaced traditional fluorescent lamps = or tungsten due to their advantages such as wide life, small size and low power consumption. Silk bulbs are widely used in lighting, backlights for liquid crystal displays, various electronic products and traffic signs. In terms of package type, the current package structure of the light-emitting diode is mainly based on the surface mount device (SMD) light-emitting diode package, and *AN, and the mouth*. However, since the substrate used in the conventional surface-adhesive LED package structure is a planar substrate, and the light-emitting diode system is disposed on the flat surface of the planar substrate, the thickness of the conventional light-emitting diode package is thick. Does not match the requirements of the month 1 for light, thin, short, and small electronic components. SUMMARY OF THE INVENTION 201125166 The object of the present invention is to provide a light emitting diode package and a method of fabricating the same to reduce the overall thickness of the light emitting diode package. The present invention provides a method for fabricating a light emitting diode package, including the following steps. A substrate is provided, the substrate comprising an insulating substrate and an upper conductive layer and a lower conductive layer disposed on the insulating substrate, the substrate including a plurality of tree regions. Patterning the upper conductive layer and the lower conductive layer in each of the component regions to form a first-wire region and a second wire region, and splitting into the upper two layers of each of the first-wire regions Where the openings partially expose the insulating substrate. The patterned upper conductive layer and the patterned lower conductive layer are formed by dividing the insulating substrate exposed in each of the first-wire regions to form a recessed wire region. The upper conductive layer of each of the second # line regions is electrically connected to pattern the lower conductive layer to form a second wire. The plurality of::: each of the recesses, and each of the light-emitting diodes - the first electrode two: the wire is electrically connected, and the second electrode and the second electrode of each of the light-emitting diodes The alkali-guide layer on the substrate of the guide plate encloses the light-emitting diode. A plurality of light emitting diode packages are formed by cutting the earth plate. In the other embodiment, wherein a portion of the line region is the lower conductive layer. The groove is exposed to each material - according to the above, in another embodiment, wherein each of the concave axes - the conductive drunk 4 is a t-lead - the step includes electrically connecting the conductive patterns of the upper guide The patterned upper conductive layer and the patterned lower conductive layer of the first wire region of the 201125166. According to the above, in another embodiment, wherein the upper conductive pattern is between the diode and the lower conductive layer. According to the above, in another embodiment, the upper conductive pattern is formed in a conformal manner with the recess. According to the above, in another embodiment, the step of forming the second wire includes removing the insulating substrate exposed in each of the 5 second wire regions to form a hole and exposing each of the second wire regions. And the lower conductive layer electrically connects the patterned upper conductive layer and the patterned lower conductive layer of each of the second lead regions. According to the above, in another embodiment, wherein the holes are formed by laser drilling. According to the above, in another embodiment, each of the holes is located in a central portion of one of the edges of each of the first lead regions. According to the above, in another embodiment, the step of patterning each of the element regions to the upper conductive layer and the lower conductive layer is performed by etching. 201125166 In accordance with the above, in another embodiment, wherein the grooves are formed using a laser drilling method. According to the above, in another embodiment, an identification mark is formed on the surface of the upper conductive layer located in each of the second lead regions. According to the above, in another embodiment, the surface of the conductive layer located on each of the second wire regions is formed by an identification mark S wherein the identification mark is located above the hole. According to the above, in another embodiment, a further solder resist insulating layer is formed in each of the element regions, partially covering a lower surface of the first wire. According to the above, in another embodiment, the following steps are further included. The lower conductive layer, the insulating substrate and the upper conductive layer are removed from the four corner regions of each of the element regions, so that a hole is formed in each of the four corner regions of the element region. An upper solder resist layer is formed on the upper conductive layer of each of the four corner regions of the component region, and each of the upper fresh insulating layers covers the corresponding hole. Forming a conductive pattern on a sidewall of each of the holes, respectively electrically connecting the upper conductive layer and the lower conductive layer adjacent to each of the holes to form a first wire in each of the first wire regions, and Forming a second wire in each of the second wire regions. According to the above, in another embodiment, each of the conductive patterns covers the sidewalls of each of the recesses 7 201125166 and the lower conductive layer exposed by the recesses. According to the above, in another embodiment, the conductive pattern of the 箄莫茨茨寺 and the grooves are formed in a conformal manner. According to the above, in another embodiment, wherein the 钻孔, 视 is mechanically drilled. According to the above 'in another embodiment', wherein the lightning-guided Tudec-guide pattern is formed by electroplating. According to the above, in another embodiment, the first electrode and the second electrode are located on the same side of the LED, and the first electrode and the first electrode are respectively recorded by the line and the first The wire and the second wire are electrically connected. According to the above-mentioned another embodiment, wherein the first electrode and the second electrode are located on different sides of the light emitting diode, the first pole is directly electrically connected to the first wire in the groove. The second electrode is electrically connected to the second wire 9 by a bonding wire. The present invention provides a light emitting diode package comprising - a first wire, an insulating layer extending laterally from one of the first wires. A second wire is disposed on the insulating layer and extends on the upper surface and the lower surface of the insulating layer, wherein the second wire is electrically separated from the first wire. A light-emitting diode is disposed on the first wire, wherein a first electrode of the 201125166 photodiode is electrically connected to the first wire, and a second electrode thereof is electrically connected to the second wire. A light-emitting diode is encapsulated in a glue layer. According to the above, in another embodiment, one of the first wires is laterally sandwiched by the insulating layer. According to the above-mentioned "other embodiment", the first wire ± is formed with a recess, and the light emitting diode system is disposed in the recess. According to the above, in another embodiment, wherein the first conductive wire comprises an upper conductive pattern: a lower conductive layer, the upper conductive pattern forms the recess and is electrically connected to the lower conductive layer in the embodiment. Including at least one identification mark, set in

依據上述,在另一實施例中, 絕緣層之該下表面並覆蓋部分該第 更包括一防銲絕緣層,設置於該 一導線之一下表面。 於該發^=體施例中’其中該第—電極與該第二電極位 線與該第—電極與該第ι極係分別藉由銲 線與該第—導線以及該第二導線電性連接。 201125166 依據上述,在另—實施例中,其中該第—電極與該第二電極位 於該發光二極體的不同-側’該第—電極係直接與該凹槽内之 -導線電性連接’該第二電極係藉由—銲線與該第二導線電性連接。 依據上述,在另—實施例中,其中該凹槽係為—封閉型凹槽。 本發明之-實施例提供-種發光二極體封裝。該發光二極體封 裝包括-絕緣基材、―第一導線、―第二導線、複數個上防鲜絕緣 層、、-發光二極體與-封膠層。絕緣基材具有一凹槽,以及複數個 孔洞刀別位於絕緣基材之祕區。第—導線部分覆蓋絕緣基材之一 上表面與-下表面以及覆蓋部分孔洞之㈣^第二導線部分覆蓋絕 彖土材之上表面與下表面以及覆蓋部分孔洞之側壁,且第―導線與 第二導線電性分離4防銲絕緣層分別部分覆蓋第—導線之—上表 面並對應部分·,以及覆蓋第二導線之—上表面並對應部分孔 洞。發光二極體設置於凹槽内,發光二極體之—第—電極與第一導 線電性連接,歸光二極體之—第二電極與第二導線電性連接。封 膠層封裝發光二極體。 依據上述,在另-實施财,其中該H線另覆蓋該凹槽之 *依據上述’在另-實施例中’ 3包括一下防銲絕緣層,部分覆 蓋該第一導線之一下表面。 201125166 依據上述,在另—實施例中,其中該第一電極與 於該發光二極體的同—侧,該第―電極與該第二電 線與該第-導線與辦二導線電性連接。 刀別藉略According to the above, in another embodiment, the lower surface of the insulating layer and the covering portion further comprise a solder resist insulating layer disposed on a lower surface of the one of the wires. In the embodiment of the invention, wherein the first electrode and the second electrode bit line and the first electrode and the first electrode are respectively electrically connected by the bonding wire and the first wire and the second wire connection. According to the above, in another embodiment, wherein the first electrode and the second electrode are located on different sides of the light emitting diode, the first electrode is directly electrically connected to the wire in the groove. The second electrode is electrically connected to the second wire by a bonding wire. According to the above, in another embodiment, wherein the groove is a closed groove. Embodiments of the present invention provide a light emitting diode package. The light emitting diode package comprises an insulating substrate, a first wire, a second wire, a plurality of upper fresh insulating layers, a light emitting diode and a sealing layer. The insulating substrate has a recess and a plurality of aperture cutters are located in the secret area of the insulating substrate. The first wire portion covers one of the upper surface and the lower surface of the insulating substrate, and the fourth wire portion covering the hole portion covers the upper surface and the lower surface of the insulating soil material and the side wall of the covering portion hole, and the first wire and the first wire The second wire electrically separated 4 the solder resist insulating layer partially covers the upper surface of the first wire and the corresponding portion, and covers the upper surface of the second wire and corresponds to a part of the hole. The light-emitting diode is disposed in the recess, the first electrode of the light-emitting diode is electrically connected to the first conductive line, and the second electrode of the light-returning diode is electrically connected to the second conductive line. The sealing layer encapsulates the light emitting diode. According to the above, in another embodiment, wherein the H-line covers the groove, the portion of the first wire is partially covered by the under-welding insulating layer according to the above-mentioned other embodiment. According to the above, in another embodiment, wherein the first electrode is on the same side of the light emitting diode, the first electrode and the second wire are electrically connected to the first wire and the second wire. Knife not to borrow

依據上述,在另—實施例中,其中該第—電極與該第 於該發光二極體的不同m電極係直接與該凹槽内之 -導線電性連接,該第二電極係藉由—銲線與該第二導線電性連接。 本發明之一實施例提供一種發光二極體封裝的製作方法,包括 下列步驟。提供-基板,該基板包括一絕緣基材以及設置於該^緣 基材上的-上導電層與—下導電層,且該基板包括有複數航件 區。圖案化該上導電層及該下導電層,以分別於各該元件區内形成 電性分離之-第-導線區、一第二導線區與一第三導線區,並^各 該第-導線區之該上導電層内分別形成一開口,其中該等開口部分 鲁暴露出該絕緣基材。去除該上導電層之該等開口所暴露出之該絕二 基材,以分別於各該第一導線區内之該絕緣基材内形成一凹槽。去 除各該元件區之四個角落區之該下導電層與該絕緣基材,以於各該 疋件區之四個角落區分別形成一孔洞’其中各該孔洞部分暴露出該 上導電層。於各該元件區之周邊之該上導電層上分別形成一上防銲 絕緣層。於各該孔洞之一側壁上形成一導電圖案,分別電性連接對 應於各該孔洞暴露出之該上導電層以及各該孔洞旁之該下導電層, 以於各該第一導線區形成一第一導線,於各該第二導線區形成一第 11 201125166 二導線,以及於各該第三導線區形成一第三導線。於各該凹槽内設 置一第一發光二極體與一第二發光元件,並使各該第一發光二極體 之一第一電極與該第一導線電性連接,使各該第一發光二極體之一 第二_與該第二導線電性連接,使各該第二發光二極體之_第一 電極與該第一導線電性連接,以及使各該第二發光二極體之一第二 電極與该第二導線電性連接。在該基板上形成一封膠層封襄該等發 光二極體。沿著相鄰之該等元件區之間切割該基板,以形成複數個 發光二極體封裝。 依據上述,在另-實施例中,其巾各該凹槽曝露出各該第 線區内的部分該下導電層。 守 咖覆蓋各該凹 依據上述’在另一實施例中, 形成。 依據上述,在另一實施例中, 電層之步驟係利用蝕刻方式達成。 其中該等導電圖案係以共形方式 圖案化該上導電According to the above, in another embodiment, the first electrode and the different m electrode system of the light emitting diode are directly electrically connected to the wire in the groove, and the second electrode is by The bonding wire is electrically connected to the second wire. One embodiment of the present invention provides a method of fabricating a light emitting diode package, including the following steps. A substrate is provided, the substrate comprising an insulating substrate and an upper conductive layer and a lower conductive layer disposed on the edge substrate, and the substrate includes a plurality of carrier regions. Patterning the upper conductive layer and the lower conductive layer to form electrically separated-first-wire regions, a second wire region and a third wire region in each of the component regions, and each of the first wires An opening is formed in the upper conductive layer of the region, wherein the openings partially expose the insulating substrate. The insulating substrate exposed by the openings of the upper conductive layer is removed to form a recess in the insulating substrate in each of the first conductive regions. The lower conductive layer and the insulating substrate are removed from the four corner regions of each of the element regions, so that a hole is formed in each of the four corner regions of each of the element regions, wherein each of the holes partially exposes the upper conductive layer. An upper solder resist insulating layer is formed on each of the upper conductive layers on the periphery of each of the element regions. Forming a conductive pattern on a sidewall of each of the holes, electrically connecting the upper conductive layer corresponding to each of the holes and the lower conductive layer adjacent to each of the holes, to form a first conductive region The first wire forms an 11th 201125166 second wire in each of the second wire regions, and forms a third wire in each of the third wire regions. A first light emitting diode and a second light emitting element are disposed in each of the recesses, and a first electrode of each of the first light emitting diodes is electrically connected to the first conductive line, so that each of the first One of the second light-emitting diodes is electrically connected to the second wire, such that the first electrode of each of the second light-emitting diodes is electrically connected to the first wire, and each of the second light-emitting diodes is electrically connected One of the second electrodes is electrically connected to the second wire. A layer of glue is formed on the substrate to seal the light-emitting diodes. The substrate is diced between adjacent ones of the element regions to form a plurality of light emitting diode packages. According to the above, in another embodiment, each of the grooves of the towel exposes a portion of the lower conductive layer in each of the first line regions. The café covers each of the recesses in accordance with the above, in another embodiment, formed. According to the above, in another embodiment, the steps of the electrical layer are achieved by etching. Wherein the conductive patterns pattern the upper conductive in a conformal manner

其中 層及該下導 依據上述’在另·-實施例中 用雷射鑽孔方式形成。 其中該絕緣基材之該等凹槽係利 12 201125166 鑽孔方 ^據上述’在另—實施例中,其中該等孔洞係利用雷射 式形成。 形成 依據上述,在另—實施例中,射該導制案係利用 電鑛方式 導 ^據上述,在另—實施财,另包括於 線區内的該下導電層上形成—下防銲絕緣層。 第一 依據上述,在另-實施例中,其中 一電極與該第二電極位种帛 〜 力-極體之該第 發光二極心^ 光二極體的同,,且各該第- -極體之該第-電極與該第二電_ 線以及該第二導線電性連接。 ㈣域與該第-導 依據上述,在另—實施财 一電極與料二電極錄城-射雜二贱二極體之該第 μ 1触 極體的同―側,且各該第_ ==一電極與該第二電極係分別藉由 夂 綠以及該第三導線電性連接。 爷 依據上述,在另一實施例中,其中 -電極舆該第二電極位於該第-發光二極第 發光二極體之該第-電極係直接與該凹槽内之該第-導線雜連一 13 201125166 接,該第二電極係藉由一銲線與該第二導線電性連接。 依據上述,在另—實施例中,其中各該第二發光二極體之 -電極與該第二電極位於該第二發光二極體的不同—侧,各該 發光一極體之該第一電極係直接與該凹槽内之該第一導線電丨生連 接,該第二電極係藉由一銲線與該第三導線電性連接。 依據上述,在另一實施例中,其中各該上防銲絕緣層係 繞各該元件區。 分別環The middle layer and the lower guide are formed by laser drilling in accordance with the above-described embodiments. Wherein the grooves of the insulating substrate are in accordance with the above-mentioned, in another embodiment, wherein the holes are formed using a laser. Forming according to the above, in another embodiment, the guiding method is formed by using an electric ore method according to the above, and further forming a lower welding insulation on the lower conductive layer in the line region. Floor. According to the above, in another embodiment, one of the electrodes is the same as the second electrode of the second electrode, the second light-emitting diode, and the first-pole The first electrode of the body is electrically connected to the second electric wire and the second wire. (4) The domain and the first guide are based on the above-mentioned, and the other side of the first μ-electrode of the first electrode and the second electrode of the two electrodes are recorded, and each of the first _ = The first electrode and the second electrode are electrically connected by green and the third wire, respectively. According to the above, in another embodiment, the first electrode of the second electrode located in the first light-emitting diode is directly connected to the first wire in the groove. A 13201125166 is connected, the second electrode is electrically connected to the second wire by a bonding wire. According to the above, in another embodiment, the first electrode of the second light emitting diode and the second electrode are located on different sides of the second light emitting diode, and the first of the light emitting diodes The electrode is directly electrically connected to the first wire in the recess, and the second electrode is electrically connected to the third wire by a bonding wire. According to the above, in another embodiment, each of the upper solder resist layers is wound around each of the element regions. Separate ring

本發明之-實_提供一種料二極體封裝。該發光二極體封 裝包括-絕緣基材、-第―導線、一第二導線、—第三導線、複數 個上防銲絕緣層、一第一發光二極體與一第二發光二極體,以及一 封膠層。絕緣紐具有-凹槽,以及複數個孔洞分雜於該絕緣基 材之角落區。第一導線部分覆蓋該絕緣基材之一上表面與一下表面 以及覆蓋部分料細之_。帛二轉部分錢魏緣基材之該 上表面與該下表面以及覆蓋部分該等孔洞之側壁。第三導線部分覆 蓋該絕緣基材之該上表面與該下表面以及覆蓋部分該等孔洞之側 壁,其中該第一導線、該第二導線與該第三導線電性分離。上防銲 絕緣層分別位於各該元件區之周邊之該上導電層上。第一發光二極 體與第一發光二極體設置於該凹槽内,其中該第一發光二極體之一 第一電極與該第一導線電性連接,該第一發光二極體之一第二電極 與該第二導線電性連接,該第二發光二極體之—第一電極與該第一 14 201125166 側壁 依據上述,在另一實施例中,其中該第一導線 另覆蓋該凹槽 之 依據上述,在另一實施例中,另句一 蓋該第-導線之-下表面。 1防銲姆層,部分覆 依據上述,在另-實施射,其中各 一電極與該第:細職 發光二極體之該第-電極與該第二電極 =第一 線以及該第二導線雜連接。 勒蛛軸韻-導 -雷Γί上述,在另—實關巾’其巾各料二魏二極體之該第 一電極與該第二電極位於該第二發光二極體的同—側,且各 發先二極體之該第—電極_第二電極係分幾轉㈣ 線以及該第三導線電性連接。 '' Ζ上述’在另-實施例中,其中各料—發光二極體之該第 電極。该第二電極位於該第-發光二極體的不同一側,各該第一 發光二極體之該第-電極係直接與該凹槽内之該第一導線電性連 接,該第二電極係藉由一銲線與該第二導線電性連接。 15 201125166 依據上述,在另-實施例中,其中各該第二發光二極體之該第 一電極與該第二電極位於該第二發光二極ϋ的不同一側,各該第二 發光二極體之該第一電極係直接與該凹槽内之該第一導線電性連 接,該第二電極係藉由一銲線與該第三導線電性連接。 依據上述,在另-實施射,其中各該上防舰緣層係分別環 繞各該元件區。 依據上述,在另-實施例中,另包括一下防鮮絕緣層,設置於 各該元件區之該第一導線區内的該下導電層上。 在本發明之發光二極體封裝中,發光二極體係設置於基板之凹 槽内,因此可大幅縮減發光二極體封裝的整體厚度。 【實施方式】 為使熟習本發明所屬技術領域之—般技藝者能更進一步了解本 發明’下文㈣舉本發明之較佳實施例,並配合所關式,詳細說 明本發明的構成内容及所欲達成之功效。 、。 凊參考第1圖至第9圖。第1圖至第9圖繪示了本發明第一較 佳實施例之發光二極體封裝的製作方法的示意圖 ,其中為彰高貝本發 201125166The present invention provides a material diode package. The LED package includes an insulating substrate, a first wire, a second wire, a third wire, a plurality of upper solder resist layers, a first light emitting diode and a second light emitting diode. And a layer of glue. The insulating button has a groove and a plurality of holes are mixed in the corner regions of the insulating substrate. The first wire portion covers one of the upper surface and the lower surface of the insulating substrate and the cover portion is thin. The upper surface and the lower surface of the portion of the surface of the surface of the surface of the surface of the surface of the surface of the surface of the surface of the surface of the surface of the substrate. The third wire portion covers the upper surface of the insulating substrate and the lower surface and the side wall of the portion of the hole, wherein the first wire, the second wire and the third wire are electrically separated. The upper solder resist insulating layers are respectively located on the upper conductive layer around the respective element regions. The first light emitting diode and the first light emitting diode are disposed in the recess, wherein the first electrode of the first light emitting diode is electrically connected to the first conductive wire, and the first light emitting diode is a second electrode is electrically connected to the second wire, the first electrode of the second LED and the first 14 201125166 sidewall are according to the above, in another embodiment, wherein the first wire further covers the According to the above, in another embodiment, the lower surface of the first wire is covered. 1 solder resist layer, partially covered according to the above, in another shot, wherein each of the electrodes and the first: the second electrode of the second working electrode and the second electrode = the first line and the second wire Miscellaneous connections. In the above-mentioned, the first electrode and the second electrode of the two-diode body are located on the same side of the second light-emitting diode. And the first electrode of the first diode is connected to the second electrode and the third wire is electrically connected. In the other embodiment, the material is the first electrode of the light-emitting diode. The second electrode is located on a different side of the first light-emitting diode, and the first electrode of each of the first light-emitting diodes is directly electrically connected to the first wire in the groove, the second electrode The second wire is electrically connected by a bonding wire. 15 201125166 According to the above, in another embodiment, the first electrode and the second electrode of each of the second LEDs are located on different sides of the second LED, each of the second LEDs The first electrode of the pole body is directly electrically connected to the first wire in the recess, and the second electrode is electrically connected to the third wire by a bonding wire. According to the above, in another shot, each of the upper anti-ship layers respectively surrounds each of the element regions. According to the above, in another embodiment, a further anti-friction insulating layer is disposed on the lower conductive layer in the first lead region of each of the element regions. In the light-emitting diode package of the present invention, the light-emitting diode system is disposed in the recess of the substrate, so that the overall thickness of the light-emitting diode package can be greatly reduced. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS In order to make the present invention well understood by those skilled in the art to which the present invention pertains, the preferred embodiment of the present invention will be described in detail below. The effect to be achieved. ,.凊 Refer to Figures 1 to 9. 1 to 9 are schematic views showing a method of fabricating a light emitting diode package according to a first preferred embodiment of the present invention, wherein Zhang Gaobeibenfa 201125166

Jit 製作方法的特徵,第1B、第3圖、第5圈 %2mpfr- __外觀示意型讀示。如第1圖與Features of the Jit production method, 1B, 3, and 5th laps %2mpfr- __ Appearance type reading. As shown in Figure 1

Hr 絲ω。在本實施射,絲1㈣為一 印刷電路板’但不以此為限而可為其它類型之基板。基板10包括一 絕緣_邑緣層)12、-上導電層14設置於絕緣基材12之上表面, 導電層16設置於絕緣基材12之下表面,其中絕緣基材12 ,可為各式絕緣材料例如玻璃纖維(細flber)或樹脂,且上導電層14 。下導電層16可為各式導電材料例如缩,但不以此為限。此外, 基板10上疋義有複數條蝴道18與複數個元件區Μ,其中各元件 區20包括-第-導線區2ω、一第二導線區2〇2與一隔離區撕。 接著’去除位於各元件區20之第一導線區201 _部分上導電層 14及隔離區203内之上導電層14,以及一併去除位於各元件區2〇 之第二導線區202内的部分下導電層16及隔離區2〇3内之下導電層 16,以分別於第-導線區2()1形成一第一導線22的一部分以及於第 >二導線區202形成-第二導線24的一部分,以及於各第一導線區 201之上導電層Μ内分卿成一開口,其中開口部分暴露出絕緣基 材12。在本實施例中,上述圖案化上導電層Μ與圖案化下導電層 16的步驟係以蚀刻方式進行,但不以此為限。 如第3圖與第4圖所示,接著去除位於各元件區2〇之第一導線 區201中露出上表面的絕緣基材12以形成一凹槽%,並一併去除 位於各元件區20之第二導線區202中露出下表面的絕緣基材12, 17 201125166 區2°2内形成,28,其中凹槽、 «2〇2 28 的設置空間,藉由此凹 3 為發光二極體 細之咖W峨突=緣 2:广第二導線區-之邊緣的中央區,如第t== "不材12的凹槽26細28係以雷射鎮孔方式形成,作 不以此為限。值得說明的是,在本實施例中,位於同一列: 導線區2〇1的凹槽26係為彼此連通而 :=:::増加_度一二 的凹槽26亦可分別為一彼此不連通的封閉型凹 一- ,如第5圖與第6圖所示,隨後於絕緣基材12之各凹槽26内分 別形成一上導電圖案30,其 16==分顺各场騎14⑽各凹槽26«出之下導電層 ζ連接’藉此上導電_G、上導電層14與下導電層μ形成 導雷θ而使付在第一導線22的一側面的上導電層14與下 線2^ 部分絕緣基材12。換言之,絕緣基材12係自第一導 ' 則向延伸。此外’並一併於各孔洞28内分別形成—下導電 圖案32 ’其中各下導電圖案32與位於各第二導線區2〇2中之下導 201125166 電層以及各孔洞28曝露出之上導電層14電性連接。由於凹押 Z貫穿絕緣基材U,因此在各第一導線請t,可使位於絕曰緣 基材12之上表面的上導電層14藉由上導電圖案3()電性連接至位於 絕緣基材12之下表面的下導電層16,以利於後續作對外電性連接。 此外’覆蓋於凹槽26之側壁的上導電圖案3〇另具有反射作用,可 增加發光的_率。孔洞28亦係貫穿絕緣基材12,因此在各第^ 導線區2〇2中’可使位於絕緣基材u之上表面的上導電層μ藉: 下導電圖案32電性連接至位於絕緣基材u之下表面的下導電層 16,以利於後續作對外電性連接。在本實施例中,上導電圖案^ 與下導電圖案32的材質可為各式導電材料,且其可為單一導電層或 複合導電層。例如在本實施例中,±導電圖案3〇與下導電圖案2 的材料可為由鎳與銀兩層金屬所構成的複合導電層,並可利用電錄 方式形成,但不以此為限。此外,於形成上導電圖案3〇與下導電圖 案32之後’可選擇性地於位於各第二導線區2〇2之上導電層μ的 表面並位於孔洞28的上方形成一識別標記34,藉此區別第二導線 _ 22與第二導線24,以及形成-下防銲絕緣層%,係覆蓋於各第— 導線區201之下導電層16的部分表面以及隔離區2〇3之絕緣基材 12之下表面,亦即部分覆蓋第—導線22之下表面,崎低發^二 極體封裝完成後於裝配於電子裝置時之迴焊製程中發生短路的風 險。值得的是,於職下_絕緣層36之前可先將對應下防鲜 絕緣層36的下導電層16的厚度作適度縮減,藉此當下防銲絕緣層 36形成後可與相鄰的下導電層16大體上形成一平坦表面,而有利 於後續將發光二極體職銲接於另—電子裝置板上(圖未示)。 201125166 如第7圖與第8圖所示,提供複數個發光二極體38,其中各發 光二極體38包括一第—電極381與一第二電極382。隨後,將各發 光二極體38 IU定於各凹槽26内之第一導線22上,並使各發光二極 體38之第-電極381與對應之各第一導線22電性連接,以及使各 發光二極體38之第二電極382與對應之各第二導線24電性連接。 在本實施例中,發光二極體38之第一電極381與第二電極382係分 別位於發光二極體38不同一側之兩相對表面,第一電極381係設置 於第-導線22之表面並與第一導線22直接電性連接,而第二電極# 382則係利用一鮮線4〇電性連接至第二導線%但不以此為限。接 者’在整個基㈣上包括於贱二歸%上形成—導層42,將 發先-極體38包覆並封裝,並沿切割道18對基板⑴進行_,以 形成複數個發光二極體封裝44,如第9圖所示。 。 的方法⑽ 胆㈣錢並不以上述實施例所Hr wire ω. In the present embodiment, the wire 1 (four) is a printed circuit board 'but not limited thereto, and may be other types of substrates. The substrate 10 includes an insulating interlayer layer 12, the upper conductive layer 14 is disposed on the upper surface of the insulating substrate 12, and the conductive layer 16 is disposed on the lower surface of the insulating substrate 12. The insulating substrate 12 can be various types. An insulating material such as glass fiber (fine flber) or resin, and an upper conductive layer 14 . The lower conductive layer 16 can be, for example, a plurality of conductive materials, but is not limited thereto. In addition, the substrate 10 has a plurality of butterfly tracks 18 and a plurality of component regions, wherein each of the component regions 20 includes a -first wire region 2ω, a second wire region 2〇2 and an isolation region tear. Then, the conductive layer 14 on the first conductive region 14 and the isolation region 203 of the first conductive region 201 of each of the component regions 20 is removed, and the portion of the second conductive region 202 located in each of the component regions 2 is removed. a lower conductive layer 16 and a lower conductive layer 16 in the isolation region 2〇3 to form a portion of the first wire 22 in the first wire region 2()1 and a second wire in the second wire region 202 A portion of the portion 24, and an opening in the conductive layer of each of the first conductor regions 201, wherein the opening portion exposes the insulating substrate 12. In the embodiment, the step of patterning the upper conductive layer Μ and the patterning the lower conductive layer 16 is performed by etching, but is not limited thereto. As shown in FIGS. 3 and 4, the insulating substrate 12 exposed in the upper surface of the first wiring region 201 of each of the element regions 2 is removed to form a recess %, and is removed in each of the element regions 20 as well. The insulating substrate 12 of the second wire region 202 exposing the lower surface is formed within 2° 2 of the 201125166 region, 28, wherein the groove, the space of the space of “2〇2 28, by which the recess 3 is a light emitting diode Fine coffee W conflict = edge 2: wide second wire area - the central area of the edge, such as the t == " not the 12 groove 26 thin 28 series formed by laser town hole, do not This is limited. It should be noted that, in this embodiment, the grooves 26 located in the same column: the wire region 2〇1 are connected to each other: the groove 26 of the = degree 1-2 degree can also be a mutual Connected closed recesses - as shown in Figures 5 and 6, then an upper conductive pattern 30 is formed in each of the recesses 26 of the insulating substrate 12, and 16 == each of the field rides 14 (10) The conductive layer ζ is connected under the recess 26«, whereby the upper conductive layer _G, the upper conductive layer 14 and the lower conductive layer μ form a lightning guide θ to make the upper conductive layer 14 and the lower line applied to one side of the first conductive line 22 2^ Part of the insulating substrate 12. In other words, the insulating substrate 12 extends from the first guide. In addition, a lower conductive pattern 32 is formed in each of the holes 28, wherein each of the lower conductive patterns 32 and the lower conductive layer 201125166 located in each of the second conductive regions 2〇2 and the holes 28 are exposed to conduct electricity. Layer 14 is electrically connected. Since the recess Z penetrates through the insulating substrate U, the upper conductive layer 14 on the upper surface of the insulating substrate 12 can be electrically connected to the insulating layer 3 by the upper conductive pattern 3 () at each of the first wires. The lower conductive layer 16 on the lower surface of the substrate 12 facilitates subsequent electrical connection. Further, the upper conductive pattern 3 covering the side wall of the recess 26 has a reflecting effect to increase the illuminance. The hole 28 also penetrates through the insulating substrate 12, so that the upper conductive layer μ on the surface of the insulating substrate u can be made in each of the second conductive regions 2〇2: the lower conductive pattern 32 is electrically connected to the insulating substrate. The lower conductive layer 16 of the surface under the material u is to facilitate subsequent electrical connection. In this embodiment, the material of the upper conductive pattern and the lower conductive pattern 32 may be various conductive materials, and it may be a single conductive layer or a composite conductive layer. For example, in the present embodiment, the material of the ± conductive pattern 3 〇 and the lower conductive pattern 2 may be a composite conductive layer composed of two layers of nickel and silver, and may be formed by an electric recording method, but not limited thereto. In addition, after the upper conductive pattern 3 〇 and the lower conductive pattern 32 are formed, an identification mark 34 may be formed on the surface of the conductive layer μ located above each of the second conductive regions 2 〇 2 and above the hole 28 . The difference between the second wire _ 22 and the second wire 24, and the % of the under-welding insulating layer are covered by a portion of the surface of the conductive layer 16 under each of the first wire regions 201 and the insulating substrate of the isolation region 2〇3 The lower surface of 12, that is, partially covering the lower surface of the first wire 22, is at risk of short-circuiting in the reflow process when assembled in an electronic device after the package is completed. It is worthwhile to reduce the thickness of the lower conductive layer 16 corresponding to the lower fresh-keeping insulating layer 36 before the insulating layer 36, so that the under-weld insulating layer 36 can be formed with the adjacent lower conductive layer. Layer 16 generally forms a flat surface that facilitates subsequent soldering of the LED body to another electronic device board (not shown). 201125166 As shown in FIGS. 7 and 8, a plurality of light emitting diodes 38 are provided, wherein each of the light emitting diodes 38 includes a first electrode 381 and a second electrode 382. Subsequently, each of the light-emitting diodes 38 IU is disposed on the first wire 22 in each of the grooves 26, and the first electrode 381 of each of the light-emitting diodes 38 is electrically connected to the corresponding first wire 22, and The second electrodes 382 of the LEDs 38 are electrically connected to the corresponding second wires 24 . In the present embodiment, the first electrode 381 and the second electrode 382 of the LED body 38 are respectively located on opposite surfaces of different sides of the LED body 38, and the first electrode 381 is disposed on the surface of the first wire 22 The first electrode 22 is directly electrically connected to the first wire 22, and the second electrode #382 is electrically connected to the second wire by a fresh wire 4〇, but is not limited thereto. The connector 'includes on the entire base (4) to form a conductive layer 42 on the second surface, and encapsulates and encapsulates the first-pole body 38, and performs _ on the substrate (1) along the dicing street 18 to form a plurality of light-emitting diodes The polar package 44 is as shown in FIG. . Method (10) biliary (four) money is not in the above embodiment

的方法為限,㈣料其它實施_。請參考第 示了本發明一第二較佳實施例弟 圖。為了便於比較各實施例之相異== 實施例使用相同符號標注相同元件,且^ = ’本實施例免 步驟進行說明,至於相同之方法步 :前述實施例之差異在於發光二極體的型 如第10圖所*,在本實施例中, 1、紐連接方3 第二電極382係位於發光二極體3 ^ 38之第一電極划 隨邱之问一側的表面上,且發光二 20 201125166 體38 光-’ Μ與第—導線22電性連接,而發 九一極體38之第二電極382藉由足如 接。 另一鲜線40與第二導線24電性連 請參考第11圖至第17圖。第 第三較佳論丨犧17瞻了本發明之 發明之發光二極體封裝之製作的示意圖。為彰顯本 視示意型式緣示,第12A_12B圖、㈣’第11圖與第13圖以上 式繪示,第17圖則以外觀示意型 圖以剖線不意型 圖之Μ剖面線繪示之剖面示其中第12B _第11 立丨丨品“ ㈣丁賴、第14 _沿第13圖之b_b, ^-紐50。在本實_及下文所述之其它實施射,基板係為 列如-印刷電路板,但f為限,而可為其它_之基板。基板 包括-絕緣基材52、-上導電層54設置於絕緣基材%之上表 面’以及-下導電層56設置於絕緣基材52之下表面,其中絕緣基 才52可為各式絕緣㈣例如朗纖維或樹脂等,且上導電層%與 下導電層56可視電性需求為各式導電㈣例如銅,但不以此為限。 此外j板50上定義有複數條切割道%與複數個元件區6〇。接著, 圖案化上導電層54及下導電層56,以分別於各元倾⑼内形成電 性分離之-第-導線區601及一第二導線區_。上導電層54在圖 案化製程後會分別於各第-導線區6G1内形成—開σ 54A,部分暴 露出絕緣基材52。在本實施例巾,圖案化上導電層%及下導電層 56之步驟係顧侧方式達成,但不以此為限。接著,去除上導電 201125166 層54之開口 54A所暴露出之絕緣基材52,以分別於各第一導線區 601内之絕緣基材52内形成一凹槽52A。在本實施例中,絕緣基材 52之凹槽52A係利用雷射鑽孔方式形成,且凹槽52A可貫穿絕緣 基材52而暴露出部分的下導電層%,但並不以此為限。例如,絕 緣基材52之凹槽52A亦可_其它方式加以形成且凹槽52a亦 可不貫穿絕緣基材52。此外,由上視方向觀之,凹槽52八可為一封 閉型凹槽’但不以此為限。凹槽52A的形狀可為矩形,但不以此為 限而可為其它各種形狀;再者,凹槽52A的側壁亦可為垂直側壁、 向内傾斜或向外傾斜的側壁,或是具有弧度之側壁。 如第13圖與第Μ圖所示,接著去除各元件區6〇之四個角落區 之下導電層56、絕緣基材52與上導電層%,以分別於各元件區= 的四個角落形成-貫穿基板5〇的孔洞6卜在本實施例中,孔洞的 係利用機械鑽孔方式形成,但制66並不限於以機械鑽孔方式形 成。接著’於各元件區60之四個角落區之上導電層%上分卿成 -上防銲絕緣層62,並使各上防銲絕緣層62覆蓋相對應之孔洞的, 以及於各元件區60之第一導線區6〇1内的下導電層%上形成一下 防銲絕緣層64。在本實施例中,上防舰緣層㈤為―__, 但不以此為限,例如上防録絕緣層62亦可為其它形狀之圖案,例如 矩形圖案、菱形圖案或其它幾何圖案。此外,上轉絕緣層幻除了 具有避免短路的作用外,更可具有避免於切割製程後上導電層的切 割面產生毛邊現象,而可增加發光二極體封裝的可靠度。曰 22 201125166 如第15圖所示,隨後於各孔洞66之—側壁上形成一導電圖案 68,分別電性連接對應於各孔、洞66旁之 —第-導線議形成一第—導線7。,以及於二 區602形成-第二導線72,其中第一導線7〇係由第一導線區6〇ι 内之上導電層54、下導電層56與導電圖案關所共同形成而第二 導線72則係由第二導線區内之上導電層%、下導電層允與導 電圖案68所共同形成,且第—導線7Q與第二導線72電性分離。此 外’在本實施例中,第一導線7〇之上導電層Μ、下導電層允盘導 電圖案68係在凹槽52A以及猶_所麵三倾置電性連 ^ =二導線72之上導電層54、下導電層56與導電圖案68則 Γ的材=ΓΓ、66所在的兩個位置電性連接。另外,導電圖案 例如式導電材料,且其可為單—導電層或複合導電層。 ㈣、-人it:施例中’導電随68的材料可為由鎳與銀兩層金屬所構 °料’導w 68可侧如謝式形成,且 52a!L形成於孔洞66之側壁外,亦可-併形成於各凹槽 之上導^4各=^所暴露出之下_ 56,以及任何暴露出 丘 、。電層56的表面。此外,導電圖案68較佳係以 凹样52^ 亦即導電圖案關大體上具有均勻的厚度,藉此可使 而』合κι ’ 可維持平坦’而有利於後續發光二極體的設置, 例而二,ΓΓ52Α的底部不平坦而影響發光二極體的出光方向。舉 使導電Η㈣賴案68的材料巾不添加例如鮮劑的狀況下,即可 使導電職68具有較佳的共形性。 23 201125166 如第16圖所示,隨後於各凹槽52A内至少設置一發光二極體 並使各發光一極體74之一第一電極741與對應之第一導線7〇 電性連接,以及使各發光二極體74之一第二電極742與對應之第二 導線72電性連接。在本實施例中,發光二極體%之第一電極741 與第二電極742係位於發光二鋪74的同一側,且第一電極741 與第二電極742係分別藉由銲線76卜762與第一導線%以及第二 導、、友2電}^連接,但發光一極體%與第一導線%以及第二導線 72的電性連接方式並不以此為限。接著,在基板5G上形成一封膠 層78封裝發光二極體74。 接著進行—切割製程,沿著相鄰之元件區60之間的切割道 58(如第11圖所示)切割基板5〇,以形成發光二極體封裝80,如第 Π圖所示。 、,請再參考第18圖。第18 _示了本發明之第哺佳實施例之 發光二極體封裝的示意®,其中為簡化說明並便於比較各實施例的 異處本實施例與前述第三實施例使用相同的符號標注相同的元 ’並僅針對不同處純綱,科觸S程方法作f覆贅述。本 t例之發光二極體與第-導線以及第二導_電性連接方式與前 二實施例有所不同。如帛18圖所示,本實施例之發*二極體封 、90的第-電極741與第二電極742係位於發光二極The method is limited, (4) other implementations _. Please refer to the first embodiment of the second preferred embodiment of the present invention. In order to facilitate comparison of the differences of the embodiments, the same elements are denoted by the same reference numerals, and ^ = 'This embodiment is free of steps for description. As for the same method steps: the difference of the foregoing embodiments lies in the type of the light-emitting diode. As shown in FIG. 10, in the present embodiment, the second electrode 382 is located on the surface of the first electrode of the light-emitting diode 3^38 along the side of the Qiu, and the light is emitted. 20 201125166 Body 38 Light-' Μ is electrically connected to the first wire 22, and the second electrode 382 of the ninth electrode 38 is connected by a foot. Another fresh wire 40 is electrically connected to the second wire 24. Please refer to Figures 11 to 17. The third preferred embodiment is a schematic view of the fabrication of the light emitting diode package of the invention of the present invention. In order to highlight the schematic description of the present view, the 12A_12B, (4) '11th and 13th drawings are shown above, and the 17th figure is the cross-sectional line drawn by the cross-sectional line of the outline drawing. Show 12B _ 11th product "(4) Ding Lai, 14th _ along the 13th figure b_b, ^-New 50. In this implementation _ and other implementations described below, the substrate system is listed as - The printed circuit board, but f is limited, and may be other substrates. The substrate includes an insulating substrate 52, the upper conductive layer 54 is disposed on the upper surface of the insulating substrate %, and the lower conductive layer 56 is disposed on the insulating substrate. The lower surface of the material 52, wherein the insulating layer 52 can be various types of insulation (4) such as lang fiber or resin, and the upper conductive layer % and the lower conductive layer 56 can be electrically conductive (four), for example, copper, but not In addition, a plurality of dicing streets % and a plurality of component regions 6 定义 are defined on the j-plate 50. Then, the upper conductive layer 54 and the lower conductive layer 56 are patterned to form electrical separations in the respective elements (9). a first conductor region 601 and a second conductor region _. The upper conductive layer 54 is respectively disposed in each of the first conductor regions 6 after the patterning process The σ 54A is formed in the G1, and the insulating substrate 52 is partially exposed. In the embodiment, the step of patterning the upper conductive layer % and the lower conductive layer 56 is achieved by a side method, but not limited thereto. The insulating substrate 52 exposed by the opening 54A of the upper conductive layer 201125166 is removed to form a recess 52A in the insulating substrate 52 in each of the first lead regions 601. In the present embodiment, the insulating substrate 52 is provided. The groove 52A is formed by laser drilling, and the groove 52A can penetrate part of the lower conductive layer through the insulating substrate 52, but is not limited thereto. For example, the groove of the insulating substrate 52 52A may also be formed in other ways and the groove 52a may not penetrate the insulating substrate 52. Further, the groove 52 may be a closed groove 'but not limited thereto. The shape of the 52A may be a rectangle, but may not be limited to other various shapes; further, the side wall of the recess 52A may be a vertical side wall, an inwardly inclined or outwardly inclined side wall, or a side wall having a curvature. As shown in Figure 13 and Figure ,, then remove each of the four component areas The conductive layer 56, the insulating substrate 52 and the upper conductive layer % under the landing area are formed in the four corners of each element region = a hole 6 penetrating the substrate 5A. In the present embodiment, the system of the hole is mechanically utilized. The drilling method is formed, but the manufacturing method 66 is not limited to being formed by mechanical drilling. Then, the conductive layer 5% is formed on the four corner regions of each of the element regions 60, and each of the solder resist layers 62 is formed. The upper solder resist insulating layer 62 covers the corresponding holes, and a lower solder resist layer 64 is formed on the lower conductive layer % in the first lead region 6〇1 of each element region 60. In this embodiment, the upper guard The ship's edge layer (5) is ___, but not limited thereto. For example, the upper anti-recording insulating layer 62 may also be a pattern of other shapes, such as a rectangular pattern, a diamond pattern or other geometric patterns. In addition, the upper insulating layer has the function of avoiding short circuit, and can avoid the occurrence of burrs on the cutting surface of the upper conductive layer after the cutting process, and can increase the reliability of the light emitting diode package.曰 22 201125166 As shown in Fig. 15, a conductive pattern 68 is formed on the sidewall of each of the holes 66, and electrically connected to each of the holes and the side of the hole 66 to form a first wire 7. And forming a second wire 72 in the second region 602, wherein the first wire 7 is formed by the conductive layer 54, the lower conductive layer 56 and the conductive pattern in the first wire region 6〇, and the second wire 72 is formed by the conductive layer % and the lower conductive layer in the second wire region and the conductive pattern 68, and the first wire 7Q and the second wire 72 are electrically separated. In addition, in the present embodiment, the conductive layer 〇 above the first conductive line Μ and the lower conductive layer allow the disk conductive pattern 68 to be on the recess 52A and the three-pronged electrical connection ^=two wires 72 The conductive layer 54 and the lower conductive layer 56 are electrically connected to the conductive pattern 68 at the two locations where the material ΓΓ, 66 is located. Further, the conductive pattern is, for example, a conductive material, and it may be a single conductive layer or a composite conductive layer. (4), - person it: In the example, the material of the conductive with 68 may be formed by two layers of nickel and silver. The conductive material 68 can be formed side by side, and 52a! L is formed outside the side wall of the hole 66. It is also - and formed on each of the grooves, the guides are exposed to _ 56, and any exposed hills. The surface of the electrical layer 56. In addition, the conductive pattern 68 is preferably substantially uniform in thickness with the concave pattern 52, that is, the conductive pattern, thereby allowing the κι ' to maintain a flatness, which facilitates the setting of the subsequent light-emitting diodes, for example. Second, the bottom of the ΓΓ52Α is not flat and affects the light-emitting direction of the light-emitting diode. The conductive member 68 has a better conformality in the case where the material of the conductive crucible 68 is not added with, for example, a freshener. 23 201125166, as shown in FIG. 16 , at least one light-emitting diode is disposed in each of the recesses 52A, and one of the first electrodes 741 of each of the light-emitting diodes 74 is electrically connected to the corresponding first wire 7 , and The second electrode 742 of each of the light-emitting diodes 74 is electrically connected to the corresponding second wire 72. In this embodiment, the first electrode 741 and the second electrode 742 of the light-emitting diode % are located on the same side of the light-emitting two-slot 74, and the first electrode 741 and the second electrode 742 are respectively connected by the bonding wire 76 It is connected to the first wire % and the second wire, the second wire, and the second wire 72. However, the electrical connection between the first light conductor % and the first wire % and the second wire 72 is not limited thereto. Next, an adhesive layer 78 is formed on the substrate 5G to encapsulate the light-emitting diode 74. Next, a -cutting process is performed to cut the substrate 5A along the dicing streets 58 (shown in Figure 11) between adjacent component regions 60 to form a light emitting diode package 80, as shown in the first drawing. Please refer to Figure 18 again. 18 is a schematic view of a light emitting diode package of a preferred embodiment of the present invention, wherein the same reference numerals are used to simplify the description and to facilitate the comparison of the different embodiments. The same element 'is only for the different parts of the pure class, the science touches the S-process method to make a detailed description. The light-emitting diode of the present t example is different from the first wire and the second conductive wire in the first embodiment. As shown in FIG. 18, the first electrode 741 and the second electrode 742 of the present invention are located in the light emitting diode.

一侧,苴Φ筮而 J ^ 1J 、第一電極741係直接與凹槽52A内之第一導線7〇電性 、接而第一電極742則係藉由鮮、線762與第二導線72電性連接。 24 201125166 請參考第19圖至第26圖。第19圖至第%圖繪示了本發明之 =佳實_辦:極細峨細咖。為彰顯本 之七光=極體封裝之製作方法的特徵,第19圖、第21圖與第 24圖以上視讀型式料,第2ga_2⑽圖、第22圖、第23圖血第 25圖以剖面示意型式繪示’第%關以外觀示意型式繪示,其中 第圖為/σ第19圖之c_c,剖面線繪示之剖面示意圖、第u圖為 /口 B圖之D-D剖面線繪示之剖面示意圖、第μ圖為沿第%圖 之E-E’剖面線繪示之剖面示意圖。如第19圖與第嫩姻圖所示, 首先提供—基板⑽。基板⑽包括-絕緣基材102、-上導電層 104設置於絕緣基材1〇2之上表面,以及一下導電層設置於絕 緣基材脱之下表面。此外,基板1〇〇上定義有複數條切割道⑽ ”複數個7L件區11G。接著,圖案化上導電層1⑽及下導電層伽, 以分別於各元件區11G㈣成電性分離之—第—導親·、一第 -導線區11G2與-第三導線區咖。上導電層·在圖案化製程 後會分別於各第-導線區内形成一開口祕部分暴露出絕 緣基材ι〇2。在本實施例中,圖案化上導電層1〇4及下導電層ι〇6 之步驟係利祕刻方式達成,但不以此為限。接著,去除上導電層 ⑽之開口雜所暴露出之絕緣基材脱,以分別於各第一導線區 應内之絕緣基材H)2内形成—凹槽職。在本實施例中,絕緣 基材102之凹槽爾係利用雷射鑽孔方式形成,且凹槽碰可貫 穿絕緣基材!〇2而暴露出部分的下導電層1〇6,但並不以此為限。 例如’絕緣紐⑽之凹槽職村_其它方式加⑽成,且 25 201125166 凹槽102A亦可不貫穿絕緣基材1〇2。此外,由上視方向觀之,凹槽 102A的形狀為矩形,但不以此為限而可為其它各種形狀;再者凹 槽102A的側壁亦可為垂直側壁、向内傾斜或向外傾斜的側壁,或 是具有弧度之側壁。 如第21圖與第22圖所示,接著去除各元件區110之四個角落 區=下導電層106與絕緣基材102 ’以分別於各元件區11〇的四個 角落形成-孔洞116,其中純洞116分別部分暴露出上導電層 1〇4。在本實施例中,孔洞110係利用雷射鑽孔方式形成,但不以此籲 為限。接著’於各元件區110之周邊之上導電層1〇4上分別形成一 上防銲絕緣層112,以及於各元件區11〇之第一導線區謂内的下 導電層106上形成一下防銲絕緣層114。在本實施例中各上防鲜 絕緣層112係分別環繞各元件㊣11〇,但上防銲絕緣層ιΐ2的位置 與形狀並不以此為限。 如第23圖所示,隨後於各孔洞116之一側壁上形成一導電圖案 m,分別電性連接對應於各孔洞116暴露出之上導電層刚以及各 孔洞116旁之下導電層1〇6 ’以於各第一導線區腦形成一第一導 線120、於各第二導線區聰形成一第二導線m以及於各第三導 線區1103(第23圖未示)形成一第三導線m(第23圖未示),其中第 一導線120係由第一導線區_内之上導電層104、下導電層106 . 與導電圖案118所制形成,第二導線122則係由第二導線區謂 内之上導電層104、下導電層1()6與導電圖案118所共同形成第 26 201125166 三導線124則係由第三導線區11〇3内之上導電層ι〇4、下導電層ι〇6 ' 與導電圖案118所共同形成,且第一導線120、第二導線122與第 三導線124三者電性分離。導電圖案118的材質可為各式導電材料, 且其可為單一導電層或複合導電層。例如在本實施例中,導電圖案 118的材料可為由鎳與銀兩層金屬所構成的複合導電層。此外,導 電圖案118可利用例如電鍍方式形成,因此導電圖案118除了形成 於孔洞116之側壁外,亦可一併形成於各凹槽1〇2A之側壁、各凹 槽102A所暴露出之下導電層1〇6,以及任何暴露出之上導電層1〇4 鲁與下導電層106的表面。此外,導電圖案118較佳係與凹槽102A 以共形方式形成,亦即導電圖案118大體上具有均勻的厚度,藉此 可使凹槽102A的底部仍可維持平坦,而有利於後續發光二極體的 设置’而不會因凹槽102A的底部不平坦而影響發光二極體的出光 方向。舉例而言,在導電圖案118的材料中仍不添加例如光澤劑的 狀況下,即可使導電圖案m具有較佳的共雜。 Φ 如第24圖與第25圖所示’隨後於各凹槽102A内設置-第一 發光二極體13G與-第二發光二極體132,並使各第—發光二極體 13〇之-第1301與第一導線12〇電性連接使各第一發光二 極體m之n極咖與第二祕122 f性連接,使各第二發 先二極體132之-第-電極1321與第一導線12〇電性連接以及使 .各第二發光二極體132之-第二電極1322與第三導線124電性連 接纟本實施例中,第-電極測與第二電極服係位於第一發 光極體130的同-側,且第一電極13〇1與第二電極服係分別 27 201125166 藉由銲線1341、1342與第一導線120以及第二導線122電性連接; 第一電極1321與第二電極1322係位於第二發光二極體132的同一 側,且第一電極1321與第二電極1322係分別藉由銲線1361、1362 與第一導線120以及第三導線124電性連接。接著,在基板1〇〇上 形成一封膠層138(第24圖未示)封裝第一發光二極體13〇與第二發 光二極體132。 接著進行-切割製程,沿著相鄰之元件區UG之間的切割道 108(如第19圖所示)切割基板励,以形成發光二極體封们,如 第26圖所示。 請再參考第27圖427圖繪示了本發明之第六較佳實施例之 發光二極體縣的示意圖,其巾為簡化制並便於比較各實施例的 相異處’本實施顺前述第五實闕使肋_符號標注相同的元 件’並僅針對不同處加以說明,而不再對製作方法作4覆贅述。本 實施例之帛發光二極體與第_導線以及第二導_電性連接方式 =第:發光二極體與第一導線以及第三導線的電性連接方式與前 體所柯。如第27圖所示,在本加种,發光二極 係位~發光二極體130的第—_13G1與第二電極1302 與凹# = ^二極體130的不同一側,其中第一電極1301係直接 !:Γ; 的第一電極22電性連接;此外,第二發光二極體132 電極1321與第二電極1322係位於第二發光二極體⑶的不 28 201125166 同一側’其中第一電極1321係直接與凹槽1〇2A内之第一導線12〇 電性連接,而第二電極1322州系藉由銲線1362與第三導線m電 性連接。 綜上所述’本發明之發光二極體封裝將發光二極體設置於基板 之凹槽内,可有效縮減發光二極體封裝的整體厚度。此外,導電圖 案係以共形方式形成於凹槽的底部與側壁,因此可保持平坦性而確 保設置於其上的發光二極體封裝的發光方向。再者,藉由調整凹槽 的形狀f側壁角度可以改變出光角度與光型,進而增加發光二極體 的應用㈣。另外,基板的孔洞除了提供上導電層與下導電層的連 接返裣之外,更可在後續進行表面黏著(surfacem_ 作為銲錫的緩衝空間,而有效提升表面黏著製程的良率。 以上所述僅為本發明之較佳實_,凡依本發 所做之均«域簡,㈣屬本發批涵絲s。專故圍 【圖式簡單說明】 二極體封裝之 第1圖至第9_示了本發明第—較佳實施例之發光 製作方法的示意圖。 第10崎示了本發㈣二触實施狀發光二極體封 法的示意圖。 作万 第U圖至第π圖料了本翻之第三較佳實關之發光二極體封 29 201125166 裝的製作方法的示意圖。 第18圖繪示了本發明之第四較佳實施例之發光二極體封裝的示意 圖。 第19圖至第26圖繪示了本發明之第五較佳實施例之發光二極體封 裝的製作方法的示意圖。 第27圖繪示了本發明之第六較佳實施例之發光二極體封裝的示意 圖。 【主要元件符號說明】 10 基板 12 絕緣基材 14 上導電層 16 下導電層 18 切割道 20 元件區 201 第一導線區 202 第二導線區 203 隔離區 22 第一導線 24 第二導線 26 凹槽 28 孔洞 30 上導電圖案 32 下導電圖案 34 識別標記 36 下防銲絕緣層 38 發光二極體 381 第一電極 382 第二電極 40 銲線 42 封膠層 44 發光二極體封裝 50 基板 52 絕緣基材 201125166On one side, 苴Φ筮 and J^1J, the first electrode 741 is directly electrically connected to the first wire 7 in the recess 52A, and the first electrode 742 is connected by the fresh wire 762 and the second wire 72. Electrical connection. 24 201125166 Please refer to pictures 19 to 26. Fig. 19 to Fig. 10 show the invention of the invention = good practice: very fine fine coffee. In order to highlight the characteristics of the manufacturing method of the seven-light=polar body package, the 19th, 21st, and 24th views of the visual reading type, the second ga_2(10), the 22nd, and the 23rd are the 25th. The schematic type shows that the '%th off is shown in a schematic form, wherein the figure is /σ19, c_c, the cross-sectional view of the cross-section, the u-th is the DD cross-section of the B-picture The cross-sectional view and the μth view are schematic cross-sectional views taken along the line E-E' of the %th figure. As shown in Fig. 19 and the first tender figure, the substrate (10) is first provided. The substrate (10) includes an insulating substrate 102, an upper conductive layer 104 is disposed on the upper surface of the insulating substrate 1〇2, and a lower conductive layer is disposed on the lower surface of the insulating substrate. In addition, a plurality of dicing streets (10)" are defined on the substrate 1"". The upper conductive layer 1 (10) and the lower conductive layer are patterned to be electrically separated from the respective element regions 11G (4). - Leading, a first-wire area 11G2 and - third wire area. Upper conductive layer · After the patterning process, a secret portion is formed in each of the first wire regions to expose the insulating substrate ι 2 In this embodiment, the steps of patterning the upper conductive layer 1〇4 and the lower conductive layer 〇6 are achieved in a secret manner, but are not limited thereto. Then, the opening of the upper conductive layer (10) is removed. The insulating substrate is removed to form a recess in the insulating substrate H) 2 in each of the first lead regions. In the embodiment, the recess of the insulating substrate 102 utilizes a laser drill. The hole pattern is formed, and the groove touches through the insulating substrate! 〇2 and exposes part of the lower conductive layer 1〇6, but is not limited thereto. For example, the 'insulation button (10) of the groove village _ other way plus (10), and 25 201125166 The groove 102A may not penetrate the insulating substrate 1〇2. The shape of the groove 102A is rectangular, but not limited thereto, and may be other various shapes; further, the side wall of the groove 102A may be a vertical side wall, an inwardly inclined or outwardly inclined side wall, or have a curvature. As shown in FIG. 21 and FIG. 22, the four corner regions of each element region 110 are further removed = the lower conductive layer 106 and the insulating substrate 102' are formed in four corners of each of the element regions 11A - holes 116, wherein the pure holes 116 partially expose the upper conductive layer 1〇4. In the embodiment, the holes 110 are formed by laser drilling, but are not limited thereto. Then, in each component region 110 An upper solder resist insulating layer 112 is formed on the conductive layer 1〇4 on the periphery, and a solder resist insulating layer 114 is formed on the lower conductive layer 106 in the first lead region of each of the element regions 11〇. In the example, each of the upper anti-friction insulating layers 112 is adjacent to each of the elements, but the position and shape of the upper solder resist insulating layer ι 2 are not limited thereto. As shown in FIG. 23, one of the holes 116 is subsequently A conductive pattern m is formed on the sidewall, and each of the electrical connections corresponds to each of the holes 11 6 exposing the upper conductive layer and the conductive layer 1〇6' under the holes 116, so that each first lead region forms a first wire 120, and each second wire region forms a second wire m and Forming a third wire m (not shown in FIG. 23) in each of the third wire regions 1103 (not shown in FIG. 23), wherein the first wire 120 is formed by the first wire region _ inner conductive layer 104 and the lower conductive layer 106. The conductive pattern 118 is formed, and the second wire 122 is formed by the second conductive region 104, the lower conductive layer 1 and the conductive pattern 118. The 26th 201125166 three wires 124 are formed. The conductive layer ι 4 and the lower conductive layer ι 〇 6 ′ are formed by the conductive layer ’ 4 and the conductive layer 118 , and the first wire 120 , the second wire 122 and the third wire 124 are formed by the third wire region 11 〇 3 . Electrical separation. The material of the conductive pattern 118 may be various conductive materials, and it may be a single conductive layer or a composite conductive layer. For example, in this embodiment, the material of the conductive pattern 118 may be a composite conductive layer composed of two layers of nickel and silver. In addition, the conductive pattern 118 can be formed by, for example, electroplating. Therefore, the conductive pattern 118 can be formed on the sidewall of each of the recesses 1 〇 2A and conductively exposed by the recesses 102A. Layer 1〇6, and any surface that exposes the upper conductive layer 1〇4 and the lower conductive layer 106. In addition, the conductive pattern 118 is preferably formed in a conformal manner with the recess 102A, that is, the conductive pattern 118 has a substantially uniform thickness, whereby the bottom of the recess 102A can be maintained flat, which is advantageous for subsequent illumination. The arrangement of the polar body does not affect the light-emitting direction of the light-emitting diode due to the unevenness of the bottom of the groove 102A. For example, in the case where a material such as a gloss agent is not added to the material of the conductive pattern 118, the conductive pattern m can be made to have a better co-doping. Φ as shown in Figs. 24 and 25, 'the second light-emitting diodes 13G and the second light-emitting diodes 132 are disposed in the respective recesses 102A, and the first light-emitting diodes 13 are arranged. - The first lead 12 is electrically connected to the first lead 12, and the n-pole of each of the first LEDs is connected to the second electrode 122, so that the second electrode 132 of each second diode 132 Electrically connecting with the first conductive line 12 and electrically connecting the second electrode 1322 of the second light emitting diode 132 with the third conductive line 124. In this embodiment, the first electrode and the second electrode The first electrode 13〇1 and the second electrode system are respectively electrically connected to the first wire 120 and the second wire 122 by the bonding wires 1341 and 1342 respectively. An electrode 1321 and a second electrode 1322 are located on the same side of the second LED 132, and the first electrode 1321 and the second electrode 1322 are respectively connected to the first wire 120 and the third wire 124 by the bonding wires 1361 and 1362. Electrical connection. Next, a glue layer 138 (not shown in Fig. 24) is formed on the substrate 1 to encapsulate the first light-emitting diode 13'' and the second light-emitting diode 132. Next, a -dication process is performed to cut the substrate excitation along the scribe line 108 (shown in Fig. 19) between adjacent element regions UG to form a light-emitting diode package, as shown in Fig. 26. Referring to FIG. 27, FIG. 427, a schematic diagram of a light-emitting diode county according to a sixth preferred embodiment of the present invention is shown. The towel is simplified and convenient for comparing the differences of the embodiments. The five 阙 阙 肋 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The 帛 light-emitting diode of the present embodiment is electrically connected to the first conductive wire and the second conductive wire. The electrical connection between the light-emitting diode and the first wire and the third wire is the same as that of the precursor. As shown in FIG. 27, in the present addition, the first electrode of the light-emitting diode-to-light-emitting diode 130 is different from the first electrode _13G1 and the second electrode 1302 and the concave #=^ diode 130, wherein the first electrode 1301 is directly connected to the first electrode 22 of the first light-emitting diode 132; and the second light-emitting diode 1321 and the second electrode 1322 are located on the same side of the second light-emitting diode (3). An electrode 1321 is directly electrically connected to the first wire 12A in the recess 1A2A, and the second electrode 1322 is electrically connected to the third wire m by the bonding wire 1362. In summary, the light-emitting diode package of the present invention has the light-emitting diode disposed in the recess of the substrate, which can effectively reduce the overall thickness of the light-emitting diode package. In addition, the conductive pattern is formed in a conformal manner on the bottom and side walls of the recess, thereby maintaining flatness and ensuring the direction of illumination of the light-emitting diode package disposed thereon. Furthermore, by adjusting the shape of the side wall of the groove f, the angle of light and the light type can be changed, thereby increasing the application of the light-emitting diode (4). In addition, in addition to providing the connection between the upper conductive layer and the lower conductive layer, the hole of the substrate can be subsequently adhered to the surface (surfacem_ acts as a buffer space for the solder, thereby effectively improving the yield of the surface adhesion process. For the sake of the present invention, the simplification of the domain is based on the simplification of the invention. (4) belongs to the squid of the present invention. The special circumstance [simplified description] The first to the ninth of the diode package BRIEF DESCRIPTION OF THE DRAWINGS A schematic view of a method for producing a light-emitting according to a first preferred embodiment of the present invention is shown. Fig. 10 shows a schematic diagram of a method for sealing a light-emitting diode of the present invention (four) two-touch embodiment. A schematic diagram of a method for fabricating a light-emitting diode package 29 201125166. Figure 18 is a schematic view showing a light-emitting diode package according to a fourth preferred embodiment of the present invention. FIG. 26 is a schematic diagram showing a manufacturing method of a light emitting diode package according to a fifth preferred embodiment of the present invention. FIG. 27 is a diagram showing a light emitting diode package according to a sixth preferred embodiment of the present invention. Schematic diagram of [main component symbol] 10 substrate 12 Insulating substrate 14 upper conductive layer 16 lower conductive layer 18 dicing street 20 element region 201 first wire region 202 second wire region 203 isolation region 22 first wire 24 second wire 26 groove 28 hole 30 upper conductive pattern 32 under conductive Pattern 34 Identification mark 36 Lower solder resist layer 38 Light-emitting diode 381 First electrode 382 Second electrode 40 Bond wire 42 Sealant layer 44 Light-emitting diode package 50 Substrate 52 Insulation substrate 201125166

52A 凹槽 54 上導電層 54A 開口 56 下導電層 58 切割道 60 元件區 601 第一導線區 602 第二導線區 62 上防銲絕緣層 64 下防銲絕緣層 66 孔洞 68 導電圖案 70 第一導線 72 第二導線 74 發光二極體 741 第一電極 742 第二電極 761>762 銲線 78 封膠層 80 發光二極體封裝 90 發光二極體封裝 100 基板 102 絕緣基材 102 A 凹槽 104 上導電層 104 A 開口. 106 下導電層 108 切割道 110 元件區 1101 第一導線區 1102 第二導線區 1103 第三導線區 112 上防銲絕緣層 114 下防銲絕緣層 116 孔洞 118 導電圖案 120 第一導線 122 第二導線 124 第三導線 130 第一發光二極體 1301 第一電極 1302 第二電極 132 第二發光二極體 1321 第一電極 31 201125166 1322 第二電極 1341 ' 銲線 1342 1361 ' 銲線 138 封膠層 1362 140 發光二極體封裝 150 發光二極體封裝52A groove 54 upper conductive layer 54A opening 56 lower conductive layer 58 dicing street 60 element region 601 first wire region 602 second wire region 62 upper solder resist layer 64 lower solder resist layer 66 hole 68 conductive pattern 70 first wire 72 second wire 74 light emitting diode 741 first electrode 742 second electrode 761> 762 bonding wire 78 sealing layer 80 light emitting diode package 90 light emitting diode package 100 substrate 102 insulating substrate 102 A groove 104 Conductive layer 104 A opening. 106 lower conductive layer 108 dicing street 110 element region 1101 first wire region 1102 second wire region 1103 third wire region 112 upper solder resist insulating layer 114 lower solder resist insulating layer 116 hole 118 conductive pattern 120 One wire 122 second wire 124 third wire 130 first light emitting diode 1301 first electrode 1302 second electrode 132 second light emitting diode 1321 first electrode 31 201125166 1322 second electrode 1341 'welding wire 1342 1361 ' welding Line 138 Sealant Layer 1362 140 Light Emitting Diode Package 150 Light Emitting Diode Package

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Claims (1)

201125166 七、申請專利範圍: 1. 一種發光二極體封裝的製作方法,包括: 提供一基板’該基板包括一絕緣基材及設置於該絕緣基材上的 一上導電層及一下導電層,該基板上包括有複數個元件區; 圖案化各該元件區中之該上導電層及該下導電層,以形成電性 分離之一第一導線區及一第二導線區,並於各該第一導線區 之該上導電層内分別形成一開口,其中該等開口部分暴露出 該絕緣基材; 去除位於各該第一導線區中曝露之該絕緣基材而形成一凹槽; 電性連接該各該第一導線區之該圖案化上導電層及該圖案化下 導電層以形成一第一導線; 電性連接該各該第二導線區之該圖案化上導電層及該圖案化下 導電層以形成一第二導線; 將複數個發光二極齡職置於各__,並使各該發光二 極體之-第-電極與各該第一導線電性連接,以及使^^ 光二極體之一第二電極與各該第二導線電性連接; 在該基板上形成一封膠層封裝該等發光二極體;以及 切割該基板,而形成複妓個發光二極體封裝。 2.如申請專利範圍帛j項所述之發光二極體封褒的製作方法,其中 各該凹槽曝露出各該第一導線區令的部分該下導電層。/ ” 33 201125166 3.如申清專利範圍第2項所述之發光二極體封裝的 形成該第-導線的步驟包括在各該凹槽中形成_,、 上導電圖案電性連接該各該第一導 = 該圖案化下導電層。 闽茶化上導電層及 範圍第3項所述之發光二極_的製作方法,盆中 導電_位於各該發光二靖與該下導朗之間。” 5·如申請專利範圍第3項所述之發光二極體封裝的製 該上導電_係以係與該凹槽以共柳祕咖)方式形成1其中 6. 項所述之發光二極體封裝的製作方法,其中 形成忒第一導線的步驟包括: 去除位於各該第二導線區中曝露之該絕緣基材 曝露出各該第二導線區中的部分該上導電層^及孔顺 在各成一下導電圖案,該下導電圖案電性連接該各該 第-導線區之該_化上導電層及該_化下導電層。 7.如^請專利範圍第6項所述之發光二極體封裝的製作方法,其中 5亥等孔洞係利用雷射鑽孔方式形成。 、 如申請專利範圍第6項所述之發光二極體封裝的製作方法,其中 各該孔洞係分顧於各該第二導_之—邊緣的—中央區。、 8. 201125166 9. 如申請補I請第1項所狀發^^減封裝㈣作方法,其令 圖案化各該元件區中之該上導電層及該下導電層的步驟=用 姓刻方式進行。 10. 如申請專利範圍第i項所述之發光二極體封敦的 中該等凹槽係利用雷射鑽孔方式形成。 / 、 11.如申請專利範圍第1項所述之發光二極體封裝的製作方法, 包括於位於各該第二導線區之該上導電層的表面形成 更 •識別標 .如申請專職圍第6項所述之發光二極體封裝的製 包括於位於各該第二導線區之該上導電層的 ' 記,其中該識別標記位於該孔洞的上方。 乂 一識別示 以如申請專利翻第i項所述之發光二極體封裝的製 包祕各該元倾中形成-下防銲絕緣層,部分覆蓋該第一導線 之一下表面。 、’、 14.如申請專利範圍第!項所述之發光二極體封裝的製作方法 包括· 文 去除各該元件區之四個角落區之該下導電層、該絕緣基材與該上 35 201125166 導電層,以於各該元件區之四個角落區分別形成一孔洞; 於各該元件區之四個角落區之該上導電層上分別形成一上防銲 絕緣層,並使各該上防銲絕緣層覆蓋相對應之該孔洞;以 及 於各該孔洞之-側壁上形成一導電圖案,分別電性連接對應於各 該孔洞旁之該上導電層與該下導電層,以於各該第一導線 區形成-第-導線,以及於各該第二導線區形成一第二導 線。 I5.如申料她圍第M項所述之發光二極體封裝的製作方 中各該導電圖案另覆蓋各該凹槽之纖以及 暴’- 之該下導電層。 償所暴路出 如申叫專利範圍第15項所述之發 中該等導電圖案與該等凹槽係以共形方式形 1 裝的製作方法,其 中圍第14項所述之發光二極體封裝的製作方法a 該等孔洞係利用機械鑽孔方式形成。 方去,其 18.如申請專利範圍 中該導電圖素係利用電錄簡封裝的製作方法,其 19, 如申請專利範圍第1 項所述之發光二極體封裝的製作 方法,其 36 201125166 巾料「電極與該第二電極位於該發光二極體的同一側,該第一 線電性連接。 一等 20.如申請專利範圍第j項所述之發光二極體封裝的製作方法,立 中。亥第f極與該第二電極位於該發光二極體的不同 二直接與該凹槽内之該第一導線電性連接,該第二電二 鲁 輅由銲線與該第二導線電性連接。 ^ 21.如申請專利範圍第!項所述之發光二極體封裝的製作 中5亥凹槽係為一封閉型凹槽。 “ 2·種發光二極體封裝,包括: 一第一導線; 一絕緣層,自該第一導線之一側向延伸; _ 一第二導線,設置於該絕緣層上並延伸於該絕緣層之一上表面 及-下表面上,其中該第二導線與該第一導線電性分離面 一發光二極體,設置在該第一導線上,該發光二極體之一第 電極與該第一導線電性連接,且該發光二極體之一第_ 與該第二導線電性連接;以及 一電極 一封膠層,封裝該發光二極體。 23·如申請專利範圍第22項所述之發光二極體封裝,其中該第—導 37 201125166 線之一側面夾置部分該絕緣層。 25.如申請專利範圍第24項所述之發光 線包含一上導電圖案與一下導電層 並與該下導電層電性連接。 ,其中該第一導 Θ上導電圖案形成該凹槽 26.如申請專利範圍第η項所述之發光二極 識別標記,設置於位於該第二導線上。、、’更包括至少- 27. 如申請專概圍第Μ項所述之發光二極體封事, 絕緣層,設置於該絕緣層之該下表面並覆蓋部八 一下表面。 。刀 更包括一防銲 該第一導線之 28·如申請專利範圍第22項所述之發光二極體封敦,其中該第 ^與該第二電極位於該發光二極體的同—側,該第—電極細亥 第-電極係分別藉由銲線與該第-導線以及㈣二導線電性連201125166 VII. Patent application scope: 1. A method for manufacturing a light-emitting diode package, comprising: providing a substrate comprising: an insulating substrate; and an upper conductive layer and a lower conductive layer disposed on the insulating substrate; The substrate includes a plurality of component regions; the upper conductive layer and the lower conductive layer in each of the component regions are patterned to form one of the first wire region and the second wire region electrically separated, and Forming an opening in the upper conductive layer of the first lead region, wherein the openings partially expose the insulating substrate; removing the insulating substrate exposed in each of the first lead regions to form a recess; Connecting the patterned upper conductive layer and the patterned lower conductive layer of each of the first lead regions to form a first conductive line; electrically connecting the patterned upper conductive layer of the second lead regions and the patterning The lower conductive layer is formed to form a second wire; a plurality of light-emitting diodes are placed in each of the __, and the -electrode of each of the light-emitting diodes is electrically connected to each of the first wires, and ^ One of the light diodes And each of the two electrodes is electrically connected to the second conductor; forming a subbing layer encapsulating the light-emitting diodes on the substrate; and cutting the substrate to form complex prostitutes light emitting diode package. 2. The method according to claim 1, wherein each of the grooves exposes a portion of the lower conductive layer of each of the first conductor regions. The method of forming the first-conductor of the light-emitting diode package of claim 2, comprising: forming a _ in each of the grooves, and electrically connecting the upper conductive patterns to the respective ones. The first guide = the patterned lower conductive layer. The conductive layer and the light-emitting diode according to the third item, the conductive_in the basin is located between each of the light-emitting diodes and the lower guide 5. The method of forming the upper conductive layer of the light-emitting diode package according to item 3 of the patent application scope is formed by the method and the groove, and the light-emitting two according to the item The method for manufacturing a polar body package, wherein the step of forming the first conductive wire comprises: removing a portion of the upper conductive layer and the hole exposed by the insulating substrate exposed in each of the second wire regions Each of the conductive patterns is electrically connected to the conductive conductive layer and the lower conductive layer of each of the first conductive regions. 7. The method for fabricating a light-emitting diode package according to claim 6, wherein the hole is formed by laser drilling. The method of fabricating a light-emitting diode package according to claim 6, wherein each of the holes is divided into a central region of each of the second leads. 8. 201125166 9. If applying for Supplement I, please apply the method of (1), which is to make the upper conductive layer and the lower conductive layer in each of the element regions. Way to proceed. 10. The grooves of the illuminating diode package described in the scope of claim i are formed by laser drilling. The method for fabricating a light-emitting diode package according to claim 1, comprising forming a further identification mark on a surface of the upper conductive layer located in each of the second wire regions. The invention of the light-emitting diode package of the sixth aspect is included in the upper conductive layer of each of the second wire regions, wherein the identification mark is located above the hole.识别 识别 识别 以 识别 识别 识别 识别 识别 识别 识别 识别 识别 识别 识别 识别 识别 识别 如 如 如 如 如 如 如 如 如 如 如 如 如 如 如 如 如 如 如 如 如 如 如 。 。 。 。 。 。 。 , ', 14. If the scope of patent application is the first! The method for fabricating the LED package includes removing the lower conductive layer, the insulating substrate and the upper 35 201125166 conductive layer in each of the four corner regions of the component region for each of the component regions Forming a hole in each of the four corner regions; forming an upper solder resist layer on the upper conductive layer of each of the four corner regions of the component region, and covering each of the upper solder resist layers with the corresponding hole; And forming a conductive pattern on the sidewall of each of the holes, electrically connecting the upper conductive layer and the lower conductive layer corresponding to each of the holes, respectively, to form a first-conductor in each of the first lead regions, and Forming a second wire in each of the second wire regions. I5. As claimed in the fabrication of the light-emitting diode package described in item M, each of the conductive patterns covers the fibers of the grooves and the lower conductive layer. The method for producing such a conductive pattern and the grooves are formed in a conformal manner in the hair as described in claim 15 of the patent application, wherein the light-emitting diode according to item 14 is Method of Making Body Packages a These holes are formed by mechanical drilling. The method of manufacturing the light-emitting diode package according to the first aspect of the patent application is as follows: 18. The method for manufacturing the light-emitting diode package according to the first application of the patent application, 36 201125166 "The electrode and the second electrode are located on the same side of the light-emitting diode, and the first line is electrically connected. First, 20. The method for fabricating the light-emitting diode package according to claim j, The second electric pole is electrically connected to the first wire of the second electrode directly adjacent to the light emitting diode, and the second electric second is connected by the bonding wire and the second wire The electrical connection of the wires. ^ 21. The fabrication of the light-emitting diode package described in the scope of the invention is a closed recess. "2. Light-emitting diode package, including: a first wire; an insulating layer extending laterally from one of the first wires; _ a second wire disposed on the insulating layer and extending on an upper surface and a lower surface of the insulating layer, wherein The second wire is electrically connected to the first wire a diode is disposed on the first wire, and one of the first electrodes of the light emitting diode is electrically connected to the first wire, and one of the light emitting diodes is electrically connected to the second wire; An electrode layer is provided on the electrode to encapsulate the light emitting diode. The light-emitting diode package of claim 22, wherein the insulating layer is sandwiched on one side of the first lead line 2011 201126166. 25. The illuminating line of claim 24, wherein the illuminating line comprises an upper conductive pattern and a lower conductive layer and is electrically connected to the lower conductive layer. And the conductive pattern on the first conductive layer forms the recess 26. The light-emitting diode identification mark according to item n of the patent application is disposed on the second wire. And, more specifically, at least - 27. For the application of the light-emitting diode package described in the above-mentioned item, the insulating layer is disposed on the lower surface of the insulating layer and covers the lower surface of the portion. . The knives further include a light-emitting diode package as described in claim 22, wherein the second electrode and the second electrode are located on the same side of the light-emitting diode. The first electrode of the first electrode is electrically connected to the first wire and the (four) two wires by a bonding wire 接 攻如申請專利範圍第22項所述之發光二極體封襄,其中該第一電 極與該第二電極位於該發光二極體的不同1,該第一電極係 38 201125166 直接與該凹槽内之該第一導線電性連接,該第二電極係藉由一 銲線與該第二導線電性連接。 30. 種發光一極體封裝,包括: 絕緣基材’其具有一凹槽,以及複數個孔洞分別位於該絕緣 基材之角落區; 第導線β卩为覆蓋s亥絕緣基材之一上表面與一下表面以及 覆蓋部分該等孔洞之侧壁; 第導線,σΡ为覆蓋该絕緣基材之該上表面與該下表面以及 覆蓋部分該等孔洞之側壁,且該第一導線與該第二導線電性 分離; 複數個上防銲絕緣層,分別部分覆蓋該第一導線之一上表面並 對應部分該孔洞,以及覆蓋該第二導線之一上表面並對應部 分該孔洞; 一發光二極體,設置於該凹槽内,該發光二極體之一第一電極 與δ亥第一導線電性連接,且該發光二極體之一第二電極與今 第二導線電性連接;以及 ' 一封膠層,封裝該發光二極體。 31. 如請求項30所述之發光二極體封裝,其中該第一導線另覆蓋哆 凹槽之側壁。 以 32·如請求項30所述之發光二極體封裝,另包括一下防辑絕緣層, 39 201125166 部分覆蓋該第一導線之一下表面。 33. 如請求項30所述之發光二極體封裝,其中該第一電極與該第二 電極位於該發光二極體的同一侧,該第一電極與該第二電極係 分別藉由銲線與該第一導線與該第二導線電性連接。 34. 如請求項30所述之發光二極體封裝,其中該第一電極與該第二 電極位於δ亥發光一極體的不同一側,該第一電極係直接與該凹 槽内之該第一導線電性連接,該第二電極係藉由一銲線與該第 二導線電性連接。 35. —種發光二極體封裝的製作方法,包括: 提供一基板’該基板包括一絕緣基材以及設置於該絕緣基材上 的一上導電層與一下導電層,且該基板包括有複數個元件 區; 圖案化该上導電層及該下導電層,以分別於各該元件區内形成 電性分離之-第-導線區―第二導線區與―第三導線區, 並於各該第-導線區之該上導電層内分別形成一開口,其中 該等開口部分暴露出該絕緣基材; 去除該上導電層之該等開口所暴露出之該絕緣基材以分別於 各該第一導線區内之該絕緣基材内形成一凹槽; 去除各該元件區之四個角落區之該下導電層與親緣基材,以 於各該兀件區之四個角落區分卿成一孔洞,其中各該孔洞 201125166 部分暴露出該上導電層; 於各該元件區之周邊之該上導電層上分別形成一上防鲜 層; ' 於各該孔洞之-侧壁上形成-導案,分職性連接對應於 各該孔洞暴露出之該上導電層以及各該孔洞旁之該下導電 層’以於各該第-導線區形成—第—導線,於各該第二導線 區形成一第二導線,以及於各該第三導線區形成一第二導 線; 於各該凹_設置-第—發光二極體與—第二發光树,並使 各該第-發光二極體之—第—電極與該第—導線電性連 接’使各該第-發光二極體之一第二電極與該第二導線電性 連接,使各該第二發光二極體之—第―電極與該第—導線電 性連接,以及使各該第二發光二極體之一第二電極與該第三 導線電性連接; 、/一 在該基板上形成-封膠層封裝該等發光二極體;以及 沿著相鄰之該等元件區之間切割該基板,以形成複數 極體封裝。 36. 如申請專利範圍帛%項所述之發光二極體封裝的製作方法,其 十各°亥凹槽曝露出各該第-導線區内的部分該下導電層。 37. 如申請專利範圍帛㈣所述之發光二極體封裝的製作方法,其 中各該導電圖案另覆蓋各該凹槽之側壁以及各該凹糟所暴露出 201125166 之該下導電層 38. 如申請專利範圍帛π項所述之發光二極體封裝的製作方法,其 中該專導電圖案係以共开)(conformal)方式形成。 、 39. 如申請專利範圍帛%項所述之發光二極體封裝的製作方法,龙 中圖案化該上導電層及該下導電層之步驟係彻糊方式達成、 40. 如申請專利範圍第36項所述之發光二極體封裝的 中該絕緣基材之料凹獅綱雷射魏方式形成。/,其 41.如申請專利範圍第35項所述之發光二極 中該等孔洞係利用雷射鑽孔方式形成。 體 封敦的製作方法, 其 42.如申請專利範圍第%項所述之發光二極體 中該導電圖案係利用電鍍方式形成。 封裝的製作方法, 其 43·如申請軸_ 35娜權:_ 包括於各該元件區之該第一導線區内的該下導雷思作方法,另 防銲絕緣層。 ㈢上形成一下 42 201125166 =光二極_同―側’且各該第—細二極體之該第 接:電_分別藉由銲線與該第—導線以及該第二導線電^與連該 45 第%項所述之發光二極體封裝的製作方法,其 發光^極體之該第—電極與該第二電極位於該第二、 、同一側,且各該第二發光二極體之該 ^極物軸咖㈠⑽術導線電= 該 46. 如申請專利範圍第%項所述之發光二極體封裝 亥第一發光二極體之該第1極與該第:電‘其 發先二極體的不同—側,各該第—發光二極體之=第一 ^與該凹槽内之該第—導線電性連接,該第=極係直 與該第二導線電性連接。 电_糟由-銲線 47. 2凊專利範圍第%項所述之發光二極體封 ★申明專利範_ 35項所述之發光二極體封裝的製作方 ^其 43 48. 201125166 中各該上防銲絕緣層係分別環繞各該元件區。 49.種發光二極體封裳,包括: 一絕緣基材,其具有—凹槽,以及複數個孔洞分職於該絕緣 基材之角落區; 一第一導線,部分覆蓋該絕緣基材之一上表面與一下表面以及 覆蓋部分該等孔洞之側壁; 第一導線,部分覆蓋該絕緣基材之該上表面與該下表面以及 覆蓋部分該等孔洞之側壁; 一第三導線’部分覆蓋該絕緣基材之該上表面與該下表面以及 覆蓋部分該等孔洞之側壁’其中該第一導線、該第二導線與 該第三導線電性分離; 複數個上防鋅絕緣層,分別位於各該元件區之周邊之該上導電 層上; 一第一發光二極體與-第二發光二極體,設置於該凹槽内,該 第一發光二極體之一第一電極與該第一導線電性連接,該第 發光二極體之一第二電極與該第二導線電性連接,該第二 發光二極體之一第一電極與該第一導線電性連接,該第二發 光二極體之一第二電極與該第三導線電性連接;以及 一封膠層,封裝該第一發光二極體與該第二發光二極體。 〇.如4求項49所述之發光二極體封裝,其中該第一導線另覆蓋該 凹槽之側壁。 201125166 下防鲜絕緣層, 51.如請求項49所述之發光二極體封裝,另包括 部分覆蓋該第一導線之一下表面。 52. 如請求項49所述之發光二極體封裝,其中各該第 “ 之該第-電極與該第二電極位於該第一發光二極體^二極體 各該第一發光二極體之該第一電極盥該第、5一側’且 、乐一電極係分別藉由锃 線與該第一導線以及該第二導線電性連接。 田蛘 ❿ 53. 如請求項49所述之發光二極體封裝,其中么 ^ 、 °^弟一·發光二極贈 之該第-電極與該第二電極位於該第二發光二極體的同f 各該第二發光二極體之該卜電極與該第二電極係分別:曰 線與該第一導線以及該第三導線電性連接。 ^ 54. 如請求項49所述之發光二極體封裝,其中各該第一發光口 之該第-電極與該第二電極位於該第一發光二極體的不同:極體 側,各該第-發光二極體之該第一電極係直接與該凹槽内之該第 -導線電性連接,該第二電極係藉由—展線_第二導線電 接0 55.如請求項49所述之發光二極體封裝,其中各該第二發光二極體 之該第一電極與該第二電極位於該第二發光二極體的不同一 侧’各該第一發光二極體之該第一電極係直接與該凹槽内之兮第 45 201125166 一導線電性連接,該第二電極係藉由一銲線與該第三導線電性連 接。 56. 如請求項49所述之發光二極體封裝,其中各該上防銲絕緣層係 分別環繞各該元件區。 57. 如請求項49所述之發光二極體封裝,另包括一下防銲絕緣層, 設置於各該元件區之該第一導線區内的該下導電層上。 、圖式·The light-emitting diode package of claim 22, wherein the first electrode and the second electrode are different from the light-emitting diode, and the first electrode system 38 201125166 directly faces the concave The first wire in the slot is electrically connected, and the second electrode is electrically connected to the second wire by a bonding wire. 30. A light-emitting one-pole package comprising: an insulating substrate having a recess and a plurality of holes respectively located in a corner region of the insulating substrate; the first conductive line β is an upper surface covering one of the insulating substrates And the lower surface and the sidewall of the hole covering the portion; the first wire, σΡ is the upper surface and the lower surface covering the insulating substrate, and the sidewall of the hole covering the portion, and the first wire and the second wire Electrically separating; a plurality of upper solder resist layers partially covering an upper surface of the first wire and correspondingly corresponding to the hole, and covering an upper surface of the second wire and corresponding to the hole; a light emitting diode The first electrode of the light-emitting diode is electrically connected to the first wire of the δ hai, and the second electrode of the light-emitting diode is electrically connected to the second wire; and A glue layer encapsulating the light emitting diode. The light emitting diode package of claim 30, wherein the first wire further covers a sidewall of the groove. 32. The light emitting diode package of claim 30, further comprising a lower insulating layer, 39 201125166 partially covering a lower surface of the first wire. The illuminating diode package of claim 30, wherein the first electrode and the second electrode are located on a same side of the illuminating diode, and the first electrode and the second electrode are respectively connected by a bonding wire The first wire and the second wire are electrically connected. The light emitting diode package of claim 30, wherein the first electrode and the second electrode are located on different sides of the δ illuminating body, the first electrode is directly in the groove The first wire is electrically connected, and the second electrode is electrically connected to the second wire by a bonding wire. 35. A method of fabricating a light emitting diode package, comprising: providing a substrate comprising: an insulating substrate; and an upper conductive layer and a lower conductive layer disposed on the insulating substrate, and the substrate includes a plurality of The upper conductive layer and the lower conductive layer are patterned to form electrically separated-first-conductor-second wire region and third wire region in each of the component regions, and Forming an opening in the upper conductive layer of the first-wire region, wherein the openings partially expose the insulating substrate; removing the insulating substrate exposed by the openings of the upper conductive layer to respectively Forming a recess in the insulating substrate in a wire region; removing the lower conductive layer and the edge substrate in the four corner regions of each of the component regions to distinguish the holes in the four corners of each of the component regions The portion of the hole 201125166 partially exposes the upper conductive layer; an upper anti-fresh layer is respectively formed on the upper conductive layer around the element region; and a guide is formed on the sidewall of each of the holes, Separate connection The upper conductive layer exposed by each of the holes and the lower conductive layer adjacent to each of the holes to form a first wire in each of the first wire regions, and a second wire in each of the second wire regions, and Forming a second wire in each of the third wire regions; and arranging the first light-emitting diodes and the second light-emitting tree, and causing the first electrode of each of the first light-emitting diodes The first-wire electrical connection is electrically connected to the second electrode of each of the first-light-emitting diodes, so that the first electrode of the second light-emitting diode and the first-wire are electrically connected And electrically connecting the second electrode of each of the second light-emitting diodes to the third wire; forming a capping layer on the substrate to encapsulate the light-emitting diodes; The substrate is diced between adjacent element regions to form a complex pole package. 36. The method of fabricating a light-emitting diode package according to the above-mentioned patent application, wherein each of the tenth recesses exposes a portion of the lower conductive layer in each of the first-wire regions. 37. The method as claimed in claim 4, wherein each of the conductive patterns covers a sidewall of each of the recesses and the lower conductive layer 38 of each of the recesses is exposed by 201125166. The method for fabricating a light emitting diode package according to the invention of claim π, wherein the specific conductive pattern is formed in a conformal manner. 39. The method for fabricating the LED package described in the patent application 帛% item, the step of patterning the upper conductive layer and the lower conductive layer in the dragon is completely achieved, 40. In the light-emitting diode package of the above-mentioned item 36, the insulating substrate is formed by the lion-like laser. /. 41. The holes in the light-emitting diode according to claim 35 of the patent application are formed by laser drilling. The method for producing a body seal, wherein the conductive pattern is formed by electroplating in the light-emitting diode according to item 5% of the patent application. The manufacturing method of the package, such as the application axis _35 Na: _ is included in the first lead region of each of the component regions, and the solder resist layer. (3) Forming 42 201125166 = photodiode_same side" and the first connection of each of the first and second diodes: the electric wire is electrically connected to the first wire and the second wire respectively The method of manufacturing the light-emitting diode package according to Item 5, wherein the first electrode and the second electrode of the light-emitting body are located on the second side, the same side, and each of the second light-emitting diodes The pole pole coffee (1) (10) is a wire conductor = the 46. The first pole of the first light-emitting diode of the light-emitting diode package described in claim 1 of the patent application and the first: The first side of each of the diodes is electrically connected to the first wire in the recess, and the third electrode is electrically connected to the second wire. _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The upper solder resist insulating layer surrounds each of the element regions. 49. A light-emitting diode package, comprising: an insulating substrate having a groove, and a plurality of holes divided into corner regions of the insulating substrate; a first wire partially covering the insulating substrate An upper surface and a lower surface and a sidewall covering the holes; a first wire partially covering the upper surface and the lower surface of the insulating substrate and covering a sidewall of the holes; a third wire portion partially covering the The upper surface of the insulating substrate and the lower surface and the sidewall of the covering portion of the hole, wherein the first wire, the second wire and the third wire are electrically separated; a plurality of upper zinc-proof insulating layers are respectively located a first light emitting diode and a second light emitting diode disposed in the recess, the first electrode of the first light emitting diode and the first The second electrode of the first light emitting diode is electrically connected to the second wire, and the first electrode of the second light emitting diode is electrically connected to the first wire, the second One of the light-emitting diodes And two electrodes electrically connected to the third conductive line; and a subbing layer, a light emitting diode package of the first body and the second light-emitting diode. The light-emitting diode package of claim 49, wherein the first wire further covers a sidewall of the groove. The light-emitting diode package of claim 49, further comprising a portion covering a lower surface of the first wire. The illuminating diode package of claim 49, wherein each of the first and second electrodes are located in the first illuminating diode and each of the first illuminating diodes The first electrode 盥 the fifth side and the first electrode are respectively electrically connected to the first wire and the second wire by a twist line. The field is as described in claim 49. a light emitting diode package, wherein the first electrode and the second electrode are located in the second light emitting diode and the second light emitting diode And the second electrode system is electrically connected to the first wire and the third wire. The light emitting diode package according to claim 49, wherein each of the first light emitting ports The first electrode and the second electrode are different from the first light-emitting diode: the first electrode of each of the first-light-emitting diodes is directly connected to the first-wire of the first light-emitting diode The second electrode is electrically connected by the second wire. The light emitting diode package according to claim 49 is provided. The first electrode and the second electrode of each of the second LEDs are located on different sides of the second LED, and the first electrode of each of the first LEDs directly In the recess, the 45th 201125166 wire is electrically connected, and the second electrode is electrically connected to the third wire by a bonding wire. 56. The light emitting diode package according to claim 49, wherein each The upper solder resist insulating layer surrounds each of the component regions. 57. The light emitting diode package of claim 49, further comprising a lower solder resist insulating layer disposed in the first lead region of each of the component regions On the lower conductive layer. 4646
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