201124019 六、發明說明： 【發明所屬之技術領域】 [0001] 本發明涉及電路板技術，特別涉及一種可用於貼裝電子 元件之表面貼裝結構及具有該表面貼裝結構之電路板。 【先前技術】 [0002] 隨著電子產業之飛速發展，作為電子產品基本構件之電 路板之製作技術顯得愈來愈重要。電路板一般由覆銅基 板經裁切、鑽孔、蝕刻、曝光、顯影、壓合、成型等一 系列製程製作而成。具體可參閲C.H. Steer等人在Pro一 ceedings of th⑷lElE，Vol. 39，_，2 (2002年8 〇 月）中發表之 “Dielectric characterization 〇f Printed circuit board substrates” 一文。 [0003] 一般地，電路板製作完成後，還需要將各種電子元件貼 裝至電路板上。因此，電路板表面需要設置有外露之焊 盤，該焊盤可實現電子元件與電路板内部線路之間之電 連接或訊號連接。隨著電子元件之小型化與功能之集成 化電子元件除西周邊緣具有引腳外，還會在底部設置 0 不同之焊接底盤。所以，對應地，可用於貼裝該種電子 几件之電路板除需要在與電子元件對應之四周邊緣設置 焊盤外，還需要在中心位置開設與電子元件底部之焊接 底盤對應之焊盤。其中，與焊接底盤對應之焊盤之表面 積般大於與引腳對應之焊盤之表面積。而且，由於線 路之密集化’電路板相鄰之較大面積之焊盤與較小面積 之焊盤之間還可能有相互連接關係，因此需要設置連接 線連接於相鄰之焊盤之間。 098144031 表單編號A0101 第4頁/共23頁 0982075365-0 201124019 [0004] [0005] Ο [0006] Ο [0007] 在電子元件貼裝於電路板時，還需要經過回焊爐才能使 電路板上之焊錫重溶以可將電子元件固定辉·接至電路板 。而焊錫重溶過程中由於流體之特性，焊锡有經由連接 線流向表面積較大之焊盤之傾向，因此會使得表面積較 小之焊盤所在區域因焊錫不足而導致焊接不良，造成電 子元件與電路板之間之連接可靠性降低，並且影響電子 元件與電路板之間之訊號傳輸品質。 先前技術中，一般採用在表面積較大之焊盤與表面積較 小之焊盤之間之連接線上塗布或印刷防坪條之方法阻止 重炫之焊錫從表面積較小之焊盤流甸表面積較大之焊盤 。惟，對於表面積較小之焊盤與表面積較大之焊盤之間 之距離較短，即連接線較短之情沉下（例如小於〇 3mm) ，無法塗布或印刷防焊條時，上述重熔之焊錫從表面積 較小之焊盤流向表面積較大之焊盤之問題仍然存在，其 嚴重影響電子元件之貼裝品質。 有鑑於此，提供一種可較有效地陴土重熔之焊錫從表面 積較小之焊盤流向表積較大之焊盤之電路板實屬必要 ，以提高在電路板上貼裝電子元件之貼裝品質，提升電 子元件與電路板之間之訊號傳輸品質。 【發明内容】 下面將以具體實施例說明一種表面貼裝結構及具有該表 面貼裝結構之電路板。 一種表面貼裝結構，用於固定地將具有引腳與焊接底盤 之電子元件貼裝到電路板上。該表面貼裝結構包括形成 在該電路板上之焊盤。該焊盤包括：與該引腳之底表面 098144031 表單編號A0101 第5頁/共23頁 0982075365-0 [0008] 201124019 進行焊接之第一焊盤，與該焊接底盤之底表面進行焊接 之第二焊盤，以及連接該第一焊盤與第二焊盤之連接線 。該第二焊盤與焊接底盤之底表面相對之表面之面積大 於該第一焊盤與引腳之底表面相對之表面之面積。該第 一焊盤與第二焊盤之間距小於0. 3mm。該連接線包括限流 部與非限流部。該限流部與第一烊盤相連接，該非限流 部與第二焊盤相連接。該限流部之部分或全部線寬小於 該非限流部之線寬。 [0009] 一種表面貼裝結構，用於固定地將具有引腳與焊接底盤 之電子元件貼裝到電路板上。該表面貼裝結構包括形成 在該電路板上之焊盤。該焊盤包括：與該引腳之底表面 進行焊接之第一焊盤，與該焊接底盤之底表面進行焊接 之第二焊盤，以及連接該第一焊盤與第二焊盤之連接線 。該第二焊盤與焊接底盤之底表面相對之表面之面積大 於該第一焊盤與引腳之底表面相對之表面之面積。該第 一焊盤與第二焊盤之間距小於0. 3mm。該連接線包括限流 部、第一非限流部與第二非限流部，該限流部連接於第 一非限流部與第二非限流部之間，該第一非限流部連接 於第一焊盤與限流部之間，該第二非限流部連接於第二 焊盤與限流部之間。該限流部之線寬小於該第一非限流 部、第二非限流部之線寬。 [0010] 一種電路板，其包括用於固定地將具有引腳與焊接底盤 之電子元件貼裝到該電路板上之表面貼裝結構。該表面 貼裝結構包括形成在該電路板上之焊盤。該焊盤包括： 與該引腳之底表面進行焊接之第一焊盤，與該焊接底盤 098144031 表單編號A0101 第6頁/共23頁 0982075365-0 201124019 之底表面進行焊接之第二焊盤，以及連接該第一焊盤與 第二焊盤之連接線。該第二焊盤與焊接底盤之底表面相 對之表面之面積大於該第一焊盤與引腳之底表面相對之 表面之面積。該第一焊盤與第二焊盤之間距小於0. 3mm。 該連接線包括限流部與非限流部。該限流部與第一焊盤 相連接，該非限流部與第二焊盤相連接。該限流部之部 分或全部線寬小於該非限流部之線寬。 [0011] ο 一種電路板，其包括用於固定地將具有引腳與焊接底盤 之電子元件貼裝到該電路板上之表面貼裝結構。該表面 貼裝結構包括形成在該電路板上之焊盤。該焊盤包括： 與該引腳之底表面進行焊接之第一焊盤，與該焊接底盤 之底表面進行焊接之第二焊盤，以及連接該第一焊盤與 第二焊盤之連接線。該第二焊盤與焊接底盤之底表面相 對之表面之面積大於該第一焊盤與引腳之底表面相對之 表面之面積。該第一焊盤與第二焊盤之間距小於0. 3mm。 該連接線包括限流部、第一非限流部與第二非限流部， 〇 該限流部連接於第一非限流部與第二非限流部之間，該 第一非限流部連接於第一焊盤與限流部之間，該第二非 限流部連接於第二焊盤與限流部之間。該限流部之線寬 小於該第一非限流部、第二非限流部之線寬。 [0012] 相較於先前技術，本技術方案之表面貼裝結構及具有該 表面貼裝結構之電路板之第二焊盤與焊接底盤之底表面 相對之表面之面積大於該第一焊盤與引腳之底表面相對 之表面之面積，具有連接線相連之第一焊盤與第二焊盤 之間距小於0. 3mm，並且由於連接線之限流部之部分或全 098144031 表單編號A0101 第7頁/共23頁 0982075365-0 201124019 [0013] [0014] [0015] [0016] 098144031 部線寬小於連接線之非限流部（或者第一非限流部、第 二非限流部）之線寬，從而可在連接線較短之情況下（ 小於〇.3mm)無法塗布或印刷防焊條時，有效地阻止重熔 之焊錫從表面積較小之第一焊盤所在區域流向表面積較 大之第一烊盤區域，更好地避免表面積較小之第一焊盤 所在區域因焊錫不足而導致焊接不良之情形，提高在電 路板上貼裝電子元件之貼裝品質，提升電子元件與電路 板之間之訊號傳輸品質。 【實施方式】 下面將結合附圖與實施例對本技術方案之表面貼裝結構 0 以及具有該表面貼裝結構之電路板作進一步詳細說明。 本技術方案實施例提供一種表面貼裝結構，其用於固定 地將具有引腳與焊接底盤之電子元件貼裝到電路板上。 請參閱圖1，上述用於貼裴之電子元件丨具有晶片主體2、 焊接底盤3與引腳4。其中，焊接底盤3形成在晶片主體2 之底面，引腳4形成在晶片主體2之四周邊緣。該焊接底 盤3具有用於焊接之第-底表面‘5。該引腳4有用於焊接之.〇 第二底表面6。 請參閱圖2與圖3,在第一實施例中，該表面貼裝結構 包括形成在電路板100上之焊盤12 ^其中，該焊盤12包括 第二焊盤110、第一焊盤120，以及連接該第二焊盤 與第一焊盤120之連接線130。需指出，並非所有第二焊 盤110與第一焊盤120之間均需要連接線13〇連接，該連 接線130僅為連接於需要訊號傳輸之第二焊盤11〇與第一 焊盤120之間’連接線130之具體設置需根據訊號傳輪之 表單編號A0101 第8頁/共23頁 0982075365-0 201124019 具體要求而定。 [0017] ❹ [0018] 第二焊盤110用於與電子元件丨之焊接底盤3之第一底表面 5進行烊接。第二焊盤具有與焊接底盤3之第一底表面 5相對之表面112。焊接時，焊接底盤3之第一底表面5貼 合到第二焊盤之表面112上。第二焊盤11〇設置之數 目與位置分佈與電子元件丨之焊接底盤3之數目與分钸相 對應。本實施例中，該表面貼裝結構10包括一個正方形 之第二焊盤11〇以及多個圍繞在第二焊盤四周之第一 焊盤120。此外，該第二焊盤110可為長方形、菱形、多 邊形、圓形、橢圓形等各種带狀ή 第一焊盤120用於與電子元件】之引腳4之第二底表面6進 行焊接。第一焊盤120具有與引腳4之第二底表面6相對之 表面122。焊接時’引腳4之第二底表面替無合到第一焊盤 120之表面122上。第一焊盤12〇設置之數目與位置分佈 與電子元件1之引腳4之數目與位置分佈相對應。 .......BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to circuit board technology, and more particularly to a surface mount structure that can be used for mounting electronic components and a circuit board having the surface mount structure. [Prior Art] [0002] With the rapid development of the electronics industry, the fabrication technology of circuit boards, which are the basic components of electronic products, is becoming more and more important. The circuit board is generally fabricated by a series of processes such as cutting, drilling, etching, exposing, developing, pressing, and molding a copper-clad substrate. For more details, see "Dielectric characterization 〇f Printed circuit board substrates" by C. H. Steer et al., Pro-ceedings of th(4) lElE, Vol. 39, _, 2 (August 2002). [0003] Generally, after the circuit board is completed, various electronic components are also required to be mounted on the circuit board. Therefore, the surface of the board needs to be provided with an exposed pad that allows electrical or signal connections between the electronic components and the internal circuitry of the board. With the miniaturization and functional integration of electronic components, in addition to the pins on the western peripheral edge, a different soldering chassis is placed at the bottom. Therefore, correspondingly, the circuit board which can be used for mounting the electronic components requires a pad corresponding to the soldering chassis at the bottom of the electronic component at the center position in addition to the pad provided on the peripheral edge corresponding to the electronic component. Wherein, the surface area of the pad corresponding to the soldering chassis is larger than the surface area of the pad corresponding to the pin. Moreover, since the wiring is dense, there may be interconnection between the pads of the larger area adjacent to the board and the pads of the smaller area, so it is necessary to provide a connection line between the adjacent pads. 098144031 Form No. A0101 Page 4 of 23 0982075365-0 201124019 [0004] [0005] [0006] 0007 [0007] When an electronic component is mounted on a circuit board, it is necessary to pass a reflow oven to make the circuit board. The solder is re-dissolved to secure the electronic components to the board. In the solder re-dissolution process, due to the characteristics of the fluid, the solder has a tendency to flow to the pad having a large surface area via the connection line, so that the area of the pad having a small surface area is poorly soldered due to insufficient solder, resulting in electronic components and circuits. The connection reliability between the boards is reduced, and the signal transmission quality between the electronic components and the circuit board is affected. In the prior art, a method of coating or printing an anti-flat strip on a connecting line between a pad having a large surface area and a pad having a small surface area is generally used to prevent the re-glazed solder from flowing from a surface having a small surface area. The pad. However, the distance between the pad having a small surface area and the pad having a large surface area is short, that is, when the connection line is short (for example, less than 〇3 mm), the remelting is not possible when the solder resist is not coated or printed. The problem of solder flowing from a pad having a small surface area to a pad having a large surface area still exists, which seriously affects the mounting quality of electronic components. In view of the above, it is necessary to provide a circuit board for reflowing solder which is more effective in reflowing from a surface having a smaller surface area to a pad having a larger surface area, so as to improve the mounting of electronic components on the circuit board. The quality of the device is improved to improve the signal transmission quality between the electronic components and the circuit board. SUMMARY OF THE INVENTION A surface mount structure and a circuit board having the surface mount structure will be described below by way of specific embodiments. A surface mount structure for permanently mounting electronic components having leads and soldered chassis to a circuit board. The surface mount structure includes pads formed on the circuit board. The pad includes: a bottom surface of the pin 098144031 Form No. A0101 Page 5 / Total 23 page 0992075365-0 [0008] 201124019 The first pad for soldering, the second soldering to the bottom surface of the soldering chassis a pad, and a connection line connecting the first pad and the second pad. The surface of the second pad opposite the bottom surface of the soldering chassis is larger than the area of the surface of the first pad opposite the bottom surface of the lead. The distance between the first pad and the second pad is less than 0.3 mm. The connecting line includes a current limiting portion and a non-current limiting portion. The current limiting portion is coupled to the first disk, and the non-current limiting portion is coupled to the second pad. Part or all of the line width of the current limiting portion is smaller than the line width of the non-current limiting portion. [0009] A surface mount structure for permanently mounting electronic components having leads and soldered chassis to a circuit board. The surface mount structure includes pads formed on the circuit board. The pad includes: a first pad soldered to a bottom surface of the pin, a second pad soldered to a bottom surface of the solder chassis, and a connection line connecting the first pad and the second pad . The surface of the second pad opposite the bottom surface of the soldering chassis is larger than the area of the surface of the first pad opposite the bottom surface of the lead. The distance between the first pad and the second pad is less than 0.3 mm. The connecting line includes a current limiting portion, a first non-current limiting portion and a second non-current limiting portion, and the current limiting portion is connected between the first non-current limiting portion and the second non-current limiting portion, the first non-current limiting portion The portion is connected between the first pad and the current limiting portion, and the second non-current limiting portion is connected between the second pad and the current limiting portion. The line width of the current limiting portion is smaller than the line width of the first non-current limiting portion and the second non-current limiting portion. [0010] A circuit board comprising a surface mount structure for fixedly mounting electronic components having leads and soldered chassis to the circuit board. The surface mount structure includes pads formed on the circuit board. The pad includes: a first pad soldered to a bottom surface of the pin, and a second pad soldered to a bottom surface of the solder chassis 098144031 Form No. A0101 Page 6 / 23 page 0982075365-0 201124019, And a connection line connecting the first pad and the second pad. The surface of the second pad opposite the bottom surface of the soldering chassis is larger than the area of the surface of the first pad opposite the bottom surface of the lead. The distance between the first pad and the second pad is less than 0.3 mm. The connecting line includes a current limiting portion and a non-current limiting portion. The current limiting portion is connected to the first pad, and the non-current limiting portion is connected to the second pad. A portion or all of the line width of the current limiting portion is smaller than a line width of the non-current limiting portion. [0011] A circuit board comprising a surface mount structure for fixedly mounting electronic components having leads and soldered chassis to the circuit board. The surface mount structure includes pads formed on the circuit board. The pad includes: a first pad soldered to a bottom surface of the pin, a second pad soldered to a bottom surface of the solder chassis, and a connection line connecting the first pad and the second pad . The surface of the second pad opposite the bottom surface of the soldering chassis is larger than the area of the surface of the first pad opposite the bottom surface of the lead. The distance between the first pad and the second pad is less than 0.3 mm. The connecting line includes a current limiting portion, a first non-current limiting portion and a second non-current limiting portion, and the current limiting portion is connected between the first non-current limiting portion and the second non-current limiting portion, the first non-limiting portion The flow portion is connected between the first pad and the current limiting portion, and the second non-current limiting portion is connected between the second pad and the current limiting portion. The line width of the current limiting portion is smaller than the line width of the first non-current limiting portion and the second non-current limiting portion. [0012] Compared with the prior art, the surface of the surface mount structure of the present invention and the surface of the second pad of the circuit board having the surface mount structure and the bottom surface of the soldering chassis are larger than the first pad and The area of the bottom surface of the pin opposite to the surface, the distance between the first pad and the second pad connected by the connecting line is less than 0.3 mm, and due to the part of the limiting portion of the connecting line or the whole 098144031 Form No. A0101 No. 7 [0016] [0016] [0016] 098144031 The line width is smaller than the non-current limiting portion of the connecting line (or the first non-current limiting portion, the second non-current limiting portion) The line width can effectively prevent the remelted solder from flowing from the area of the first surface having a smaller surface area to a larger surface area when the soldering strip cannot be coated or printed when the connecting line is short (less than 〇.3 mm). The first disk area can better avoid the situation that the first pad area with a small surface area is poorly soldered due to insufficient soldering, improve the mounting quality of the mounted electronic components on the circuit board, and improve the electronic components and the circuit board. Between Signal transmission quality. [Embodiment] A surface mount structure 0 of the present invention and a circuit board having the surface mount structure will be further described in detail below with reference to the accompanying drawings and embodiments. Embodiments of the present technical solution provide a surface mount structure for fixedly mounting electronic components having leads and soldered chassis to a circuit board. Referring to FIG. 1, the electronic component 裴 for attaching the above has a wafer body 2, a soldering chassis 3 and a lead 4. Among them, the soldering chassis 3 is formed on the bottom surface of the wafer main body 2, and the leads 4 are formed on the peripheral edges of the wafer main body 2. The welded chassis 3 has a first-bottom surface '5 for soldering. This pin 4 has a second bottom surface 6 for soldering. Referring to FIG. 2 and FIG. 3, in the first embodiment, the surface mount structure includes a pad 12 formed on the circuit board 100. The pad 12 includes a second pad 110 and a first pad 120. And a connection line 130 connecting the second pad and the first pad 120. It should be noted that not all the second pads 110 and the first pads 120 need to be connected by a connection line 13 , and the connection lines 130 are only connected to the second pads 11 需要 and the first pads 120 that require signal transmission. The specific setting of the 'connection line 130' depends on the specific requirements of the signal transmission form number A0101, page 8 / 23 pages 0982075365-0 201124019. [0017] The second pad 110 is used for splicing with the first bottom surface 5 of the soldering chassis 3 of the electronic component 丨. The second pad has a surface 112 opposite the first bottom surface 5 of the soldering chassis 3. When soldered, the first bottom surface 5 of the solder chassis 3 is attached to the surface 112 of the second pad. The number and position distribution of the second pad 11〇 correspond to the number of the soldering chassis 3 of the electronic component 与 and the branch. In this embodiment, the surface mount structure 10 includes a square second pad 11A and a plurality of first pads 120 surrounding the second pad. In addition, the second pad 110 may be rectangular, diamond, polygonal, circular, elliptical or the like. The first pad 120 is used for soldering to the second bottom surface 6 of the pin 4 of the electronic component. The first pad 120 has a surface 122 opposite the second bottom surface 6 of the pin 4. The second bottom surface of the 'pin 4' is soldered to the surface 122 of the first pad 120 during soldering. The number and positional distribution of the first pads 12A correspond to the number and position distribution of the pins 4 of the electronic component 1. .......
[0019] ◎ 其中，該第二焊盤110與焊接底盤3之第一底表面5相對之 表面112之面積大於該第二焊盤11〇與引腳4之第二底表面 6相對之表面122之面積《優選地，第二焊盤11〇之表面 112之面積與第一焊盤120之表面122之面積之比大於等 於1.5 . 1。具有連接線130之第二焊盤Π0與第一焊盤 12 0之間距小於〇. 3mm。 連接線130包括相連接之限流部132與非限流部134。該 限流部13 2之部分或全部線寬小於該非限流部13 4之線寬 。本實施例申，限流部132之部分線寬小於該非限流部 098144031 表單編號A0101 第9頁/共23頁 0982075365-0 [0020] 201124019 134之線寬。該限流部132與非限流部134之線寬分別指 限流部132與非限流部134在垂直於連接線130之延伸方 向上之寬度。本實施例中，該限流部132與第一焊盤120 相連接，非限流部134與第二焊盤110相連接。該限流部 132採用瓶頸狀設計。具體地，限流部132包括第一限流 區132a與第二限流區132b。第一限流區132a與第一焊盤 120連接，第二限流區132b與非限流部134連接。第一限 流區132a之線寬自遠離第一焊盤120之方向逐漸變小，第 二限流區132b之線寬自遠離第一焊盤120之方向逐漸變大 。優選地，第一限流區132a與第一焊盤120之連接處、以 及第二限流區132b與非限流部134之連接處均採用圓角過 渡設計。第一限流區132a之外邊緣與第一焊盤120之連接 點處之切線垂直於第一焊盤120之外邊緣，第二限流區 132b之外邊緣與非限流部134之連接點處之切線垂直於非 限流部134之外邊緣。第一限流區132a與第二限流區 132b之連接處為該限流部132之最窄位置，即線寬最小之 位置。 [0021] 本實施例中，該限流部132之最窄位置之線寬為該非限流 部134之線寬之1/2，即第一限流區132a與第二限流區 132b之連接處之線寬為該非限流部134之線寬之1/2。從 而，該限流部132可在回爐焊過程中較為有效地阻止重熔 之焊錫從第一焊盤120經過該連接線130流向第二焊盤 110 〇 [0022] 請參閱圖4，在第二實施例中，該表面貼裝結構20與第一 實施例中之表面貼裝結構1 0大致相同，其不同之處在於 098144031 表單編號A0101 第10頁/共23頁 0982075365-0 201124019 ，該表面貼裝結構20之限流部232進一步包括一個第三限 流區232c，該第三限流區232c連接於第一限流區232a與 第二限流區232b之間。 [0023] 該第一限流區232a之線寬自遠離第一焊盤220之方向逐漸 變小，該第二限流區232b之線寬自遠離第一焊盤220之方 向逐漸變大，該第三限流區232c之線寬保持不變。第三 限流區232c為限流部232之最窄位置。優選地，第三限流 區232c之線寬為非限流區234之線寬之1/2。第一限流區 232a與第一焊盤210、第三限流區232c之連接處，以及 第二限流區232b與非限流部234、第三眼流區232c之連 接處均採用圓角過渡設計。5 : [0024] 請參閱圖5，在第三實施例中，該表面貼裝結構30與第一 實施例中之表面貼裝結構10大致相同，其不同之處在於 ， . ，該表面貼裝結構30之連接線330包括限流部332、第一 非限流部334與第二非限流部336。 [0025] Ο 限流部332可以與第一實施例宁描述之限流部132或者與 第二實施例中描述之限流部23$之具有相同之結構。限流 部332連接於第一非限流部334與第二非限流部336之間 。限流部332與第一非限流部334、第二非限流部336之 連接處均採用圓角過渡設計。 [0026] 第一非限流部334連接於第一焊盤32 0與限流部332之間 。第二非限流部336連接於第二焊盤310與限流部332之 間。限流部332之線寬小於第一非限流部334、第二非限 流部336之線寬。第一非限流部334與第一焊盤320之連 098144031 表單編號A0101 第11頁/共23頁 0982075365-0 201124019 接處、以及第二非限流部336與第二焊盤3l〇之連接處既 可採用圓角過渡設計，亦可直接採用直角過渡設計。本 實施例中，第一非限流部334與第一焊盤320之連接處、 以及第二非限流部336與第二焊盤310之連接處均為採用 圓角過渡設計。該圓角過渡設計可方便連接線330之蝕刻 成型，有效避免連接線330在與第二焊盤31〇、第一焊盤 320之連接處造成姓刻死角，從而提高連接線330之成型 品質。 [0027] 此外，上述三個實施例中之表面貼::裝.結構1 〇、2〇、30均 可應用於電路板或其他電子元件封裝基板中。 [0028] 相較於先前技# ’本技術方案之表面貼裝結構及具有該 表面貼裝結構之電路板之第二焊盤與焊接底盤之底表面 相對之表面之面積大於該第一焊盤與引胸ί之底表面相對 之表面之面積，具有連接線相連之第一焊盤與第二焊盤 之間距小於0. 3mm，並且由於連接線之限流部之線寬小於 連接線之非限流部.（或者第一非限流部、第二非限流部 )之線寬，從而可在連接線較短之情況下（小於〇. 3mm) 無法塗布或印刷防焊條時，有效地阻止重熔之焊錫從表 面積較小之第一焊盤所在區域流向表面積較大之第二焊 盤區域，更好地避免表面積較小之第一焊盤所在區域因 焊錫不足而導致焊接不良之情形，提高在電路板上貼裝 電子元件之貼裝品質，提升電子元件與電路板之間之訊 號傳輸品質。 [0029]综上所述，本發明確已符合發明專利之要件，遂依法提 出專利申請。先前技術，以上所述者僅為本發明之較佳 098144031 表單編號A0101 第丨2頁/共23頁 201124019 實施方式，自不能以此限制本案之申請專利範圍。舉凡 熟悉本案技藝之人士援依本發明之精神所作之等效修飾 或變化，皆應涵蓋於以下申請專利範圍内。 【圖式簡單說明】 [0030] 圖1係具有引腳與焊接底盤之電子元件之結構示意圖。 [0031] 圖2係本技術方案第一實施例提供之表面貼裝結構設置在 電路板上之示意圖。 [0032] 圖3係圖2中III區域之放大示意圖。 〇 [0033] 圖4係本技術方案第二實施例提供之表面貼裝結構之部分 示意圖。 [0034] 圖5係本技術方案第三實施例提供之表面貼裝結構之部分 示意圖。 【主要元件符號說明】 [0035] 電子元件：1 [0036] 晶片主體：2 ❹ [0037] 焊接底盤：3 [0038] 引腳：4 [0039] 第一底表面：5 [0040] 第二底表面：6 [0041] 電路板：100 [0042] 表面貼裝結構：10、20、30 098144031 表單編號A0101 第13頁/共23頁 0982075365-0 201124019 [0043] 焊盤：12 [0044] 第二焊盤：110、310 [0045] 表面：112、122 [0046] 第一焊盤：120、220 、320 [0047] 連接線：130 ' 330 [0048] 限流部·· 132 ' 232 ' 332 [0049] 第一限流區： 132a、 232a [0050] 第二限流區： 132b、 232b [0051] 第二限流區： 232c [0052] 非限流部：134、234 [0053] 第一非限流部 ：334 [0054] 第二非限流部 ：336 0982075365-0 098144031 表單編號A0101 第14頁/共23頁[0019] ◎ wherein the surface of the second pad 110 opposite to the first bottom surface 5 of the soldering chassis 3 is larger than the surface 122 of the second pad 11 〇 and the second bottom surface 6 of the lead 4 The area ratio "preferably, the ratio of the area of the surface 112 of the second pad 11" to the area of the surface 122 of the first pad 120 is greater than or equal to 1.5. The distance between the second pad Π0 having the connection line 130 and the first pad 120 is less than 〇3 mm. The connecting line 130 includes a current limiting portion 132 and a non-current limiting portion 134 that are connected. A part or all of the line width of the current limiting portion 13 2 is smaller than the line width of the non-current limiting portion 13 4 . In this embodiment, the partial line width of the current limiting portion 132 is smaller than the non-current limiting portion. 098144031 Form No. A0101 Page 9/Total 23 Page 0982075365-0 [0020] The line width of 201124019 134. The line widths of the restricting portion 132 and the non-current limiting portion 134 respectively indicate the width of the restricting portion 132 and the non-limiting portion 134 in the direction perpendicular to the extending direction of the connecting line 130. In this embodiment, the current limiting portion 132 is connected to the first pad 120, and the non-current limiting portion 134 is connected to the second pad 110. The restricting portion 132 has a bottle neck design. Specifically, the flow restricting portion 132 includes a first restrictor region 132a and a second restrictor region 132b. The first current limiting region 132a is connected to the first pad 120, and the second current limiting region 132b is connected to the non-current limiting portion 134. The line width of the first current limiting region 132a gradually decreases from the direction away from the first pad 120, and the line width of the second current limiting region 132b gradually becomes larger away from the first pad 120. Preferably, the junction of the first current limiting region 132a and the first pad 120, and the junction of the second current limiting region 132b and the non-current limiting portion 134 are all designed with a rounded transition. The tangent at the junction of the outer edge of the first current limiting region 132a and the first pad 120 is perpendicular to the outer edge of the first pad 120, and the junction of the outer edge of the second current limiting region 132b with the non-current limiting portion 134 The tangent is perpendicular to the outer edge of the non-restricted portion 134. The junction of the first restrictor region 132a and the second restrictor region 132b is the narrowest position of the restrictor 132, that is, the position where the line width is the smallest. [0021] In this embodiment, the line width of the narrowest position of the current limiting portion 132 is 1/2 of the line width of the non-current limiting portion 134, that is, the connection between the first current limiting area 132a and the second current limiting area 132b. The line width is 1/2 of the line width of the non-current limiting portion 134. Therefore, the current limiting portion 132 can effectively prevent the remelted solder from flowing from the first pad 120 to the second pad 110 through the connecting line 130 during the reflow process. [0022] Please refer to FIG. 4, in the second In the embodiment, the surface mount structure 20 is substantially the same as the surface mount structure 10 in the first embodiment, and the difference is 098144031 Form No. A0101 Page 10/23 pages 0982075365-0 201124019, the surface sticker The restrictor portion 232 of the mounting structure 20 further includes a third restrictor region 232c coupled between the first restrictor region 232a and the second restrictor region 232b. [0023] The line width of the first current limiting region 232a gradually decreases from the direction away from the first pad 220, and the line width of the second current limiting region 232b gradually increases from the direction away from the first pad 220. The line width of the third current limiting zone 232c remains unchanged. The third restrictor region 232c is the narrowest position of the restrictor portion 232. Preferably, the line width of the third current limiting region 232c is 1/2 of the line width of the non-current limiting region 234. The junction of the first current limiting region 232a with the first pad 210 and the third current limiting region 232c, and the junction of the second current limiting region 232b with the non-current limiting portion 234 and the third eye flow region 232c are rounded Transition design. 5: [0024] Referring to FIG. 5, in the third embodiment, the surface mount structure 30 is substantially the same as the surface mount structure 10 of the first embodiment, and the difference is that the surface mount The connecting line 330 of the structure 30 includes a current limiting portion 332, a first non-current limiting portion 334, and a second non-current limiting portion 336. [0025] The current limiting portion 332 may have the same structure as the current limiting portion 132 described in the first embodiment or the current limiting portion 23$ described in the second embodiment. The current limiting portion 332 is connected between the first non-current limiting portion 334 and the second non-current limiting portion 336. The connection between the flow restricting portion 332 and the first non-current limiting portion 334 and the second non-current limiting portion 336 is designed by a rounded corner transition. The first non-current limiting portion 334 is connected between the first pad 32 0 and the current limiting portion 332. The second non-current limiting portion 336 is connected between the second pad 310 and the current limiting portion 332. The line width of the current limiting portion 332 is smaller than the line width of the first non-current limiting portion 334 and the second non-current limiting portion 336. The first non-current limiting portion 334 is connected to the first pad 320. 098144031 Form No. A0101 Page 11 / Total 23 page 0982075365-0 201124019 Connection, and connection of the second non-current limiting portion 336 and the second pad 31a The rounded transition design can be used either directly or in a right angle transition. In this embodiment, the junction between the first non-current limiting portion 334 and the first pad 320, and the junction between the second non-current limiting portion 336 and the second pad 310 are all designed with rounded corners. The fillet transition design facilitates the etching of the connection line 330, effectively avoiding the connection line 330 from causing a dead angle at the junction with the second pad 31A and the first pad 320, thereby improving the molding quality of the connection line 330. [0027] In addition, the surface mount in the above three embodiments: the structure 1 〇, 2 〇, 30 can be applied to a circuit board or other electronic component package substrate. [0028] The surface of the surface mount structure of the prior art and the second pad of the circuit board having the surface mount structure and the surface of the solder chassis are larger than the first pad. The distance between the first pad and the second pad having the connecting line is less than 0.3 mm, and the line width of the current limiting portion of the connecting line is smaller than the connecting line. The line width of the current limiting portion (or the first non-current limiting portion and the second non-current limiting portion) can effectively be used when the connecting wire is short (less than 〇. 3 mm) when the soldering strip cannot be coated or printed. Preventing the remelted solder from flowing from the area of the first pad having a smaller surface area to the area of the second pad having a larger surface area, thereby better avoiding a situation in which the area of the first pad having a small surface area is poorly soldered due to insufficient solder Improve the placement quality of electronic components mounted on the circuit board and improve the signal transmission quality between the electronic components and the circuit board. [0029] In summary, the present invention has indeed met the requirements of the invention patent, and the patent application is filed according to law. In the prior art, the above is only the preferred embodiment of the present invention. 098144031 Form No. A0101 Page 2 of 23 201124019 The embodiment is not limited to the scope of the patent application in this case. Equivalent modifications or variations made by persons skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims. BRIEF DESCRIPTION OF THE DRAWINGS [0030] FIG. 1 is a schematic structural view of an electronic component having a lead and a soldered chassis. 2 is a schematic view showing a surface mount structure provided on a circuit board according to a first embodiment of the present technical solution. 3 is an enlarged schematic view of a region III in FIG. 2. [0033] FIG. 4 is a partial schematic view showing a surface mount structure according to a second embodiment of the present technical solution. 5 is a partial schematic view showing a surface mount structure according to a third embodiment of the present technical solution. [Main component symbol description] [0035] Electronic component: 1 [0036] Wafer main body: 2 ❹ [0037] Soldering chassis: 3 [0038] Pin: 4 [0039] First bottom surface: 5 [0040] Second bottom Surface: 6 [0041] Circuit board: 100 [0042] Surface mount structure: 10, 20, 30 098144031 Form number A0101 Page 13 of 23 page 0982075365-0 201124019 [0043] Pad: 12 [0044] Pad: 110, 310 [0045] Surface: 112, 122 [0046] First pad: 120, 220, 320 [0047] Connecting line: 130 '330 [0048] Current limiting section · 132 ' 232 ' 332 [ 0049] First current limiting zone: 132a, 232a [0050] Second current limiting zone: 132b, 232b [0051] Second current limiting zone: 232c [0052] Non-current limiting section: 134, 234 [0053] First non- Current limit: 334 [0054] Second non-current limit: 336 0982075365-0 098144031 Form number A0101 Page 14 of 23