TW201113851A - Pixel driving apparatus, light-emitting apparatus and drive controlling method for light-emitting apparatus - Google Patents
Pixel driving apparatus, light-emitting apparatus and drive controlling method for light-emitting apparatus Download PDFInfo
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201113851 六、發明說明: 【發明所屬之技術領域】 〔相關申請案的交互參考〕 本發明依據2009年7月10日提出申請之習知曰本專 利申請案第2009- 1 63602號公報、2009年7月10日提出申 請之習知曰本專利申請案第2009-163609號公報、以及2010 年5月13日提出申請之習知日本專利申請案第 2010-110932號公報,並主張其優先權,其所有內容透過引 用倂入於此。 本發明係有關於像素驅動裝置、具備有該像素驅動裝 置之發光裝置與發光裝置之驅動控制方法、及具備有該發 光裝置之電子機器。 【先前技術】 近年來,作爲接著液晶顯示裝置之下世代的顯示裝 置’具備將發光元件排列成陣列狀之顯示面板(像素陣歹IJ ) 之發光元件式顯示裝置(發光裝置)受到注目。作爲這種發 光元件’已知有例如:有機電致發光元件或無機電致發光 元件、發光二極體(LED)等之電流驅動式的發光元件。 尤其’在應用主動陣列式驅動方式之發光元件式顯示 裝置中,和周知的液晶顯示裝置相比,具有顯示響應速度 快、且幾乎無視角相依性、可達成高亮度、高對比化及顯 示畫質高精細化等優異的顯示特性。又,因爲發光;元;彳牛$ 的顯不裝置不須如液晶顯不裝置般需要背光或導光板,戶斤 201113851 • 以具有可更薄型輕量化之極優異的特徵。因而,期待今後 應用在各種電子機器的。 作爲這種發光元件式的顯示裝置,已知有例如日本特 開平8 - 330600號公報所記載的有機電致發光顯示裝置。 此有機電致發光顯示裝置是根據電壓信號進行電流驅動之 主動陣列驅動顯示裝置,按各像素設置一種電路(權宜上記 爲「像素電路」),其具有:由有機電致發光元件所構成之 發光元件;電流控制用薄膜電晶體,係閘極被施加因應於 影像資料的電壓信號,而使電流流向有機電致發光元件: 開關用薄膜電晶體,係進行用以將因應影像資料的電壓信 號供給至該電流控制用薄膜電晶體的閘極的切換》 在這種根據電壓信號控制器發光元件之亮度灰階的有 機電致發光顯示裝置,電流控制用薄膜電晶體等之臨限値 電壓的隨時間變化,會導致向有機電致發光元件流動之電 流的電流値變動。 又,在配置成陣列狀之複數個像素的像素電路中,即 使電流控制用薄膜電晶體之臨限値電壓相同,亦因爲受到 薄膜電晶體之閘極絕緣膜或通道長度、進而遷移率之偏差 的影響,所以在驅動特性發生偏差。在此,已知尤其是在 低溫多晶矽薄膜電晶體中遷移率之偏差會顯著地發生·。因 此,雖然藉由使用非晶形矽薄膜電晶體,可使遷移率均勻 化,但是即使是這種情況,亦無法避免由製程所引起之偏 差的影響。 201113851 進而,在各像素的像素電路,即使是薄膜電晶體無驅 動特性之偏差的情況,亦會發生在有機電致發光元件之形 成過程中所產生的製程偏差所引起之發光特性的偏差。 【發明內容】 本發明具有可提供可良好地補償像素電路之特性變動 並使發光元件以所要之亮度灰階進行發光動作之像素驅動 裝置、具備像素驅動裝置之發光裝置及發光裝置之驅動控 制方法的優點。 用以得到該優點之本發明的像素驅動裝置,其驅動像 素’而該像素係具有發光元件;及發光驅動電路,係具有 電流路與該發光元件連接的驅動控制元件;該像素驅動裝 置具備特性參數取得電路,其取得用以補償該發光驅動電 路之電性特性之變動的電性特性參數、及用以補償該發光 元件之特性之變動的發光特性參數。該特性參數取得電路 係對連接於該像素之資料線施加檢測用電壓,並對該驅動 控制元件的控制端子和該電流路的一端之間施加超過該驅 動控制元件的臨限値電壓之電壓値的電壓,在經過至少— 個緩和時間後取得該資料線的檢測電壓,再根據該檢測電 壓的電壓値取得該電性特性參數。該特性參數取得電路係 根據該像素之該發光元件的發光亮度値取得該發光特性參 數’而該像素之該發光元件係因應根據該電性特性參數而 修正之亮度測量用影像資料進行發光動作。 201113851 用以得到該優點之本發明的發光裝置,具備:發光面 板’係具有沿著第1方向配設的複數條資料線、沿著與該 第1方向交叉之第2方向配設之至少一條的掃描線、及與 該複數條資料線的各資料線和該掃描線連接,並配設於該 名資料線和該掃描線之交點附近的複數個像素;以及驅動 該發光面板的驅動電路。該各像素具有發光元件;及發光 驅動電路,係具有電流路的一端與該發光元件連接的驅動 控制元件。該驅動電路具備:掃描驅動電路,係對該掃描 線施加選擇信號,而將與該掃描線連接的該各像素設定成 選擇狀態;及特性參數取得電路,係取得藉由該掃描線驅 動電路設定成該選擇狀態的該各像素之用以補償該發光驅 動電路之電性特性之變動的電性特性參數、及用以補償該 發光元件之特性之變動的發光特性參數。該特性參數取得 電路係對與該像素連接之各資料線分別施加檢測用電壓, 並對該各像素之該驅動控制元件的控制端子和該電流路的 一端之間施加超過該驅動控制元件的臨限値電壓之電壓値 的電壓’在經過至少一個緩和時間後取得各資料線的檢測 電壓,再根據該檢測電壓的電壓値取得該電性特性參數, 並根據該各像素之該發光元件的發光亮度値取得該發光特 性參數’而該各像素之該發光元件係因應根據該電性特性 參數而修正之亮度測量用影像資料進行發光動作。 用以得到該優點之本發明之發光裝置的驅動控制方 法’該發光裝置具有發光面板,而該發光面板具備複數條 201113851 資料線及與該各資料線連接的複數個像素,該各像素具有 發光元件:及發光驅動電路,係具有電流路的一端與該發 光元件連接的驅動控制元件;該發光裝置之驅動控制方法 具有:電壓施加步驟,係對該各資料線施加檢測用電壓, 並對該各像素之該驅動控制元件的控制端子和該電流路的 一端,施加超過該驅動控制元件的臨限値電壓之檢測用電 壓;電壓取得步驟,係施加該檢測電壓,並在經過至少一 個緩和時間後取得該各資料線的電壓作爲複數個檢測電 壓;電性特性參數取得步驟,係根據所取得之該複數個檢 測電壓的電壓値,取得用以補償該各像素之該發光驅動電 路之電性特性之變動的電性特性參數;發光動作步驟,係 根據該電性特性參數修正亮度測量用影像資料,並因應已 修正之該亮度測量用影像資料,使該各像素的該發光元件 進行發光動作;及發光特性參數取得步驟,係取得該進行 發光動作之該各像素之該發光元件之發光亮度的測量値, 再根據該發光亮度的取得値取得用以補償該發光元件之特 性變動的發光特性參數。 本發明之優點將於以下說明中闡明,且部分優點將由 以下說明中顯然得知、或將透過本發明之實施習得。本發 明之優點可由以下特別指出之手段及組合實現並獲得。 【實施方式】 併入且構成本說明書之一部分的附圖係圖解本發明之 實施例’且連同以上一般說明與以下實施例詳細說明,用 以闡明本發明之要素。 201113851 以下,參照圖面詳細說明本發明 動裝置、發光裝置及發光裝置之驅動 機器。此外,在本實施形態中,說明 置係用來作爲顯示裝置。 <第1實施形態> 首先,說明本發明之第1實施形 置之發光裝置的示意構成。 (顯示裝置) 第1圖係表示應用本發明之顯示 構成圖。 如第1圖所示,本實施形態的顯 大致具備顯示面板(發光面板)11〇、選】 路)120、電源驅動器130、資料驅 150(150a ' 150b)。 在此’選擇驅動器120、電源驅重 140及控制器150對應於本發明中的 電路。 顯示面板110如第1圖所示,具^ 在列方向(圖面左右方向)及行方向(_ 維排列(例如p列xq行,p、q是正整婁 描線)Ls與複數條電源線La,係配設 排列的像素PIX連接;共用電極Ec, PI X;及複數條資料線Ld,係配設成 之實施形態的像素驅 控制方法、以及電子 發光裝置,該發光裝 態之具備像素驅動裝 裝置之構成例的示意 示裝置(發光裝置ΠΟΟ 睪驅動器(掃描驅動電 動器140及控制器 !l器130、資料驅動器 像素驅動裝置或驅動 I複數個像素PIX,係 3面上下方向)進行二 Z );複數條選擇線(掃 成和各個在列方向所 係共同設置於全像素 和在行方向所排列的 201113851 像素ριχ連接。在此,各像素ριχ如後述所示,具有發光 驅動電路和發光元件。 選擇驅動器120和配設於上述之顯示面板110的各選 擇線Ls連接。選擇驅動器120.根據從後述之控制器150供 給之選擇控制信號(例如掃描時鐘信號及掃描開始信號), 在既定時序對各列的選擇線Ls依序施加既定電壓位準(選 擇位準:Vgh或非選擇位準:Vgl)的選擇信號Ssel。 此外,選擇驅動器120例如構成爲具備移位暫存器, 係根據從控制器1 5 0供給之選擇控制信號,依序輸出和各 列之選擇線Ls對應的移位信號;及輸出緩衝器,係將該移 位信號轉換成既定信號位準(選擇位準,例如高位準),並 向各列的選擇線Ls依序輸出作爲選擇信號Ssel。 電源驅動器130和配設於顯示面板110的各電源線La 連接。電源驅動器130根據從後述之控制器150供給之電 源控制信號(例如輸出控制信號),在既定時序對各列的電 源線La施加既定電壓位準(發光位準:ELVDD或非發光位 準:DVSS)的電源電壓Vsa。 資料驅動器140和顯示面板110之各資料線Ld連接, 並根據從後述之控制器1 50供給之資料控制信號,至少在 顯示動作(發光動作)時,產生因應影像資料的灰階信號(灰 階電壓Vdata),再經由各資料線Ld供給至像素PIX。 又,資料驅動器140在後述之特性參數取得動作時, 經由各資料線Ld對成爲特性參數取得動作之對象的像素 -10- 201113851 PIX施加特定電壓値的檢測用電壓(第1電壓)v d a c,將經過 既定自然緩和時間t後之各資料線Ld的電壓Vd取入作爲 資料線檢測電壓Vmeas(t)’再轉換成檢測資料nineas(t)並輸 出。 在此’資料驅動器1 40具備資料驅動功能和電壓檢測 功能兩者’並構成爲根據從後述之控制器1 5 0供給之資料 控制信號,切換這些功能。 資料驅動功能係執行將由經由控制器1 5 0供給之數位 資料所構成的影像資料轉換成類比信號電壓,再輸出到各 資料線Ld作爲灰階信號(灰階電壓vdata)的動作。 電壓檢測功能係執行取入各資料線Ld的類比信號電 壓Vd作爲資料線檢測電壓Vmeas(t),並轉換成數位資料, 再輸出到控制器150作爲檢測資料n^as(t)的動作。 第2圖係表示應用於本實施形態之顯示裝置之資料驅 動器之構成例的示意方塊圖。 第3圖係表示第2圖所示之資料驅動器之主要部分構 成例的示意電路構成圖。 在此,僅表示排列於顯示面板1 1 0之像素PIX的行數 (q)中的一部分,以簡化圖示。 在以下的說明中,詳細說明設置於第j行(j是1 S j S q 的正整數)之資料線Ld之資料驅動器140內部的構成。 又,在第3圖,簡化地圖示移位暫存器電路和資料暫 存器電路。 -11- 201113851 資料驅動器140係如第2圖所示,大致上具備:移位 暫存器電路141、資料暫存器電路142、資料閂鎖電路143、 DAC/ADC電路144及輸出電路145。資料驅動器140分成 內部電路140A和內部電路140B。 內部電路140 A包含移位暫存器電路141、資料暫存器 電路142及資料閂鎖電路143,並根據從邏輯電源146供給 之電源電壓LVSS及LVDD,執行後述之影像資料的取入動 作及檢測資料的送出動作。 內部電路140B包含DAC/ADC電路144和輸出電路 145,並根據從類比電源147所供給之電源電壓DVSS及 VEE,執行後述之灰階信號的產生輸出動作及資料線電壓 的檢測動作。 移位暫存器電路141根據從控制器150所供給之資料 控制信號(時鐘信號CLK及起動脈波信號SP),產生移位信 號,並依序輸出至資料暫存器電路142。資料暫存器電路 142具備排列於上述之顯示面板110之像素PIX的行數(q) 份的暫存器。資料暫存器電路142根據從移位暫存器電路 1 4 1所供給之移位信號的輸入時序,依序取入1列份的影像 資料Din(l)〜Din(q)。在此,影像資料Din(l)〜Din(q)是由數 位信號所構成之串列資料。 資料閂鎖電路1 43在顯示動作時(影像資料的取入動作 及灰階信號的產生輸出動作),根據資料控制信號(資料閂 鎖脈波信號LP),將被取入資料暫存器電路142之1列份的 -12- 201113851 • 影像資料D i η (1)〜D i η (q)對應於各行加以保持後,在既定 時序將該影像資料Din(l)~Din(q)傳送至後述的DAC/ADC 電路1 4 4。 又’資料閂鎖電路1 43在特性參數取得動作時(檢測資 料的送出動作及資料線電壓的檢測動作),在保持與經由後 述之DAC/ADC電路144而取入之各資料線電壓Vmeas(t)對 應的檢測資料nm…⑴後’在既定時序輸出該檢測資料nm〃s(t 作爲串列資料。 具體而言,資料閂鎖電路143係如第3圖所示,具備: 對應於各行而設置之資料閂鎖4 1 (j)、連接切換用的開關 SW4(」)、SW5(j)及資料輸出用的開關SW3。資料閂鎖41(J) 係在資料閂鎖脈波信號LP之例如上升時序保持(問鎖)經由 開關SW5(j)所供給之數位資料。 開關SW5(j)根據從控制器150供給之資料控制信號(切 換控制信號S5),進行切換控制,以將接點Na側之資料暫 存器電路142、或接點Nb側之DAC/ADC電路144的 ADC43(j)、或接點Nc側之相鄰之行(j+l)的資料閂鎖41(j+1) 的任一個選擇性地連接至資料閂鎖4 1 (j)。 因而’在開關SW5(j)被設定成和接點Na側連接的情 況,從資料閂鎖電路143供給之影像資料Din(j)被資料問 鎖41(j)保持。 又,在開關SW5(j)被設定成和接點Nb側連接的情況, 從資料線Ld被取入DAC/ADC電路144的ADC43(j)之因應 -13- 201113851 資料問鎖電壓Vd(資料線檢測電壓vmeas(t))的檢測資料 η…s(t)被資料閂鎖41(j)保持。 又’在開關SW5(j)被設定成和接點Nc側連接的情況, 經由相鄰之行(j+Ι)的開關SW4(j+l)由資料閂鎖4Uj+1)所 保持的檢測資料nmtas(t)被資料閂鎖41(j)保持。 此外’設置於最後行(q)的開關SW5(q)將邏輯電源146 的電源電壓LVSS和接點Nc連接。 開關S W 4 (j)根據從控制器1 5 0所供給之資料控制信號 (切換控制信號S4),進行切換控制,以將接點Na側之 DAC/ADC電路144的DAC42(j)、或接點Nb側之開關SW3、 或相鄰之行(j — 1)的開關SW5(j — 1)的任一個選擇性地與資 料閂鎖41 (j)連接。 因而’在開關SW4(j)被設定成和接點Na側連接的情 況,向DAC/ADC電路144的DAC42(j)供給由資料閂鎖41(j) 所保持的影像資料Din(j)。又,在開關SW4(j)連接設定於 接點Nb側的情況’經由開關SW 3向外部輸出因應由資料 閂鎖41(j+l)所保持之資料線檢測電壓Vmeas(t)的檢測資料201113851 VI. Description of the invention: [Technical field to which the invention pertains] [Reciprocal reference of related application] The present invention is based on the application of the patent application No. 2009- 1 63602, 2009, filed on July 10, 2009. The Japanese Patent Application No. 2009-163609, filed on Jul. 10, and the Japanese Patent Application No. 2010-110932, filed on May 13 All of its contents are incorporated herein by reference. The present invention relates to a pixel driving device, a driving control method including the light-emitting device and the light-emitting device of the pixel driving device, and an electronic device including the light-emitting device. [Prior Art] In recent years, a light-emitting element type display device (light-emitting device) including a display panel (pixel array IJ) in which light-emitting elements are arranged in an array has been attracting attention as a display device next to a liquid crystal display device. As such a light-emitting element, for example, a current-driven light-emitting element such as an organic electroluminescence element, an inorganic electroluminescence element, or a light-emitting diode (LED) is known. In particular, in the light-emitting element type display device using the active array type driving method, compared with the well-known liquid crystal display device, the display response speed is fast, and there is almost no viewing angle dependency, and high brightness, high contrast, and display picture can be achieved. Excellent display characteristics such as high quality and fineness. Also, because of the illuminating; element; the display device of the yak $ does not need to have a backlight or a light guide plate as the liquid crystal display device does not need to be equipped with a backlight or a light guide plate, and it is characterized by being extremely thin and lightweight. Therefore, it is expected to be applied to various electronic devices in the future. For example, an organic electroluminescence display device described in Japanese Laid-Open Patent Publication No. Hei 8-330600 is known. The organic electroluminescence display device is an active array drive display device that is driven by a current signal according to a voltage signal, and a circuit (referred to as "pixel circuit" as appropriate) is provided for each pixel, and has a light-emitting structure composed of an organic electroluminescence device. a thin film transistor for current control, in which a gate is applied with a voltage signal corresponding to image data, and a current is caused to flow to the organic electroluminescent element: a thin film transistor for switching is used to supply a voltage signal corresponding to the image data. Switching to the gate of the thin film transistor for current control" In this organic electroluminescence display device based on the luminance gray scale of the light-emitting element of the voltage signal controller, the threshold voltage of the current control thin film transistor, etc. The change in time causes a change in the current 値 of the current flowing to the organic electroluminescent element. Further, in the pixel circuit in which a plurality of pixels arranged in an array shape are used, even if the threshold voltage of the thin film transistor for current control is the same, the gate insulating film or the channel length of the thin film transistor is changed, and the mobility is also deviated. The effect is so deviated in the drive characteristics. Here, it is known that variations in mobility, particularly in low-temperature polycrystalline germanium film transistors, occur remarkably. Therefore, although the mobility can be made uniform by using an amorphous germanium film transistor, even in this case, the influence of the deviation caused by the process cannot be avoided. Further, in the pixel circuit of each pixel, even if there is no variation in the driving characteristics of the thin film transistor, variations in the light-emitting characteristics due to process variations caused during the formation of the organic electroluminescent element occur. SUMMARY OF THE INVENTION The present invention has a pixel driving device capable of satisfactorily compensating for variations in characteristics of a pixel circuit and causing a light-emitting element to emit light at a desired luminance gray scale, a light-emitting device including the pixel driving device, and a driving control method of the light-emitting device The advantages. A pixel driving device of the present invention for obtaining the advantage, wherein the pixel is driven to have a light-emitting element; and the light-emitting driving circuit is a driving control element having a current path connected to the light-emitting element; the pixel driving device has characteristics The parameter acquisition circuit obtains an electrical characteristic parameter for compensating for fluctuations in electrical characteristics of the light-emitting drive circuit and an emission characteristic parameter for compensating for variations in characteristics of the light-emitting element. The characteristic parameter obtaining circuit applies a detecting voltage to a data line connected to the pixel, and applies a voltage exceeding a threshold voltage of the driving control element between the control terminal of the driving control element and one end of the current path. The voltage is obtained by obtaining the detection voltage of the data line after at least one relaxation time, and then obtaining the electrical characteristic parameter according to the voltage of the detection voltage. The characteristic parameter obtaining circuit obtains the light-emitting characteristic parameter ′ based on the light-emitting luminance of the light-emitting element of the pixel, and the light-emitting element of the pixel performs a light-emitting operation based on the image data for luminance measurement corrected based on the electrical characteristic parameter. 201113851 The light-emitting device of the present invention for obtaining the advantage includes the light-emitting panel having a plurality of data lines arranged along the first direction and at least one of the second direction intersecting the first direction. And a plurality of pixels connected to the data lines of the plurality of data lines and the scan lines, and disposed in the vicinity of the intersection of the data line and the scan line; and a driving circuit for driving the light-emitting panel. Each of the pixels has a light-emitting element; and the light-emitting drive circuit is a drive control element having one end of the current path connected to the light-emitting element. The driving circuit includes a scan driving circuit that applies a selection signal to the scanning line, and sets each pixel connected to the scanning line to a selected state, and a characteristic parameter obtaining circuit that is configured to be set by the scanning line driving circuit An electrical characteristic parameter of each of the pixels in the selected state for compensating for variations in electrical characteristics of the light-emitting drive circuit, and an emission characteristic parameter for compensating for variations in characteristics of the light-emitting element. The characteristic parameter acquisition circuit applies a detection voltage to each of the data lines connected to the pixel, and applies a drive exceeding the drive control element between the control terminal of the drive control element and one end of the current path of each pixel. The voltage 値 voltage of the voltage limit 取得 obtains the detection voltage of each data line after at least one mitigation time, and then obtains the electrical characteristic parameter according to the voltage 该 of the detection voltage, and according to the illuminating of the illuminating element of each pixel The luminance 値 obtains the luminescence characteristic parameter ′, and the illuminating element of each pixel performs a illuminating operation based on the luminance measurement video material corrected based on the electrical characteristic parameter. A driving control method for a light-emitting device of the present invention for obtaining the advantage, wherein the light-emitting device has a light-emitting panel, and the light-emitting panel has a plurality of 201113851 data lines and a plurality of pixels connected to the data lines, the pixels having light emission And a light-emitting drive circuit is a drive control element having one end of the current path connected to the light-emitting element; the drive control method of the light-emitting device has a voltage application step of applying a detection voltage to each data line, and a control voltage of the drive control element of each pixel and one end of the current path is applied to a detection voltage exceeding a threshold voltage of the drive control element; and the voltage acquisition step applies the detection voltage and passes at least one mitigation time And obtaining the voltages of the data lines as a plurality of detection voltages; and the electrical characteristic parameter obtaining step is to obtain the electrical properties of the illumination driving circuit for compensating the pixels according to the obtained voltages of the plurality of detection voltages a characteristic characteristic parameter of the variation of the characteristic; the step of illuminating the operation is based on the electricity The characteristic parameter corrects the image data for brightness measurement, and the light-emitting element of each pixel is illuminated in response to the corrected image data for brightness measurement; and the light-emitting characteristic parameter obtaining step is to obtain the pixel for performing the light-emitting operation The measurement of the light-emitting luminance of the light-emitting element is performed, and based on the acquisition of the light-emitting luminance, an emission characteristic parameter for compensating for the characteristic variation of the light-emitting element is obtained. The advantages of the invention will be set forth in the description which follows. The advantages of the present invention can be realized and obtained by the means and combinations particularly pointed out below. The drawings, which are incorporated in and constitute a part of the specification, are intended to illustrate the embodiments of the invention 201113851 Hereinafter, the driving device of the moving device, the light-emitting device, and the light-emitting device of the present invention will be described in detail with reference to the drawings. Further, in the present embodiment, the description is made for use as a display device. <First Embodiment> First, a schematic configuration of a light-emitting device according to a first embodiment of the present invention will be described. (Display device) Fig. 1 is a view showing a configuration of a display to which the present invention is applied. As shown in Fig. 1, the present embodiment substantially includes a display panel (light-emitting panel) 11A, a channel 120, a power source driver 130, and a data drive 150 (150a' 150b). Here, the selection driver 120, the power source drive 140, and the controller 150 correspond to the circuits in the present invention. As shown in FIG. 1, the display panel 110 has a column direction (left and right in the drawing direction) and a row direction (the _ dimensional arrangement (for example, p column xq rows, p, q is a positive tracing line) Ls and a plurality of power supply lines La The pixel PIX connection is arranged; the common electrode Ec, PI X; and the plurality of data lines Ld are provided with the pixel drive control method of the embodiment and the electronic light-emitting device, and the light-emitting state is provided with the pixel drive A schematic display device (the illuminating device ( 睪 drive (scanning drive motor 140 and controller 138, data driver pixel drive device or drive I plural pixels PIX, system 3 face down direction) performs two Z); a plurality of selection lines (swept and each of the columns arranged in the column direction are connected to the full pixel and the 201113851 pixel ριχ arranged in the row direction. Here, each pixel ριχ has a light-emitting drive circuit and as described later. The selection driver 120 is connected to each of the selection lines Ls disposed on the display panel 110. The selection driver 120 is selected according to a selection control signal supplied from a controller 150 to be described later. For example, the scan clock signal and the scan start signal) sequentially apply a selection signal Ssel of a predetermined voltage level (select level: Vgh or non-selection level: Vgl) to the selection line Ls of each column at a predetermined timing. For example, the configuration 120 includes a shift register, and sequentially outputs a shift signal corresponding to the select line Ls of each column based on the selection control signal supplied from the controller 150; and an output buffer. The bit signal is converted into a predetermined signal level (selection level, for example, a high level), and sequentially output to the selection line Ls of each column as the selection signal Ssel. The power driver 130 is connected to each power line La disposed on the display panel 110. The power source driver 130 applies a predetermined voltage level to the power line La of each column at a predetermined timing based on a power source control signal (for example, an output control signal) supplied from a controller 150 to be described later (light-emitting level: ELVDD or non-light-emitting level: DVSS) power supply voltage Vsa. The data driver 140 is connected to each data line Ld of the display panel 110, and is based on a data control signal supplied from a controller 105, which will be described later, at least When the display operation (light-emitting operation) is performed, a gray scale signal (gray scale voltage Vdata) corresponding to the image data is generated, and is supplied to the pixel PIX via each data line Ld. Further, when the data driver 140 performs the characteristic parameter acquisition operation described later, The data line Ld applies a detection voltage (first voltage) vdac of a specific voltage 像素 to the pixel -10- 201113851 PIX which is the target of the characteristic parameter acquisition operation, and takes the voltage Vd of each data line Ld after the predetermined natural mitigation time t. The input voltage detection circuit Vmeas(t)' is converted into the detection data nineas(t) and output. Here, the 'data driver 1 40 has both a data driving function and a voltage detecting function' and is configured to switch these functions in accordance with a data control signal supplied from a controller 150 to be described later. The data driving function performs an operation of converting image data composed of digital data supplied via the controller 150 into an analog signal voltage, and outputting it to each data line Ld as a gray scale signal (gray scale voltage vdata). The voltage detecting function performs the analog signal voltage Vd taken in each data line Ld as the data line detecting voltage Vmeas(t), and converts it into digital data, and outputs it to the controller 150 as the detecting data n^as(t). Fig. 2 is a schematic block diagram showing a configuration example of a data drive applied to the display device of the embodiment. Fig. 3 is a schematic circuit configuration diagram showing an example of a configuration of a main part of the data driver shown in Fig. 2. Here, only a part of the number of rows (q) of the pixels PIX arranged on the display panel 110 is shown to simplify the illustration. In the following description, the configuration of the inside of the data driver 140 provided in the data line Ld of the jth line (j is a positive integer of 1 S j S q ) will be described in detail. Further, in Fig. 3, the shift register circuit and the data register circuit are simplified. -11-201113851 As shown in Fig. 2, the data driver 140 basically includes a shift register circuit 141, a data register circuit 142, a data latch circuit 143, a DAC/ADC circuit 144, and an output circuit 145. The data driver 140 is divided into an internal circuit 140A and an internal circuit 140B. The internal circuit 140A includes a shift register circuit 141, a data register circuit 142, and a data latch circuit 143, and performs image pickup operation of the image data described later based on the power supply voltages LVSS and LVDD supplied from the logic power supply 146. The sending action of the test data. The internal circuit 140B includes a DAC/ADC circuit 144 and an output circuit 145, and performs a grayscale signal generation output operation and a data line voltage detection operation, which will be described later, based on the power supply voltages DVSS and VEE supplied from the analog power supply 147. The shift register circuit 141 generates a shift signal based on the data control signal (clock signal CLK and the arterial wave signal SP) supplied from the controller 150, and sequentially outputs the shift signal to the data register circuit 142. The data register circuit 142 includes a register arranged in the number of rows (q) of the pixels PIX of the display panel 110 described above. The data register circuit 142 sequentially takes in one line of image data Din(1) to Din(q) based on the input timing of the shift signal supplied from the shift register circuit 114. Here, the image data Din(l) to Din(q) are serial data composed of digital signals. The data latch circuit 1 43 is taken into the data register circuit according to the data control signal (data latch pulse signal LP) during the display operation (the capture operation of the image data and the output operation of the gray scale signal). -12-201113851 of 142 of 1 column • Image data D i η (1) to D i η (q) are transmitted corresponding to each line, and the image data Din(l)~Din(q) is transmitted at a predetermined timing. To the DAC/ADC circuit 1 4 4 described later. Further, the data latch circuit 143 maintains the data line voltage Vmeas taken in via the DAC/ADC circuit 144, which will be described later, during the characteristic parameter acquisition operation (detection data transmission operation and data line voltage detection operation). t) Corresponding detection data nm...(1) and then 'output the detection data nm〃s at a predetermined timing (t as serial data. Specifically, the data latch circuit 143 is as shown in Fig. 3, and has: corresponding to each row The data latch 4 1 (j), the switch SW4 (") for connection switching, the switch SW3 for data output, and the switch SW3 for data output are provided. The data latch 41 (J) is attached to the data latch pulse signal LP. For example, the rising timing holds (question lock) the digital data supplied via the switch SW5(j). The switch SW5(j) performs switching control according to the data control signal (switching control signal S5) supplied from the controller 150 to be connected. The data latch circuit 142 of the point Na side, or the ADC 43(j) of the DAC/ADC circuit 144 of the contact Nb side, or the data latch 41 of the adjacent row (j+1) of the contact Nc side (j) Any one of +1) is selectively connected to the data latch 4 1 (j). Thus 'the switch SW5(j) is set to When the contact Na side is connected, the image data Din(j) supplied from the material latch circuit 143 is held by the data lock 41(j). Further, the switch SW5(j) is set to be connected to the contact Nb side. In the case, the data line Ld is taken into the ADC 43(j) of the DAC/ADC circuit 144. The detection data η...s(t) of the data lock voltage Vd (the data line detection voltage vmeas(t)) is The data latch 41 (j) is held. Further, in the case where the switch SW5 (j) is set to be connected to the contact Nc side, the data is latched via the switch SW4 (j+1) of the adjacent row (j + Ι) The detected data nmtas(t) held by the lock 4Uj+1) is held by the data latch 41(j). Further, the switch SW5(q) provided in the last row (q) connects the power supply voltage LVSS of the logic power supply 146 and the contact Nc. The switch SW 4 (j) performs switching control based on the data control signal (switching control signal S4) supplied from the controller 150 to connect the DAC 42(j) of the DAC/ADC circuit 144 on the contact Na side. Any one of the switch SW3 on the Nb side, or the switch SW5 (j-1) in the adjacent row (j-1) is selectively connected to the data latch 41 (j). Therefore, when the switch SW4(j) is set to be connected to the contact Na side, the image data Din(j) held by the data latch 41(j) is supplied to the DAC 42(j) of the DAC/ADC circuit 144. Further, when the switch SW4(j) is connected to the contact Nb side, the detection data of the data line detection voltage Vmeas(t) held by the data latch 41 (j+1) is externally output via the switch SW3.
Ilmcas(t) 0 根據從控制器1 5 0所供給之資料控制信號(切換控制信 號S4、S5)’進行資料問鎖電路143之開關SW4(j)、SW5(j) 的切換控制,在相鄰之行的資料閂鎖41(1)〜41(q)彼此串接 時,開關SW3根據資料控制信號(切換控制信號S3、資料 閂鎖脈波信號LP),控制成導通狀態。藉此,因應被保持於 -14- 201113851 • 各行的資料閂鎖41(1)〜41(q)之資料線檢測電壓Vmeas(t)的 檢測資料nm〃s(t)經由開關SW 3,依序被取出作爲串列資 料’並向外部輸出。 第4A圖及第4B圖係表示應用於本實施形態之資料驅 動器之數位—類比轉換電路(DAC)及類比-數位轉換電路 (ADC)的輸出輸入特性圖。第4A圖係表示應用於本實施形 態之DAC的輸出輸入特性圖’第4B圖係表示應用於本實 施形態之ADC的輸出輸入特性圖。在此,表示在將數位信 號的輸出輸入位元數設爲10位元時之數位—類比轉換電 路及類比一數位轉換電路的輸出輸入特性圖。 DAC/ADC電路144係如第3圖所示,對應於各行而具 備線性電壓數位-類比轉換電路(DAC :電壓施加電 路)42(j)、及類比—數位轉換電路(ADC:檢測資料取得電 路)43(j)。 DAC42(j)將由該資料閂鎖電路143所保持之數位資料 所構成之影像資料Din(j)轉換成類比信號電壓Vpix(j),並 向輸出電路145輸出。 在此,設置於各行之DAC42(j)如第4A圖所示,對所 輸入之數位資料所輸出之類比信號電壓的轉換特性(輸出 輸入特性)具有線性。即,例如DAC42(j)係如第4A圖所示, 將10位元(即1024灰階)的數位資料(〇、1 ..... 1 023)轉換 成具有線性而設定的類比信號電壓(V。、V,.....V1()23)。 -15- 201113851 此類比信號電壓(V〇~V1C)23)係在從後述之類比電源147 供給之電源電壓DVSS〜VEE之範圍內被設定,例如被設定 成在所輸入之數位資料的値爲“ 〇 ” ( 〇灰階)時所轉換的類 比信號電壓V〇成爲高電位側的電源電壓DVSS。而且,被 設定成在數位資料的値爲“ 1 023” ( 1 02 3灰階:最大灰階) 時所轉換的類比信號電壓V,。23成爲比低電位側的電源電壓 VEE更高’而且成爲該電源電壓VEE附近的電壓値。 又’ ADC43(j)將從資料線Ld(j)所取入之由類比信號電 壓構成之資料線電壓Vmeas(t)轉換成由數位資料所構成之 檢測資料nm〃s(t),並向資料閂鎖41(j)送出。 在此,各行所設置之ADC43(j)係如第4B圖所示般,對 所輸入之類比信號電壓的轉換特性之輸出的數位資料的轉 換特性(輸出輸入特性)具有線性。 又’ ADC43(j)之電壓轉換時之數位資料的位元寬度被 設定成和上述的DAC42(j)相同。即,ADC43(j)之對應於最 小單位位元(1LSB :類比解析度)的電壓値被設定成和 DAC42(j)的値相同。 例如如第4B圖所示,ADC43(j)將在電源電壓 DVSS〜VEE之範圍內設定之類比信號電壓(VrVi.....Vl()23) 轉換成具有線性而設定之1〇位元(1024灰階)的數位資料 (0、1 ..... 1 023 )。 ADC4 3Q)係以例如當所輸入之類比信號電壓的電壓値 爲V。時數位資料的値被轉換成“ 〇 ” ( 〇灰階)的方式設 -16- 201113851 • 定。ADC43(j)係以當類比信號電壓的電壓値比電源電壓 VEE更高,而且該電源電壓VEE附近之電壓値的類比信號 電壓Vl<)23時,被轉換成數位信號値“ 1 023 ” ( 1 023灰階: 最大灰階)的方式設定。 在本實施形態,將包含移位暫存器電路141、資料暫存 器電路142及資料閂鎖電路143的內部電路140A構成爲低 耐壓電路,並將包含DAC/ADC電路144及輸出電路145的 內部電路140B構成爲高耐壓電路。 因而,將位準移位器LSI (j)設置於資料閂鎖電路143(開 關SW4(j))和DAC/ADC電路144的DAC42(j)之間,作爲從 低耐壓的內部電路140A往高耐壓之內部電路140B的電壓 調整電路。 又,將位準移位器LS2(j)設置於DAC/ADC電路144的 ADC43(j)和資料閂鎖電路143(開關SW5(j))之間,作爲從高 耐壓的內部電路140B往低耐壓之內部電路140A的電壓調 整電路。 輸出電路145如第3圖所示,具備用以向對應於各行 的資料線 Ld(j)輸出灰階信號的緩衝器 44(j)與開關 SWl(j)(連接切換電路)、及用以取入資料線電壓vd(資料線 檢測電壓Vmeas(t))的開關SW2(j)與緩衝器45(j)e 緩衝器44(j)是用以將由該DAC42(j)對影像資料Din(j) 進行類比轉換所產生之類比信號電壓Vpix(j)作爲灰階電壓 Vdau(j),經由開關SWl(j)施加至資料線Ld(j)的緩衝電路。 -17- 201113851 開關SWl(j)根據從控制器150供給之資料控制信號(切 換控制信號S1),控制對資料線LdU)所作之該灰階電壓 Vdata(j)的施加。 又,開關SW2(j)根據從控制器150供給之資料控制信 號(切換控制信號S2),控制資料線電壓 Vd(資料線檢測電 壓Vmeas(t))的取入。 緩衝器45(j)是用以將經由開關SW2(j)取入之資料線電 壓Vmeas(t)施加至ADC43(j)的緩衝電路。 邏輯電源1 4 6供給由邏輯電壓所構成之低電位側的電 源電壓LVSS及高電位側的電源電壓LVDD,其等用以驅動 包含資料驅動器140之移位暫存器電路141、資料暫存器電 路142及資料閂鎖電路143的內部電路140A。 類比電源1 47供給由類比電壓所構成之高電位側的電 源電壓D V S S及低電位側的電源電壓V E E,其用以驅動包 含DAC/ADC電路144之DAC42⑴與ADC43(j)、及輸出電路 145之緩衝器44(j)、45(j)的內部電路U0B。 此外,在第2圖及第3圖所示的資料驅動器140中, 爲了便於圖示,顯示用以控制各部之動作的控制信號輸入 至與第j行(在圖中相當於第1行)之資料線Ld(j)對應而設 置之資料閂鎖41及開關SW1〜SW5的構成。在本實施形態, 當然這些控制信號共同地輸入對應於各行之構成。 第5圖係表示應用於本實施形態之顯示裝置之控制器 之功能的功能方塊圖。 -18 - 201113851 * 此外’在第5圖,爲了便於圖示,全部以實線的箭號 表示各功能方塊間之資料的流動。實際上,如後述所示, 此等任一資料的流動因應控制器的動作狀態而變成有效。 本實施形態的控制器150a至少控制上述之選擇驅動器 120及電源驅動器130、資料驅動器140的動作狀態,產生 用以執行顯示面板1 1 〇之既定驅動控制動作的選擇控制信 號及電源控制信號、資料控制信號並輸出。 控制器1 50a藉由供給選擇控制.信號及電源控制信號、 資料控制信號,而在既定時序使選擇驅動器120及電源驅 動器1 30、資料驅動器1 40分別地動作,以控制取得顯示面 板110之各像素PIX之特性參數的動作(特性參數取得動 作)、及將因應根據各像素PIX的特性參數所修正之影像資 料的影像資訊顯示於顯示面板110的動作(顯示動作)。 又’控制器150a在特性參數取得動作中,根據與經由 該資料驅動器1 40所檢測出之與各像素PIX之特性變化相 關的檢測資料、及對各像素PIX所檢測出之亮度資料(細節 將於後描述),取得各種修正資料。 又,控制器1 50a在顯示動作中,根據在特性參數取得 動作中取得之修正資料來修正從外部供給的影像資料,並 作爲修正影像資料供給至資料驅動器140。 具體而言’控制器(影像資料修正電路)150a例如如第5 圖所示’大致具有:具備參照表(LUT)151的電壓振幅設定 功能電路152a、乘法功能電路(影像資料修正電路)153a、 -19- 201113851 加法功能電路(影像資料修正電路)丨5 4 a、記憶體(記憶電 路Η 55及修正資料取得功能電路(特性參數取得電路)156。 電壓振幅設定功能電路丨52a對於從外部供給之由數位 資料所構成之影像資料,係藉由參照參照表丨5 1,而轉換和 紅(R)、綠(G)、藍(B)之各色對應的電壓振幅。在此,所轉 換之影像資料之電壓振幅的最大値被設定成從上述之 DAC42之輸入$巷圍的最大値減去根據各像素之特性參數之 修正量的値以下。 乘法功能電路1 5 3 a將根據和各像素PI X的特性變化相 關的檢測資料而取得之電流放大率^的修正資料、或對各 像素PIX所檢測出之亮度資料(發光電流效率々)與該電流 放大率0的修正資料乘以影像資料。 加法功能電路1 5 4 a將根據和各像素ΡIX的特性變化相 關的檢測資料而取得之驅動電晶體之臨限値電壓Vth的修 正資料和影像資料相加,並作爲修正影像資料供給至資料 驅動器140。 修正資料取得功能電路156根據和各像素Ρίχ的特性 變化·相關的檢測資料及對各像素ΡΙχ所檢測出之亮度資 料’取得電流放大率β、發光電流效率W及臨限値電壓Vth 的修正資料。在此’就各像素PIX之亮度資料而言,例如 使顯示面板110根據既定亮度灰階的影像資料進行發光動 作時之各像素PIX的發光亮度,係使用亮度計或CCD相機 (亮度測量電路)1 60測量。此外,關於亮度資料之具體的測 量方法將後述。 -20- 201113851 曰己億體155將從上述之資料驅動器i4〇所送出之各像 素PIX的檢測資料對應於各像素Ρίχ而記憶。 又’ 憶體1 5 5修正資料取得功能電路1 5 6所取得之 修正資料對應於各像素PIX而記憶。 在進行該加法功能電路154a的加法處理時及修正資料 取得功能電路1 5 6之修正資料取得處理時,加法功能電路 1 5 4 a及修正資料取得功能電路1 5 6從記憶體1 5 5讀出檢測 資料。 此外’在第5圖所示的控制器1 5 0 a中,修正資料取得 功能電路156亦可爲設置於控制器150a之外部的運算裝 置。 又,在第5圖所示的控制器150a,記憶體155只要是 對各像素PIX賦予關聯,記憶檢測資料及修正資料者,亦 可爲個別的記憶體。 又,這些記憶體155亦可以是設置於控制器150a之外 部的憶裝置。 又,供給至控制器1 50a之影像資料例如是從影像信號 抽出亮度灰階信號成分,並按顯示面板1 1 0的每一列,形 成該亮度灰階信號成分作爲由數位信號構成之串列資料。 (像素) 其次,具體說明排列於本實施形態之顯示面板之像素 的構成。 第6圖係表示應用於本實施形態之顯示面板之像素之 一實施形態的電路構成圖。 -21 - 201113851 應用於本實施形態之顯示面板的各像素PIX係如第6 圖所示般,配置於與選擇驅動器1 20連接之選擇線Ls及與 資料驅動器1 40連接之資料線Ld的各交點附近。各像素 PIX具備屬電流驅動式發光元件的有機電致發光元件 OEL、及產生用以將該有機電致發光元件OEL進行發光驅 動之電流的發光驅動電路DC» 第6圖所示的發光驅動電路DC具有大致具備電晶體 Trll~Trl3和電容器(儲存電容)Cs的電路構成。 電晶體(第2電晶體)Trl 1的閘極端子與選擇線Ls連 接,又’汲極端子與電源線La連接,又,源極端子與連接 點N 1 1連接。 電晶體(第3電晶體)Trl2的閘極端子與選擇線Ls連 接,又,源極端子與資料線Ld連接,又,汲極端子與連接 點N 1 2連接。 電晶體(驅動控制元件,第1電晶體)Tr 1 3的閘極端子 與連接點Nil連接,汲極端子與電源線La連接,源極端子 與連接點N12連接。 又,電容器(電容元件)Cs連接在電晶體Tr 13的閘極 端子(連接點Nil)與源極端子(連接點N12)之間。電容器Cs 亦可以是形成於電晶體Tr 1 3之閘極、源極端子間的寄生電 容’亦可以是除了該寄生電容以外,還在連接點Nil與連 接點N 1 2之間並列地連接另外的電容元件者。 -22- 201113851 又,有機電致發光元件OEL的陽極(陽極電極)與該 發光驅動電路DC的連接點N12連接,陰極(陰極電極) 與共用電極Ec連接。共用電極Ec與外部的定電壓源連接, 以施加既定電壓ELVSS(例如接地電位GND)。 此外’在第6圖所示的像素ριχ中,除了電容器Cs以 外,在有機電致發光元件0EL還存在像素電容Cel。又, 在資料線Ld存在配線寄生電容Cp。 在此,在本實施形態的像素PIX,從上述之電源驅動 器130對電源線La施加之電源電壓Vsa(ELVDD、DVSS)、 對共用電極Ec施加之電壓ELVSS及從類比電源147向資料 驅動器1 40供給之電源電壓VEE的關係被設定成例如滿足 如下的條件。Ilmcas(t) 0 performs switching control of the switches SW4(j), SW5(j) of the data lock circuit 143 based on the data control signals (switching control signals S4, S5) supplied from the controller 150. When the data latches 41(1) to 41(q) of the adjacent row are connected in series, the switch SW3 is controlled to be in an on state based on the data control signal (switching control signal S3, data latch pulse signal LP). Therefore, the detection data nm〃s(t) of the data line detection voltage Vmeas(t) of the data latches 41(1) to 41(q) of each row is controlled by -14-201113851. The sequence is taken out as serial data 'and output to the outside. Figs. 4A and 4B are diagrams showing output and output characteristics of a digital-analog conversion circuit (DAC) and an analog-to-digital conversion circuit (ADC) applied to the data drive of the embodiment. Fig. 4A is a diagram showing an output input characteristic diagram of a DAC applied to the present embodiment. Fig. 4B is a diagram showing an output input characteristic of an ADC applied to the present embodiment. Here, the output input characteristic diagram of the digital-to-analog conversion circuit and the analog-to-digital conversion circuit when the number of output input bits of the digital signal is set to 10 bits is shown. As shown in FIG. 3, the DAC/ADC circuit 144 includes a linear voltage digital-analog conversion circuit (DAC: voltage application circuit) 42(j) and an analog-digital conversion circuit (ADC: detection data acquisition circuit) corresponding to each row. ) 43(j). The DAC 42(j) converts the image data Din(j) composed of the digital data held by the data latch circuit 143 into the analog signal voltage Vpix(j), and outputs it to the output circuit 145. Here, the DAC 42(j) provided in each row has a linearity in the conversion characteristic (output input characteristic) of the analog signal voltage outputted from the input digital data as shown in Fig. 4A. That is, for example, the DAC 42(j) converts the 10-bit (ie, 1024 gray scale) digital data (〇, 1 ..... 1 023) into a linearly set analog signal voltage as shown in FIG. 4A. (V., V, .....V1()23). -15-201113851 The specific signal voltage (V〇~V1C) 23) is set within a range from the power supply voltages DVSS to VEE supplied from the analog power supply 147, which will be described later, and is set, for example, to the digital data input. The analog signal voltage V〇 converted when " “" (〇 gray scale) becomes the power supply voltage DVSS on the high potential side. Moreover, it is set to the analog signal voltage V which is converted when the digital data is "1 023" (1 02 3 gray scale: maximum gray scale). 23 becomes higher than the power supply voltage VEE on the low potential side and becomes a voltage 附近 near the power supply voltage VEE. 'ADC43(j) converts the data line voltage Vmeas(t) composed of the analog signal voltage taken from the data line Ld(j) into the detection data nm〃s(t) composed of digital data, and The data latch 41(j) is sent out. Here, the ADC 43(j) provided in each row has a linearity of the conversion characteristic (output input characteristic) of the digital data of the output of the conversion characteristic of the input analog signal as shown in Fig. 4B. Further, the bit width of the digital data at the time of voltage conversion of the ADC 43 (j) is set to be the same as that of the DAC 42 (j) described above. That is, the voltage 对应 of the ADC 43(j) corresponding to the minimum unit bit (1LSB: analog resolution) is set to be the same as that of the DAC 42(j). For example, as shown in FIG. 4B, the ADC 43(j) converts the analog signal voltage (VrVi.....Vl()23) set in the range of the power supply voltages DVSS to VEE into a linear one and one bit. Digital data of (1024 gray scale) (0, 1 ..... 1 023 ). The ADC4 3Q) is, for example, a voltage 値 of V when the analog signal voltage is input. The way in which the digits of the digital data are converted into "〇" (〇 gray scale) is set to -16- 201113851. The ADC 43(j) is converted into a digital signal 1 "1 023 " when the voltage 値 of the analog signal voltage is higher than the power supply voltage VEE and the analog signal voltage V1 <) 23 of the voltage 附近 near the power supply voltage VEE ( 1 023 gray scale: maximum gray scale) mode setting. In the present embodiment, the internal circuit 140A including the shift register circuit 141, the data register circuit 142, and the data latch circuit 143 is configured as a low withstand voltage circuit, and will include a DAC/ADC circuit 144 and an output circuit 145. The internal circuit 140B is configured as a high withstand voltage circuit. Therefore, the level shifter LSI (j) is disposed between the material latch circuit 143 (the switch SW4(j)) and the DAC 42(j) of the DAC/ADC circuit 144 as the internal circuit 140A from the low withstand voltage A voltage regulating circuit of the high withstand voltage internal circuit 140B. Further, the level shifter LS2(j) is provided between the ADC 43(j) of the DAC/ADC circuit 144 and the data latch circuit 143 (switch SW5(j)) as the internal circuit 140B from the high withstand voltage. A voltage regulating circuit of the low withstand internal circuit 140A. As shown in FIG. 3, the output circuit 145 includes a buffer 44(j) and a switch SW1(j) (connection switching circuit) for outputting gray scale signals to the data lines Ld(j) corresponding to the respective rows, and The switch SW2(j) and the buffer 45(j)e buffer 44(j) that take in the data line voltage vd (the data line detection voltage Vmeas(t)) are used to be used by the DAC 42(j) for the image data Din ( j) The analog signal voltage Vpix(j) generated by the analog conversion is applied as a gray scale voltage Vdau(j) to the buffer circuit of the data line Ld(j) via the switch SW1(j). -17- 201113851 The switch SW1(j) controls the application of the gray scale voltage Vdata(j) to the data line LdU based on the data control signal (switching control signal S1) supplied from the controller 150. Further, the switch SW2(j) controls the taking in of the data line voltage Vd (the data line detecting voltage Vmeas(t)) based on the data control signal (switching control signal S2) supplied from the controller 150. The buffer 45(j) is a buffer circuit for applying the data line voltage Vmeas(t) taken in via the switch SW2(j) to the ADC 43(j). The logic power supply 146 supplies a power supply voltage LVSS on the low potential side and a power supply voltage LVDD on the high potential side, which are used to drive the shift register circuit 141 including the data driver 140 and the data register. The circuit 142 and the internal circuit 140A of the data latch circuit 143. The analog power supply 1 47 supplies a high-potential side power supply voltage DVSS composed of an analog voltage and a low-potential side power supply voltage VEE for driving the DAC 42 (1) and the ADC 43 (j) including the DAC/ADC circuit 144, and the output circuit 145. The internal circuit U0B of the buffers 44(j), 45(j). Further, in the data driver 140 shown in FIGS. 2 and 3, for convenience of illustration, a control signal for controlling the operation of each unit is input to the jth line (corresponding to the first line in the figure). The data latch L41 and the switches SW1 to SW5 are provided corresponding to the data line Ld(j). In the present embodiment, of course, these control signals are commonly input to the configuration corresponding to each row. Fig. 5 is a functional block diagram showing the function of a controller applied to the display device of the embodiment. -18 - 201113851 * In addition, in Figure 5, for the sake of illustration, the arrows of the solid lines all indicate the flow of data between the functional blocks. In fact, as will be described later, the flow of any of these materials becomes effective in response to the operating state of the controller. The controller 150a of the present embodiment controls at least the operation states of the selection driver 120, the power source driver 130, and the data driver 140, and generates a selection control signal, a power control signal, and a data for performing a predetermined drive control operation of the display panel 1 1 . Control signals and output. The controller 1 50a operates the selection driver 120, the power driver 130, and the data driver 140 at predetermined timings by the supply selection control signal, the power control signal, and the data control signal to control the acquisition of each of the display panels 110. The operation of the characteristic parameter of the pixel PIX (the characteristic parameter obtaining operation) and the image information of the image data corrected based on the characteristic parameter of each pixel PIX are displayed on the display panel 110 (display operation). Further, in the characteristic parameter obtaining operation, the controller 150a detects the detected data relating to the characteristic change of each pixel PIX detected by the data driver 140 and the luminance data detected for each pixel PIX (details will be As described later, various corrections are obtained. Further, during the display operation, the controller 150a corrects the image data supplied from the outside based on the correction data acquired in the characteristic parameter acquisition operation, and supplies it to the data driver 140 as the corrected image data. Specifically, the controller (image data correction circuit) 150a has, for example, a voltage amplitude setting function circuit 152a including a reference table (LUT) 151, a multiplication function circuit (video data correction circuit) 153a, and the like. -19- 201113851 Addition function circuit (image data correction circuit) 丨5 4 a, memory (memory circuit Η 55 and correction data acquisition function circuit (characteristic parameter acquisition circuit) 156. Voltage amplitude setting function circuit 丨52a for external supply The image data composed of the digital data is converted into voltage amplitudes corresponding to the respective colors of red (R), green (G), and blue (B) by referring to the reference table 丨5 1. Here, the converted image is converted. The maximum amplitude of the voltage amplitude of the image data is set to be less than 修正 below the correction amount of the characteristic parameter of each pixel from the maximum 値 of the input of the DAC 42. The multiplication function circuit 1 5 3 a will be based on each pixel The correction data of the current amplification factor obtained by the detection data related to the change in the characteristics of PI X or the luminance data (light emission current efficiency 々) detected by each pixel PIX The correction data of the current amplification factor of 0 is multiplied by the image data. The addition function circuit 1 5 4 a correction data and image of the threshold voltage Vth of the driving transistor obtained based on the detection data related to the characteristic change of each pixel ΡIX The data is added and supplied as correction image data to the data driver 140. The correction data acquisition function circuit 156 obtains the current amplification rate based on the detection data associated with the characteristic change of each pixel and the luminance data detected for each pixel ' Correction data of β, luminous current efficiency W, and threshold voltage Vth. Here, for the luminance data of each pixel PIX, for example, each pixel PIX when the display panel 110 performs illumination operation according to the image data of the predetermined luminance gray scale The brightness of the light is measured using a luminance meter or a CCD camera (brightness measuring circuit) 1 60. In addition, the specific measurement method of the brightness data will be described later. -20- 201113851 曰己亿体155 will be from the above data driver i4〇 The detected data of each pixel PIX sent is recorded corresponding to each pixel 。 χ 。 。 。 。 。 。 。 。 。 。 。 。 。 。 The correction data obtained by the function circuit 156 is stored in correspondence with each pixel PIX. When the addition processing of the addition function circuit 154a is performed and the correction data acquisition processing of the correction data acquisition function circuit 156 is performed, the addition function circuit 15 4 a and the correction data acquisition function circuit 1 5 6 reads the detection data from the memory 1 5 5 . Further, in the controller 1 5 0 a shown in FIG. 5 , the correction data acquisition function circuit 156 may be provided in the Further, in the controller 150a shown in Fig. 5, the memory 155 may be an individual memory as long as it is associated with each pixel PIX and memorizes the detected data and the corrected data. Further, these memories 155 may be memories provided outside the controller 150a. Moreover, the image data supplied to the controller 150a extracts, for example, a luminance grayscale signal component from the image signal, and forms the luminance grayscale signal component as a serial data composed of digital signals according to each column of the display panel 110. . (Pixel) Next, the configuration of the pixels arranged in the display panel of the present embodiment will be specifically described. Fig. 6 is a circuit configuration diagram showing an embodiment of a pixel applied to the display panel of the embodiment. -21 - 201113851 Each of the pixels PIX applied to the display panel of the present embodiment is disposed on the selection line Ls connected to the selection driver 120 and the data line Ld connected to the data driver 134 as shown in Fig. 6 Near the intersection. Each of the pixels PIX includes an organic electroluminescence element OEL that is a current-driven light-emitting element, and a light-emitting drive circuit that generates a current for driving the organic electroluminescence element OEL to emit light, and the light-emitting drive circuit shown in FIG. The DC has a circuit configuration including substantially a transistor Tr11 to Tr13 and a capacitor (storage capacitor) Cs. The gate terminal of the transistor (second transistor) Tr1 is connected to the selection line Ls, and the 汲 terminal is connected to the power supply line La. Further, the source terminal is connected to the connection point N 1 1 . The gate terminal of the transistor (third transistor) Tr1 is connected to the selection line Ls, and the source terminal is connected to the data line Ld, and the gate terminal is connected to the connection point N 1 2 . The gate terminal of the transistor (drive control element, first transistor) Tr 1 3 is connected to the connection point Nil, the 汲 terminal is connected to the power supply line La, and the source terminal is connected to the connection point N12. Further, a capacitor (capacitance element) Cs is connected between the gate terminal (connection point Nil) of the transistor Tr 13 and the source terminal (connection point N12). The capacitor Cs may be a parasitic capacitance formed between the gate and the source terminal of the transistor Tr 13 or may be connected in parallel with the connection point N 1 2 and the connection point N 1 2 in addition to the parasitic capacitance. Capacitor component. -22- 201113851 Further, the anode (anode electrode) of the organic electroluminescent element OEL is connected to the connection point N12 of the light-emitting drive circuit DC, and the cathode (cathode electrode) is connected to the common electrode Ec. The common electrode Ec is connected to an external constant voltage source to apply a predetermined voltage ELVSS (for example, a ground potential GND). Further, in the pixel ρι shown in Fig. 6, in addition to the capacitor Cs, the pixel capacitance Cel is present in the organic electroluminescent element OLED. Further, the wiring parasitic capacitance Cp is present in the data line Ld. Here, in the pixel PIX of the present embodiment, the power source voltage Vsa (ELVDD, DVSS) applied to the power source line La from the power source driver 130, the voltage ELVSS applied to the common electrode Ec, and the analog power source 147 are supplied to the data driver 1 40. The relationship of the supplied power source voltage VEE is set to, for example, the following conditions.
DVSS<ELDD DVSS = ELVSS( = GND) …(1)DVSS<ELDD DVSS = ELVSS( = GND) ...(1)
VEE<ELVSS 此外,在第 6圖所示的像素 PIX中,關於電晶體 Trll~Trl3可應用例如具有同一通道型的薄膜電晶體 (TFT)。電晶體Trll〜Trl3亦可是非晶形矽薄膜電晶體’亦 可是多晶矽薄膜電晶體。 尤其,如第6圖所示,在應用η通道型薄膜電晶體作 爲電晶體Tr 1 1 ~Tr 1 3,而且應用非晶形矽薄膜電晶體作爲電 晶體Tr 1 1〜Tr 1 3的情況,應用已確立之非晶形矽製造技術, 和多結晶型或單結晶型的矽薄膜電晶體相比,能以簡單的 製程實現動作特性(電子遷移率等)均勻且穩定的電晶體。 -23- 201113851 又’在上述的像素PIX中,表示具備3個電晶體 Tr 11〜Tr 13作爲發光驅動電路DC,又,應用有機電致發光 元件OEL作爲發光元件的電路構成。本發明未限定爲本實 施形態’亦可爲具有具備3個以上之電晶體之其他的電路 構成。又,由發光驅動電路DC所發光驅動的發光元件只 要是電流驅動式發光元件即可,亦可爲例如發光二極體等 其他的發光元件。 (顯示裝置的驅動控制方法) 其次’說明本實施形態之顯示裝置的驅動控制方法。 本實施形態之顯示裝置1 〇〇的驅動控制動作大致由特 性參數取得動作和顯示動作所構成。 在特性參數取得動作中,取得用以補償排列於顯示面 板110之各像素PIX之發光特性之變動的參數。 更具體而言’特性參數取得動作執行取得用以修正設 置於各像素PIX之發光驅動電路DC之電晶體(驅動電晶 體)Trl3之臨限値電壓vth之變動的參數、用以修正各像素 PIX之電流放大率A相對於設定値之偏差的參數、及用以 修正各像素PIX中之有機電致發光元件〇EL之發光電流效 率▽相對於設定値之偏差的參數的動作。 在顯示動作中,根據利用上述之特性參數取得動作按 各像素ΡΙΧ取得之修正參數,產生已修正由數位資料所構 成之影像資料的修正影像資料,並產生對應於該修正影像 資料的灰階電壓Vdata,再對各像素ρίχ寫入。因而,各像 -24- 201113851 素PIX(有機電致發光元件OEL)以已補償在各像素ριχ之電 性特性(電晶體T r 1 3的臨限値電壓V t h、電流放大率/3 )及 發光特性(有機電致發光元件0EL的發光電流效率β)之變 動或偏差之因應影像資料之原本的亮度灰階而發光。 以下,具體說明各動作。 (特性參數取得動作) 在此,最初說明本實施形態之特性參數取得動作中所 應用之特有的手法。然後,說明使用該手法取得用以補償 在各像素ΡΙΧ之臨限値電壓Vth及電流放大率/3之特性參 數的動作。接著,說明取得用以補償發光電流效率^之特 性參數的動作。 首先,說明在具有第6圖所示之發光驅動電路DC的像 素PIX,從資料驅動器140經由資料線Ld寫入(施加對應於 影像資料之灰階電壓Vdata)影像資料時之發光驅動電路DC 的電壓一電流(V— I)特性。 第7圖係表示應用本實施形態之發光驅動電路之像素 在寫入影像資料時的動作狀態圖。 第8圖係表示應用本實施形態之發光驅動電路之像素 在寫入動作時的電壓一電流特性圖。 在本實施形態之對像素PIX之影像資料的寫入動作 中’如第7圖所示,藉由從選擇驅動器120經由選擇線Ls 施加選擇位準(高位準:Vgh)的選擇信號Ssel,而使像素PIX 被設定成選擇狀態。 -25- 201113851 此時,藉由發光驅動電路DC的電晶體Trll、Trl2進 行導通動作,使電晶體Tr 1 3的閘極、汲極端子間短路,被 設定成二極體連接狀態。 又,在此選擇狀態,從電源驅動器1 3 0經由電源線L a 施加發光位準的電源電壓Vsa( = DVSS)。 然後,從資料驅動器1 40對資料線Ld施加因應影像資 料之電壓値的灰階電壓Vdata。在此,灰階電壓Vdata被設 定成比從電源驅動器130所施加之電源電壓DVSS更低的 電壓値。因此,在電源電壓DVSS被設定成〇V(接地電位 GND)的情況,灰階電壓Vdata被設定成負的電壓値。 因而,如第7圖所示,因應於該灰階電壓Vdata的汲 極電流I d從電源驅動器1 3 0經由電源線L a、像素PIX (發光 驅動電路DC)的電晶體Trl3' Trl2,沿資料線Ld方向流動。 在此,施加於有機電致發光元件OEL之陰極(陰極電極) 的電壓ELVSS和該電源電壓DVSS係如上述之第(1)式的條 件所示般,被設定成同一電壓値,因爲都被設定成0V(接 地電位GND),所以變成對有機電致發光元件〇EL施加逆向 偏壓,而不會進行發光動作。 針對此情況之發光驅動電路DC的電路特性進行驗 證。在發光驅動電路DC中,將屬驅動電晶體之電晶體Trl 3 的臨限値電壓Vth未發生變動,且發光驅動電路DC之電流 放大率Θ相對於設定値沒有偏差的起始狀態,將電晶體 Trl 3的臨限値電壓設爲Vth。,並電流放大率設爲/3時,第 -26- 201113851 * 7圖所示之汲極電流Id的電流値可用如下之第(2)式表示。VEE < ELVSS Further, in the pixel PIX shown in Fig. 6, for example, a thin film transistor (TFT) having the same channel type can be applied to the transistors Tr11 to Tr13. The transistors Tr11 to Tr13 may also be amorphous bismuth thin film transistors or polycrystalline germanium film transistors. In particular, as shown in FIG. 6, in the case where an n-channel type thin film transistor is used as the transistors Tr 1 1 to Tr 1 3, and an amorphous germanium thin film transistor is used as the transistors Tr 1 1 to Tr 1 3, the application is applied. The established amorphous crucible manufacturing technology enables a uniform and stable transistor with stable operating characteristics (electron mobility, etc.) in a simple process compared to a polycrystalline or single crystal germanium thin film transistor. -23-201113851 Further, in the above-described pixel PIX, a circuit configuration in which three transistors Tr 11 to Tr 13 are provided as the light-emitting drive circuit DC and the organic electroluminescence element OEL is used as the light-emitting element is shown. The present invention is not limited to the embodiment, and may have another circuit configuration including three or more transistors. Further, the light-emitting element that is driven by the light-emitting drive circuit DC may be a current-driven light-emitting element, and may be another light-emitting element such as a light-emitting diode. (Drive Control Method of Display Device) Next, the drive control method of the display device of the present embodiment will be described. The drive control operation of the display device 1 of the present embodiment is basically constituted by a characteristic parameter acquisition operation and a display operation. In the characteristic parameter obtaining operation, parameters for compensating for variations in the light-emitting characteristics of the pixels PIX arranged on the display panel 110 are obtained. More specifically, the characteristic parameter obtaining operation performs a parameter for correcting the variation of the threshold voltage vth of the transistor (driving transistor) Tr13 provided in the light-emitting drive circuit DC of each pixel PIX, for correcting each pixel PIX. The parameter of the current amplification factor A with respect to the deviation of the setting 、 and the parameter for correcting the variation of the luminous current efficiency ▽ of the organic electroluminescent element 〇EL in each pixel PIX with respect to the setting 値. In the display operation, the corrected image data obtained by correcting the image data composed of the digital data is generated according to the correction parameter obtained by each pixel using the characteristic parameter obtaining operation described above, and the gray scale voltage corresponding to the corrected image data is generated. Vdata is written to each pixel ρίχ. Therefore, each image -24-201113851 PIX (organic electroluminescent element OEL) has been compensated for the electrical characteristics of each pixel ριχ (the threshold voltage V th of the transistor T r 1 3, the current amplification ratio /3) The fluctuation or variation of the luminescence property (the luminescence current efficiency β of the organic electroluminescence device 0EL) is caused by the original luminance gradation of the image data. Hereinafter, each operation will be specifically described. (Characteristic Parameter Acquisition Operation) Here, a technique specific to the characteristic parameter acquisition operation of the present embodiment will be described first. Next, an operation for compensating the characteristic parameters of the threshold voltage Vth and the current amplification factor /3 at each pixel will be described using this method. Next, an operation for obtaining a characteristic parameter for compensating for the luminous current efficiency will be described. First, an explanation will be given of the light-emitting drive circuit DC when the pixel PIX having the light-emitting drive circuit DC shown in FIG. 6 is written from the data driver 140 via the data line Ld (the gray-scale voltage Vdata corresponding to the image data is applied). Voltage-current (V-I) characteristics. Fig. 7 is a view showing an operation state when a pixel of the light-emitting drive circuit of the embodiment is applied to write image data. Fig. 8 is a view showing a voltage-current characteristic when a pixel of the light-emitting drive circuit of the embodiment is applied in a write operation. In the writing operation of the image data of the pixel PIX in the present embodiment, as shown in FIG. 7, the selection signal Ssel of the selection level (high level: Vgh) is applied from the selection driver 120 via the selection line Ls. The pixel PIX is set to the selected state. -25-201113851 At this time, the transistors Tr11 and Tr15 of the light-emitting drive circuit DC are turned on, and the gate and the gate terminal of the transistor Tr 13 are short-circuited, and the diode is connected. Further, in this selected state, the power source voltage Vsa (= DVSS) of the light emission level is applied from the power source driver 130 through the power source line La. Then, the data driver L 40 applies a gray scale voltage Vdata corresponding to the voltage 影像 of the image data to the data line Ld. Here, the gray scale voltage Vdata is set to be lower than the power supply voltage DVSS applied from the power source driver 130. Therefore, when the power supply voltage DVSS is set to 〇V (ground potential GND), the gray scale voltage Vdata is set to a negative voltage 値. Therefore, as shown in Fig. 7, the gate current I d corresponding to the gray scale voltage Vdata is passed from the power source driver 1 3 0 via the power source line La, and the pixel PIX (light-emitting drive circuit DC) of the transistor Tr13' Trl2. The data line flows in the direction of Ld. Here, the voltage ELVSS applied to the cathode (cathode electrode) of the organic electroluminescent element OEL and the power supply voltage DVSS are set to the same voltage as shown in the condition of the above formula (1), because both are Since it is set to 0 V (ground potential GND), a reverse bias is applied to the organic electroluminescent element 〇EL, and the light-emitting operation is not performed. The circuit characteristics of the light-emitting drive circuit DC for this case are verified. In the light-emitting drive circuit DC, the threshold voltage Vth of the transistor Tr1 of the drive transistor is not changed, and the current amplification factor 发光 of the light-emitting drive circuit DC is not deviated from the initial state of the set ,, and the power is turned on. The threshold voltage of the crystal Tr3 is set to Vth. When the current amplification factor is set to /3, the current 汲 of the drain current Id shown in Fig. -26-201113851 * 7 can be expressed by the following equation (2).
Id=/S (V〇 — Vdata — V t h 〇)2 …(2) 在此,發光驅動電路DC之設計値或標準値(Typical) 的電流放大率/3、及電晶體Tr 1 3的起始臨限値電壓Vth。 '都是常數。又,V。是從電源驅動器130所施加之非發光位 準的電源電壓¥5&( = 0¥33),電壓(¥«)-乂3&13)相當於施加至 驅動電晶體Tr 1 3及Tr 1 2之電流路所串接的電路構成的電 位差。此時對發光驅動電路DC所施加之電壓(V。- Vdata) 的値和向發光驅動電路DC流動之汲極電流Id之電流値的 關係(V - I特性)在第8圖中以特性線SP1表示。 然後,將因隨時間變化而在電晶體Tr 1 3的元件特性發 生變動(臨限値電壓移位;將變動量設爲△ Vth)後的臨限値 電壓設爲Vth( = Vth〇 + Z\ Vth)時,發光驅動電路DC的電路特 性如以下之第(3)式所示般地變化》在此,Vth是常數。此 時之發光驅動電路DC的電壓-電流(V- I)特性在第8圖中 被顯示爲特性線SP2。 \ά= β (V〇 — Vdata — Vth)2 …(3) 又’在該第(2)式所示之起始狀態,將電流放大率万相 對於設定値有偏差時的電流放大率設爲/3 ’時,發光驅動 電路DC的電路特性可用如下的第(4)式表示。Id=/S (V〇—Vdata — V th 〇) 2 (2) Here, the design of the light-emitting drive circuit DC or the standard current of the standard / (3) and the start of the transistor Tr 1 3 The voltage limit Vth is limited. 'All constants. Also, V. The power supply voltage of the non-light-emitting level applied from the power source driver 130 is ¥5 & (= 0¥33), and the voltages (¥«) - 乂3 & 13) are equivalent to being applied to the driving transistors Tr 1 3 and Tr 1 2 The potential difference formed by the circuit in series with the current path. At this time, the relationship between the voltage (V.-Vdata) applied to the light-emitting drive circuit DC and the current 値 of the drain current Id flowing to the light-emitting drive circuit DC (V - I characteristic) is characterized by a characteristic line in FIG. SP1 said. Then, the threshold voltage after the variation of the element characteristics of the transistor Tr 13 (the threshold voltage shift; the variation amount is ΔVth) is set as Vth (= Vth〇+ Z). When Vth), the circuit characteristics of the light-emitting drive circuit DC are changed as shown in the following formula (3). Here, Vth is a constant. The voltage-current (V-I) characteristic of the light-emitting drive circuit DC at this time is shown as a characteristic line SP2 in Fig. 8. \ά= β (V〇— Vdata — Vth) 2 (3) In the initial state shown in the equation (2), the current amplification factor is set when the current amplification factor is different from the setting 値. When it is /3 ', the circuit characteristics of the light-emitting drive circuit DC can be expressed by the following formula (4).
Id=/5 1 (V〇 — Vdata — Vth〇)2 …(4) 在此’ θ’是常數。此時之發光驅動電路DC的電路 特性在第8圖中以特性線SP3表示。此外,第8圖中所示 -27- 201113851 的特性線S P 3表示在該第(4)式中之電流放大率沒’比該第 (2)式所示之電流放大率万更小時之發光驅動電路DC的電 壓一電流(V — I)特性。 在該第(2)式、第(4)式,在將設計値或標準値(Typical) 的電流放大率設爲点t y p的情況,將用以將電流放大率召’ 修正成該値的參數(修正資料)設爲△々。此時,對各個發 光驅動電路D C供給修正資料△ /3,以使電流放大率冷’ 和修正資料△/?的積成爲設計値的電流放大率Atyp(即, 成爲 /3’ xZXyS —召 typ)。 然後,在本實施形態,根據上述之發光驅動電路DC 的電壓一電流特性(第(2)式~第(4)式及第8圖),以如下所示 之特有的手法取得用以修正電晶體Trl3的臨限値電壓Vth 及電流放大率β ’的特性參數。此外,本專利說明書中將 以下所示之手法權宜上稱爲「自動歸零法」。 本實施形態之特性參數取得動作所應用的手法(自動 歸零法)在具有第6圖所示之發光驅動電路DC的像素Ρίχ 中’首先’在選擇狀態使用上述之資料驅動器14〇的資料 .驅動器功能’對資料線Ld施加既定檢測用電壓Vdac。 然後’將資料線Ld設成高阻抗(HZ)狀態,使資料線 Ld的電位自然緩和。 接著’使用資料驅動器14〇的電壓檢測功能取入該自 然'緩和1進行固定時間(緩和時間t)後之資料線Ld的電壓 Vd(資料線檢測電壓Vmeas(t))。 -28- 201113851 * 然後,將所取入之資料線檢測電壓Vmeas(t)轉換成由 數位資料所構成之檢測資料n_as(t)。 在此’在本實施形態,將此緩和時間t設定成複數個 相異的時間(時序:t。' t,、13、13 ),並執行複數次資料線 檢測電壓Vmeas(t)之取入及成爲檢測資料nmess(t)的轉換。 第9圖係表示在本實施形態之特性參數取得動作所應 用之手法(自動歸零法)之資料線電壓的變化圖(過渡曲線)。 具體而言,使用自動歸零法之特性參數取得動作,首 先’在將像素PIX設定成選擇狀態之狀態,從資料驅動器 140對資料線Ld施加檢測用電壓Vdac,以對發光驅動電路 DC之電晶體Tr 13的閘極、汲極端子間(連接點Nil和N1 2 間)施加超過該電晶體Trl3之臨限値電壓的電壓。 此時’在對像素PIX的寫入動作,因爲從電源驅動器 130對電源線La施加非發光位準的電源電壓DVSS( = Vc:接 地電位G N D) ’所以電位差(V。一 V d a c)被施加於電晶體T r 1 3 的閘極、源極端子間。因此,植測用電壓Vdac被設定成滿 足條件V 〇 - V d a c > V t h的電壓。此外,檢測用電壓v d a c是 比電源電壓DVSS更低的電壓値,而且被設定成對於被施 加於和有機電致發光元件OEL之陰極連接之共用電極Ec 的電源電壓ELVSS(接地電位GND)具有負極性的電壓値。 因而,因應於檢測用電壓Vdac的汲極電流Id從電源 驅動器1 30經由電源線La、電晶體Tr 1 3、Tr 1 2,沿資料線 Ld方向流動。此時,以對應於該檢測用電壓Vdac的電壓 -29- 201113851 對被接在電晶體Tr 1 3之閘極、源極間(接點N 1 1和N 1 2間) 的電容器Cs充電。 接著,將資料線Ld的資料輸入側設定成高阻抗(HZ) 狀態。在此,在將資料線Ld設定成高阻抗狀態後不久,充 電至電容器Cs的電壓即被保持爲因應檢測用電壓Vdac的 電壓。因而,電晶體.Tr 13之閘極、源極間電壓Vgs被保持 爲被充電至電容器Cs的電壓。 因而,在資料線Ld被設定成高阻抗狀態後不及,電晶 體Trl3即保持導通狀態,而汲極電流Id在電晶體Trl3的 汲極、源極間流動。在此,電晶體Trl 3之源極端子(連接 點N 1 2 )的電位隨時間經過而逐漸上昇至接近汲極端子側 的電位,流動於電晶體Tr 1 3之汲極、源極間之汲極電流Id 的電流値逐漸減少。 伴隨之,因電容器Cs所儲存之電荷的一部分被逐漸放 電,以致電容器Cs的兩端間電壓(電晶體Trl3之閘極、源 極間電壓Vgs)逐漸降低。因而,資料線Ld的電壓Vd如第 9圖所示,隨時間經過同時從檢測用電壓Vdac逐漸上昇, 並逐漸上昇至收歛至從電晶體Trl 3之汲極端子的電壓(電 源線La的電源電壓DVSS( = V〇))減去電晶體Trl3之臨限値 電壓Vth量的電壓(V。— Vth)。 然後,在這種自然緩和中,最後當汲極電流Id不會在 電晶體Trl3之汲極、源極間流動時’電容器Cs所儲存之 電荷的放電停止。此時電晶體Tr 1 3的閘極電壓(閘極、源 極間電壓Vgs)成爲電晶體Trl3的臨限値電壓Vth。 -30- 201113851 在此’在汲極電流Id不流動於發光驅動電路DC之電 晶體T r 1 3之汲極、源極間的狀態,因爲電晶體τ r 1 2之汲 極、源極間電壓成爲幾乎0V’所以在該自然緩和結束時資 料線電壓Vd幾乎等於電晶體Trl3的臨限値電壓Vth。 此外’在第9圖所示的過渡曲線,資料線電壓vd隨時 間經過而逐漸收歛至電晶體Trl3的臨限値電壓Vth(= | V。 —Vth丨)。可是’雖然資料線電壓Vci無限地趨近該臨限値 電壓Vth’但是理論上即使設定充分長的緩和時間t,亦無 法完全等於臨限値電壓Vth。 這種過渡曲線(自然緩和所引起之資料線電壓Vd的特 性)能以如下的第(1 1)式表示。Id = /5 1 (V 〇 - Vdata - Vth 〇) 2 (4) Here, 'θ' is a constant. The circuit characteristics of the light-emitting drive circuit DC at this time are indicated by the characteristic line SP3 in Fig. 8. Further, the characteristic line SP 3 of -27 to 201113851 shown in Fig. 8 indicates that the current amplification ratio in the equation (4) is not smaller than the current amplification ratio shown in the equation (2). The voltage-current (V - I) characteristic of the drive circuit DC. In the equations (2) and (4), when the current amplification factor of the design 値 or the standard 设为 (Typical) is set to the point typ, the parameter for correcting the current amplification rate to the 値 is corrected. (correction data) is set to △々. At this time, the correction data Δ /3 is supplied to each of the light-emitting drive circuits DC so that the product of the current amplification rate cold 'and the correction data Δ/? becomes the current amplification factor Atyp of the design ( (that is, becomes /3' xZXyS - calling typ ). Then, in the present embodiment, based on the voltage-current characteristic (the equations (2) to (4) and 8) of the above-described light-emitting drive circuit DC, the correction method is used in the following manner. The characteristic parameter of the threshold voltage Vth and the current amplification factor β ' of the crystal Tr3. In addition, in this patent specification, the tactics shown below are referred to as "automatic zeroing method". The method (automatic zeroing method) applied to the characteristic parameter obtaining operation of the present embodiment uses the data of the above-described data driver 14 in the selected state in the pixel 具有ίχ having the light-emitting drive circuit DC shown in Fig. 6. The driver function 'applies a predetermined detection voltage Vdac to the data line Ld. Then, the data line Ld is set to a high impedance (HZ) state, and the potential of the data line Ld is naturally moderated. Then, the voltage detection function of the data driver 14 is used to take in the voltage Vd (data line detection voltage Vmeas(t)) of the data line Ld after the natural time 1 is tempered for a fixed time (duration time t). -28- 201113851 * Then, the acquired data line detection voltage Vmeas(t) is converted into detection data n_as(t) composed of digital data. Here, in the present embodiment, the relaxation time t is set to a plurality of different times (timing: t.'t, 13, 13), and the multiplication of the data line detection voltage Vmeas(t) is performed. And become the conversion of the test data nmess(t). Fig. 9 is a graph showing the change of the data line voltage (transition curve) of the technique (automatic zeroing method) applied to the characteristic parameter obtaining operation of the present embodiment. Specifically, by using the characteristic parameter obtaining operation of the auto-zero method, first, the detection voltage Vdac is applied from the data driver 140 to the data line Ld in a state where the pixel PIX is set to the selected state, so as to be electrically connected to the light-emitting driving circuit DC. A voltage exceeding the threshold voltage of the transistor Tr13 is applied between the gate and the 汲 terminal of the crystal Tr 13 (between the junctions Nil and N1 2 ). At this time, in the write operation to the pixel PIX, since the power supply voltage DVSS (= Vc: ground potential GND) of the non-light-emitting level is applied from the power source driver 130 to the power source line La, the potential difference (V.-V dac) is applied. Between the gate and source terminals of the transistor T r 1 3 . Therefore, the planting voltage Vdac is set to a voltage satisfying the condition V 〇 - V d a c > V t h . Further, the detection voltage vdac is a voltage 更低 lower than the power supply voltage DVSS, and is set to have a negative electrode with respect to the power supply voltage ELVSS (ground potential GND) applied to the common electrode Ec connected to the cathode of the organic electroluminescent element OEL. Sexual voltage 値. Therefore, the drain current Id in response to the detection voltage Vdac flows from the power source driver 130 through the power source line La, the transistors Tr 1 3, and Tr 1 2 in the direction of the data line Ld. At this time, the capacitor Cs connected between the gate and the source of the transistor Tr 13 (between the contacts N 1 1 and N 1 2) is charged with a voltage -29-201113851 corresponding to the detection voltage Vdac. Next, the data input side of the data line Ld is set to a high impedance (HZ) state. Here, shortly after the data line Ld is set to the high impedance state, the voltage charged to the capacitor Cs is maintained at the voltage corresponding to the detection voltage Vdac. Therefore, the gate and source-to-source voltage Vgs of the transistor Tr 13 is maintained at the voltage charged to the capacitor Cs. Therefore, after the data line Ld is set to the high impedance state, the electric crystal Tr13 is kept in the on state, and the drain current Id flows between the drain and the source of the transistor Tr13. Here, the potential of the source terminal (connection point N 1 2 ) of the transistor Tr13 gradually rises to a potential close to the 汲 terminal side as time passes, and flows between the drain and the source of the transistor Tr 1 3 . The current 値 of the drain current Id is gradually reduced. Along with this, a part of the electric charge stored in the capacitor Cs is gradually discharged, so that the voltage between the both ends of the capacitor Cs (the gate of the transistor Tr13 and the voltage Vgs between the sources) gradually decrease. Therefore, as shown in FIG. 9, the voltage Vd of the data line Ld gradually rises from the detection voltage Vdac as time passes, and gradually rises to a voltage which converges to the 汲 terminal of the transistor Tr1 (the power source of the power line La) The voltage DVSS (= V〇) is subtracted from the voltage (V. - Vth) of the threshold voltage Vth of the transistor Tr13. Then, in this natural relaxation, finally, when the drain current Id does not flow between the drain and the source of the transistor Tr13, the discharge of the charge stored in the capacitor Cs is stopped. At this time, the gate voltage (gate voltage and source voltage Vgs) of the transistor Tr 1 3 becomes the threshold voltage Vth of the transistor Tr1. -30- 201113851 Here, the state in which the drain current Id does not flow between the drain and the source of the transistor T r 1 3 of the light-emitting drive circuit DC, because of the drain and source between the transistors τ r 1 2 The voltage becomes almost 0 V', so at the end of the natural relaxation, the data line voltage Vd is almost equal to the threshold voltage Vth of the transistor Tr13. Further, in the transition curve shown in Fig. 9, the data line voltage vd gradually elapses to the threshold voltage Vth (= | V. - Vth 丨) of the transistor Tr13. However, although the data line voltage Vci infinitely approaches the threshold voltage Vth', theoretically, even if a sufficiently long relaxation time t is set, it is not completely equal to the threshold voltage Vth. This transition curve (the characteristic of the data line voltage Vd caused by natural relaxation) can be expressed by the following formula (1 1).
Vd = Vmeas(t) = V0-Vth- 在該第(11)式’C是對第6圖所示之像素PIX之電路構 成中的資料線 Ld所附加之電容成分的總和,以 C = Cel + Cs + Cp(Cel:像素電容、Cs:電容器電容、Cp:配線 寄生電容)表示。此外’將檢測用電壓Vdac定義爲滿足如 下之第(12)式之條件的電壓値。 -31 - 201113851Vd = Vmeas(t) = V0-Vth- In the equation (11), "C" is the sum of the capacitance components added to the data line Ld in the circuit configuration of the pixel PIX shown in Fig. 6, to C = Cel + Cs + Cp (Cel: pixel capacitance, Cs: capacitor capacitance, Cp: wiring parasitic capacitance). Further, the detection voltage Vdac is defined as a voltage 满足 which satisfies the condition of the following formula (12). -31 - 201113851
Vdac : = VI - AV x (nd -1) ► V〇 - Vdac - Vth _ max > 0 '..(12) 在該第(12)式,Vth_max表示電晶體Trl3之臨限値電 壓Vth的補償界限値。在此,將nd定義爲在資料驅動器ι4〇 的DAC/ADC電路144中輸入DAC42之起始的數位資料(用 以規定檢測用電壓Vdac之數位資料),在該數位資料^是 10位元的情況’ d是選擇1〜1023中滿足該第(12)式之條件 的任意値。又’將AV定義爲數位資料的位元寬(對應於1 iiA兀的電壓寬),在該數位資料n d是1 〇位元的情況,係如 以下之第(13)式表示。Vdac : = VI - AV x (nd -1) ► V〇- Vdac - Vth _ max > 0 '..(12) In the formula (12), Vth_max represents the threshold voltage Vth of the transistor Tr13 Compensation limit 値. Here, nd is defined as the digital data (the digital data for specifying the detection voltage Vdac) at the beginning of the input DAC 42 in the DAC/ADC circuit 144 of the data driver ι4〇, where the digital data is 10 bits. The case 'd' is any one of the choices 1 to 1023 that satisfy the condition of the above formula (12). Further, AV is defined as the bit width of the digital data (corresponding to the voltage width of 1 iiA )), and when the digital data n d is 1 〇 bit, it is expressed by the following formula (13).
Ay = Vl - Vl023 1022 --(13) 接著’在該第(11)式’將資料線電壓Vd(資料線檢測電 壓Vmeas(t)、該資料線電壓Vd之收歛値V。一 Vth、及由電 流放大率石和電容成分之總和C所構成的參數々/C各自定 義成如下之第(14)式、第(15)式。 在此’在緩和時間t中A D C 4 3相對於資料線電壓v d (資料線檢測電壓Vmeas(t))的數位輸出(檢測資料)定義爲 nmeas(t)( ’並將臨限値電壓Vth的數位資料定義爲n,h。 -32- ' …(14) 201113851Ay = Vl - Vl023 1022 -- (13) Then, in the equation (11), the data line voltage Vd (the data line detection voltage Vmeas(t), the data line voltage Vd converges 。V. - Vth, and The parameter 々/C composed of the sum of the current amplification factor and the capacitance component C is defined as the following equations (14) and (15). Here, the ADC 4 3 is relative to the data line voltage during the relaxation time t. The digital output (detection data) of vd (data line detection voltage Vmeas(t)) is defined as nmeas(t) ( 'and the digital data of the threshold voltage Vth is defined as n, h. -32- ' (14) 201113851
Vmeas : = VI — AV x (nmeas - 1)Vmeas : = VI — AV x (nmeas - 1)
Vo - Vth : = VI - AV x (nth -1) ^ ξ: = (β/〇 ·Δν -..(15) 然後,根據第(14)式 '第(15)式所示的定義’將該第(11) 式置換成在資料驅動器140的DAC/ADC電路144輸入 DAC42之實際的數位資料(影像資料)心和由ADC43進行類 比-數位轉換後實際所輸出之數位資料(檢測資料) 的關係時,能以如下的第(16)式表示。 nmeas(t) = nth + 飞 nd ~ nth •t *(nd -nth) + l …(16) 在該第(15)式、第(16)式,f是類比値中之參數θ/c的 數位表現’ fxt是無因次。在此,將電晶體Trl3之臨限値 電壓Vth未發生變動(Vth移位)之起始的臨限値電壓vth。 設爲約IV。此時’爲了滿足fxtx(nd_nih)>>i的條件,藉 由設定相異之2個緩和時間t = tl、t2,而因應於電晶體Trl3 之臨限値電壓變動的補償電壓成分(偏置電壓)v〇ffset(t0) 能以如下的第(1 7)式表示。 -33- 201113851 ▽offset(t。)= >. . = Δν -(Π! -n2) 2 jtl .丄 纟.t〇 - ti t〇 ---(17) 在該第(17)式’ m、n2各自是在第(丨6)式將緩和時間t 設定成t i、12的情況,從ADC43所輸出之數位資料(檢測 資料)nm…(t!)' nmeas(t2)。然後,根據該第(16)式、第(17)式, 電晶體之臨限値電壓Vth的數位資料可使用在緩和時間t = t。從ADC43所輸出之數位資料nineas(t()),以如下的第(18)式 表示。又’偏置電壓Voffset的數位資料digital voffset能 以如下的第(19)式表不。在第(18)式、第(19)式,<f>是參 數冷/C之數位値之f的全像素平均値。在此,<!:>不考慮 小數點以下的値。 nth =门meas(t〇) -Vo - Vth : = VI - AV x (nth -1) ^ ξ: = (β/〇·Δν -..(15) Then, according to the definition of the formula (14), the definition of '(15)' will The equation (11) is replaced with the actual digital data (image data) input to the DAC 42 of the DAC/ADC circuit 144 of the data driver 140 and the digital data (detection data) actually output after analog-digital conversion by the ADC 43. In the case of the relationship, it can be expressed by the following equation (16): nmeas(t) = nth + fly nd ~ nth • t *(nd -nth) + l (16) In the equation (15), (16) Equation, f is the analogy of the parameter θ/c in the analogy ' 'fxt is dimensionless. Here, the threshold of the beginning of the threshold voltage Vth of the transistor Tr3 is not changed (Vth shift) The voltage vth is set to about IV. At this time, in order to satisfy the condition of fxtx(nd_nih)>i, the two mitigation times t = tl, t2 are set, which is in response to the transistor Tr3 The compensation voltage component (bias voltage) v〇ffset(t0) that limits the voltage variation can be expressed by the following equation (17): -33- 201113851 ▽offset(t.)= >. . = Δν -( Π! -n2) 2 jtl .丄纟.t - ti t〇---(17) In the case where the equation (17) where m and n2 are set to ti and 12 in the equation (丨6), the digital data output from the ADC 43 ( Detecting data) nm...(t!)' nmeas(t2). Then, according to the equations (16) and (17), the digital data of the threshold voltage Vth of the transistor can be used for the relaxation time t = t. The digit data nineas(t()) output from the ADC 43 is expressed by the following equation (18). The digital data voffset of the 'bias voltage Voffset' can be expressed by the following equation (19). (18) Formula, Formula (19), <f> is the total pixel average f of the parameter cold C, where the number of digits 値 f. Here, <!:> does not consider 値 below the decimal point. Door meas(t〇) -
•t〇 …(18) …(19) < 〆.t〇 = digital Voffset 因此,依據該第(18)式,可求得全像素份之用以修正 臨限値電壓vth的數位資料(修正資料)nih。 -34- 201113851 又,電流放大率沒的偏差是在第9圖所示的過渡曲 線,根據將緩和時間t設定成t3時從ADC43輸出之數位資 料(檢測資料)nwas(t),對f解該第(16)式,藉此,能以如下 的第(2 0)式表示。在此,t3被設定成遠小於在該第(17)式、 第(1 8 )式所使用t D、t 1、t 2之小的時間。 •t3•t〇...(18) ...(19) < 〆.t〇= digital Voffset Therefore, according to the equation (18), the digital data of the full-pixel portion for correcting the threshold voltage vth can be obtained (corrected) Information) nih. -34- 201113851 In addition, the deviation of the current amplification factor is the transition curve shown in Fig. 9, and the digital data (detection data) nwas(t) output from the ADC 43 when the relaxation time t is set to t3, the solution to f The above formula (16) can be expressed by the following formula (20). Here, t3 is set to be much smaller than the time t t, t 1 , and t 2 used in the equations (17) and (18). •t3
_~ ^meas(^3)_ i^meas(^3 ) ~ ^th] "[^d—^thJ …(20) 在該第(20)式,著眼於f,以各資料線Ld之電容成分 的總和C變成相等的方式設計顯不面板(發光面板),更且 如該第(13)式所示般預先決定數位資料的位元寬Λν,藉此 定義f之第(15)式的AV及C成爲常數。 然後,若將€及石之所要的設定値各自設爲f typ及 /5 t y p ’若忽略偏差之平方項’則用以修正顯示面板1 1 〇內 之各像素之發光驅動電路DC之f之偏差的乘法修正値△ 芒,即用以修正電流放大率沒之偏差的數位資料(修正資料) △沒能以如下的第(21)式定義。 -35- 201113851 Δ^: =i_izityp 2ξ = ί_Ι^Ρ = Αβ …⑼ 因此’發光驅動電路DC中之用以修正臨限値電壓vih 之變動的修正資料n,h(第i特性參數)、及用以修正電流放 大率/3之偏差的修正資料△沒读2特性參數),可藉由根 據該第(18)式、第(21)式改變上述之—連串自動歸零法中的 緩和時間t ’對資料線電壓vd(資料線檢測電壓vmeas(t)) 檢測複數次,而求得。 此外’如上述所示之修正資料nh、△ A的取得處理係 在如第5圖所示之控制器15〇a的修正資料取得功能電路 1 5 6執行。 接著’在如第5圖所示的控制器丨5 〇 a中,對從外部所 供給之特定的影像資料(在此,權宜上記爲「亮度測量用的 數位資料:第1影像資料」)〜,根據利用該第(18)式、第 (21)式所算出之修正資料、△ /3,施加以下所示之一連 串的運算處理’而產生亮度測量用影像資料,並輸入 資料驅動器140’以對顯示面板110(像素PIX)進行電壓驅 動。 具體而言’亮度測量用影像資料nd_bM的產生方法係對 亮度測量用的數位資料nd執行電流放大率;5的偏差修正 (△ /S乘法修正)、及臨限値電壓Vth的變動修正(n,h加法修 正)。 -36 - 201113851 » ' 首先,在控制器150a的乘法功能電路153a中,對數 位資料n«乘以用以修正電流放大率0之偏差的修正資料△ /3 (ηιχΔ yS )。 接著’在加法功能電路154a,對已進行乘法處理的數 位資料(iuxA /3 )加上用來修正臨限値電壓vth之變動.的修 正資料 n i h ((n d X △ /5 ) + n t h) 然後’將己施加這些修正處理的數位資料((nd x △ 冷)+nlh)作爲亮度測量用影像資料nd_bM,供給至資料驅動器 140的資料暫存器電路142 » 資料驅動器140係利用DAC/ADC電路144的DAC42 將被取入資料暫存器電路142之亮度測量用影像資料nch, 轉換成類比信號電壓。 在此’如第4圖所示,因爲DAC42和ADC43的輸出輸 入特性(轉換特性)被設定成相同,所以由DAC42所產生之 亮度測量用的灰階電壓(第2電壓)Vh係根據該第(14)式所 示的定義’定義成如下的第(22)式所示。此灰階電壓Vbrl 是經由資料線Ld供給至像素PiX。_~ ^meas(^3)_ i^meas(^3 ) ~ ^th] "[^d—^thJ (20) In the formula (20), focusing on f, each data line Ld The panel C (light-emitting panel) is designed in such a manner that the sum C of the capacitance components becomes equal, and the bit width Λν of the digital data is determined in advance as shown in the above formula (13), thereby defining the formula (15) of f The AV and C become constant. Then, if the setting of € and stone is set to f typ and /5 typ 'if the square of the deviation is omitted, then the illumination driving circuit DC of each pixel in the display panel 1 1 修正 is corrected. The multiplication correction of the deviation 値 △ 芒, that is, the digital data (correction data) for correcting the deviation of the current amplification factor △ is not defined by the following formula (21). -35- 201113851 Δ^: =i_izityp 2ξ = ί_Ι^Ρ = Αβ (9) Therefore, the correction data n, h (the i-th characteristic parameter) for correcting the variation of the threshold voltage vih in the light-emitting drive circuit DC, and The correction data Δ for correcting the deviation of the current amplification factor /3 does not read the 2 characteristic parameter), and can be changed by the above-mentioned series (18) and (21). The time t ' is obtained by detecting the data line voltage vd (the data line detection voltage vmeas(t)) a plurality of times. Further, the acquisition processing of the correction data nh and ΔA as described above is executed by the correction data acquisition function circuit 156 of the controller 15A shown in Fig. 5. Then, in the controller 丨5 〇a shown in Fig. 5, the specific image data supplied from the outside (here, the expedient is referred to as "digital data for luminance measurement: first image data")~ According to the correction data calculated by the equations (18) and (21), Δ /3, a series of arithmetic processings shown below are applied to generate luminance measurement video data, and the data driver 140' is input to The display panel 110 (pixel PIX) is voltage-driven. Specifically, the method of generating the luminance measurement video data nd_bM is to perform current amplification on the digital data nd for luminance measurement, the variation correction of 5 (Δ / S multiplication correction), and the variation correction of the threshold voltage Vth (n). , h addition correction). -36 - 201113851 » ' First, in the multiplication function circuit 153a of the controller 150a, the digital data n« is multiplied by the correction data Δ /3 (ηιχΔ yS ) for correcting the deviation of the current amplification factor 0. Then, in the addition function circuit 154a, the digital data (iuxA /3) which has been multiplied is added with correction data nih ((nd X Δ /5 ) + nth) for correcting the variation of the threshold voltage vth. 'The digital data ((nd x Δ cold) + nlh) to which these correction processes have been applied is used as the brightness measurement image data nd_bM, and supplied to the data register circuit 142 of the data driver 140. The data driver 140 utilizes the DAC/ADC circuit. The DAC 42 of 144 is taken into the luminance measurement image data nch of the data register circuit 142 and converted into an analog signal voltage. Here, as shown in FIG. 4, since the output input characteristics (conversion characteristics) of the DAC 42 and the ADC 43 are set to be the same, the gray scale voltage (second voltage) Vh for luminance measurement generated by the DAC 42 is based on the first The definition "of the formula (14) is defined as the following equation (22). This gray scale voltage Vbr1 is supplied to the pixel PiX via the data line Ld.
Vbrl = Vl — △V(nbrt — 1)·.· (22) 依此方式’對特定的影像資料執行一連串的修正處 理’以產生亮度測量用的灰階電壓VbM,並寫入顯示面板 110寫入,藉此,可將從各像素p〗X的發光驅動電路DC向 有機電致發光元件OEL流動之發光驅動電流Iem的電流値 設定成定値,而不會受到電流放大率Θ相對於設定値的偏 -37- 201113851 差或驅動電晶體之臨限値電壓Vth之變動的影響。然後, 在這種狀態,使顯示面板11 〇進行發光動作,來測量各像 素PIX的發光亮度Lv(cd/m2)。 在此’關於各像素PIX的亮度測量方法,例如可應用 如下.的手法。 即,各像素PIX之亮度測量方法的一例,係首先,使 排列於顯示面板1 1 0之各像素PIX以因應該亮度測量用的 灰階電壓Vbfl的亮度灰階同時進行發光動作。 接著’如第5圖所示,利用配置於顯示面板1 1 〇之射 出面側的亮度計或CCD相機160拍攝顯示面板11〇,其中 該射出面側係該顯示面板1 1 〇的各像素PIX所發出的光射 出外部的一側。在此,亮度計或CCD相機160使用解析度 比排列於顯示面板1 1 0之各像素PIX的大小更高者。然後, 從所取得之影像信號將對應於各像素PIX的區域與從亮度 計或CCD相機1 60輸出之亮度資料賦予關聯。然後,從對 應於各像素PIX區域的複數個亮度資料中之高亮度側抽出 既定數的亮度資料,並算出其亮度値的平均値,藉此決定 各像素PIX的發光亮度(亮度値)Lv。 在此,在將有機電致發光元件OEL之發光電流效率設 爲的情況,因爲能以 f =(亮度)/ (電流密度) 表示,所以若流動於各像素PIX之發光驅動電流的電 流値爲定値,則顯示面板1 1 0內之發光亮度相對於設定値 的偏差可視爲發光電流效率7?的偏差。 -38- 201113851 然後’將發光亮度Lv及發光電流效率卩之所要的 値各自設爲Lvtyp及7? typ時,若忽略偏差之平方項,則 修正顯示面板110內之各像素PIX之發光亮度Lv之偏 乘法修正値△ Lv,即用以修正發光電流效率々之偏差 位資料(修正資料:第3特性參數)△ ^能以如下的第 式定義。 設定 用以 差的 的數 (23) ALv :=1-Vbrl = Vl - ΔV(nbrt - 1) (22) In this way, 'a series of correction processing is performed on a specific image data' to generate a gray scale voltage VbM for luminance measurement, and written in the display panel 110 By this, the current 値 of the light-emission drive current Iem flowing from the light-emitting drive circuit DC of each pixel p X to the organic electroluminescent element OEL can be set to a constant value without being subjected to the current amplification ratio Θ relative to the setting 値The bias of -37-201113851 is the effect of the variation of the voltage or voltage Vth of the differential or driving transistor. Then, in this state, the display panel 11 〇 is caused to emit light, and the light emission luminance Lv (cd/m2) of each pixel PIX is measured. Here, the method of measuring the luminance of each pixel PIX can be applied, for example, as follows. In other words, in an example of the method of measuring the luminance of each pixel PIX, first, each pixel PIX arranged on the display panel 110 is simultaneously illuminated by a gray scale corresponding to the grayscale voltage Vbfl for luminance measurement. Next, as shown in FIG. 5, the display panel 11A is imaged by a luminance meter or a CCD camera 160 disposed on the emission surface side of the display panel 1 1 〇, wherein the emission surface side is the pixel PIX of the display panel 1 1 〇 The emitted light is emitted from the outside side. Here, the luminance meter or the CCD camera 160 uses a resolution higher than the size of each pixel PIX arranged on the display panel 110. Then, the area corresponding to each pixel PIX is associated with the luminance data output from the luminance meter or CCD camera 160 from the acquired video signal. Then, a predetermined number of luminance data is extracted from the high luminance side of the plurality of luminance data corresponding to the PIX region of each pixel, and the average luminance 値 is calculated, thereby determining the luminance (brightness 値) Lv of each pixel PIX. Here, when the luminous current efficiency of the organic electroluminescent element OEL is set to f = (brightness) / (current density), the current flowing through the light-emission drive current of each pixel PIX is When the threshold is set, the deviation of the light-emitting luminance in the display panel 110 from the set threshold can be regarded as the deviation of the luminous current efficiency 7?. -38- 201113851 Then, when the respective 値 of the illuminance Lv and the illuminating current efficiency 设为 are set to Lvtyp and 7? typ, if the square of the deviation is omitted, the illuminance Lv of each pixel PIX in the display panel 110 is corrected. The partial multiplication correction 値 Δ Lv, that is, the deviation bit data for correcting the luminous current efficiency 修正 (correction data: the third characteristic parameter) Δ ^ can be defined by the following formula. Set the number used for the difference (23) ALv :=1-
Lv - Lvtyp ~~2Lv~ _ ^Ttyp 一 2η =Αη (23) 因此,如上述所示根據對各像素ΡΙΧ測量的發光 Lv,可求得發光電流效率7?的修正資料△;?。 在此,第(23)式所示之用以修正發光亮度Lv之偏 修正資料△ ^的運算處理,係利用和該第(21)式所示 以修正電流放大率Θ之偏差之修正資料△ 0的運算處 樣的順序執行。 然後,將從該第(21)式、第(23)式所得之修正資料 與△ 7?相乘,藉此,如下的第(24)式所示,定義用以 電流放大率々和發光電流效率兩者的偏差的修正 (第4特性參數)AiS»。 Α β ί =Δ η χΔ β …(24) 亮度 差之 之用 理一 Δ β 修正 資料 -39- 201113851 利用該第(18)式、第(24)式所算出之修正資料心^及八 冷,係在後述的顯示動作,對從本實施形態之顯示裝置1 〇〇 的外部輸入之影像資料no,施加電流放大率Θ的偏差修正 (△ /3乘法修正)、及臨限値電壓vth的變動修正(nih加法修 正)’以產生修正影像資料nd_e^p時使用。 因而’因爲從資料驅動器1 40經由資料線L.d向各像素 PIX供給因應修正影像資料nd_u„p之類比電壓値的灰階電 壓Vdata ’所以可使各像素ριχ的有機電致發光元件〇EL 以所要之亮度灰階進行發光動作,而不會受到電流放大率 冷或發光電流效率7?之偏差或驅動電晶體之臨限値電壓 Vth之變動的影響,可實現良好且均勻的發光狀態。 其次,說明與本實施形態之裝置構成相關之應用上述 自動歸零法的特性參數取得動作。 此外,在以下的說明中,簡化或省略與上述之特性參 數取得動作相同的動作之說明。 首先,取得用以修正在各像素PIX的驅動電晶體之臨 限値電壓Vth之變動的修正資料nih和用以修正在各像素 PIX之電流放大率沒之偏差的修正資料。 第10圖係表示本實施形態之顯示裝置之特性參數取 得動作的時序圖(之一)。 第11圖係表示本實施形態之顯示裝置之檢測用電壓 施加動作的動作示意圖。 第1 2圖係表示本實施形態之顯示裝置之自然緩和動 作的動作示意圖。 -40- 201113851 第13圖係表不本實施形態之顯示裝置之資料線電壓 檢測動作的動作示意圖。 第1 4圖係表示本實施形態之顯示裝置之檢測資料送 出動作的動作示意圖。 又’第15圖係表示本實施形態之顯示裝置之修正資料 算出動作的功能方塊圖。 在此’在第11圖〜第14圖中’作爲資料驅動器14〇之 構成,爲了便於圖示,而省略移位暫存器電路141的圖示。 在本實施形態的特性參數(修正資料n,h、△々)取得動 作中’如第1 0圖所示,按各列的各像素PIX設定成在既定 之特性參數取得期間Tcpr內包含檢測用電壓施加期間 T1(n、自然緩和期間Tm、資料線電壓檢測期間Tm及檢測 資料送出期間Τ1;Μ。 在此,自然緩和期間τη。2係對應於上述的緩和時間t。 在第10圖,雖然爲了便於圖示,表示將緩和時間t設定成 一個時間的情況,但是如上述所示,在本實施形態,使緩 和時間t相異,並檢測資料線電壓 Vd(資料線檢測電壓 Vmeas(t))複數次。因而,實際上,在自然緩和期間Tm內 之相異的各緩和時間t ( = t。、t ,、12、13),重複執行資料線 電壓檢測動作(資料線電壓檢測期間TuO及檢測資料送出 動作(檢測資料送出期間Τ1(μ)。 首先,在檢測用電壓施加期間Tl(n,如第1〇圖、第11 圖所示,將成爲特性參數取得動作之對象的像素ΡΙΧ (在圖 -41- 201113851 中爲第1列的像素PIX)設定成選擇狀態。即’從選擇驅動 器120對該像素PIX所連接的選擇線Ls施加選擇位準(高 位準:Vgh)的選擇信號Ssel,同時從電源驅動器130對電 源線La施加低位準(非發光位準:DVSS =接地電位GND)的 電源電壓Vsa。 然後,在此選擇狀態,根據從控制器1 50a所供給之切 換控制信號S 1,設置於資料驅動器1 40之輸出電路1 45的 開關SW1進行導通動作,藉此,連接資料線Ld〇)和 DAC/ADC144 的 DAC42(j)。 又’根據從控制器1 50a所供給之切換控制信號S2、 S3,設置於輸出電路145的開關SW2進行截止動作,同時 與開關SW4之接點Nb連接的開關SW3進行截止動作。 又’根據從控制器1 50a所供給之切換控制信號S4,設 置於資料閂鎖電路143的開關SW4被設定成和接點Na連 接’並根據切換控制信號S5,開關SW5被設定成和接點 Na連接。 然後’用以產生既定電壓値之檢測用電壓Vdac的數位 資料no從資料驅動器丨4〇的外部依序被取入資料暫存器電 路142 ’再經由對應於各行的開關SW5被保持於資料閂鎖 41(j)。 然後’資料閂鎖4 1 (j)所保持的數位資料nd經由開關 SW4輸入DAC/ADC電路144的DAC42(j)以進行類比轉換, 並施加於各行的資料線Ld(j)作爲檢測用電壓Vdac。 -42- 201113851 在此,檢測用電壓Vdac如上述所示,被設定成滿足該 第(1 2)式之條件的電壓値。在本實施形態中,因爲從電源 驅動器130施加的電源電壓DVSS被設定成接地電位 GND,所以檢測用電壓Vdac被設定成負的電壓値。此外, 用以產生檢測用電壓Vdac的數位資料nd預先被記憶於設 置於例如控制器1 5 0a等的記憶體。 因而,設置於構成像素PIX之發光驅動電路DC的電 晶體Trl 1及Tr 12進行導通動作,而低位準的電源電壓 Vsa( = GND)經由電晶體Trll被施加於電晶體Trl3的閘極端 子及電容器C s的一端側(連接點N 1 1)。 又,被施加於資料線Ld(j)的該檢測用電壓Vdac經由 電晶體Trl2被施加於電晶體Trl3的源極端子及電容器Cs 的另一端側(連接點N12)。 依此方式,藉由對電晶體Trl 3之閘極、源極端子間(即 電容器Cs的兩端)施加比電晶體Trl3之臨限値電壓Vth更 大的電位差,使電晶體Trl3進行導通動作,而流動因應此 電位差(閘極、源極間電壓V g s)的汲極電流I d。 此時,因爲電晶體Tr 1 3之源極端子的電位(檢測用電 壓 Vdac)被設定成比汲極端子的電位(接地電位 GND)更 低,所以汲極電流I d從電源電壓線L a經由電晶體T r 1 3、 連接點N12 '電晶體Trl2及資料線Ld(j),朝向資料驅動器 1 4 0方向流動。 -43- 201113851 又,藉此以對應於根據該汲極電流Id之電位差的電壓 對連接在電晶體Tr 1 3之閘極、源極間之電容器Cs的兩端 進行充電。 此時,因爲比被施加於陰極(共用電極 Ec)之電壓 更低的電壓被施力口於有機電致發光元件〇EL 的陽極(連接點N 1 2),所以電流不會流向有機電致發光元件 OEL,而不會進行發光動作。 接著,在該檢測用電壓施加期間T,。i結束後的自然緩 和期間Tm ’如第10圖 '第12圖所示,在將像素PIX保持 於選擇狀態之狀態下,根據從控制器1 5 0 a所供給之切換控 制信號S 1,使資料驅動器1 4 0的開關S W 1進行截止動作, 藉此,使資料線L d (j)與資料驅動器1 4 〇分離,同時停止從 DAC42(j)輸出檢測用電壓Vdac。 又’和上述的檢測用電壓施加期間ΊΊ<η —樣,開關 1 SW2、SW3進行截止動作,開關SW4被設定成和接點Nb 連接,開關SW5被設定成和接點Nb連接。 藉此’因爲電晶體Trl 1、Trl2保持導通狀態,雖然像 素PIX(發光驅動電路DC)保持和資料線Ld(j)呈電性連接的 狀態’但是因爲截斷對該資料線Ld(j)施加電壓,所以電容 器Cs之另一端側(連接點N12)被設定成高阻抗狀態。 在此自然緩和期間T1(n’藉由在上述之檢測用電壓施 加期間Ticn利用充電至電容器Cs(電晶體Trl3的閘極、源 極間)的電壓’使電晶體Trl 3保持導通狀態,而汲極電流 Id繼續流動。 -44 - 201113851 然後’電晶體T r 1 3之源極端子側(連接點N丨2 :電容器 Cs的另一端側)的電位逐漸上昇至接近電晶體Trl3的臨限 値電壓V t h » 因而’如第9圖所示’資料線Ld(j)的電位亦變化成收 歛至電晶體Trl3的臨限値電壓Vth。 此外’在此自然緩和期間Τ,η,亦因爲有機電致發光 元件OEL之陽極(連接點Ν 12)的電位被施加比施加於陰極 (共用電極Ec)的電壓ELVSS( = GND)更低的電壓,所以電流 不會流動於有機電致發光元件OEL,而不會進行發光動作。 接著,在資料線電壓檢測期間Tl()3,在該自然緩和期 間Τ,。2,於經過既定之緩和時間t的時間點,如第1〇圖、 第1 3圖所示’在將像素ΡΙχ保持於選擇狀態的狀態,根據 從控制器150a所供給之切換控制信號S2,使資料驅動器 140的開關SW2進行導通動作。此時,開關SW1、SW3進 行截止動作,而開關SW4被設定成和接點Nb連接,開關 SW5被設定成和接點Nb連接。 因而,連接資料線Ld(j)和DAC/ADC144的ADC43(j), 在自然緩和期間T1!)2經過既定之緩和時間t之時間點的資 料線電壓 Vd經由開關SW2及緩衝器45(j)被取入 ADC4 3(j)。在此,被取入ADC43(j)之資料線電壓Vd相當於 該第(1 1)式所示的資料線檢測電壓Vmeas(t)。 然後,ADC43(j)所取入之由類比信號電壓構成的資料 線檢測電壓Vmeas(t)係根據該第(14)式在ADC43(j)中被轉 -45 - 201113851 換成由數位資料構成的檢測資料nmsas(t),並經由開關SW5 被資料閂鎖41 (j)保持。 接著’在檢測資料送出期間Τ,μ,如第10圖、第14 圖所示’將像素ΡΙΧ設定成非選擇狀態。 即’從選擇驅動器120對選擇線Ls施加非選擇位準(低 位準:Vgl)的選擇信號Sse丨。在此非選擇狀態,根據從控 制器150a所供給之切換控制信號S4、S5,設置於資料驅動 器140之資料閂鎖41(j)的輸入段之開關SW5被設定成和接 點Nc連接’設置於資料閂鎖41(j)之輸出段的開關sw4被 設定成和接點Nb連接。又,根據切換控制信號s 3,使開 關SW3進行導通動作。此時’開關Swi、SW2根據切換控 制信號SI、S2進行截止動作。 因而’彼此相鄰之行的資料閂鎖41 U)經由開關SW4、 SW5串聯’並經由開關SW3和外部的控制器15〇3連接。 然後’根據從控制器1 5 0 a所供給之資料閂鎖脈波信號 LP ’將各行的資料閂鎖4丨(j+丨)(參照第3圖)所保持之檢測 資料n m 〃 s (t)依序轉送至相鄰的資料閂鎖4 1 (j)。 因而’輸出1列份之像素Ρίχ的檢測資料nm〃s(t)作爲 串列資料’如第1 5圖所示’並供給至控制器丨5〇a,.再以對 應於各像素PIX的方式記憶於設置於控制器15〇a之記憶體 1 5 5的既定記憶區域。 在此,各像素PIX之發光驅動電路DC所設置之電晶 體Trl3的臨限値電壓Vth的變動量,係因各像素ριχ的驅 -46- 201113851 • 動經歷(發光經歷)等而異,又,電流放大率/5亦因爲 素PIX相對於設定値具有偏差,所以於記憶體1 5 5中 各像素PIX所固有的檢測資料nm.as(t)。 在本實施形態,在上述一連串的動作中,將資g 壓檢測動作及檢測資料送出動作設定成相異的緩和! t( = t0、tl、t2、t3),以對各像素PIX執行複數次。在 在相異的緩和時間t檢測資料線電壓的動作係如上$ 亦可在僅施加一次檢測用電壓而持續自然緩和的期間 在相異的時序t(緩和時間t=t0、tl、t2、t3)將資料,線 檢測動作及檢測資料送出動作執行複數次,亦可使緩 間t相異並將檢測用電壓施加、自然緩和、資料線電 測及檢測資料送出之一連串的動作執行複數次。 重複以上所示之對各列之像素PIX的特性參數取 作’針對排列於顯示面板110的全像素PIX將複數次 檢測資料nmeas(t)記憶於控制器150a的記憶體155 » 接著,根據各像素PIX的檢測資料nm〃s(t),執行 修正各像素PIX之電晶體(驅動電晶體)Trl3之臨限値 Vth的修正資料η,》及用以修正電流放大率/3之修正資 冷的算出動作。 具體而言,如第15圖所示,首先,在設置於控制器 之修正資料取得功能電路1 5 6,讀出與記億體1 5 5所記 各像素PIX對應的檢測資料nmeas(t)。 各像 記憶 線電 時間 此, 般, 中, 電壓 和時 壓檢 得動 份的 用以 電壓 料△ 150a 憶之 -47- 201113851 然後’在修正資料取得功能電路1 5 6,按照上述之使用 自動歸零法的特性參數取得動作,根據該第(15)式〜第(21) 式’算出修正資料nlh(具體而言,規定修正資料nih的檢測 資料η™…(t。)及偏置電壓(一Voffset= - 1/f xt〇)及修正資料 △ /5。所算出之修正資料n,h及△办以對應於各像素PIX的 方式記憶於記憶體1 5 5的既定記憶區域。 接著’使用該修正資料nih、△/3,取得用以修正各像 素PIX之發光電流效率之偏差的修正資料△ 7?。 第16圖係表示本實施形態之顯示裝置之特性參數取 得動作的時序圖(之二)。 第1 7圖係表示本實施形態之顯示裝置之亮度測量用 之影像資料之產生動作的功能方塊圖。 第1 8圖係表示本實施形態之顯示裝置之亮度測量用 之影像資料之寫入動作的動作示意圖。 第19圖係表示本實施形態之顯示裝置之亮度測量用 之發光動作的動作示意圖》 第20圖係表示本實施形態之修正資料算出動作的功 能方塊圖(之二)。 在此,在第1 8圖、第19圖,作爲資料驅動器140之 構成,爲了便於圖示,係省略移位暫存器電路141來顯示。 本實施形態的特性參數(修正資料△々)取得動作係如 第1 6圖所示,被設定成包含:產生與各列的像素ΡΙΧ對應 之亮度測量用影像資料並寫入之亮度測量用影像資料寫入 • 48 - 201113851 期間Τ2<η、以因應亮度測量用之影像資料的亮度灰階使各 像素Ρ I X進仃發光動作的亮度測量用發光期間Τ 2。2及測量 各像素之發光亮度的發光亮度測量期間。在此,亮度 測量用發光期間T2〇2包含發光亮度測量期間T203,發光亮度 的測量動作係在亮度測量用發光期間Τ2()2中被執行。 在亮度測量用影像資料寫入期間Τ2(η,執行亮度測量 用影像資料的產生動作和亮度測量用影像資料寫入各像素 ΡΙΧ的動作。 亮度測量用影像資料的產生動作係在控制器丨5 0 a,使 用藉上述之特性參數取得動作而取得的修正資料△沒及nih 對既定亮度測量用數位資料n d進行修正,而產生亮度測量 用影像資料nd_btl。 具體而言’如第17圖所示,首先,讀出控制器i50a 的記憶體1 5 5所記憶之各像素的修正資料△召。 然後,在乘法功能電路153a中,對從控制器l5〇a之 外部所供給之數位資料no’進行所讀出之修正資料△沒的 乘法處理。 接著’根據該第(1 8)式、第(1 9)式,讀出記憶體1 5 5所 記憶之規定修正資料nth的檢測資料ηηι…(t。)及偏置電壓 (—V 〇 f f s e t = - 1 / (芒 X t 〇))。 然後’在加法功能電路154a’對該已進行乘法處理的 數位資料(nlhx△沒)進行所讀出之檢測資料nm…⑴及偏置 電壓(一Voffset)的加法處理。藉由執行以上的修正處理, -49- 201113851 而產生亮度測量用影像資料nd_bf,並供給至資料驅!^ @ 140 〇 又’亮度測量用影像資料寫入各像素PIX的動作係與 上述之檢測用電壓施加動作(檢測用電壓施加期間.T1(n)_ 樣,在將成爲寫入對象的像素ΡΙΧ設定成選擇狀態之#態、 下,經由資料線Ld(j)寫入因應該亮度測量用影像資料〜 1 1 “ d _ b r t 的亮度測量用灰階電壓Vbri。 具體而言,如第16圖、第18圖所示,首先,對該像 素PIX所連接的選擇線Ls,施加選擇位準(高位準:Vgh) 的選擇信號Ssel,同時對電源線La施加低位準(非發光位 準:DVSS =接地電位GND)的電源電壓Vsa。 在此選擇狀態,使開關SW1進行導通動作,而將開關 SW4及SW5設定成和接點Nb連接,藉此,將從控制器i5〇a 所供給之亮度測量用影像資料nd_bM依序取入資料暫存器電 路142 ’並由對應於各行的資料閂鎖41(j)所保持。 所保持的影像資料ni — bM由DAC42(j)進行類比轉換,並 施加於各行的資料線Ld(j)作爲亮度測量用灰階電壓Vbrl。 亮度測量用灰階電壓V b μ係如上述所示,被設定成滿足該 第(2 2)式之條件的電壓値。 因而’在構成像素ΡΙΧ的發光驅動電路DC中,對電 晶體Trl3的閘極端子及電容器Cs的一端側(連接點Nil) 施加低位準的電源電壓Vsa( = GND),又,對電晶體Trl3的 源極端子及電容器Cs的另一端側(連接點N12)施加該亮度 測量用灰階電壓VbM。 -50- 201113851 • 因此,因應電晶體Tr 1 3之閘極、源極端子間所產生之 電位差(閘極、源極間電壓Vgs)的汲極電流Id流動,而以 與根據該汲極電流Id之電位差對應的發光電壓V brt ) 對電容器Cs的兩端充電。 此時,因爲對有機電致發光元件OEL的陽極(連接點 N 12)施加比陰極(共用電極Ec)更低的電壓,所以有機電致 發光元件OEL不會流通電流,而不會進行發光動作。 接著,在亮度測量用發光期間T2〇2,如第1 6圖所示, 在將各列的像素ΡΙΧ設定成非選擇狀態之狀態,使各像素 ΡΙΧ同時進行發光動作。 具體而言,如第19圖所示,對與排列於顯示面板110 之全像素ΡΙΧ連接的選擇線Ls施加非選擇位準(低位準: Vgl)的選擇信號Ssel,同時對電源線La施加高位準(發光位 準:ELVDD>GND)的電源電壓Vsa。 因而,設置於各像素ΡΙΧ的發光驅動電路DC之電晶 體Trll' Trl2進行截止動作,而保持被充電至連接在電晶 體Tr 13之閘極、源極間之電容器Cs的發光電壓。 因此,利用被充電至電容器Cs的發光電壓(=Vbrt)保持 電晶體T r 1 3的閘極、源極間電壓V g s ’電晶體τ r 1 3進行導 通動作而流通汲極電流Id,電晶體Tr 1 3之源極端子(連接 點N12)的電位上昇。 然後,電晶體Trl3之源極端子(連接點N12)的電位上 昇至比被施加於有機電致發光元件〇EL之陰極(共用電極 -51 - 201113851Lv - Lvtyp ~~2Lv~ _ ^Ttyp - 2η = Αη (23) Therefore, as described above, the correction data Δ; ? of the luminous current efficiency 7? can be obtained from the light emission Lv measured for each pixel ΡΙΧ. Here, the arithmetic processing for correcting the offset correction data Δ^ of the light-emission luminance Lv shown in the equation (23) is to use the correction data Δ which is corrected by the correction formula Δ according to the equation (21). The order of 0 is executed in the order of the operation. Then, the correction data obtained from the equations (21) and (23) are multiplied by Δ7?, whereby the current amplification factor 发光 and the illuminating current are defined as shown in the following equation (24). Correction of the deviation of the efficiency (fourth characteristic parameter) AiS». Α β ί =Δ η χΔ β (24) The difference between the luminance and the Δβ correction data-39- 201113851 The correction data calculated by the equations (18) and (24) and the eight cold In the display operation to be described later, the correction of the current amplification factor Θ (Δ /3 multiplication correction) and the threshold voltage vth are applied to the image data no input from the outside of the display device 1 of the present embodiment. The variation correction (nih addition correction) is used when generating the corrected image data nd_e^p. Therefore, since the gray scale voltage Vdata ' corresponding to the analog voltage 値 of the analog image data nd_u„p is supplied from the data driver 140 to the respective pixels PIX via the data line Ld, the organic electroluminescent element 〇EL of each pixel ρι can be obtained. The brightness gray scale performs the light-emitting operation without being affected by the current amplification rate cold or the variation of the luminous current efficiency 7? or the variation of the threshold voltage Vth of the driving transistor, so that a good and uniform light-emitting state can be achieved. The characteristic parameter obtaining operation using the above-described automatic zeroing method relating to the device configuration of the present embodiment will be described. In the following description, the description of the same operation as the above-described characteristic parameter obtaining operation will be simplified or omitted. The correction data nih for correcting the variation of the threshold voltage Vth of the driving transistor of each pixel PIX and the correction data for correcting the deviation of the current amplification ratio of each pixel PIX are shown. FIG. 10 is a view showing the present embodiment. A timing chart (one) of the characteristic parameter obtaining operation of the display device. Fig. 11 is a view showing the display device of the present embodiment. Fig. 1 is a schematic view showing the operation of the natural mitigation operation of the display device of the present embodiment. -40-201113851 Fig. 13 is a diagram showing the data line voltage detection of the display device of the present embodiment. Fig. 14 is a view showing the operation of the detection data sending operation of the display device of the embodiment. Fig. 15 is a functional block diagram showing the correction data calculation operation of the display device of the embodiment. This is a configuration of the data driver 14 in '11th to 14th, and the illustration of the shift register circuit 141 is omitted for convenience of illustration. The characteristic parameter (correction data n, in the present embodiment) In the acquisition operation, as shown in FIG. 10, each pixel PIX of each column is set to include the detection voltage application period T1 (n, the natural relaxation period Tm, in the predetermined characteristic parameter acquisition period Tcpr, The data line voltage detection period Tm and the detection data transmission period Τ1; Μ. Here, the natural relaxation period τη. 2 corresponds to the above-mentioned relaxation time t. In Fig. 10, Although the relaxation time t is set to one time for convenience of illustration, as described above, in the present embodiment, the relaxation time t is different, and the data line voltage Vd is detected (the data line detection voltage Vmeas(t). )). Therefore, in practice, the data line voltage detection operation (data line voltage detection period) is repeatedly performed during each of the different relaxation times t (= t., t, 12, 13) in the natural relaxation period Tm. TuO and detection data transmission operation (detection data transmission period Τ1 (μ). First, in the detection voltage application period T1 (n, as shown in Fig. 1 and Fig. 11, the pixel to be subjected to the characteristic parameter acquisition operation ΡΙΧ (Pixel PIX of the first column in Fig. 41-201113851) is set to the selected state. That is, 'the selection signal Ssel of the selected level (high level: Vgh) is applied from the selection driver 120 to the selection line Ls to which the pixel PIX is connected, while the low level is applied from the power source driver 130 to the power line La (non-light emission level: DVSS) = Ground potential GND) Supply voltage Vsa. Then, in the selected state, the switch SW1 provided in the output circuit 145 of the data driver 140 is turned on according to the switching control signal S1 supplied from the controller 150a, thereby connecting the data line Ld) and DAC42(j) for DAC/ADC144. Further, the switch SW2 provided in the output circuit 145 is turned off in accordance with the switching control signals S2 and S3 supplied from the controller 150a, and the switch SW3 connected to the contact Nb of the switch SW4 is turned off. Further, 'switch SW4 provided to the material latch circuit 143 is set to be connected to the contact Na according to the switching control signal S4 supplied from the controller 150a, and the switch SW5 is set to and the contact according to the switching control signal S5. Na is connected. Then, the digital data no of the detection voltage Vdac for generating the predetermined voltage 取 is sequentially taken from the data driver 丨4〇 into the data register circuit 142' and held in the data latch via the switch SW5 corresponding to each row. Lock 41 (j). Then, the digital data nd held by the 'data latch 4 1 (j) is input to the DAC 42(j) of the DAC/ADC circuit 144 via the switch SW4 for analog conversion, and is applied to the data line Ld(j) of each row as the detection voltage. Vdac. -42- 201113851 Here, the detection voltage Vdac is set to a voltage 满足 satisfying the condition of the above formula (1 2) as described above. In the present embodiment, since the power source voltage DVSS applied from the power source driver 130 is set to the ground potential GND, the detection voltage Vdac is set to a negative voltage 値. Further, the digital data nd for generating the detection voltage Vdac is previously stored in a memory provided, for example, in the controller 150a or the like. Therefore, the transistors Tr1 and Tr12 provided in the light-emitting drive circuit DC constituting the pixel PIX are turned on, and the low-level power supply voltage Vsa (= GND) is applied to the gate terminal of the transistor Tr13 via the transistor Tr11. One end side of the capacitor C s (connection point N 1 1). Further, the detection voltage Vdac applied to the data line Ld(j) is applied to the source terminal of the transistor Tr13 and the other end side (connection point N12) of the capacitor Cs via the transistor Tr12. In this manner, by applying a potential difference larger than the threshold voltage Vth of the transistor Tr13 to the gate and source terminals of the transistor Tr13 (i.e., both ends of the capacitor Cs), the transistor Tr13 is turned on. And the flow corresponds to the potential difference (gate, source-to-source voltage V gs ) of the drain current I d . At this time, since the potential of the source terminal of the transistor Tr 1 3 (detection voltage Vdac) is set lower than the potential of the 汲 terminal (ground potential GND), the drain current I d is from the power supply voltage line La The current flows through the transistor T r 1 3 , the connection point N12 'the transistor Tr1 2 and the data line Ld (j) toward the data driver 1 400. Further, by this, the both ends of the capacitor Cs connected between the gate and the source of the transistor Tr 13 are charged with a voltage corresponding to the potential difference based on the drain current Id. At this time, since a voltage lower than the voltage applied to the cathode (common electrode Ec) is applied to the anode of the organic electroluminescent element 〇EL (connection point N 1 2), the current does not flow to the organic electro-electrode The light-emitting element OEL does not perform a light-emitting operation. Next, during the detection voltage application period T,. The natural relaxation period Tm after the end of i is as shown in Fig. 12 of Fig. 10, and in the state where the pixel PIX is held in the selected state, the switching control signal S1 is supplied from the controller 1150 a. The switch SW1 of the data driver 140 performs an OFF operation, thereby separating the data line Ld(j) from the data driver 144 and stopping the output of the detection voltage Vdac from the DAC 42(j). Further, in the above-described detection voltage application period ΊΊ < η, the switches 1 SW2 and SW3 are turned off, the switch SW4 is set to be connected to the contact Nb, and the switch SW5 is set to be connected to the contact Nb. Thereby, because the transistors Tr1, Tr1 are kept in the on state, the pixel PIX (light-emitting drive circuit DC) maintains a state of being electrically connected to the data line Ld(j), but is applied to the data line Ld(j) by the truncation. The voltage is applied, so the other end side of the capacitor Cs (connection point N12) is set to a high impedance state. In the natural relaxation period T1 (n', the transistor Tr13 is kept in an ON state by the voltage 'charged to the capacitor Cs (between the gate and the source of the transistor Tr13) during the above-described detection voltage application period Ticn. The drain current Id continues to flow. -44 - 201113851 Then the potential of the source terminal side of the transistor T r 1 3 (connection point N丨2: the other end side of the capacitor Cs) gradually rises to near the threshold of the transistor Trl3値V V » Therefore, as shown in Fig. 9, the potential of the data line Ld(j) also changes to converge to the threshold voltage Vth of the transistor Tr13. In addition, during this natural mitigation period, η, because The potential of the anode (connection point Ν 12) of the organic electroluminescent element OEL is applied with a lower voltage than the voltage ELVSS (= GND) applied to the cathode (common electrode Ec), so current does not flow to the organic electroluminescent element. OEL, and does not perform the light-emitting operation. Next, during the data line voltage detection period T1()3, during the natural relaxation period Τ, 2, at the time point when the predetermined relaxation time t elapses, such as the first map, the first 1 3 shows 'keeping the pixel 于In the state of the selected state, the switch SW2 of the data driver 140 is turned on in accordance with the switching control signal S2 supplied from the controller 150a. At this time, the switches SW1 and SW3 are turned off, and the switch SW4 is set to and the contact Nb. Connected, the switch SW5 is set to be connected to the contact Nb. Thus, the ADC 43(j) connecting the data line Ld(j) and the DAC/ADC 144, during the natural mitigation period T1!)2, passes the predetermined mitigation time t. The data line voltage Vd is taken into the ADC 4 3 (j) via the switch SW2 and the buffer 45 (j). Here, the data line voltage Vd taken into the ADC 43(j) corresponds to the data line detection voltage Vmeas(t) shown by the above equation (11). Then, the data line detection voltage Vmeas(t) formed by the analog signal voltage taken in by the ADC 43(j) is converted into a digital data by the conversion of -45 - 201113851 in the ADC 43(j) according to the equation (14). The detection data nmsas(t) is held by the data latch 41 (j) via the switch SW5. Then, during the detection data transmission period μ, μ, as shown in Fig. 10 and Fig. 14, the pixel ΡΙΧ is set to the non-selected state. That is, the selection signal Sse 非 of the non-selected level (low level: Vgl) is applied to the selection line Ls from the selection driver 120. In this non-selected state, the switch SW5 provided to the input section of the data latch 41(j) of the data drive 140 is set to be connected to the contact Nc according to the switching control signals S4, S5 supplied from the controller 150a. The switch sw4 of the output section of the data latch 41 (j) is set to be connected to the contact Nb. Further, the switch SW3 is turned on in accordance with the switching control signal s3. At this time, the switches Swi and SW2 perform the OFF operation in accordance with the switching control signals SI and S2. Thus, the data latches 41 U of the adjacent rows are connected in series via the switches SW4, SW5 and are connected to the external controller 15〇3 via the switch SW3. Then, according to the data latch pulse signal LP supplied from the controller 150, the data of each row is latched 4丨(j+丨) (refer to FIG. 3) the detected data nm 〃 s (t) Transfer to the adjacent data latch 4 1 (j) in sequence. Therefore, the output data of the pixel Ρ χ χ 〃 ( t t t t t t t t t t t t t t t t t t t t t t t t t t t t t t t t t t t t t t t t t t The mode is stored in a predetermined memory area of the memory 155 provided in the controller 15A. Here, the amount of fluctuation of the threshold voltage Vth of the transistor Tr13 set by the light-emitting drive circuit DC of each pixel PIX varies depending on the driving time of each pixel ρι-46-201113851, the illuminating experience (lighting experience), and the like. The current amplification factor /5 is also because the pixel PIX has a deviation from the set 値, so the detection data nm.as(t) inherent to each pixel PIX in the memory 155. In the present embodiment, in the series of operations described above, the credit pressure detecting operation and the detected data sending operation are set to different mitigations t (= t0, t1, t2, and t3) to perform a plurality of times for each pixel PIX. . The operation of detecting the data line voltage at the different mitigation time t is as follows. The period of time during which the detection voltage is applied only once and the natural easing is continued is at a different timing t (duration time t=t0, tl, t2, t3). The data, the line detection operation and the detection data are sent out for a plurality of times, and the series of actions can be performed in a plurality of times, and the detection voltage is applied, the natural mitigation, the data line electrical measurement and the detection data are sent out. The characteristic parameters for the pixels PIX of the respective columns shown above are repeated as 'memorize the memory 155 of the controller 150a for the plurality of detection data nmeas(t) arranged for the full pixel PIX arranged on the display panel 110. Next, according to each The detection data of the pixel PIX, nm〃s(t), is performed to correct the correction data η of the threshold 値Vth of the transistor (driving transistor) Tr3 of each pixel PIX, and the correction of the current amplification factor/3 The calculation of the action. Specifically, as shown in Fig. 15, first, the correction data acquisition function circuit 156, which is provided in the controller, reads the detection data nmeas(t) corresponding to each pixel PIX of the cell 155. . For each image memory line, this time, in the middle, the voltage and the time pressure are detected by the voltage material △ 150a recalled -47- 201113851 and then 'in the correction data acquisition function circuit 1 5 6, according to the above use automatically The characteristic parameter obtaining operation of the zeroing method calculates the correction data nlh based on the equations (15) to (21) (specifically, the detection data ηTM (t.) and the bias voltage of the correction data nih are specified. (One Voffset = - 1/f xt 〇) and the correction data Δ /5. The calculated correction data n, h and △ are stored in the predetermined memory area of the memory 155 in a manner corresponding to each pixel PIX. Using the correction data nih and Δ/3, the correction data Δ 7 ? for correcting the variation in the luminous current efficiency of each pixel PIX is obtained. Fig. 16 is a timing chart showing the characteristic parameter obtaining operation of the display device of the present embodiment. (2) Fig. 17 is a functional block diagram showing the operation of generating image data for luminance measurement of the display device of the embodiment. Fig. 8 is a view showing the image for luminance measurement of the display device of the embodiment. data Fig. 19 is a view showing the operation of the light-emitting operation for luminance measurement of the display device of the present embodiment. Fig. 20 is a functional block diagram showing the correction data calculation operation of the present embodiment. Here, in the eighth and ninth drawings, as the configuration of the data driver 140, the shift register circuit 141 is omitted for display for convenience of illustration. The characteristic parameters of the present embodiment (correction data Δ々) The acquisition operation is set as shown in Fig. 16. It is set to include image data for luminance measurement which is generated by inputting the image data for luminance measurement corresponding to the pixel 各 of each column. • 48 - 201113851 Period Τ 2 < η In the light-emitting luminance measurement period for measuring the luminance of each pixel Τ IX IX 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及The light-emitting period T2〇2 includes the light-emitting luminance measurement period T203, and the light-emitting luminance measurement operation is performed in the luminance measurement light-emitting period Τ2()2. In the image data writing period Τ2 (n, the operation of generating the image data for luminance measurement and the image data for luminance measurement are performed in each pixel 。. The operation of generating the image data for luminance measurement is performed on the controller 丨5 0 a The correction data Δ obtained by the above-mentioned characteristic parameter acquisition operation is not corrected by nih to correct the predetermined luminance measurement digital data nd, and the luminance measurement video data nd_btl is generated. Specifically, as shown in FIG. 17, first The read data of each pixel memorized by the memory 155 of the controller i50a is read. Then, in the multiplication function circuit 153a, the digital data no' supplied from the outside of the controller l5a is subjected to the multiplication processing of the read correction data Δ. Then, based on the equations (1 8) and (19), the detection data ηηι (t.) and the bias voltage (-V 〇 ffset) of the predetermined correction data nth memorized by the memory 155 are read. = - 1 / (Mans X t 〇)). Then, in the addition function circuit 154a', the multiplied digital data (nlhx Δ) is subjected to the addition processing of the read detection data nm (1) and the offset voltage (a Voffset). By performing the above correction processing, -49-201113851, the luminance measurement image data nd_bf is generated and supplied to the data drive! ^ @ 140 〇 ' 'The brightness measurement image data is written to each pixel PIX and the detection voltage application operation (detection voltage application period .T1(n)_), the pixel to be writtenΡΙΧ When the state is set to the selected state, the grayscale voltage Vbri for luminance measurement according to the luminance measurement video data ~1 1 "d _ brt is written via the data line Ld(j). Specifically, as shown in Fig. 16. As shown in Fig. 18, first, a selection signal Ssel of a selected level (high level: Vgh) is applied to the selection line Ls to which the pixel PIX is connected, and a low level is applied to the power line La (non-light emission level: DVSS). = power supply voltage Vsa of the ground potential GND). In this state, the switch SW1 is turned on, and the switches SW4 and SW5 are set to be connected to the contact Nb, whereby the brightness supplied from the controller i5〇a is supplied. The measurement image data nd_bM is sequentially taken into the data register circuit 142' and held by the data latch 41(j) corresponding to each row. The held image data ni - bM is analog-like converted by the DAC 42(j), and The data line Ld(j) applied to each row is taken as The gray scale voltage Vbr1 for the measurement is used. The gray scale voltage V b μ for the luminance measurement is set to a voltage 满足 satisfying the condition of the equation (2 2) as described above. Thus, the light-emitting drive circuit constituting the pixel ΡΙΧ In the DC, a low-level power supply voltage Vsa (= GND) is applied to the gate terminal of the transistor Tr13 and one end side (connection point Nil) of the capacitor Cs, and the source terminal of the transistor Tr13 and the other end of the capacitor Cs are applied. The luminance measurement gray scale voltage VbM is applied to the side (connection point N12). -50- 201113851 • Therefore, the potential difference generated between the gate and the source terminal of the transistor Tr 1 3 (gate, source-to-source voltage Vgs) The drain current Id flows, and charges both ends of the capacitor Cs with the light-emission voltage V brt ) corresponding to the potential difference according to the drain current Id. At this time, because of the anode of the organic electroluminescent element OEL (connection point) N 12) Since a lower voltage is applied than the cathode (common electrode Ec), the organic electroluminescent element OEL does not flow a current, and does not perform a light-emitting operation. Next, in the luminance measurement light-emitting period T2〇2, as in the first Figure 6 shows The pixel ΡΙΧ of the column is set to the non-selected state, and each pixel ΡΙΧ is simultaneously illuminated. Specifically, as shown in FIG. 19, the selection line Ls connected to the entire pixel 排列 arranged on the display panel 110 is not applied. The selection signal Ssel of the level (low level: Vgl) is selected, and the power supply voltage Vsa of the high level (light emission level: ELVDD > GND) is applied to the power supply line La. Therefore, the light is supplied to the light-emitting drive circuit DC of each pixel ΡΙΧ. The crystal Trll' Trl2 performs a turn-off operation while remaining charged to the light-emitting voltage of the capacitor Cs connected between the gate and the source of the transistor Tr13. Therefore, the gate voltage and the inter-source voltage V gs 'the transistor τ r 1 3 of the transistor T r 1 3 are held by the light-emission voltage (=Vbrt) charged to the capacitor Cs to conduct the conduction operation and the drain current Id flows. The potential of the source terminal (connection point N12) of the crystal Tr 1 3 rises. Then, the potential of the source terminal (connection point N12) of the transistor Tr13 is raised to a cathode which is applied to the organic electroluminescent element 〇EL (common electrode -51 - 201113851)
Ec)的電壓ELVSS( = GND)更高,而對有機電致發光元件 施加順向偏壓。因而,發光驅動電流Iem從電源線La 電晶體Trl3、連接點N12及有機電致發光元件〇EL, 用電極Ec方向流動,而有機電致發光元件〇EL進行發 作。此發光驅動電流I e m係根據在該亮度測量用影像 的寫入動作中被寫入像素PIX且被保持於電晶體Tr 閘極、源極間的電容器Cs之發光電壓(= Vbrt)的電 而規定,所以有機電致發光元件OEL以因應亮度測量 像資料的亮度灰階進行發光動作。 在此,亮度測量用影像資料nch係在上述的特性 取得動作中,根據以對應於各像素的方式取得之修正 △ /3、nih,來實施電流放大率/3之偏差修正及驅動電 之臨限値電壓Vth的變動修正。 因此,藉由將同一亮度灰階値的亮度測量用影像 nch寫入各像素PIX,使得從各像素Ρίχ的發光驅動 DC流通於有機電致發光元件〇EL之發光驅動電流Iem 流値不會受到電流放大率/3之偏差或驅動電晶體之臨 電壓Vth之變動的影響,而被設定成大致定値》 接著,在亮度測量用發光期間Τ2<π中所設定之發 度測量期間Τ2β3,執行各像素ΡΙΧ之發光亮度的測量圍 及用以修正各像素ΡΙΧ之發光電流效率之修正資料 的算出動作。 OEL 經由 沿共 光動 資料 13之 壓値 用影 參數 資料 晶體 資料 電路 的電 限値 光亮 )作、 Δ η -52- 201113851 • 發光亮度的測量動作係如第16圖、第20圖所示,在 顯示面板110的各像素PIX中,設定成電流値大致相同的 發光驅動電流Iem流通於有機電致發光元件OEL,在使各 像素PIX的有機電致發光元件0EL進行發光動作之狀態, 利用設置於顯示面板1 1 〇之射出面側的亮度計或C C D相機 160 ’測量各像素ριχ的發光亮度lv作爲數位資料。將所 測量的發光亮度L v傳送到控制器1 5 0 a的修正資料取得功 能電路1 5 6。 修正資料△ 的算出動作,係首先在設置於控制器 1 5 0 a的修正資料取得功能電路丨5 6中,根據該第(2 3)式、 第(24)式算出修正資料△ π ’進而算出對修正資料△ ^加 上上述之修正資料的修正資料,。在此,該第(23) 式所示之修正資料△ D的運算處理係根據和該第(23)式所 示之修正資料的運算處理相同的順序執行。所算出之 修正資料△冷,係和上述的檢測資料n_as(t)或修正資料n,h 一樣’以對應於各像素PIX的方式被記憶於記憶體丨5 5的 既定記憶區域。 (顯示動作) 其次’說明本實施形態之顯示裝置的顯示動作(發光動 作)。 在顯示裝置的發光動作,使用該修正資料ηι|ι、Λ/3);, 來修正影像資料,使各像素ρ 1 χ以所要之亮度灰階進行發 光動作。 -53- 201113851 第21圖係表示本實施形態之顯示裝置之發光動作的 時序圖。 第22圖係表示本實施形態之顯示裝置之影像資料之 修正動作的功能方塊圖。 第2 3圖係表示本實施形態之顯示裝置之修正後之影 像資料之寫入動作的動作示意圖。 第24圖係表示本實施形態之顯示裝置之發光動作的 動作示意圖。 在此,在第23圖、第24圖,作爲資料驅動器140之 構成,爲了便於圖示,而省略移位暫存器電路141的圖示。 在本實施形態的顯示動作如第21圖所示,被設定成包 含以對應於各列之像素PIX的方式產生所要的影像資料並 寫入的影像資料寫入期間T3(H、及以因應該影像資料的亮 度灰階使各像素PIX進行發光動作的像素發光期間Τη:。 在影像資料寫入期間Τ3(Η,執行修正影像資料的產生 動作、及修正影像資料寫入各像素ΡΙΧ的動作。 修正影像資料的產生動作係在控制器1 50a中,對於由 數位資料構成之既定的影像資料nd,使用藉上述特性參數 取得動作所取得之修正資料△ 0、△ 7?及nih來進行修正, 並將已進行修正處理的影像資料(修正影像資料)nd_ump供 給至資料驅動器140 »The voltage ELVSS (= GND) of Ec) is higher, and the organic electroluminescent element is applied with a forward bias. Therefore, the light-emission drive current Iem flows from the power source line La transistor Tr13, the connection point N12, and the organic electroluminescent element 〇EL in the direction of the electrode Ec, and the organic electroluminescent element 〇EL is emitted. The light-emission drive current Iem is based on the electric power of the light-emitting voltage (=Vbrt) of the capacitor Cs that is written in the pixel PIX and held between the gate and the source of the transistor Tr in the address operation of the luminance measurement image. It is prescribed that the organic electroluminescent element OEL performs a light-emitting operation in accordance with the luminance gray scale of the image measurement in response to the luminance. Here, the luminance measurement video data nch is subjected to the above-described characteristic acquisition operation, and the correction of the current amplification factor/3 is performed based on the correction Δ /3, nih obtained so as to correspond to each pixel. The variation of the limit voltage Vth is corrected. Therefore, by writing the luminance measurement image nch of the same luminance gray scale 写入 to each pixel PIX, the light-emission drive current Iem flowing from the light-emitting drive DC of each pixel 于EL to the organic electroluminescence element 〇EL is not subjected to flow. The influence of the variation of the current amplification factor /3 or the fluctuation of the voltage Vth of the driving transistor is set to be substantially constant. Next, in the luminance measurement period Τ2 < π, the fluctuation measurement period Τ2β3 is executed. The measurement range of the luminance of the pixel 及 and the calculation operation of the correction data for correcting the luminous current efficiency of each pixel 。. The OEL is made by the electric limit of the crystal data circuit of the image data of the common optical data 13 , Δ η -52- 201113851 • The measurement action of the illuminance is as shown in Fig. 16 and Fig. 20, In each of the pixels PIX of the display panel 110, the light-emission drive current Iem set to have substantially the same current 流通 flows through the organic electroluminescent element OEL, and the organic electroluminescent element 0EL of each pixel PIX is illuminated. The luminance meter lv of each pixel ρι is measured as a digital data by a luminance meter or a CCD camera 160' on the emission surface side of the display panel 1 1 . The measured light-emission luminance L v is transmitted to the correction data acquisition function circuit 156 of the controller 150a. The correction data Δ is calculated by first calculating the correction data Δ π ' based on the equations (2 3) and (24) in the correction data acquisition function circuit 丨 56 provided in the controller 150a. Correction data for the correction data △ ^ plus the above-mentioned correction data is calculated. Here, the arithmetic processing of the correction data ΔD shown in the above formula (23) is executed in the same order as the arithmetic processing of the correction data shown in the equation (23). The calculated correction data Δ is cold, and is stored in the predetermined memory area of the memory 丨5 5 in a manner corresponding to each pixel PIX in the same manner as the above-described detection data n_as(t) or correction data n, h. (Display Operation) Next, the display operation (light-emitting operation) of the display device of the present embodiment will be described. In the light-emitting operation of the display device, the correction data ηι|ι, Λ/3); is used to correct the image data so that each pixel ρ 1 发 emits light at a desired gray level. -53-201113851 Fig. 21 is a timing chart showing the light-emitting operation of the display device of the embodiment. Fig. 22 is a functional block diagram showing the correction operation of the image data of the display device of the embodiment. Fig. 2 is a view showing the operation of the operation of writing the corrected image data of the display device of the embodiment. Fig. 24 is a view showing the operation of the light-emitting operation of the display device of the embodiment. Here, in the 23rd and 24th drawings, as the configuration of the data driver 140, the illustration of the shift register circuit 141 is omitted for convenience of illustration. As shown in FIG. 21, the display operation of the present embodiment is set to include the image data writing period T3 (H, and the corresponding image data) which are generated by writing the desired image data so as to correspond to the pixels PIX of the respective columns. The luminance gray scale of the video data causes the pixel light-emitting period Τn of the light-emitting operation of each pixel PIX. During the image data writing period Τ3 (Η, the operation of generating the corrected image data and correcting the operation of the image data to be written into each pixel 。 are performed. The correction image data generation operation is performed by the controller 150a, and the predetermined image data nd composed of the digital data is corrected by using the correction data Δ0, Δ7?, and nih obtained by the above-described characteristic parameter acquisition operation. And the image data (corrected image data) nd_ump that has been corrected is supplied to the data driver 140 »
具體而言,如第22圖所示,在電壓振幅設定功能電路 152a中,對於從控制器150a之外部所供給之包含有RGB -54- 201113851 各色之亮度灰階値的影像資料(第2影像資料)nd,藉由參照 參照表151 ’來設定對應於RGB各色成分的電壓振幅。 接著’讀出記憶體1 55所記憶之各像素的修正資料△ /5〃 ’在乘法功能電路153a中對已設定電壓的影像資料 no’進行所讀出之修正資料,的乘法處理。 然後’讀出記憶體1 5 5所記憶之規定修正資料n,h的檢 測資料nm…(t。)及偏置電壓(—v〇ffset = — 1/( f xt。))’在加法 功能電路154a中對該已進行乘法處理的數位資料(ndX△冷 ”)’進行所讀出之檢測資料…⑴及偏置電壓(-Voffset) 的加法處理》 藉由執行以上一連串的修正處理,而產生修正影像資 料心/。·^,並供給至資料驅動器14〇。 又’修正影像資料寫入各像素ΡΙχ的動作,係在將成 爲寫入對象的像素ΡΙΧ設定成選擇狀態之狀態,經由資料 線Ld(j)寫入因應該修正影像資料nd,mp的灰階電壓Vdata。 具體而言,如第21圖、第23圖所示,首先,對連接 有像素PIX的選擇線Ls,施加選擇位準(高位準:Vgh)的選 擇信號Ssel ’並且對電漉線La施加低位準(非發光位準: DVSS =接地電位GND)的電源電壓Vsa。 在此選擇狀態’使開關S w 1進行導通動作,而將開關 SW4及SW5設定成和接點Nb連接,藉此,將從控制器15〇a 所供給之修正影像資料心〃。^依序取入資料暫存器電路 142 ’並由對應於各行的資料閂鎖41(j)保持。 -55- 201113851 所保持的影像資料ndwnp由DAC42(j)進行類比轉換’ 並施加於各行的資料線Ld(j)作爲灰階電壓(第3電 壓)Vdata。在此’灰階電壓Vdata係根據該第(14)式所示的 定義’被設定成如下的第(25)式。Specifically, as shown in FIG. 22, in the voltage amplitude setting function circuit 152a, the image data (second image) including the RGB-54-201113851 color gradation 供给 supplied from the outside of the controller 150a is provided. The data nd sets the voltage amplitude corresponding to each color component of RGB by referring to the reference table 151'. Then, the correction data Δ /5 〃 ' of each pixel stored in the memory 1 55 is read by the multiplication function 153a by multiplying the read correction data for the image data no' of the set voltage. Then 'read the memory of the specified correction data n, h, the detection data nm...(t.) and the bias voltage (-v〇ffset = - 1/( f xt.))' in the addition function In the circuit 154a, the read data ((1) and the offset voltage (-Voffset) are processed by the multiplied digital data (ndX Δ cold))' by performing the above-described series of correction processing. The corrected image data heart/.·^ is generated and supplied to the data driver 14〇. Further, the operation of correcting the image data to be written into each pixel is set to a state in which the pixel to be written is set to the selected state, and the data is transmitted. The line Ld(j) is written to correct the gray scale voltage Vdata of the image data nd, mp. Specifically, as shown in Fig. 21 and Fig. 23, first, the selection line Ls to which the pixel PIX is connected is applied. The selection signal Ssel' of the level (high level: Vgh) and the power supply voltage Vsa of the low level (non-lighting level: DVSS = ground potential GND) is applied to the power line La. Here, the state 'selects the switch S w 1 Turn on the action, and switch SW4 and SW5 It is set to be connected to the contact point Nb, whereby the corrected image data supplied from the controller 15A is sequentially taken into the data register circuit 142' and by the data latch 41 corresponding to each line ( j) Keep. -55- 201113851 The image data held by ndwnp is analogically converted by DAC42(j) and applied to the data line Ld(j) of each row as the grayscale voltage (third voltage) Vdata. The voltage Vdata is set to the following equation (25) according to the definition 'of the formula (14).
Vdata = Vx-AV(nd comp-i)) -(25) 因而’在構成像素PIX的發光驅動電路DC,對電晶體 Trl3的閘極端子及電容器Cs的—端側(連接點N1丨)施加低 位準的電源電壓Vsa( = GND),並對電晶體Trl3的源極端子 及電容器Cs的另一端側(連接點N1 2)施加對應於該修正影 像資料nd_e〇mp的灰階電壓Vdata。 因此,因應電晶體Tr 1 3之閘極 '源極端子間所產生之 電位差(閘極 '源極間電壓Vgs)的汲極電流Id流動,而以 與根據該汲極電流Id之電位差對應的發光電壓(=Vdata)對 電容器Cs的兩端充電。此時,因爲對有機電致發光元件 0EL的陽極(連接點N12)施加比陰極(共用電極ec)更低的電 壓’所以有機電致發光元件OEL不會流通電流,而不會進 行發光動作。 接著’在像素發光期間ΊΊμ如第2 1圖所示,在將各列 的像素PIX設定成非選擇狀態之狀態,使各像素同時 進行發光動作。 -56- 201113851 • 具體而言’如第24圖所示,對排列於顯示面板110之 全像素PIX所連接的選擇線Ls施加非選擇位準(低位準: Vgl)的選擇信號Ssel,並對電源線La施加高位準(發光位 準:ELVDD>GND)的電源電壓Vsa。 因而,設置於各像素PIX的發光驅動電路DC之電晶 體Tr 11、Tr 12進行截止(0ff)動作,而保持被充電至連接 在電晶體Tr 13之閘極、源極間之電容器Cs的發光電壓 (=V d a t a :閘極、源極間電壓V g s)。 因此,當汲極電流Id流動於電晶體Tr 1 3,而電晶體 Trl3之源極端子(連接點N12)的電位上昇至比被施加於有 機電致發光元件0EL之陰極(共用電極Ec)的電源電壓 ELVSS( = GND)更高時,發光驅動電流lem從發光驅動電路 DC流動於有機電致發光元件〇EL,使有機電致發光元件 0EL進行發光動作。因爲此發光驅動電流iein係根據在該 修正影像資料的寫入動作電晶體Tr 1 3之閘極、源極間所保 持之發光電壓( = V.data)的電壓値而規定,所以有機電致發光 元件0EL以因應亮度測量用影像資料的亮度灰階進 行發光動作。 此外’在上述的實施形態,如第1 6圖、第2 1圖所示, 於用以取得修正資料△ 7?的動作及顯示動作中,在亮度測 量用影像資料或修正影像資料寫入特定列(例如第1列)之 像素PIX的動作結束後,至影像資料寫入其他的列(第2列 以後)之像素Ρίχ的動作結束爲止之期間,該列之像素ΡΙχ 被設定成保持狀態。 -57- 201113851 在此’在保持狀態,對該列的選擇線Ls施加非選擇位 準的選擇信號Ssel,而將像素ρίχ設爲非選擇狀態,並對 電源線La施加非發光位準的電源電壓Vsa,而設定成非發 光狀態。 如第16圖、第21圖所示,此保持狀態的設定時間係 依各列而異。 又’在亮度測量用影像資料或修正影像資料寫入各列 之像素PIX的動作結束後,馬上進行使像素PIX進行發光 動作之驅動控制的情況,亦可爲不設定該保持狀態。 如上所述,在本實施形態的顯示裝置(包含有像素驅動 裝置的發光裝置)及發光裝置之驅動控制方法中,具有將特 有的自動歸零法應用於本發明,並在相異的時序(緩和時間) 對取入資料線電壓,並轉換成由數位資料所構成的檢測資 料之一連串之特性參數取得動作執行複數次的手法。 因而,依據本實施形態,可取得修正各像素之驅動電 晶體之臨限値電壓的變動及各像素之電流放大率之偏差的 參數並記億。因此,依據本實施形態,因爲可對寫入各像 素的影像資料施加用以補償各像素之臨限値電壓的變動及 電流放大率之偏差的修正處理,所以不管各像素之特性變 化或特性之偏差的狀態爲何,都可使發光元件(有機電致發 光元件)以因應影像資料之本來的亮度灰階進行發光動 作,而可實現具有良好之發光特性及均勻之畫質的主動有 機電致發光驅動系統。 -58- 201113851 * 進而,在上述的本實施形態,具有在設定成均勻之發 光驅動電流流動於各像素的狀態,測量各像素之發光亮度 的手法。因而,若依據本實施形態,可取得修正各像素間 之發光電流效率之偏差的參數,並取得對該各像素間之電 流放大率之偏差修正相關的參數加上發光電流效率之偏差 修正相關之參數的修正資料並記憶。 因此,若依據本實施形態,因爲可對寫入各像素之影 像資料施加進行各像素之臨限値電壓之變動及電流放大率 與發光電流效率之偏差補償的修正處理,所以不管各像素 之特性變化或特性之偏差的狀態爲何,都可使發光元件(有 機電致發光元件)以因應影像資料之本來的亮度灰階進行 發光動作。 又’因而,因爲可利用具備單一修正資料取得功能電 路156的控制器150a之一連串的順序,執行算出用以修正 包含有發光電流效率之電流放大率之偏差之修正資料的處 理、及算出用以補償驅動電晶體之臨限値電壓之變動之修 正資料的處理,所以不必因應修正資料之算出處理的內容 而設置個別之構成(功能電路),而可簡化顯示裝置(發光裝 置)的裝置規模。 <第2實施形態> 在該第1實施形態中,說明針對藉由在影像資料寫入 期間對像素PIX的寫入動作而對連接在驅動電晶體之閘 極、源極端子間的電容器Cs進行充電之發光電壓的電壓 値,在寫入期間及發光期間不變的情況。 -59- 201113851 可是,發光電壓的電壓値實際上會因附加於驅動電晶 體之電容器Cs以外之各種寄生電容(電容成分)所引起的電 容耦合,而受到各信號線之電壓變化的影響。因而,發光 電壓的電壓値在寫入期間及發光期間變動。 第2實施形態係除了在該第1實施形態之構成以外, 還具備用以修正這種由附加於驅動電晶體之寄生電容(電 容成分)的電容値所引起之發光電壓之變動的構成。 此外,對和在該第1實施形態之構成相同的構成,附 加相同的符號,而簡化或省略其說明。 本實施形態的顯示裝置係大致具備和該第1實施形態 的顯示裝置100相同的構成,具有:具有和第1實施形態 相同之構成的顯示面板11 0、選擇驅動器1 20、電源驅動器 130及資料驅動器140。又,排列於顯示面板110的像素PIX 亦具有和第1實施形態相同的構成。 而控制器1 5 Ob之構成,部分與第1實施形態的控制器 1 5 0a相異。以下,主要說明和第1實施形態的相異點。 第2 5圖係表示應用於本實施形態之顯示裝置之控制 器之功能的功能方塊圖。 本實施形態的控制器(影像資料修正電路)1 5 Ob係如第 25圖所示,大致具有:具備參照表(LUT :固有參數設定電 路)1 5 1的電壓振幅設定功能電路(影像資料修正電 路)152b '乘法功能電路(影像資料修正電路)153b、157a、 15 7b、加法功能電路(影像資料修正電路)1 54b、記憶體(記 -60- 201113851 憶電路)1 5 5、修正資料取得功能電路(特性參數取 路)156及K參數設定電路(固有參數設定電路)158。 第25圖之構成,相對於該第1實施形態之第5圖 成,更具備乘法功能電路(影像資料修正電路)157 a、 及K參數設定電路(固有參數設定電路)158。 又,電壓振幅設定功能電路152b、乘法功能電路 及加法功能電路1 54b之功能,部分與第1實施形態之 振幅設定功能電路1 5 2 a、乘法功能電路1 5 3 a及加法功 路1 5 4 a之功能相異。 電壓振幅設定功能電路1 5 2b係藉由對從外部供給 位資料所構成的影像資料,參照參照表1 5 1,而轉換對 紅(R)、綠(G)、藍(B)各色的電壓振幅。藉電壓振幅設 能電路15 2b轉換後之影像資料之電壓振幅的最大値, 定成從在上述之DAC42之輸入範圍的最大値減去根據 素之特性參數之修正量的値以下。在此,由電壓振幅 功能電路1 5 2b所參照之參照表1 5 1如後述所示,以修 設置於各像素PIX之驅動電晶體所附加的寄生電容(電 分)所引起之發光電壓之變動的方式預設轉換表(r表) 外,關於設定在參照表1 5 1之轉換表,將於後詳述。 又,電壓振幅設定功能電路152b具有直接輸出所 之數位資料的直通功能或迂迴路徑。而且,在應用後 自動歸零法的特性參數取得動作時,所輸入之數位資 設定成不進行使用參照表151之電壓振幅的轉換處理 直接輸出。 得電 的構 157b 153b 電壓 能電 之數 應於 定功 被設 各像 設定 正在 容成 。此 輸入 述之 料被 ,而 -61 - 201113851 乘法功能電路1 5 3b係對影像資料乘以根 PIX之特性變化相關的檢測資料而取得之電流 修正資料△/?、或包含有根據對各像素ρΐχ所 度資料之電流放大率/3的修正資料△ /3 ,、及用 附加於各像素ΡΙΧ之驅動電晶體的寄生電容所 電壓Vel之變動的參數Κ。 乘法功能電路157a對與各像素ριχ之特性 檢測資料乘以用以修正各像素ΡΙχ的有機電 OEL之發光電壓vel的變動之參數Κ。 乘法功能電路157b對根據與各像素PIX之 關的檢測資料而取得之驅動電晶體之臨限値電 償電壓成分(偏置電壓)乘以各像素ΡΙχ的參數 加法功能電路154b對在該乘法功能電路 修正資料或,的影像資料,加上在該乘 157a、157b中乘以參數K之與各像素PIX之特 的檢測資料及臨限値電壓V t h的補償電壓成女 並修正。然後,將該已修正的影像資料作爲修 並供給至資料驅動器140。 記憶體1 5 5係將從上述資料驅動器丨4 〇送 PIX的檢測資料、在修正資料取得功能電路} 56 正資料對應於各像素PIX而記憶。 在該加法功能電路154b之加法處理時及在 得功能電路1 5 6之修正資料取得處理時’該加 據與各像素 放大率/3的 檢測出的亮 以修正根據 定義之發光 變化相關的 致發光元件 特性變化相 壓Vth的補 K ° 153b中乘以 法功能電路 性變化相關 卜(偏置電壓) 正影像資料 出之各像素 中取得之修 修正資料取 法功能電路 -62- 201113851 154b及修正資料取得功能賴156從記憶體i55讀出檢測 資料。 K參數设定電路158對用以修正因設置於各像素ριχ 之驅動電晶體所附加的寄生電容(電容成分)所引起之發光 電壓之變動的參數κ,因應控制器150b的動作狀態而設定 既定常數。 κ參數設定電路158在應用後述之自動歸零法的特性 參數取得動作時,將參數κ設定成1〇。因而,在乘法功能 電路153b及加法功能電路i54b中,在實質上不添加藉參 數K之修正的狀態’對影像資料(或數位資料)執行乘法修 正或加法修正。 又’ K參數設定電路]5 8在進行根據影像資料之影像 資訊的顯示動作時,將參數K設定成例如1.1。因而,在乘 法功能電路153b及加法功能電路154b中,對影像資料(或 數位資料)執行加上該寄生電容之影響的乘法修正或加法 修正。 在此,由K參數設定電路158所設定之參數K的値, 係可在顯示面板1 1 0或各像素PIX的設計階段,根據附加 於驅動電晶體之寄生電容的電容値而預先算出,並被設定 成因應控制器150b的動作狀態而適當切換。此外,關於參 數K的算出方法將於後闡述。 此外,在第5圖所示的控制器150b中,修正資料取得 功能電路156亦可是設置於控制器150b之外部的運算裝 置。 -63- 201113851 又’在第5圖所示的控制器150b中,記憶體155只要 是記憶有與各像素PIX相關的檢測資料及修正資料者,亦 可爲個別的記憶體。 又,這些記憶體1 5 5亦可是設置於控制器1 5 〇b之外部 的記憶裝置。 又’供給至控制器1 5 Ob之影像資料係例如從影像信號 抽出亮度灰階信號成分,並按顯示裝置100的每一列份, 形成該亮度灰階信號成分作爲由數位信號構成之串列資 料。 其次,說明在具有和該第6圖所示者相同構成之發光 驅動電路DC的像素PIX中,於寫入影像資料後,在使有 機電致發光元件0EL發光時之有機電致發光元件〇EL的陽 極、陰極間電壓(有機電致發光元件0EL的兩端電壓:發光 電壓Vel)、和從發光驅動電路DC流動於有機電致發光元 件OEL之電流(發光驅動電流Iel)的關係。 第26圖係表示應用本實施形態的發光驅動電路之像 素的有機電致發光元件在發光時的動作狀態圖。 第27圖係表示本實施形態之像素在發光動作時之有 機電致發光元件之發光電壓和發光驅動電流之關係的特性 圖。 在本實施形態之像素PIX之有機電致發光元件OEL的 發光動作中,如第26圖所示,藉由從選擇驅動器120經由 選擇線Ls施加非選擇位準(低位準:Vgl)的選擇信號Ssel, 而將像素PIX設定成非選擇狀態。 -64- 201113851 此時’藉由發光驅動電路DC的電晶體Tr丨丨、Tr 1 2進 行截止(off)動作’而電晶體Trl3之閘極、汲極端子間被電 性截斷,同時源極端子(連接點N 1 2)與資料線Ld被電性截 又’在此非選擇狀態’從電源驅動器丨3 〇經由電源線 La對像素PIX施加發光位準的電源電壓Vsa( = ELVDD)e 因而,保持自上述之影像資料(灰階電壓Vdata)的寫入 充電至電容器Cs的電壓(電晶體Trl3的閛極、源極間電壓 Vgs),而且對電晶體Tr 13的汲極端子(連接點N13)施加比 源極端子(連接點N12)更高電位的電源電壓ELVDD。 因此,如第26圖所示,因應於晶體Tr 13之閘極、源 極間電壓V g s的發光驅動電流I e 1從電源驅動器1 3 〇經由電 源線La、電晶體Trl3流動於有機電致發光元件〇EL。 就此情況之像素PIX(發光驅動電路DC及有機電致發 光元件0EL)的電路特性進行驗證。 在和上述之第7圖所示的構成一樣之影像資料(灰階電 壓)的寫入動作時,根據發光驅動電路DC之連接點N 1 1 -N12間的電壓(即,電晶體Trl3的閘極、源極間電壓Vgs、 電容器Cs的兩端電壓),決定在電晶體Tr的汲極、源極間 流動之汲極電流(即寫入電流)Id的電流値。理想的情況 爲’此連接點N 1 1 - N 1 2間的電壓即使在寫入動作結束後的 發光動作時,亦依然由電容器Cs所保持。 -65- 201113851 可是’在應用本實施形態之發光驅動電路DC的像素 PIX中,係以在從寫入動作轉移至發光動作時,施加至選 擇線Ls之選擇信號Ssel的電位或施加至電源線La之電源 電壓Vsa的電位改變的方式進行驅動控制。即,選擇信號 Ssel的電位從Vgh變化成Vgl,而電源電壓Vsa的電位從 DVSS 變化成 ELVDD。 因而’連接點N 1 1 - N 1 2間的電壓會因經由位於發光驅 動電路DC內之寄生電容的電容耦合,而受到這些電位變 化的影響。 又,在本實施形態之像素PIX(發光驅動電路DC)中, 在從寫入動作轉移至發光動作時,電晶體Trl2進行截止動 作,而截斷灰階電壓Vdata對連接點N12(電晶體Trl3之源 極端子)的施加。 進而,在發光動作時發光驅動電流Iel經由連接點N12 流動於有機電致發光元件OEL流動。因而,連接點N12的 電位變動時,連接點N 1 1 - N 1 2間的電壓亦受到連接點N 1 2 之電位變動的影響。 這種電晶體Tr 13之閘極、源極間電壓Vgs(連接點Nil -N 1 2間之電壓)的變動意指使經由電晶體Tr 1 3之汲極、源 極間流動於有機電致發光元件OEL的發光驅動電流Iel變 動。換言之,意指發光驅動電流Iel的電流値有受到與連接 點N12的電位相關聯之有機電致發光元件OEL之兩端電壓 (發光電壓Vel)的値影響的情況。 -66- 201113851 此外,在發光驅動電路DC中,即使在發光 接點N12的電位發生變動的情況,電晶體Trl 3之 極間電壓Vgs(連接點N1 1 — N12間之電壓)亦未必 上述之電晶體Trl3之閘極、源極間電壓Vgs的變 受到附加於連接點Nil (閘極端子)之寄生電容之| 會受到有機電致發光元件OEL之兩端電壓Ve)的 此外,本實施形態的發光驅動電路DC不是 上在發光動作時電晶體Tr 1 3之閘極 '源極間電壓 點N 1 1 - N 1 2間之電壓)變化的驅動控制方法。 在此,根據如上述所示的狀況,說明流動於 發光元件OEL的發光驅動電流Iel依存於有機電 件OEL之發光電壓Vel時的修正方法。 首先,將表示使電晶體Tr 1 3之閘極、源極澤 變動之寄生電容的影響之參數(各像素固有的參! 成如下的第(22)式。 Σ^ΝΙΙ-χ Κ:=^- ,Vdata = Vx-AV(nd comp-i)) - (25) Therefore, the light-emitting drive circuit DC constituting the pixel PIX is applied to the gate terminal of the transistor Tr13 and the terminal end (connection point N1 丨) of the capacitor Cs. The low-level power supply voltage Vsa (= GND) applies a gray-scale voltage Vdata corresponding to the corrected image data nd_e〇mp to the source terminal of the transistor Tr13 and the other end side of the capacitor Cs (connection point N1 2). Therefore, the drain current Id of the potential difference (gate-source-to-source voltage Vgs) generated between the gate 'source terminals of the transistor Tr 1 3 flows, and corresponds to the potential difference according to the gate current Id. The light-emitting voltage (=Vdata) charges both ends of the capacitor Cs. At this time, since a lower voltage than the cathode (common electrode ec) is applied to the anode (connection point N12) of the organic electroluminescent element 0EL, the organic electroluminescent element OEL does not flow a current, and does not perform a light-emitting operation. Then, in the pixel light-emitting period ΊΊμ, as shown in Fig. 2, the pixels PIX of the respective columns are set to a non-selected state, and each pixel is simultaneously illuminated. -56- 201113851 • Specifically, as shown in Fig. 24, a selection signal Ssel of a non-selected level (low level: Vgl) is applied to the selection line Ls connected to the full pixel PIX of the display panel 110, and The power supply line La applies a power supply voltage Vsa of a high level (light emission level: ELVDD > GND). Therefore, the transistors Tr 11 and Tr 12 provided in the light-emitting drive circuit DC of each pixel PIX are turned off (OFF) to maintain the light-emission to the capacitor Cs connected between the gate and the source of the transistor Tr 13 . Voltage (=V data: gate voltage, source-to-source voltage V gs). Therefore, when the drain current Id flows to the transistor Tr1 3, the potential of the source terminal (connection point N12) of the transistor Tr13 rises to be higher than that of the cathode (common electrode Ec) applied to the organic electroluminescent element 0EL. When the power supply voltage ELVSS (= GND) is higher, the light-emission drive current lem flows from the light-emitting drive circuit DC to the organic electroluminescent element 〇EL, and the organic electroluminescence element 0EL emits light. Since the illuminating drive current iein is defined based on the voltage 发光 of the illuminating voltage (=V.data) held between the gate and the source of the write operation transistor Tr 13 of the corrected image data, the organic electro The light-emitting element 0EL emits light in response to the luminance gray scale of the image data for luminance measurement. Further, in the above-described embodiment, as shown in FIGS. 16 and 2, in the operation and display operation for acquiring the correction data Δ7?, the brightness measurement video data or the corrected image data is written in the specific After the operation of the pixel PIX of the column (for example, the first column) is completed, the pixel 该 of the column is set to the hold state until the operation of the pixel 写入ίχ in which the image data is written in another column (the second column or later) is completed. -57- 201113851 Here, in the hold state, the selection signal Ssel of the non-selected level is applied to the selection line Ls of the column, and the pixel ρίχ is set to the non-selected state, and the power supply line La is applied with a non-light-emitting level. The voltage Vsa is set to a non-lighting state. As shown in Fig. 16 and Fig. 21, the set time of this hold state varies depending on each column. Further, after the operation of writing the brightness measurement image data or the corrected image data to the pixels PIX of the respective columns is completed, the driving control for causing the pixel PIX to emit the light is performed immediately, and the holding state may not be set. As described above, in the display device (the light-emitting device including the pixel driving device) and the driving control method of the light-emitting device of the present embodiment, the unique auto-zeroing method is applied to the present invention at different timings ( The mitigation time is a method of taking a plurality of times of the characteristic parameters of the data line which is taken into the data line and converted into a test data composed of the digital data. Therefore, according to the present embodiment, it is possible to obtain a parameter for correcting the variation of the threshold voltage of the driving transistor of each pixel and the variation of the current amplification factor of each pixel. Therefore, according to the present embodiment, since the correction processing for compensating for the variation of the threshold voltage and the variation of the current amplification ratio of each pixel can be applied to the image data written in each pixel, regardless of the characteristic change or characteristic of each pixel The state of the deviation allows the light-emitting element (organic electroluminescence element) to emit light in accordance with the original brightness gray scale of the image data, thereby realizing active organic electroluminescence with good light-emitting characteristics and uniform image quality. Drive System. Further, in the above-described embodiment, the light-emitting luminance of each pixel is measured in a state where a uniform light-emission drive current is set to flow in each pixel. Therefore, according to the present embodiment, it is possible to obtain a parameter for correcting the variation in the luminous current efficiency between the pixels, and to obtain a parameter relating to the correction of the variation of the current amplification ratio between the pixels, and to correct the variation of the luminous current efficiency. Correct the data of the parameters and remember. Therefore, according to the present embodiment, since the correction processing of the variation of the threshold voltage and the variation of the current amplification factor and the luminous current efficiency can be applied to the image data written in each pixel, regardless of the characteristics of each pixel. The state of the variation or the deviation of the characteristics allows the light-emitting element (organic electroluminescence element) to emit light in response to the original luminance gray scale of the image data. Further, the processing for calculating the correction data for correcting the variation of the current amplification factor including the luminous current efficiency can be performed in a sequence of one of the controllers 150a having the single correction data acquisition function circuit 156. Since the processing of the correction data for the variation of the threshold voltage of the driving transistor is compensated, it is not necessary to provide an individual configuration (function circuit) in accordance with the content of the calculation processing of the correction data, and the device scale of the display device (light-emitting device) can be simplified. <Second Embodiment> In the first embodiment, a capacitor connected between the gate and the source terminal of the driving transistor by the writing operation to the pixel PIX during the image data writing period will be described. The voltage 値 of the illuminating voltage at which Cs is charged does not change during the writing period and the illuminating period. -59- 201113851 However, the voltage 値 of the illuminating voltage is actually affected by the voltage variation of each signal line due to the capacitance coupling caused by various parasitic capacitances (capacitance components) other than the capacitor Cs for driving the electric crystal. Therefore, the voltage 値 of the illuminating voltage fluctuates during the writing period and the illuminating period. In addition to the configuration of the first embodiment, the second embodiment is provided with a configuration for correcting the fluctuation of the light-emitting voltage caused by the capacitance 附加 added to the parasitic capacitance (capacitance component) of the driving transistor. Incidentally, the same configurations as those in the first embodiment are denoted by the same reference numerals, and the description thereof will be simplified or omitted. The display device of the present embodiment has substantially the same configuration as the display device 100 of the first embodiment, and includes a display panel 110 having the same configuration as that of the first embodiment, a selection driver 120, a power driver 130, and a data. Driver 140. Further, the pixel PIX arranged on the display panel 110 has the same configuration as that of the first embodiment. The configuration of the controller 15 5 Ob is different from that of the controller 150a of the first embodiment. Hereinafter, differences from the first embodiment will be mainly described. Fig. 25 is a functional block diagram showing the function of the controller applied to the display device of the embodiment. As shown in Fig. 25, the controller (image data correction circuit) of the present embodiment has a voltage amplitude setting function circuit (image data correction) including a reference table (LUT: unique parameter setting circuit) 151. Circuit 152b 'Multiplication function circuit (image data correction circuit) 153b, 157a, 15 7b, addition function circuit (image data correction circuit) 1 54b, memory (remember -60-201113851 memory circuit) 1 5 5, correction data acquisition A functional circuit (characteristic parameter take-out) 156 and a K-parameter setting circuit (inherent parameter setting circuit) 158. In the configuration of Fig. 25, a multiplication function circuit (image data correction circuit) 157a and a K parameter setting circuit (inherent parameter setting circuit) 158 are further provided in the fifth embodiment of the first embodiment. Further, the functions of the voltage amplitude setting function circuit 152b, the multiplying function circuit, and the adding function circuit 54b are partially the amplitude setting function circuit 1 5 2 a of the first embodiment, the multiplying function circuit 1 5 3 a, and the adding power path 15 The functions of 4 a are different. The voltage amplitude setting function circuit 1 5 2b converts the voltages of the respective colors of red (R), green (G), and blue (B) by referring to the reference table 151 for the image data composed of the externally supplied bit data. amplitude. The maximum amplitude of the voltage amplitude of the image data converted by the voltage amplitude setting circuit 15 2b is determined by subtracting 修正 below the correction amount of the characteristic parameter of the factor from the maximum value of the input range of the DAC 42 described above. Here, the reference table 151 referred to by the voltage amplitude function circuit 1 52 2b, as will be described later, illuminates the illuminating voltage caused by the parasitic capacitance (electrical component) added to the driving transistor of each pixel PIX. In addition to the change schedule preset table (r table), the conversion table set in the reference table 1 5 1 will be described in detail later. Further, the voltage amplitude setting function circuit 152b has a through function or a bypass path for directly outputting the digital data. Further, when the characteristic parameter obtaining operation of the automatic zeroing method is applied, the input digital position is set so as not to be directly outputted by the conversion processing using the voltage amplitude of the reference table 151. The number of energies of the power supply 157b 153b should be set in the setting of each image. This input is described, and the -61 - 201113851 multiplication function circuit 1 5 3b is a current correction data Δ/? obtained by multiplying the image data by the detection data related to the characteristic change of the root PIX, or contains the basis for each pixel. The correction data Δ /3 of the current amplification factor /3 of the data of ρΐχ, and the parameter Κ of the variation of the voltage Vel of the parasitic capacitance added to the driving transistor of each pixel. The multiplication function circuit 157a multiplies the characteristic detection data of each pixel ρι by the parameter Κ for correcting the variation of the emission voltage vel of the organic electric OEL of each pixel Κ. The multiplication function circuit 157b multiplies the threshold voltage compensation component (bias voltage) of the drive transistor obtained based on the detection data of each pixel PIX by the parameter addition function circuit 154b of each pixel 对 to the multiplication function. The circuit correction data or the image data is added to the multiplication by the detection data of the parameter K and the pixel PIX and the compensation voltage of the threshold voltage Vth in the multiplications 157a and 157b. Then, the corrected image data is supplied as a repair to the data drive 140. The memory 1 5 5 stores the detection data of the PIX from the data driver 丨4 and the correction data acquisition function circuit 56. The positive data is stored in correspondence with each pixel PIX. At the time of the addition processing of the addition function circuit 154b and the correction data acquisition processing of the function circuit 156, the acceleration of the addition and the pixel magnification/3 is corrected to correct the change in the definition according to the definition. Light-emitting element characteristic change phase voltage Vth complement K ° 153b multiplied by the function circuit change (bias voltage) Corrected data acquisition function circuit obtained in each pixel of the positive image data -62-201113851 154b and correction The data acquisition function 156 reads the detection data from the memory i55. The K parameter setting circuit 158 sets a parameter κ for correcting the fluctuation of the light emission voltage caused by the parasitic capacitance (capacitance component) added to the driving transistor provided in each pixel ρι, in accordance with the operating state of the controller 150b. constant. The κ parameter setting circuit 158 sets the parameter κ to 1 在 when applying the characteristic parameter obtaining operation of the automatic zeroing method described later. Therefore, in the multiplication function circuit 153b and the addition function circuit i54b, multiplication correction or addition correction is performed on the video material (or digital data) without substantially adding the state of correction by the parameter K. Further, the 'K parameter setting circuit' 5 sets the parameter K to, for example, 1.1 when performing a display operation based on the image information of the image data. Therefore, in the multiplication function circuit 153b and the addition function circuit 154b, multiplication correction or addition correction which adds the influence of the parasitic capacitance is performed on the image data (or digital data). Here, the parameter K of the parameter K set by the K parameter setting circuit 158 can be calculated in advance based on the capacitance 附加 added to the parasitic capacitance of the driving transistor at the design stage of the display panel 110 or each pixel PIX, and It is set to be appropriately switched in response to the operation state of the controller 150b. Further, the calculation method of the parameter K will be described later. Further, in the controller 150b shown in Fig. 5, the correction data acquisition function circuit 156 may be an arithmetic unit provided outside the controller 150b. -63- 201113851 Further, in the controller 150b shown in Fig. 5, the memory 155 may be an individual memory as long as it stores the detection data and the correction data associated with each pixel PIX. Further, these memories 155 may be memory devices provided outside the controllers 15 5b. Further, the image data supplied to the controller 15 5 Ob extracts, for example, a luminance gray scale signal component from the image signal, and forms, according to each column of the display device 100, the luminance gray scale signal component as a serial data composed of digital signals. . Next, in the pixel PIX having the light-emitting drive circuit DC having the same configuration as that shown in FIG. 6, the organic electroluminescent element 〇EL when the organic electroluminescent element 0EL is emitted after the image data is written is described. The relationship between the anode and the inter-cathode voltage (the voltage across the organic electroluminescent element 0EL: the illuminating voltage Vel) and the current flowing from the illuminating drive circuit DC to the organic electroluminescent element OEL (the illuminating driving current Iel). Fig. 26 is a view showing an operation state of the organic electroluminescence device to which the pixel of the light-emitting drive circuit of the embodiment is applied, when light is emitted. Fig. 27 is a characteristic diagram showing the relationship between the light-emitting voltage of the electroluminescence element and the light-emission drive current of the pixel of the present embodiment during the light-emitting operation. In the light-emitting operation of the organic electroluminescent element OEL of the pixel PIX of the present embodiment, as shown in Fig. 26, a selection signal of a non-selected level (low level: Vgl) is applied from the selection driver 120 via the selection line Ls. Ssel, and the pixel PIX is set to a non-selected state. -64- 201113851 At this time, 'the transistor Tr丨丨 and Tr 1 2 of the light-emitting drive circuit DC perform an off operation', and the gate and the terminal of the transistor Tr13 are electrically cut off, and the source is extremely The sub-connection point N 1 2 and the data line Ld are electrically cut and the power supply voltage Vsa (= ELVDD)e is applied to the pixel PIX from the power driver 丨3 〇 via the power supply line La in the non-selected state. Therefore, the voltage charged from the above-described image data (gray scale voltage Vdata) to the capacitor Cs (the drain of the transistor Tr13, the source-to-source voltage Vgs) is maintained, and the 汲 terminal of the transistor Tr 13 is connected. Point N13) applies a power supply voltage ELVDD of a higher potential than the source terminal (connection point N12). Therefore, as shown in Fig. 26, the light-emission drive current I e 1 corresponding to the gate and source-to-source voltage V gs of the crystal Tr 13 flows from the power source driver 13 through the power source line La and the transistor Tr13 to the organic electro-electric Light-emitting element 〇EL. The circuit characteristics of the pixel PIX (light-emitting drive circuit DC and organic electro-luminescence element 0EL) in this case were verified. In the writing operation of the image data (grayscale voltage) which is the same as the configuration shown in Fig. 7 described above, the voltage between the connection points N 1 1 - N12 of the light-emitting drive circuit DC (i.e., the gate of the transistor Tr13) The voltage between the pole and the source Vgs and the voltage across the capacitor Cs determines the current 値 of the drain current (ie, the write current) Id flowing between the drain and the source of the transistor Tr. Ideally, the voltage between the connection points N 1 1 - N 1 2 is maintained by the capacitor Cs even when the light is emitted after the end of the writing operation. -65-201113851 However, in the pixel PIX to which the light-emitting drive circuit DC of the present embodiment is applied, the potential applied to the selection signal Ssel of the selection line Ls or applied to the power supply line when shifting from the writing operation to the light-emitting operation is performed. Drive control is performed in such a manner that the potential of the power supply voltage Vsa of La changes. Namely, the potential of the selection signal Ssel changes from Vgh to Vgl, and the potential of the power supply voltage Vsa changes from DVSS to ELVDD. Therefore, the voltage between the connection points N 1 1 - N 1 2 is affected by these potential changes due to the capacitive coupling via the parasitic capacitances located in the light-emitting drive circuit DC. Further, in the pixel PIX (light-emitting drive circuit DC) of the present embodiment, when the transfer operation is shifted to the light-emitting operation, the transistor Tr12 is turned off, and the gray scale voltage Vdata is cut off to the connection point N12 (the transistor Tr3) The application of the source terminal). Further, during the light-emitting operation, the light-emission drive current Iel flows through the organic electroluminescent element OEL via the connection point N12. Therefore, when the potential of the connection point N12 fluctuates, the voltage between the connection points N 1 1 - N 1 2 is also affected by the potential fluctuation of the connection point N 1 2 . The variation of the gate and source-to-source voltage Vgs (voltage between the connection points Nil - N 1 2) of the transistor Tr 13 means that the drain and the source between the transistors Tr 13 flow through the organic electroluminescence. The light-emission drive current Iel of the element OEL varies. In other words, it means that the current 发光 of the light-emission drive current Iel is affected by the 値 of the voltage (light-emitting voltage Vel) across the organic electroluminescent element OEL associated with the potential of the connection point N12. -66- 201113851 Further, in the light-emitting drive circuit DC, even when the potential of the light-emitting contact N12 fluctuates, the inter-electrode voltage Vgs of the transistor Tr1 (the voltage between the connection points N1 1 - N12) is not necessarily the above. The variation of the gate voltage and the source-to-source voltage Vgs of the transistor Tr13 is affected by the parasitic capacitance of the connection point Nil (the gate terminal), and is subjected to the voltage Ve of the organic electroluminescent element OEL. The light-emitting drive circuit DC is not a drive control method for changing the voltage between the gate 'source voltage points N 1 1 - N 1 2 between the gates of the transistor Tr 13 during the light-emitting operation. Here, the correction method when the light-emission drive current Iel flowing through the light-emitting element OEL depends on the light-emission voltage Vel of the organic electric device OEL will be described based on the above-described situation. First, a parameter indicating the influence of the parasitic capacitance that changes the gate and source of the transistor Tr 13 (the parameter specific to each pixel is expressed as the following equation (22). Σ^ΝΙΙ-χ Κ:=^ - ,
LnII-Ν12 χ = Ν12, N13, N14 在該第(22)式中,CNn- N12相當於接在電晶體 極、源極間的電容器Cs » CN11- Nl3相當於接在電 的閘極 '汲極間之電晶體Trl 1的閘極電容。CN1 動作時連 :閘極、源 會變動。 動只有在 线響時,才 影響。 採用原理 Vgs(連接 有機電致 致發光元 3電壓Vgs 敗)K定義 …(26) Trl3之閘 晶體Trl3 1 - N 1 4相當 -67- 201113851 於與電晶體Trl3之閘極連接之電晶體Trll的閘極、源極 間電容。 在此,假設流動於第26圖所示之位於發光動作狀態之 像素PIX中之有機電致發光元件OEL的發光驅動電流iei 相對於發光電壓Vel具有第27圖所示的關係。 在第27圖,Vst是發光起始電壓,Vel_max及Iel_max 各自是像素PIX之最大亮度發光時的發光電壓及發光驅動 電流。 如第27圖所示,表示當發光電壓Vel的電壓値超過發 光起始電壓Vst時,發光驅動電流Iel的電流値隨著發光電 壓Vel的上昇而呈大致線性地增加之特性。 而在本實施形態中,具有上述之定義(第(26)式)及發光 電壓Vel與發光驅動電流iei之關係(第27圖)時,在第25 圖所示之控制器1 50b的構成中,電壓振幅設定功能電路 1 5 2b藉由參照參照表1 5 1,而進行對於由從外部輸入之數 位資料所構成之影像資料nd,添加參數K的資料轉換。 第2 8圖係用以說明應用於本實施形態之控制器的參 照表之資料轉換處理的圖。 應用於本實施形態之參照表係如第28圖所示,被設定 成轉換資料(輸出資料)n<Uui相對於所輸入之數位資料(影像 資料)n d大致具有線性。 在此’在第28圖中,SD1是表示對於因寄生電容的影 響所引起之電晶體Trl 3之閘極、源極間電壓Vgs(即對應於 -68· 201113851 費 * 有機電致發光元件OEL之發光電壓Vel)的變動不進行修正 時之轉換特性的特性線。 又,SD2是表示與因寄生電容的影響所引起之有機電 致發光元件0EL之發光電壓Vel的變動量對應之轉換資料 之修正成分的特性線。 又,SD3是表示對於因寄生電容的影響所引起之有機 電致發光元件0EL之發光電壓Vel的變動進行修正時之轉 換特性的特性線。 在此,SD3被修正成具有在SD1所示的轉換資料中加 入SD2所示之修正成分的資料値。具體而言,所輸入之數 位資料被施加如下的第(27)式所示之將參數K作爲修正 資料加入的資料轉換處理,並輸出作爲轉換資料naw。在 此,△ V是該第(13)式所示之對應於數位資料之1位元的電 壓寬。 r»d ^ nd + X AV x (Vel - Vst) = ndout ...(27) 又,在本實施形態中,除了進行上述之藉電壓振幅設 定功能電路152b對影像資料nd添加參數κ的資料轉換處 理以外’更在第25圖所示之控制器丨5 〇b的乘法功能電路 153b及加法功能電路15 4b中,進行添加參數κ的修正處理。 在此’使用於這些資料轉換處理及修正處理所使用的 參數K,在取得應用上述之自動歸零法的特性參數(修正資 -69- 201113851 料nlh、△々)時,被設定成Κ=1。又,在 光電流效率的特性參數取得動作 數取得動作後所執行之因應影像資料_ 2 作時,參數Κ被設定成例如Kzl.i。 接著,使用藉和在上述之第1實施 參數取得動作所取得之修正資料nih、Λ 光動作時之寄生電容之影響的參數κ , 在各像素ΡΙΧ之有機電致發光元件0EL 的特性參數之動作。 在此,首先,在第25圖所示的控制 從外部供給之特定的影像資料nd(在此, 測量用數位資料」:第1影像資料),根 第(21)式所算出之修正資料n,h、△沒及 的參數K,施加以下所示之一連串的運 度測量用影像資料nd_br^ 然後,將其輸入資料驅動器140,| 素PIX)進行電壓驅動。 具體而言’亮度測量用影像資料nd_ 亮度測量用數位資料nd,加入像素PIX 影響,並執行電壓振幅的設定、電流放 (△ /3乘法修正)及臨限値電壓Vth的變動 而進行。 後述之用以補償發 在一連串之特性參 影像資訊的顯示動 形態者一樣的特性 yS及用以補償在發 執行取得用以補償 之發光電流效率D 1器150b中,對於 權宜上記爲「亮度 據藉該第(18)式、 由第(26)式所定義 算處理,而產生亮 封顯示面板1 1 0 (像 bM的產生係藉由對 發光時寄生電容的 大率/3之偏差修正 J修正(n i ii加法修正) -70- 201113851 首先’在控制器150b的電壓振幅設定功能ί 中’參照具有如第2 8圖所示之轉換特性的參照_ 數&資料nd進行如該第(27)式所示的資料轉換處 生轉換資料 接著’在乘法功能電路153b中,對已設定電 數位資料(轉換資料)nd(ju,,乘以用以修正寄生電容 參數K及用以修正電流放大率^之偏差的修正資 X Π d 〇 u t X △ /5 )。 然後’在加法功能電路1 54b中,對已進行乘 數位資料(Kxn<uulX△冷),加上已乘以用以修正寄 影響的參數K之用以修正臨限値電壓vth之變動 料 Kxn.h( = Kxnm…⑴一KxVoffset)(Kx(n“ulx△召 此外’在此亮度測量用影像資料nd_bH或後述 作時之修正影像資料ndt()np的產生方法中,係在 設定功能電路1 5 2b以根據參數K,加入像素PIX 電容的影響’修正作爲有機電致發光元件〇EL之 的發光電壓Vel的方式對數位資料(影像資料)nd 轉換後’在乘法功能電路1 5 3 b,進行電流放大率 修正(△ β乘法修正)。在此情況,使用於Ve】修正 本身受到△ /3乘法修正。 可是’在第28圖所示之資料轉換處理的說明 較在不加入像素PIX內之寄生電容之影響時(不進 正之情況的轉換特性:特性線S D 1)之/3修正後 路 152b H51,對 理,而產 壓振幅的 之影響的 料△卢(K 法處理的 生電容之 的修正資 h))。 之顯不動 電壓振幅 內之寄生 兩端電壓 進行資料 /5之偏差 之參數K 圖中,比 行Vel修 的數位資 -71 - 201113851 料、和在加入寄生電容之影響時(進行V e 1修正之情況的轉 換特性:特性線SD3)之;5修正後的數位資料時,Vel修正 對/3修正的影響係實質上可忽略的程度。 然後,將這些已實施修正處理的數位資料(Kx(ndt)ulXA /5 +nlh))作爲亮度測量用影像資料’向資料驅動器140 的資料暫存器電路142供給。 資料驅動器140利用DAC/ADC電路144的DAC42將被 取入資料暫存器電路142之亮度測量用影像資料n 轉換 成類比信號電壓。 在此,如上述的第4圖所示,因爲DAC42和ADC43的 輸出輸入特性(轉換特性)被設定成相同,所以由DAC42所 產生之亮度測量用灰階電壓(第2電壓)V…係根據該第(14) 式所示的定義,定義成如下的第(28)式。此灰階電壓Vbrt 係經由資料線Ld供給至像素PIX。LnII-Ν12 χ = Ν12, N13, N14 In the equation (22), CNn-N12 is equivalent to a capacitor Cs connected between the transistor pole and the source. CN11-Nl3 is equivalent to an electrical gate. The gate capacitance of the transistor Tr1 between the poles. When CN1 is connected, the gate and source will change. The action only affects when the line is ringing. Using the principle Vgs (connecting the organic electroluminescent element 3 voltage Vgs defeat) K definition...(26) Trl3 gate crystal Tr13 1 - N 1 4 equivalent -67- 201113851 Transistor Trll connected to the gate of transistor Tr3 The gate and source capacitance. Here, it is assumed that the light-emission drive current iei flowing through the organic electroluminescent element OEL in the pixel PIX in the light-emitting operation state shown in Fig. 26 has a relationship shown in Fig. 27 with respect to the light-emission voltage Vel. In Fig. 27, Vst is the light-emission starting voltage, and Vel_max and Iel_max are the light-emitting voltage and the light-emission driving current when the maximum luminance of the pixel PIX is emitted. As shown in Fig. 27, when the voltage 値 of the light-emission voltage Vel exceeds the light-emission start voltage Vst, the current 値 of the light-emission drive current Iel increases substantially linearly as the light-emission voltage Vel rises. In the present embodiment, when the above definition (the equation (26)) and the relationship between the light-emission voltage Vel and the light-emission drive current iei (Fig. 27) are present, in the configuration of the controller 150b shown in Fig. 25 The voltage amplitude setting function circuit 1 5 2b performs data conversion for adding the parameter K to the image data nd composed of the digital data input from the outside by referring to the reference table 151. Fig. 28 is a view for explaining the data conversion processing of the reference table applied to the controller of the embodiment. As shown in Fig. 28, the reference table applied to the present embodiment is set such that the converted material (output data) n < Uui is substantially linear with respect to the input digital data (image data) n d . Here, in Fig. 28, SD1 indicates the gate and source-to-source voltage Vgs of the transistor Tr13 due to the influence of the parasitic capacitance (i.e., corresponding to -68·201113851 fee* organic electroluminescent element OEL) The characteristic curve of the conversion characteristic when the variation of the light-emission voltage Vel) is not corrected. Further, SD2 is a characteristic line indicating a correction component of the conversion data corresponding to the amount of fluctuation of the emission voltage Vel of the organic electroluminescent element 0EL due to the influence of the parasitic capacitance. Further, SD3 is a characteristic line indicating the conversion characteristics when the fluctuation of the light-emission voltage Vel of the organic electroluminescent element 0EL due to the influence of the parasitic capacitance is corrected. Here, SD3 is corrected to have a data 加 which adds the correction component indicated by SD2 to the conversion data shown in SD1. Specifically, the input digital data is subjected to the data conversion processing in which the parameter K is added as the correction data as shown in the following equation (27), and is output as the conversion data naw. Here, Δ V is the voltage width corresponding to one bit of the digital data shown in the above formula (13). r»d ^ nd + X AV x (Vel - Vst) = ndout (27) Further, in the present embodiment, in addition to the above-described borrowing voltage amplitude setting function circuit 152b, the parameter κ is added to the image data nd. In addition to the conversion processing, the multiplication function circuit 153b and the addition function circuit 15bb of the controller 丨5 〇b shown in FIG. 25 are further subjected to correction processing of adding the parameter κ. Here, the parameter K used in the data conversion processing and the correction processing is set to Κ= when the characteristic parameter (correction-69-201113851 material nlh, Δ々) to which the above-described automatic zeroing method is applied is obtained. 1. Further, when the response image data _ 2 executed after the characteristic parameter acquisition operation of the photocurrent efficiency is obtained, the parameter Κ is set to, for example, Kzl.i. Then, the parameter κ of the influence of the parasitic capacitance obtained during the first parameter acquisition operation described above and the parasitic capacitance during the lithography operation is used, and the characteristic parameter of the organic electroluminescent element 0EL in each pixel is used. . Here, first, in the specific image data nd (here, measurement digital data: first image data) supplied from the outside as shown in FIG. 25, the correction data calculated by the equation (21) is n. The parameter K, which is not included in h and Δ, is applied to a series of image data for business measurement nd_br^ shown below, and then input to the data driver 140, the element PIX) for voltage driving. Specifically, the luminance measurement video data nd_ luminance measurement digital data nd is added to the pixel PIX, and the voltage amplitude is set, the current is discharged (Δ /3 multiplication correction), and the threshold voltage Vth is varied. The characteristic yS which is used to compensate for the display dynamics of a series of characteristic parameter image information and the luminous current efficiency D1 150b for compensating for the execution of the compensation is described as "brightness data". By the calculation of the equation (18) and the calculation as defined by the equation (26), the display panel 1 1 0 is produced. (The generation of the image bM is corrected by the deviation of the parasitic capacitance at the time of light emission/3. Correction (ni ii addition correction) -70- 201113851 First, 'in the voltage amplitude setting function ί of the controller 150b', refer to the reference _ number & data nd having the conversion characteristic as shown in Fig. 28 as the first 27) The data conversion conversion data shown in the equation is followed by 'in the multiplication function circuit 153b, the set electrical data (conversion data) nd (ju, multiplied by the parasitic capacitance parameter K and used to correct the current) Correction factor X Π d 〇ut X △ /5 ) of the deviation of the magnification ^. Then 'in the addition function circuit 1 54b, the multiplicative bit data (Kxn <uulX △ cold) is added, and the multiplied by Correct the parameters of the affected K To correct the threshold voltage v voltage vth variation material Kxn.h (= Kxnm...(1)-KxVoffset) (Kx (n "ulx △ 此外 ' 在 在 亮度 亮度 亮度 亮度 亮度 亮度 亮度 亮度 亮度 亮度 亮度 亮度 亮度 亮度 亮度 亮度 亮度 ) ) ) ) ) ) ) ) ) ) ) ) ) ) In the method of generating np, in the setting function circuit 1 5 2b, by adding the influence of the capacitance of the pixel PIX according to the parameter K, the digital data (image data) nd is corrected as the illuminating voltage Vel of the organic electroluminescent element 〇EL. After the conversion, the current amplification factor correction (Δβ multiplication correction) is performed in the multiplication function circuit 1 5 3 b. In this case, the correction itself is corrected by Δ /3 multiplication. However, the image shown in Fig. 28 The description of the data conversion processing is smaller than the influence of the parasitic capacitance in the pixel PIX (the conversion characteristic in the case where the pixel is not positive: the characteristic line SD 1), the correction path 152b H51, the opposite, and the amplitude of the production pressure. The affected material △ Lu (correction of the raw capacitor for the K method), the parameter K of the parasitic voltage across the amplitude of the immobile voltage, and the parameter K of the deviation of the data. -71 - 201113 851 material, and when the influence of parasitic capacitance is added (conversion characteristic in the case of V e 1 correction: characteristic line SD3); 5 the corrected digital data, the effect of Vel correction on /3 correction is substantially negligible Then, the digital data (Kx(ndt)ulXA /5 +nlh)) to which the correction processing has been performed is supplied as the luminance measurement video data 'to the data register circuit 142 of the data driver 140. The data driver 140 converts the luminance measurement video data n taken into the data register circuit 142 into an analog signal voltage by the DAC 42 of the DAC/ADC circuit 144. Here, as shown in FIG. 4 described above, since the output input characteristics (conversion characteristics) of the DAC 42 and the ADC 43 are set to be the same, the gray scale voltage (second voltage) V of the luminance measurement generated by the DAC 42 is based on The definition shown in the above formula (14) is defined as the following formula (28). This gray scale voltage Vbrt is supplied to the pixel PIX via the data line Ld.
Vbrt = Vx - AV(nd brt -1)) …(28) 依此方式,對特定的影像資料執行一連串的修正處 理,而產生亮度測量用灰階電壓vb,,,並寫入顯示面板110, 藉此,可將從各像素PIX的發光驅動電路DC流動於有機 電致發光元件OEL流動之發光驅動電流Iel的電流値設定 成定値,而不會受到電流放大率^之偏差或驅動電晶體之 臨限値電壓Vth之變動的影響,不會受到發光驅動電路DC 驅動時之寄生電容的影響。 -72- 201113851 然後’在此狀態,使顯示面板i〗0進行發光動作,來 測量各像素ΡΙΧ的發光亮度Lv(cd/m2)。在此,關於各像素 PIX的亮度測量方法,可應用和在上述之第丨實施形態中 說明者相同的方法。然後,如上述所示,根據此發光亮度 的測量’取得用以修正電流放大率Θ和發光電流效率^兩 者的偏差之修正資料(第4特性參數)△ $ ,。 藉特性參數取得動作所取得之修正資料n, h、根據發光 亮度之測量所取得之△ /3 ,及參數K,係在後述的顯示動作 中’對從本實施形態之顯示裝置1〇〇的外部輸入之影像資 料η<ι ’施加電壓振幅的設定(第(23)式的資料轉換)、電流放 大率/3之偏差修正(△沒乘法修正)、發光電流效率^之偏 差修正(△ 乘法修正)、臨限値電壓Vth之變動修正(n,h加 法修正)及像素PIX內之寄生電容所引起之發光電壓Vel的 變動修正(κ乘法修正)而產生修正影像資料nd^mp時使用。 因而’因爲從資料驅動器1 40經由資料線Ld向各像素 PIX供給因應修正影像資料nd_„mp之類比電壓値的灰階電 壓Vdata,所以可使各像素PIX的有機電致發光元件〇EL 在不會受到電流放大率A或發光電流效率々之偏差、驅動 電晶體之臨限値電壓Vth或發光電壓Vel之變動的影響的 情況下,以所要之亮度灰階進行發光動作,而可實現良好 且均勻的發光狀態。 其次’以和本實施形態之裝置構成賦予關聯的方式說 明上述之應用自動歸零法的特性參數取得動作。 -73- 201113851 此外’在以下的說明,關於和上述之特性參數取得動 作相同的動作’簡化或省略其說明。 首先’取得用以修正各像素ΡΙχ的驅動電晶體之臨限 値電壓Vth之變動的修正資料nlh和用以修正各像素ΡΙΧ之 電流放大率沒之偏差的修正資料。 第29圖係表示本實施形態之顯示裝置之特性參數取 得動作的時序圖(之一)。 第30圖係表示本實施形態之顯示裝置之檢測用電壓 施加動作的動作示意圖。 第31圖係表示本實施形態之顯示裝置之自然緩和動 作的動作示意圖。 第32圖係表示本實施形態之顯示裝置之資料線電壓 檢測動作的動作示意圖。 第33圖係表示本實施形態之顯示裝置之檢測資料送 出動作的動作示意圖。 第34圖係表示本實施形態之顯示裝置之修正資料算 出動作的功能方塊圖(之一)。 在此,在第30圖~第33圖,作爲資料驅動器140之構 成’爲了便於圖示,而省略移位暫存器電路141的圖示。 在本實施形態的特性參數(修正資料n,h、△ yS )取得動 作中,如第29圖所示,按各列的各像素PIX設定成在既定 之特性參數取得期間Tcpr內包含檢測用電壓施加期間 '自然緩和期間Τι(»2、資料線電壓檢測期間Tl<)3及檢測 資料送出期間Τ1(μ。 -74- 201113851 • 在此,自然緩和期間Τ !。2係對應於上述的緩和時間t, 在第29圖,雖然爲了便於圖示,表示將緩和時間t設定成 —個時間的情況,但是實際上,在自然緩和期間T,〇2內之 相異的各緩和時間t ( = t 〇、t,、12、13 ),重複執行資料線電 壓檢測動作(資料線電壓檢測期間T1(n)及檢測資料送出動 作(檢測資料送出期間Τ1(Μ)。 首先,在檢測用電壓施加期間T i。i,如第2 9圖、第3 0 圖所示,將成爲特性參數取得動作之對象的像素PIX(在圖 上爲第1列的像素PIX)設定成選擇狀態。即,在從選擇驅 動器120對該像素PIX所連接的選擇線Ls施加選擇位準(高 位準:Vgh)的選擇信號Ssel,同時從電源驅動器130對電 源線La施加低位準(非發光位準:DVSS =接地電位GND)的 電源電壓V s a。 然後,在此選擇狀態,根據從控制器1 50a所供給之切 換控制信號S1,設置於資料驅動器140之輸出電路145的 開關 SW1進行導通動作,藉此,連接資料線 Ld(j)和 DAC/ADC144 的 DAC42(j)。 又,根據從控制器150b所供給之切換控制信號S2、 S3,設置於輸出電路145的開關SW2進行截止動作,同時 與開關SW4之接點Nb連接的開關SW3進行截止動作。 又,根據從控制器150b所供給之切換控制信號S4 , $ 置於資料閂鎖電路143的開關SW4被設定成和接點Na g 接,並根據切換控制信號S5,開關SW5被設定成和接點 Na連接。 -75- 201113851 然後’用以產生既定電壓値之檢測用電壓Vdac的數位 資料nd從資料驅動器1 4〇的外部依序被取入資料暫存器電 路1 42 ’再經由對應於各行的開關SW5被保持於資料問鎖 41(j)。 然後’資料閂鎖4 1 (j)所保持的數位資料η <1經由開關 SW4輸入DAC/ADC電路144的DAC42U)以進行類比轉換, 並被施加於各行的資料線LdU)作爲檢測用電壓Vdac。 在此’爲了產生檢測用電壓Vdac,數位資料(影像資 料)na係在上述的控制器150b中,對從外部輸入之參數取 得用之特定的數位資料(影像資料),利用電壓振幅設定功 能電路152b、乘法功能電路i53b及加法功能電路15仆施 加資料轉換及修正處理而產生。 在此情況,被設定於參照表1 5 1之資料轉換處理及乘 法功能電路153b與加法功能電路154b之修正處理的參數 K’係藉由K參數設定電路158設定成K=1.0。 因此’關於參照參照表1 5 1由電壓振幅設定功能電路 15 2b所執行之資料轉換處理,因爲根據該第(23)式輸入之 數位資料直接被.輸出’所以實質上變成和將電壓振幅設定 功能電路152b設成直通或迂迴之狀態相等。 又,因爲使用於乘法功能電路153b與加法功能電路 154b之修正處理的修正資料△ /3、nltl尙未被取得,所以這 些被設定成起始値’或者乘法功能電路153b與加法功能電 路1 54b被設定成例如直通狀態。 -76- 201113851 * 因此,從電壓振幅設定功能電路152b輸出之數位資料 直接作爲檢測用電壓Vdac設定用的數位資料nd被供給至 資料驅動器140。 因而,在構成像素PIX的發光驅動電路DC所設置之 電晶體Trll及Trl2進行導通動作,而低位準的電源電壓 Vsa( = GND)經由電晶體Trl 1被施加於電晶體Trl3的閘極端 子及電容器Cs的一端側(連接點Ν 1 1)。又,被施加於資料 線Ld(j)的該檢測用電壓Vdac經由電晶體Tr 1 2被施加於電 晶體Trl3的源極端子及電容器Cs的另一端側(連接點 N12)。 依此方式,藉由對電晶體Trl 3之閘極、源極端子間(即 電容器Cs的兩端)施加比電晶體Trl3之臨限値電壓Vth更 大的電位差,使電晶體Tr 1 3進行導通動作,而流動因應此 電位差(閘極、源極間電壓Vgs)的汲極電流Id。 此時,因爲電晶體Trl3之源極端子的電位(檢測用電 壓 Vdac)被設定成比汲極端子的電位(接地電位GND)更 低,所以汲極電流Id從電源電壓線La經由電晶體Trl3、 連接點N12、電晶體Trl2及資料線Ld(j),朝向資料驅動器 140方向流動。又,藉此以對應於根據該汲極電流Id之電 位差的電壓對連接在電晶體Tr 1 3之閘極、源極間之電容 器Cs的兩端進行充電。 此時,電流不會流向有機電致發光元件OEL,而不會 進行發光動作。 -77- 201113851 接著1 ’在該檢測用電壓施加期間τ,。,結束後的自然緩 和期間ΤΙ(>2 ’如第29圖、第31圖所示,在將像素Ριχ保持 於選擇狀態之狀態下’根據從控制器丨5 〇b所供給之切換控 制信號S 1 ’使資料驅動器1 4 〇的開關s w 1進行截止動作, 藉此’使資料線Ld(j)與資料驅動器14〇分離,同時停止從 DAC42(j)輸出檢測用電.壓Vdac。 又’和上述的檢測用電壓施加期間T|(n —樣,開關 SW2、SW3進行截止動作,開關SW4被設定成和接點Nb 連接’開關SW5被設定成和接點Nb連接。 藉此’因爲電晶體Tr 1 1、Tr 1 2保持導通狀態,雖然像 素PIX(發光驅動電路DC)保持和資料線Ld(j)呈電性連接的 狀態’但是因爲截斷對該資料線LdU)施加電壓,所以電容 器Cs之另一端側(連接點N12)被設定成高阻抗狀態。 在此自然緩和期間T i 02 ’藉由在上述之檢測用電壓施 加期間Τιβ1利用充電至電容器Cs(電晶體Trl3的閘極、源 極間)的電壓’使電晶體T r 1 3保持導通狀態,而汲極電流 Id繼續流動。然後’電晶體Trl3之源極端子側(連接點N12: 電容器Cs的另一端側)的電位逐漸上昇至接近電晶體Trl3 的臨限値電壓Vth。因而,資料線Ld(j)的電位亦變化成收 歛至電晶體Trl3的臨限値電壓Vth。 此外’在此自然緩和期間Τιβ2,電流亦不會流向有機 電致發光元件OEL,而不會進行發光動作。 -78- 201113851 接著’在資料線電壓檢測期間τ,。;,在該自然緩和期 間Τ1<)2經過既定之緩和時間t的時間點,如第29圖、第32 圖所示,在將像素PIX保持於選擇狀態的狀態,根據從控 制器150b所供給之切換控制信號S2,使資料驅動器140 的開關SW2進行導通動作。此時,開關Swi、SW3進行截 止動作’而開關SW4被設定成和接點Nb連接,開關SW5 被設定成和接點Nb連接。 藉此’連接資料線Ld(j)和DAC/ADC144的ADC43(j), 在自然緩和期間Τ1β2經過既定之緩和時間t之時間點的資 料線電壓Vd經由開關SW2及緩衝器45(j)被取入ADC43(j)» 然後’被取入ADC43(j)之由類比信號電壓所構成的資 料線檢測電壓Vmeas(t)係根據該第(14)式在ADC43(j)中被 轉換成由數位資料構成的檢測資料nratas(t),並經由開關 SW5被資料閂鎖41(j)保持。 接著’在檢測資料送出期間T1(m,如第29圖、第33 圖所示’將像素PIX設定成非選擇狀態。 ’從選擇驅動器1 20對選擇線Ls施加非選擇位準(低 位準:Vgl)的選擇信號Ssel。在此非選擇狀態,根據從控 制器1 50b所供給之切換控制信號S4、S5,設置於資料驅動 器140之資料閂鎖41(j)的輸入段之開關SW5被設定成和接 ϋ Nc連接’設置於資料閂鎖41(j)之輸出段的開關SW4被 設定成和接點Nb連接。又,根據切換控制信號S 3,使開 關SW3進行導通動作。此時,開關SW1、SW2根據切換控 制信號S 1、S.2進行截止動作。 -79- 201113851 因 SW5串 妖 LP,將 資料 因 串列資 記憶於 在 壓檢測 t(=tO 、 在相異 可在僅 相異的 測動作 t相異3 檢測資 重 作,針 檢測資 接 修正各 Vth 的 ί 沒的算 而’彼此相鄰之行的資料閂鎖4 1 (j)經由開關S W4、 聯’並經由開關S W 3和外部的控制器1 5 0 b連接。 後’根據從控制器1 5 〇b所供給之資料閂鎖脈波信號 各行的資料閂鎖41 U+l)(參照第3圖)所保持之檢測 …⑴依序轉送至相鄰的資料閂鎖41(j)。 而’輸出1列份之像素PIX的檢測資料nm〃s(t)作爲 料’如第34圖所示,並以對應於各像素ΡΙχ的方式 設置於控制器1 5 Ob之記憶體1 5 5的既定記憶區域。 本實施形態’在上述一連串的動作中,將資料線電 動作及檢測資料送出動作設定成相異的緩和時間 tl ' t2、t3) ’以對各像素ριχ執行複數次。在此, 的緩和時間t檢測資料線電壓的動作係如上述,亦 施加一次檢測用電壓而持續自然緩和的期間中,在 時序t (緩和時間t = 10、11、12、13)將資料線電壓檢 及檢測資料送出動作執行複數次,亦可使緩和時間 £將檢測用電壓施加、自然緩和、資料線電壓檢測及 料送出之一連串的動作執行複數次。 複以上所不之對各列之像素Ρίχ的特性參數取得動 對排列於顯示面板1 1 0的全像素ρ IX將複數次份的 料nmeas(t)53憶於控制器1 5 0 b的記憶體1 5 ^。 著’根據各像素PIX的檢測資料n„tas(t),執行用以 像素PIX之電晶體(驅動電晶體)Trl3之臨限値電壓 彥正資料nth及用以修正電流放大率之修正資料△ 出動作。 -80- 201113851 • 具體而言· ’如第34圖所示,首先,在設置於控制器150b 2 # IE胃Μ 辱功能電路丨5 6,讀出與記憶體1 5 5所記憶之 各像素ΡΙΧ對應的檢測資料nin〃s(t)。 $彳麦’在修IE資料取得功能電路156,按照上述之使用 自動歸零法的特性參數取得動作,根據該第(15)式〜第(21) 式’算出修正資料nlh(具體而言,規定修正資料n,h的檢測 資料11m…(to)及偏置電壓(_ V〇ffset=_ 1/芒xto)及修正資料 △召。所算出之修正資料n,h及△沒以對應於各像素PIX的 方式記憶於記憶體1 5 5的既定記憶區域。 接著’使用該修正資料nu、及參數K,取得用以 修正各像素PIX之發光電流效率^之偏差的修正資料△ V ° 第35圖係表示本實施形態之顯示裝置之特性參數取 得動作的時序圖(之二)。 第3 6圖係表示本實施形態之顯示裝置之亮度測量用 影像資料之產生動作的功能方塊圖。 第3 7圖係表示本實施形態之顯示裝置之亮度測量用 影像資料之寫入動作的動作示意圖。 第38圖係表示本實施形態之顯示裝置之亮度測量用 發光動作的動作示意圖。 第39圖係表示本實施形態之修正資料算出動作的功 能方塊圖(之二)。 在此,在第37圖、第38圖,作爲資料驅動器140之 構成,爲了便於圖示,省略移位暫存器電路141的圖示。 •81 - 201113851 本實施形態的特性參數(修正資料△ π )取得動作係如 第35圖所示,被設定成包含:按各列的各像素ριχ產生亮 度測量用影像資料並寫入之亮度測量用影像資料寫入期間 Τ2<η、以因應亮度測量用之影像資料的亮度灰階使各像素 ΡΙΧ進行發光動作的亮度測量用發光期間Τ2β2及測量各像 素之發光亮度的發光亮度測量期間Τ2(Π。在此,亮度測量 用發光期間Τ2。2包含發光亮度測量期間Τ2<η,發光亮度的測 量動作係在亮度測量用發光期間T2D2中被執行。 在亮度測量用影像資料寫入期間T2(n,執行亮度測量 用影像資料的產生動作和亮度測量用影像資料寫入各像素 ΡΙΧ的動作。 亮度測量用影像資料的產生動作係在控制器1 5 0 b,使 用藉上述之特性參數取得動作所取得的修正資料△万與 n,n、及根據顯示面板11〇或各像素ριχ的各種設計資料而 預先算出之參數Κ,對既定亮度測量用數位資料nd進行資 料轉換及修正,而產生亮度測量用影像資料nd_brt。 具體而言,如第36圖所示,首先,藉由在控制器150b 的電壓振幅設定功能電路15 2b中參照參照表151,而對從 外部輸入之亮度測量用數位資料nd進行如上述第(23)式所 示的資料轉換處理,而產生轉換資料nd。》, » 接著,讀出記億體1 5 5所記憶之對應於各像素的修正 資料Δ/3。又,利用K參數設定電路158設定參數K的値。 在此,參數K例如被設定成K=l.l。 -82 - 201113851 然後’在乘法功能電路153b中,對從該電壓振幅設定 功能電路152b輸出之數位資料(轉換資料)n<Uui進行修正資 料△召及參數K的乘法處理(ΚχηοουχΛ /3 ) » 接著’讀出記憶體1 5 5所記憶之規定修正資料nlh的檢 測資料nmias(t〇及偏置電壓(一 v〇ffset=— 1/f xu),並在乘 法功能電路157a及157b中進行參數K的乘法處理(Kx nm"s(t〇)、KxVoffset)。 接著,在加法功能電路15 4b,對來自該乘法功能電路 1531?的數位資料(1〇<11(!。^/\/5),進行已乘以參數〖之檢測 資料nmeas(U)及偏置電壓(―Voffset)的加法處理(Κχ(η<1<)11,χΛ 冷 +nih))。 藉由執行以上的修正處理,而產生亮度測量用影像資 料並供給至資料驅動器140。 又’亮度測量用影像資料寫入各像素PIX的動作係與 上述之檢測用電壓施加動作(檢測用電壓施加期間T1…一 樣,在將成爲寫入對象的像素PIX設定成選擇狀態之狀 態’經由資料線Ld(j)寫入因應該亮度測量用影像資料nd_brl 的亮度測量用灰階電壓VbM。 具體而言,如第35圖、第37圖所示,首先,對該像 素PIX所連接的選擇線Ls,施加選擇位準(高位準:Vgh) 的選擇信號Ssel,同時對電源線La施加低位準(非發光位 準:DVSS =接地電位GND)的電源電壓Vsa。 -83- 201113851 在此選擇狀態’使開關s W 1進行導通動作,而將開關 SW4及SW5設定成和接點Nb連接,藉此,將從控制器150b 所供給之亮度測量用影像資料nd_b„依序取入資料暫存器電 路142’並由對應於各行的資料閂鎖4i(j)所保持。 所保持的影像資料由DAC42(j)進行類比轉換,並 施加於各行的資料線Ld(j)作爲亮度測量用灰階電壓VbM。 在此’亮度測量用灰階電壓Vh係如上述所示,被設定成 滿足該第(2 8 )式之條件的電壓値。 因而’在構成像素PIX的發光驅動電路DC中,對電 晶體Trl3的閘極端子及電容器Cs的一端側(連接點Nil) 施加低位準的電源電壓Vsa( = GND),又,對電晶體Trl 3的 源極端子及電容器Cs的另一端側(連接點N1 2)施加該亮度 測量用灰階電壓Vbrt。 因此’因應電晶體Tr 1 3之閘極、源極端子間所產生之 電位差(閘極、源極間電壓Vgs)的汲極電流Id流動,而以 與根據該汲極電流Id之電位差對應的發光電壓(β V brt ) 對電容器Cs的兩端充電。 此時,因爲對有機電致發光元件OEL的陽極(連接點 N12)施加比陰極(共用電極Ec)更低的電壓,所以有機電致 發光元件OEL不會流通電流,而不會進行發光動作。 接著,在亮度測量用發光期間T2〇2,如第35圖所示, 在將各列的像素ΡΙΧ設定成非選擇狀態之狀態,使各像素 ΡΙΧ同時進行發光動作。 -84- 201113851 _ 具體而言’如第38圖所示,對與排列於顯示面板no 之全像素PIX所連接的選擇線Ls施加非選擇位準(低位 準:Vgl)的選擇信號Ssel,同時對電源線La施加高位準(發 光位準:ELVDD>GND)的電源電壓Vsa。 因而’設置於各像素PIX的發光驅動電路DC之電晶 體Tr 11、Tr 12進行截止動作,而保持被充電至連接在電晶 體Tr 13之閘極 '源極間之電容器Cs的發光電壓。 因此,利用被充電至電容器Cs的發光電壓 (==Vbrt)保 持電晶體Tr 1 3的閘極、源極間電壓Vgs,電晶體Tr 1 3進行 導通動作而流通汲極電流Id,電晶體Trl3之源極端子(連 接點N12)的電位上昇。 然後’電晶體Trl3之源極端子(連接點N12)的電位上 昇至比被施加於有機電致發光元件OEL之陰極(共用電極 Ec)的電壓ELVSS( = GND)更高,而對有機電致發光元件OEL 施加順向偏壓。因而,發光驅動電流Iel從電源線La經由 電晶體Trl3、連接點N12及有機電致發光元件OEL,沿共 用電極Ec方向流動,而有機電致發光元件0EL進行發光動 作。此發光驅動電流Ie 1係根據在該亮度測量用影像資料的 寫入動作中被寫入像素PIX且被保持於電晶體Tr 13之閘 極、源極間的電容器Cs之發光電壓(eVbrt)的電壓値而 規定,所以有機電致發光元件OEL以因應亮度測量用影像 資料的亮度灰階進行發光動作。 -85- 201113851 在此,亮度測量用影像資料nd_bM係在上述的特性參數 取得動作中,根據以對應於各像素的方式取得或產生之修 正資料△/?、nlh及參數K,來實施電壓振幅的設定、電流 放大率/3之偏差修正、驅動電晶體之臨限値電壓vth的變 動修正、及像素PIX內之寄生電容所引起之發光電壓Vei 的變動修正。 因此,藉由將同一亮度灰階値的亮度測量用影像資料 nd_b”寫入各像素Ρίχ ’使得從各像素ριχ的發光驅動電路 DC流通於有機電致發光元件〇el之發光驅動電流iei的電 流値不會受到電流放大率Θ之偏差或驅動電晶體之臨限値 電壓Vth之變動、或像素pIX內之寄生電容的影響,而被 設定成大致定値。 接著’在亮度測量用發光期間T2CW中所設定之發光亮 度測量期間T2。3 ’執行各像素ριχ之發光亮度的測量動作、 及用以修正各像素ΡΙΧ之發光電流效率^之修正資料△ β 的算出動作。 發光亮度的測量動作係如第3 5圖、第3 9圖所示,在 顯示面板1 1 0的各像素ΡΙχ中,在設定成電流値大致相同 的發光驅動電流Iel流通於有機電致發光元件〇EL而進行 發光動作之狀態,利用設置於顯示面板丨丨〇之射出面側的 亮度計或CCD相機160,測量各像素PIX的發光亮度Lv作 爲數位資料》將所測量的發光亮度Lv傳送到控制器15〇b 的修正資料取得功能電路1 5 6。 -86- 201113851 . 修正資料△〃的算出動作,係首先在設置於控制器 150b的修正資料取得功能電路156中算出修正資料△万 ”。所算出之△点,係和上述之檢測資料⑴或修正資料 一樣,以對應於各像素PIX的方式被記憶於記憶體155 的既定記憶區域。 (顯示動作) 其次’說明本實施形態之顯不裝置的顯示動作(發光動 作)。 在顯示裝置的發光動作中,使用該修正資料nih、 及參數Κ修正影像資料,使各像素ριχ以所要之亮度灰 階進行發光動作。 第40圖係表示本實施形態之顯示裝置之發光動作的 時序圖。 第41圖係表示本實施形態之顯示裝置之影像資料之 修正動作的功能方塊圖。 第42圖係表示本實施形態之顯示裝置之修正後之影 像資料之寫入動作的動作示意圖。 第43圖係表示本實施形態之顯示裝置之發光動作的 動作示意圖。 在此,在第42圖、第43圖中,作爲資料驅動器140 之構成,爲了便於圖示,而省略移位暫存器電路141的圖 ^Τ\ 。 -87 - 201113851 在本實施形態的顯示動作如第40圖所示’被設定成包 含按各列之像素PIX產生所要的影像資料並寫入的影像資 料寫入期間T 3 (H、及以因應該影像資料的亮度灰階使各像 素PIX進行發光動作的像素發光期間T3〇2。 在影像資料寫入期間Τ3。,,執行修正影像資料的產生 動作、及修正影像資料寫入各像素ΡΙΧ的動作。 修正影像資料的產生動作係在控制器1 50b中’對於由 數位資料構成之既定的影像資料na,使用藉上述特性參數 取得動作所取得之修正資料△ /5、△ 7?、nlh及預先根據顯 示面板110的各種設計資料所算出之參數K進行資料轉換 及修正,並將已進行修正處理的影像資料(修正影像資 料)nd_umP供給至資料驅動器140。 具體而言,如第41圖所示,在電壓振幅設定功能電路 15 2b,對從控制器150b之外部所供給之包含有RGB各色之 亮度灰階値的影像資料(第2影像資料)iu,藉由參照參照表 151,而以對應於RGB各色成分的方式進行如該第(27)式所 示的資料轉換處理,而產生轉換資料nd()Ul。 接著,讀出記憶體155所記憶之對應於各像素的修正 資料。利用K參數設定電路158設定參數K的値。 在此,參數K例如被設定成K= 1.1。 然後,在乘法功能電路1 5 3b,對從該電壓振幅設定功 能電路152b所輸出之數位資料(轉換資料)no。》,進行所讀出 之修正資料Δ/3。及參數K的乘法處理(Κχη^,χΔ泠)。 -88- 201113851 ' 接著’讀出記憶體15 5所記憶之規定修正資料nth的 檢測資料nm…(t。)及偏置電壓(―Voffset= — 1/(^ xt〇)),並在 乘法功能電路157a及157b進行參數K的乘法處理(κχ nmeas(t〇)、KxVoffset) 〇 接著,在加法功能電路154b,對來自該乘法功能電路 15 3b的數位資料(Kxnd()Ul)^召,),進行已乘以參數κ之檢 測資料nmeas(t〇)及偏置電壓(一 Voffset)的加法處理(κχ(ηι)…X △ /? + n i h)) 〇 藉由執行以上一連串的修正處理,而產生修正影像資 料並向資料驅動器14〇供給。 又’對各像素PIX之修正影像資料的寫入動作係在將 是寫入對象的像素PIX設定成選擇狀態之狀態,經由資料 線Ld(j)寫入因應於該修正影像資料ndt()nip的灰階電壓 Vdata。 具體而言,如第40圖、第42圖所示,首先,對該像 素PIX所連接的選擇線Ls,施加選擇位準(高位準:Vgh) 的選擇信號Ssel ’同時對電源線La施加低位準(非發光位 準:DVSS =接地電位GND)的電源電壓vsa。 在此選擇狀態’使開關SWi進行導通動作,而將開關 SW4及SW5设定成和接點Nb連接,藉此,將從控制器15〇b 所供給之修正影像資料nd依序取入資料暫存器電路 142 ’並由對應於各行的資料閂鎖41(j)保持。 -89- 201113851 所保持的影像資料^〃。^由DAC42(j)進行類比轉換, 並施加於各行的資料線Ld(j)作爲灰階電壓(第3電 壓)V d a t a。 在此,灰階電壓Vdau係根據該第(14)式所示的定義’ 被定義成如下的第(29)式。 ^data = - AV(nd_comp - 1)) …(29) 因而,在構成像素PIX的發光驅動電路DC,對電晶體 Trl3的閘極端子及電容器Cs的一端側(連接點Nil)施加低 位準的電源電壓Vsa( = GND)。 又,對電晶體Trl3的源極端子及電容器Cs的另一端 側(連接點N1 2)施加對應於該修正影像資料^。。^的灰階電 壓 V d a t a。 因此,因應電晶體Tr 1 3之閘極、源極端子間所產生之 電位差(閘極、源極間電壓Vgs)的汲極電流Id流動,而以 與根據該汲極電流Id之電位差對應的發光電壓( = Vdata)對 電容器Cs的兩端充電。 此時’因爲對有機電致發光元件OEL的陽極(連接點 N 12)施加比陰極(共用電極Ec)更低的電壓,所以電流不會 流向有機電致發光元件OEL,而不會進行發光動作。 接著’在像素發光期間T3t)2,如第40圖所示,在將各 列的像素PIX設定成非選擇狀態之狀態,使各像素PIX同 時進行發光動作。 -90- 201113851 - 具體而言’如第4 3圖所示,對排列於顯示面板丨丨〇之 全像素ΡΙΧ所連接的選擇線Ls施加非選擇位準(低位準: Vgl)的選擇信號Ssel’同時對電源線La施加高位準(發光位 準:ELVDD>GND)的電源電壓Vsa。 因而,設置於各像素PIX的發光驅動電路DC之電晶 體Trll、Trl2進行截止動作,而保持被充電至連接在電晶 體Tr 13之閘極、源極間之電容器Cs的電壓( = Vdata:閘極、 源極間電壓Vgs)。 因此,電晶體T r 1 3進行導通動作,汲極電流I d流動, 而電晶體Tr 1 3之源極端子(連接點N 1 2)的電位上昇至比被 施加於有機電致發光元件OEL之陰極(共用電極Ec)的電壓 ELVSS( = GND)更高時’發光驅動電流Iel從發光驅動電路 DC向有機電致發光元件OEL流動。 因爲此發光驅動電流Iel係根據在該修正影像資料的 寫入動作在電晶體Tr 1 3之閘極、源極間所保持之電壓 ( = Vdata)的電壓値被規定,所以有機電致發光元件〇EL以 因應於亮度測量用影像資料Ildwnp的亮度灰階進行發光動 作。 此外,在上述的實施形態,如第35圖、第40圖所示, 在用以取得修正資料△ β的動作及顯示動作,在對特定列 (例如第1歹U )之像素ΡΙΧ之亮度測量用影像資料或修正影 像資料的寫入動作結束後,至對其他的列(第2列以後)之 像素ΡΙΧ之影像資料的寫入動作結束爲止之間,該列之像 素ΡΙΧ被設定成保持狀態。 -91- 201113851 在此’在保持狀態,對該列的選擇線Ls施加非選擇位 準的選擇信號Ssel’而將像素PIX設爲非選擇狀態,同時 對電源線La施加於非發光位準的電源電壓Vsa,而設定成 非發光狀態。此保持狀態如第3 5圖 '第40圖所示,對各 列設定時間相異。又,在對各列之像素pIX之亮度測量用 影像資料或修正影像資料的寫入動作結束後,馬上進行使 像素PIX進行發光動作之驅動控制的情況,亦可是不設定 該保持狀態。 依此方式,在本實施形態的顯示裝置(包含有像素驅動 裝置的發光裝置)及發光裝置之驅動控制方法,具有將特有 的自動歸零法應用於本發明,並在相異的時序(緩和時間) 執行取入資料線電壓,並轉換成由數位資料所構成的檢測 資料之一連串之特性參數取得動作複數次的手法。 因而,若依據本實施形態,可取得修正各像素之驅動 電晶體之臨限値電壓的變動及各像素之電流放大率之偏差 的參數。 又’在本實施形態,具有在顯示面板或各像素的設計 階段,預先根據驅動電晶體所附加的寄生電容算出用以修 正由設置於各像素之驅動電晶體所附加的寄生電容所引起 之發光電壓之變動的參數K,並因應於顯示裝置的動作狀 態,適當地設定參數K之値的手法。 因而,若依據本實施形態,可對各像素所寫入的影像 資料施加用以補償各像素之臨限値電壓的變動、電流放大 -92- 201113851 • 率之偏差及由各像素之寄生電容所引起之發光電壓之變動 的修正處理。 進而’在本實施形態,具有根據用以修正上述之臨限 値電壓的變動與各像素間之電流放大率之偏差的修正資 料、及各像素之發光電壓之變動的參數,在設定成均勻的 發光驅動電流向各像素流動之狀態,測量各像素之發光亮 度的手法。因而’若依據本實施形態,可取得修正各像素 間之發光電流效率之偏差的參數。 因此’若依據本實施形態,在影像資料之寫入時,可 對各像素所寫入的影像資料,施加用以補償各像素之臨限 値電壓的變動 '各像素間之電流放大率及發光電流效率的 偏差及由各像素之發光電壓之變動的修正處理。因而,若 依據本實施形態,不管各像素之特性變化或特性之偏差的 狀態’可使發光元件(有機電致發光元件)以因應於影像資 料之本來的亮度灰階進行發光動作,而可實現具有良好之 發光特性及均勻之畫質的主動有機電致發光驅動系統。 又’在本實施形態,可利用在具備單一之修正資料取 得功能電路156的控制器150b之一連串的順序執行算出用 以修正包含有發光電流效率之電流放大率的偏差之修正資 料的處理、及算出用以補償驅動電晶體之臨限値電壓的變 動之修正資料的處理。 因此,若依據本實施形態,因爲不必因應於修正資料 之算出處理的內容而設置個別之構成(功能電路),又,具 -93- 201113851 備參照表’可根據對應於各色的轉換表(7表)上施加用以 補償各像素之發光電壓之變動的修正處理,所以可簡化顯 示裝置(發光裝置)的裝置構成。 (第3實施形態) 其次,參照圖面說明將上述之第1及第2實施形態的 顯示裝置應用於電子機器的第3實施形態。 如上述之第1及第2實施形態所示,具備在各像素PIX 具有由有機電致發光元件OEL所構成之發光元件之顯示面 板110的顯示裝置100,係可應用於數位相機、移動式個人 電腦、手機等各種電子機器。 第44A圖及第44B圖係表示應用第1實施形態之顯示 裝置(發光裝置)之數位相機之構成例的立體圖。 第45圖係表示應用第1實施形態之顯示裝置(發光裝 置)之移動式個人電腦之構成例的立體圖。 第46圖係表示應用第1實施形態之顯示裝置(發光裝 置)之手機之構成例的立體圖。 在第44A圖及第44B圖,數位相機200具備本體部 201、透鏡部202、操作部203、由具備本實施形態之顯示 面板1 10之顯示裝置100所構成的顯示部204及快門按鈕 205。在此情況,在顯示部204中,顯示面板110之各像素 的發光元件以因應於影像資料之適當的亮度灰階進行發光 動作,而可實現良好且均質的畫質。 -94- 201113851 • 又,在第45圖,個人電腦210具備本體部21 1、鍵盤 212、及由具備本實施形態之顯示面板11〇之顯示裝置100 所構成的顯示部213。在此情況亦爲,在顯示部213中,顯 示面板110之各像素的發光元件以因應影像資料之適當的 亮度灰階進行發光動作,而可實現良好且均質的畫質。 又,在第46圖,手機220具備操作部221、聽話口 222、 傳話口 223及由具備本實施形態之顯示面板110之顯示裝 置100所構成的顯示部224。在此情況亦爲,在顯示部224 中,顯示面板1 1 0之各像素的發光元件以因應影像資料之 適當的亮度灰階進行發光動作,而可實現良好且均質的畫 質。 此外,在該實施形態中,雖然說明將本發明應用於具 備在各像素PIX具有由有機電致發光元件OEL所構成之發 光元件之顯示面板110的顯示裝置(發光裝置)1 00的情況, 但是本發明未限定如此。本發明亦可應用於例如具備在一 方向排列具有由有機電致發光元件OEL所構成之發光元件 的複數個像素之發光元件陣列,並將因應影像資料從發光 元件陣列射出的光照射於感光體鼓而曝光的曝光裝置。在 此情況,可使發光元件陣列之各像素的發光元件以因應影 像資料之適當的亮度進行發光動作,而可得到良好的曝光 狀態。 同業者將可輕易連想到其他優點及修改,因此,本發 明之範圍不限定於此處所示與所述之特定細節及代表的實 -95- 201113851 施例。因此,在未超出隨附之申請專利範圍與其等效者所 界定之一般發明構思的精神或範圍內可作各種修改。 【圖式簡單說明】 第1圖係表示應用本發明之發光裝置之顯示裝置之_ 例的示意構成圖。 第2圖係表示應用於第1實施形態之顯示裝置之資料 驅動器之一例的示意方塊圖。 第3圖係表示應用於第1實施形態之顯示裝置之資料 驅動器之主要部分構成例的示意電路構成圖。 第4圖係表示應用於第1實施形態之資料驅動器之數 位-類比轉換電路及類比一數位轉換電路的輸出輸入特性 圖。 第5圖係表示應用於第1實施形態之顯示裝置之控制 器之功能的功能方塊圖。 第6圖係表示應用於第1實施形態之顯示面板之像素 之一實施形態的電路構成圖。 第7圖係表示應用第1實施形態之發光驅動電路之像 素在寫入影像資料時的動作狀態圖。 第8圖係表示應用第1實施形態之發光驅動電路之像 素在寫入動作時的電壓一電流特性圖。 第9圖係表示第1實施形態之特性參數取得動作所應 用之手法(自動歸零法)之資料線電壓的變化圖。 第1 0圖係表示第1實施形態之顯示裝置之特性參數取 得動作的時序圖(之一)。 -96- 201113851 ' 第1 1圖係表示第1實施形態之顯示裝置之檢測用電壓 施加動作的動作示意圖。 第12圖係表示第1實施形態之顯示裝置之自然緩和動 作的動作示意圖。 第13圖係表示第1實施形態之顯示裝置之資料線電壓 檢測動作的動作示意圖。 第1 4圖係表示第1實施形態之顯示裝置之檢測資料送 出動作的動作示意圖。 第1 5圖係表示第1實施形態之顯示裝置之修正資料算 出動作的功能方塊圖。 第1 6圖係表示第1實施形態之顯示裝置之特性參數取 得動作的時序圖(之二)。 第1 7圖係表示第1實施形態之顯示裝置之亮度測量用 影像資料之產生動作的功能方塊圖。 第1 8圖係表示第1實施形態之顯示裝置之亮度測量用 影像資料之寫入動作的動作示意圖。 第19圖係表示第1實施形態之顯示裝置之亮度測量用 發光動作的動作示意圖。 第20圖係表示第1實施形態之修正資料算出動作的功 能方塊圖(之二)。 第21圖係表示第1實施形態之顯示裝置之發光動作的 時序圖。 第22圖係表示第1實施形態之顯示裝置之影像資料之 修正動作的功能方塊圖。 -97- 201113851 第23圖係表示第1實施形態之顯示裝置之修正後之影 像資料之寫入動作的動作示意圖》 第24圖係表示第1實施形態之顯示裝置之發光動作的 動作示意圖。 第2 5圖係表示應用於第2實施形態之顯示裝置之控制 器之功能的功能方塊圖。 第2 6圖係表示應用第2實施形態之發光驅動電路之像 素之有機電致發光元件在發光時的動作狀態圖。 第27圖係表示第2實施形態之像素的發光動作時之有 機電致發光元件之發光電壓和發光驅動電流之關係的特性 圖。 第2 8圖係用以說明應用於第2實施形態之控制器的參 照表之資料轉換處理的圖。 第29圖係表示第2實施形態之顯示裝置之特性參數取 得動作的時序圖(之一)。 第30圖係表示第2實施形態之顯示裝置之檢測用電壓 施加動作的動作示意圖。 第3 1圖係表示第2實施形態之顯示裝置之自然緩和動 作的動作示意圖。 第32圖係表示第2實施形態之顯示裝置之資料線電壓 檢測動作的動作示意圖。 第3 3圖係表示第2實施形態之顯示裝置之檢測資料送 出動作的動作示意圖。 •98- 201113851 • 第34圖係表示第2實施形態之顯示裝置之修正資料算 出動作的功能方塊圖(之一)。 第35圖係表示第2實施形態之顯示裝置之特性參數取 得動作的時序圖(之二)。 第3 6圖係表示第2實施形態之顯示裝置之亮度測量用 之影像資料之產生動作的功能方塊圖。 第3 7圖係表示第2實施形態之顯示裝置之亮度測量用 之影像資料之寫入動作的動作示意圖。 第3 8圖係表示第2實施形態之顯示裝置之亮度測量用 之發光動作的動作示意圖。 第39圖係表示第2實施形態之修正資料算出動作的功 能方塊圖(之二)。 第40圖係表示第2實施形態之顯示裝置之發光動作的 時序圖。 第41圖係表示第2實施形態之顯示裝置之影像資料之 修正動作的功能方塊圖。 第42圖係表示第2實施形態之顯示裝置之修正後之影 像資料之寫入動作的動作示意圖。 第43圖係表示第2實施形態之顯示裝置之發光動作的 動作示意圖。 第44A圖及第44B圖係表示第3實施形態之數位相機 之構成的立體圖。 第45圖係表示第3實施形態之移動式個人電腦之構成 的立體圖。 -99- 201113851 之構成圖。 第46圖係表示第3實施形態之手 【元件符號說明】 100 顯示裝置 110 顯示面板 120 選擇驅動器 130 電源驅動器 140 資料驅動器 140A 、 140B 內部電路 141 移位暫存器電路 142 資料暫存器電路 143 資料閂鎖電路 144 DAC/ADC 電路 145 輸出電路 146 邏輯電源 147 類比電源 150 、 150a 、 1 5 0b控制器 151 參照表(LUT) 152a 電壓振幅設定功能電 153a 乘法功能電路(影像1 154a 加法功能電路(影像| 155 言己憶體(記億電路) 156 修正資料取得功能1 電路) 路 :料修正電路) :料修正電路) :路(特性參數取得 -100- 201113851 41(j) 42(j) 43(j) 44(j) ' 45(j) Ld La Ls SW1' SW2 ' SW3 SW4、SW5Vbrt = Vx - AV(nd brt -1)) (28) In this manner, a series of correction processing is performed on a specific image data, and a gray scale voltage vb for luminance measurement is generated, and written in the display panel 110, Thereby, the current 値 of the light-emission drive current Iel flowing from the light-emitting drive circuit DC of each pixel PIX to the organic electroluminescent element OEL can be set to a constant value without being biased by the current amplification factor or driving the transistor. The effect of the variation of the threshold voltage Vth is not affected by the parasitic capacitance when the light-emitting drive circuit DC is driven. -72- 201113851 Then, in this state, the display panel i 0 is illuminated, and the light emission luminance Lv (cd/m2) of each pixel 测量 is measured. Here, as for the method of measuring the luminance of each pixel PIX, the same method as that described in the above-described third embodiment can be applied. Then, as described above, the correction data (fourth characteristic parameter) Δ $ of the deviation between the current amplification factor Θ and the luminous current efficiency is obtained based on the measurement of the luminance of the light emission. The correction data n, h obtained by the characteristic parameter acquisition operation, Δ /3 obtained based on the measurement of the luminance of the light, and the parameter K are in the display operation described later 'for the display device 1 according to the present embodiment. Externally input image data η <ι 'Setting voltage amplitude (data conversion in equation (23)), current amplification factor/3 deviation correction (△ no multiplication correction), illuminating current efficiency ^ deviation correction (△ multiplication correction), threshold It is used when the corrected image data nd^mp is generated by the variation correction of the 値 voltage Vth (n, h addition correction) and the variation correction of the illuminating voltage Vel caused by the parasitic capacitance in the pixel PIX (kappa multiplication correction). Therefore, since the gray scale voltage Vdata corresponding to the analog voltage nd „ mp of the image data nd_„mp is supplied from the data driver 140 to the respective pixels PIX via the data line L10, the organic electroluminescent element 〇EL of each pixel PIX can be made When it is affected by the variation of the current amplification factor A or the luminous current efficiency 、, the threshold voltage of the driving transistor, the voltage Vth, or the variation of the illuminating voltage Vel, the illuminating operation is performed at the desired gradation of the brightness, and the illuminating operation can be achieved. In the following, the characteristic parameter obtaining operation using the automatic zeroing method described above will be described in a manner related to the device configuration of the present embodiment. -73- 201113851 Further, in the following description, regarding the above characteristic parameters The operation of obtaining the same operation is simplified or omitted. First, the correction data nlh for correcting the variation of the threshold voltage Vth of the driving transistor of each pixel and the current amplification factor for correcting each pixel are obtained. Correction data of the deviation. Fig. 29 is a timing chart showing the operation of obtaining the characteristic parameters of the display device of the embodiment. Fig. 30 is a view showing the operation of the voltage application operation for detecting the display device of the embodiment. Fig. 31 is a view showing the operation of the natural mitigation operation of the display device of the embodiment. Fig. 33 is a view showing the operation of the data transmission operation of the display device of the embodiment. Fig. 34 is a view showing the operation of the detection data transmission operation of the display device of the embodiment. Here, in the 30th to 33rd drawings, the configuration of the data driver 140 is omitted. The illustration of the shift register circuit 141 is omitted for convenience of illustration. In the operation of the characteristic parameters (correction data n, h, Δ yS ) of the form, as shown in Fig. 29, each pixel PIX of each column is set to include the detection voltage application period in the predetermined characteristic parameter acquisition period Tcpr. Natural relaxation period Τι (»2, data line voltage detection period Tl <) 3 and the detection data delivery period Τ 1 (μ. -74 - 201113851 • Here, the natural relaxation period Τ !. 2 corresponds to the above-mentioned relaxation time t, and in Fig. 29, for convenience of illustration, The relaxation time t is set to the time of one time, but in practice, the data line voltage is repeatedly executed during the natural relaxation period T, the different relaxation times t (= t 〇, t, 12, 13 ) in 〇 2 Detection operation (data line voltage detection period T1(n) and detection data transmission operation (detection data transmission period Τ1 (Μ). First, in the detection voltage application period T i.i, as shown in Fig. 2, Fig. 3 0 As shown in the figure, the pixel PIX (the pixel PIX of the first column in the figure) which is the target of the characteristic parameter acquisition operation is set to the selected state. That is, the selection line Ls to which the pixel PIX is connected is selected from the selection driver 120. The selection signal Ssel of the level (high level: Vgh) simultaneously applies a power supply voltage V sa of a low level (non-light-emitting level: DVSS = ground potential GND) from the power source driver 130 to the power source line La. Then, the state is selected here, According to the cut from the controller 1 50a The control signal S1 is turned on, and the switch SW1 provided in the output circuit 145 of the data driver 140 is turned on, thereby connecting the data line Ld(j) and the DAC 42(j) of the DAC/ADC 144. Further, according to the slave controller 150b The switching control signals S2 and S3 are turned off by the switch SW2 provided in the output circuit 145, and the switch SW3 connected to the contact Nb of the switch SW4 is turned off. Further, the switching control signal S4 is supplied based on the slave controller 150b. , the switch SW4 placed in the data latch circuit 143 is set to be connected to the contact point Na g , and according to the switching control signal S5 , the switch SW5 is set to be connected to the contact point Na. -75- 201113851 Then 'to generate the established The digital data nd of the voltage detection detection voltage Vdac is sequentially taken from the data driver 1 4 取 into the data register circuit 1 42 ' and held in the data lock 41(j) via the switch SW5 corresponding to each row. Then 'data latch 4 1 (j) holds the digital data η <1 is input to the DAC 42U of the DAC/ADC circuit 144 via the switch SW4 to perform analog conversion, and is applied to the data line LdU of each row as the detection voltage Vdac. Here, in order to generate the detection voltage Vdac, the digital data (image data) na is used in the above-described controller 150b, and the specific digital data (image data) for obtaining the parameter input from the outside is used to set the function circuit using the voltage amplitude. The 152b, the multiplication function circuit i53b, and the addition function circuit 15 are generated by applying data conversion and correction processing. In this case, the parameter K' set to the data conversion processing of the reference table 151 and the correction processing of the multiplication function circuit 153b and the addition function circuit 154b is set to K = 1.0 by the K parameter setting circuit 158. Therefore, the data conversion processing performed by the voltage amplitude setting function circuit 15 2b with reference to the reference reference table 151 is performed because the digital data input according to the equation (23) is directly outputted, so the voltage amplitude is substantially set and set. The functional circuit 152b is set to be in the state of straight-through or bypass. Further, since the correction data Δ /3, nltl 使用 used for the correction processing of the multiplication function circuit 153b and the addition function circuit 154b are not acquired, these are set to start 値' or the multiplication function circuit 153b and the addition function circuit 1 54b. It is set to, for example, a through state. -76-201113851 * Therefore, the digital data outputted from the voltage amplitude setting function circuit 152b is directly supplied to the data driver 140 as the digital data nd for setting the detection voltage Vdac. Therefore, the transistors Tr11 and Tr12 provided in the light-emitting drive circuit DC constituting the pixel PIX are turned on, and the low-level power supply voltage Vsa (= GND) is applied to the gate terminal of the transistor Tr13 via the transistor Tr1 1 and One end side of the capacitor Cs (connection point Ν 1 1). Further, the detection voltage Vdac applied to the data line Ld(j) is applied to the source terminal of the transistor Tr13 and the other end side (connection point N12) of the capacitor Cs via the transistor Tr1 2 . In this manner, by applying a potential difference larger than the threshold voltage Vth of the transistor Tr13 to the gate and source terminals of the transistor Tr13 (i.e., both ends of the capacitor Cs), the transistor Tr1 3 is caused to proceed. The conduction action is performed, and the drain current Id corresponding to the potential difference (gate voltage, source-to-source voltage Vgs) flows. At this time, since the potential of the source terminal of the transistor Tr13 (detection voltage Vdac) is set lower than the potential of the 汲 terminal (ground potential GND), the drain current Id is from the power supply voltage line La via the transistor Tr13 The connection point N12, the transistor Tr12, and the data line Ld(j) flow toward the data driver 140. Further, both ends of the capacitor Cs connected between the gate and the source of the transistor Tr 13 are charged with a voltage corresponding to the potential difference according to the drain current Id. At this time, the current does not flow to the organic electroluminescent element OEL, and the light-emitting operation is not performed. -77- 201113851 Next, 1 ' during the detection voltage application period τ. After the end of the natural relaxation period &(> 2 ' as shown in Fig. 29 and Fig. 31, the switching control signal supplied from the controller 丨5 〇b is maintained while the pixel Ριχ is held in the selected state. S 1 'cuts the switch sw 1 of the data driver 1 4 , to thereby "separate the data line Ld(j) from the data driver 14 , while stopping the output of the detection power from the DAC 42 (j). 'With the above-described detection voltage application period T|(n), the switches SW2 and SW3 are turned off, and the switch SW4 is set to be connected to the contact Nb. The switch SW5 is set to be connected to the contact Nb. The transistors Tr 1 1 and Tr 1 2 are kept in an on state, and although the pixel PIX (light-emitting drive circuit DC) maintains a state of being electrically connected to the data line Ld(j), but because the voltage is applied to the data line LdU, the voltage is applied. The other end side of the capacitor Cs (connection point N12) is set to a high impedance state. Here, the natural relaxation period T i 02 ' is charged to the capacitor Cs (the gate of the transistor Tr13) by the detection voltage application period Τιβ1 Voltage between source and source The transistor T r 1 3 remains in an on state, and the drain current Id continues to flow. Then the potential of the source terminal side of the transistor Tr13 (connection point N12: the other end side of the capacitor Cs) gradually rises to approach the transistor Tr13 The threshold voltage Vth is thus limited. Therefore, the potential of the data line Ld(j) also changes to converge to the threshold voltage Vth of the transistor Tr13. In addition, during the natural relaxation period Τιβ2, the current does not flow to the organic electroluminescent element. OEL, and will not perform the illuminating action. -78- 201113851 Then ' during the data line voltage detection period τ,.;; during this natural mitigation period Τ1 <)2, at a time point when the predetermined relaxation time t has elapsed, as shown in Figs. 29 and 32, in a state where the pixel PIX is held in the selected state, based on the switching control signal S2 supplied from the controller 150b, The switch SW2 of the data driver 140 performs an on operation. At this time, the switches Swi and SW3 perform the cutting operation ', the switch SW4 is set to be connected to the contact Nb, and the switch SW5 is set to be connected to the contact Nb. By means of the 'connected data line Ld(j) and the ADC43(j) of the DAC/ADC 144, the data line voltage Vd at the time point when the natural relaxation period Τ1β2 passes the predetermined relaxation time t is via the switch SW2 and the buffer 45(j). The data line detection voltage Vmeas(t), which is taken into the ADC43(j)» and then taken into the ADC43(j) by the analog signal voltage, is converted into the ADC43(j) according to the equation (14). The detection data nratas(t) composed of digital data is held by the data latch 41(j) via the switch SW5. Then, 'In the detection data transmission period T1 (m, as shown in FIG. 29 and FIG. 33, 'the pixel PIX is set to the non-selection state. ' From the selection driver 1 20, the selection line Ls is applied with a non-selection level (low level: The selection signal Ssel of Vgl). In this non-selected state, the switch SW5 of the input section of the data latch 41(j) of the data driver 140 is set according to the switching control signals S4, S5 supplied from the controller 150b. The switch SW4 disposed in the output section of the data latch 41(j) is set to be connected to the contact Nb. Further, the switch SW3 is turned on according to the switching control signal S3. The switches SW1 and SW2 are turned off according to the switching control signals S1 and S.2. -79- 201113851 Because the SW5 series demon LP, the data is stored in the pressure detection t (=tO, in the difference can be only The different measurement actions are different from each other. The detection of the needles is corrected by the correction of each Vth. The data latches of the adjacent rows are latched 4 1 (j) via the switches S W4 , L' Connected via switch SW 3 to external controller 1 50 b. The data latches 41 U+l) of each row of the data latch pulse signal supplied from the controller 1 5 〇b (see FIG. 3) are detected (1) sequentially transferred to the adjacent data latch 41 (j) And 'output 1 column of pixel PIX detection data nm 〃 s (t) as material ' as shown in Figure 34, and in a manner corresponding to each pixel 设置 in the controller 1 5 Ob memory 1 In the above-described series of operations, the data line electric operation and the detection data transmission operation are set to different mitigation times tl 't2, t3)' to perform a plurality of times for each pixel ριχ. . Here, the operation of detecting the data line voltage at the relaxation time t is as described above, and the data line is applied at the timing t (duration time t = 10, 11, 12, 13) while the detection voltage is applied once and the natural relaxation is continued. The voltage detection and detection data transmission operation is performed a plurality of times, and the mitigation time can be performed multiple times in a series of actions of voltage application detection, natural mitigation, data line voltage detection, and material delivery. Repeating the above parameters for the pixels of each column to obtain the moving pixels arranged in the display panel 1 1 0 of the full pixel ρ IX to multiplicate the material nmeas (t) 53 recall the memory of the controller 1 5 0 b Body 1 5 ^. According to the detection data n„tas(t) of each pixel PIX, the threshold data of the transistor (driving transistor) Tr3 for the pixel PIX is executed, and the correction data for correcting the current amplification rate is performed. -80- 201113851 • Specifically, 'As shown in Figure 34, first, it is set in the controller 150b 2 # IE stomach insult function circuit 丨 5 6, read and memory 1 5 5 memory Each of the pixels ΡΙΧ corresponds to the detection data nin 〃 s(t). The 彳 ' 在 IE data acquisition function circuit 156, according to the above-mentioned use of the automatic zeroing method of the characteristic parameters to obtain the action, according to the formula (15) ~ (21) Formula 'calculates the correction data nlh (specifically, the correction data n, h the detection data 11m... (to) and the bias voltage (_ V〇ffset = _ 1 / 芒 xto) and the correction data call The calculated correction data n, h, and Δ are not stored in the predetermined memory area of the memory 155 in a manner corresponding to each pixel PIX. Then, using the correction data nu and the parameter K, the pixels for correcting each pixel are obtained. Correction data of the deviation of the luminous current efficiency of PIX △ V ° Fig. 35 shows the present A timing chart (2) of the characteristic parameter obtaining operation of the display device of the embodiment. Fig. 3 is a functional block diagram showing the operation of generating the luminance measurement video data of the display device of the embodiment. Fig. 38 is a view showing the operation of the light-emitting operation for luminance measurement of the display device of the present embodiment. Fig. 39 is a view showing the operation of the light-emitting operation for luminance measurement of the display device of the present embodiment. The function block diagram (2) of the data calculation operation is corrected. Here, in the 37th and 38th drawings, as the configuration of the data driver 140, the illustration of the shift register circuit 141 is omitted for convenience of illustration. 81 - 201113851 The characteristic parameter (correction data Δ π ) acquisition operation of the present embodiment is set as shown in Fig. 35, and is set to include luminance measurement for generating luminance measurement video data for each pixel ρι of each column. Image data writing period Τ2 <η, the light-emitting luminance period Τ2β2 for measuring the luminance of each pixel 因 in accordance with the luminance gray scale of the image data for luminance measurement, and the luminance luminance measurement period Τ2 for measuring the luminance of each pixel (Π. Here, the luminance The measurement illuminating period Τ2. 2 includes the illuminance luminance measurement period Τ2 <η, the measurement operation of the light emission luminance is performed in the luminance measurement light-emitting period T2D2. In the luminance measurement video data writing period T2 (n, the operation of generating the luminance measurement video data and the luminance measurement video data are performed in each pixel 。. The operation of generating the luminance measurement video data is performed in the controller 15 0 b, using the correction data obtained by the above-mentioned characteristic parameter acquisition operation △ 10,000 and n, n, and the parameter 预先 calculated in advance based on various design data of the display panel 11 〇 or each pixel ρι Κ, for a predetermined brightness measurement digital position The data nd is subjected to data conversion and correction, and the luminance measurement video data nd_brt is generated. Specifically, as shown in FIG. 36, first, by referring to the reference table 151 in the voltage amplitude setting function circuit 15 2b of the controller 150b, On the other hand, the digital data nd for luminance measurement input from the outside is subjected to the data conversion processing as shown in the above formula (23), and the converted data nd is generated.", » Next, the correspondence of the memory of the recorded body is read. The correction data Δ/3 of each pixel is further set by the K parameter setting circuit 158. Here, the parameter K is set, for example, to K = 11. -82 - 201113851 After 'function in the multiplication circuit 153b, the amplitude setting function circuit 152b outputs the voltage from the digital data (converted data) n <Uui performs the multiplication processing of the correction data call and the parameter K (ΚχηοουχΛ /3) » Next, the read data of the specified correction data nlh memorized by the read memory 1 5 5 nmias (t〇 and bias voltage (a v 〇ffset=−1/f xu), and multiplication processing (Kx nm"s(t〇), KxVoffset) of the parameter K is performed in the multiplication function circuits 157a and 157b. Next, in the addition function circuit 15 4b, the pair is derived from Digital data of multiplication function circuit 1531? (1〇 <11(!.^/\/5), the addition processing of the parameter nmeas(U) and the bias voltage (―Voffset) multiplied by the parameter Κχ(η(η <1 <) 11, χΛ cold + nih)). By performing the above correction processing, image data for luminance measurement is generated and supplied to the data driver 140. Further, the operation of writing the image data for the luminance measurement to each of the pixels PIX is the same as the detection voltage application operation (the state in which the pixel PIX to be written is set to the selected state in the same manner as the detection voltage application period T1...). The data line Ld(j) is written in the luminance measurement gray scale voltage VbM for the luminance measurement video data nd_brl. Specifically, as shown in FIG. 35 and FIG. 37, first, the connection of the pixel PIX is selected. The line Ls, the selection signal Ssel of the selected level (high level: Vgh) is applied, and the power supply voltage Vsa of the low level (non-light-emitting level: DVSS = ground potential GND) is applied to the power line La. -83- 201113851 The state 'the switch s W 1 is turned on, and the switches SW4 and SW5 are set to be connected to the contact Nb, whereby the brightness measurement image data nd_b supplied from the controller 150b is sequentially taken in data. The circuit 142' is held by the data latch 4i(j) corresponding to each row. The held image data is analog-converted by the DAC 42(j) and applied to the data line Ld(j) of each row as a gray for luminance measurement. Order voltage Vb M. Here, the gray scale voltage Vh for luminance measurement is set to a voltage 满足 satisfying the condition of the equation (2 8) as described above. Thus, in the light-emitting drive circuit DC constituting the pixel PIX, the power is applied. The gate terminal of the crystal Tr13 and the one end side of the capacitor Cs (connection point Nil) apply a low level power supply voltage Vsa (= GND), and further, the source terminal of the transistor Tr13 and the other end side of the capacitor Cs (connection point) N1 2) The gray scale voltage Vbrt for the luminance measurement is applied. Therefore, the drain current Id of the potential difference (gate and source voltage Vgs) generated between the gate and the source terminal of the transistor Tr 1 3 flows, Further, both ends of the capacitor Cs are charged with a light-emitting voltage (β V brt ) corresponding to the potential difference of the drain current Id. At this time, since the anode (connection point N12) of the organic electroluminescent element OEL is applied to the cathode ( Since the common electrode Ec) has a lower voltage, the organic electroluminescent element OEL does not flow a current, and does not perform a light-emitting operation. Next, in the luminance measurement light-emitting period T2〇2, as shown in FIG. The pixel of the column is set to non-selected The state of the state causes each pixel to simultaneously emit light. -84- 201113851 _ In particular, as shown in Fig. 38, a non-selection bit is applied to the selection line Ls connected to the all-pixel PIX arranged on the display panel no The selection signal Ssel of the quasi (low level: Vgl) is applied to the power supply line La at the same time as the power supply voltage Vsa of the high level (light emission level: ELVDD > GND). Thus, the transistor Tr of the light-emitting drive circuit DC of each pixel PIX is provided. 11. Tr 12 performs a turn-off operation while maintaining the illuminating voltage of the capacitor Cs connected to the gate 'source' of the transistor Tr 13 . Therefore, the gate voltage and the inter-source voltage Vgs of the transistor Tr 1 3 are held by the light-emission voltage (==Vbrt) charged to the capacitor Cs, and the transistor Tr 1 3 is turned on to flow the drain current Id, and the transistor Tr1 The potential of the source terminal (connection point N12) rises. Then, the potential of the source terminal of the transistor Tr13 (connection point N12) rises to be higher than the voltage ELVSS (= GND) applied to the cathode (common electrode Ec) of the organic electroluminescent element OEL, and is organically induced. The light emitting element OEL applies a forward bias. Therefore, the light-emission drive current Iel flows from the power supply line La through the transistor Tr13, the connection point N12, and the organic electroluminescent element OEL in the direction of the common electrode Ec, and the organic electroluminescent element 0EL performs the light-emission operation. The light-emission drive current Ie 1 is based on the light-emitting voltage (eVbrt) of the capacitor Cs that is written in the pixel PIX and held between the gate and the source of the transistor Tr 13 in the address operation of the luminance measurement image data. Since the voltage is defined by the enthalpy, the organic electroluminescent element OEL emits light in response to the luminance gray scale of the image data for luminance measurement. -85-201113851 Here, the luminance measurement video data nd_bM performs voltage amplitude based on the correction data Δ/?, nlh, and the parameter K acquired or generated corresponding to each pixel in the characteristic parameter obtaining operation described above. The setting, the current amplification factor/3 deviation correction, the drive transistor threshold, the voltage vth variation correction, and the variation of the illuminating voltage Vei caused by the parasitic capacitance in the pixel PIX. Therefore, by applying the luminance measurement image data nd_b" of the same luminance gray scale 写入 to each pixel Ρίχ', the light from the light-emitting drive circuit DC of each pixel ρι flows to the light-emission drive current iei of the organic electroluminescence element 〇el値 is not set to be substantially constant by the variation of the current amplification factor 或 or the variation of the driving transistor threshold voltage Vth or the parasitic capacitance in the pixel pIX. Then 'in the luminance measurement period T2CW The set light-emitting luminance measurement period T2. 3 ' performs a measurement operation of the light-emitting luminance of each pixel ριχ and a correction operation for correcting the correction data Δβ of the light-emitting current efficiency of each pixel 。. As shown in FIGS. 3 and 3, in each of the pixels 显示 of the display panel 110, the light-emission drive current Iel set to have substantially the same current 流通 flows through the organic electroluminescent element 〇EL, and the light-emitting operation is performed. In the state, the luminance Lv of each pixel PIX is measured as a digital position using a luminance meter or a CCD camera 160 provided on the emission surface side of the display panel 丨丨〇. The material transmits the measured light-emission luminance Lv to the correction data acquisition function circuit 1 5 6 of the controller 15〇b. -86- 201113851. The calculation operation of the correction data Δ〃 is first performed on the correction data set in the controller 150b. The acquisition function circuit 156 calculates the correction data Δ10000". The calculated Δ point is stored in a predetermined memory area of the memory 155 in a manner corresponding to each pixel PIX, similarly to the above-described detection data (1) or correction data. (Display Operation) Next, the display operation (light-emitting operation) of the display device of the present embodiment will be described. In the light-emitting operation of the display device, the correction data nih and the parameter Κ are used to correct the image data, so that each pixel ρι 进行 emits light at a desired gray level. Fig. 40 is a timing chart showing the light-emitting operation of the display device of the embodiment. Fig. 41 is a functional block diagram showing the correction operation of the image data of the display device of the embodiment. Fig. 42 is a view showing the operation of the operation of writing the corrected image data of the display device of the embodiment. Fig. 43 is a view showing the operation of the light-emitting operation of the display device of the embodiment. Here, in the 42nd and 43rd drawings, as the structure of the data driver 140, the map of the shift register circuit 141 is omitted for convenience of illustration. -87 - 201113851 In the display operation of the present embodiment, as shown in Fig. 40, the image data writing period T 3 (H, and cause) is set to include the desired image data generated by the pixels PIX of each column. The pixel illumination period T3〇2 of the luminance gray scale of the image data for each pixel PIX to emit light is performed. During the image data writing period Τ3, the operation of correcting the image data is performed, and the correction of the image data is performed for each pixel. The operation of correcting the image data is performed in the controller 150b, 'for the predetermined image data na composed of the digital data, the correction data Δ /5, Δ 7 、, nlh obtained by the above-mentioned characteristic parameter acquisition operation are used. Data conversion and correction are performed in advance based on the parameter K calculated from various design data of the display panel 110, and the image data (corrected image data) nd_umP subjected to the correction processing is supplied to the data driver 140. Specifically, as shown in Fig. 41 In the voltage amplitude setting function circuit 15 2b, the image resource including the RGB color gamma of each of the RGB colors is supplied to the outside of the controller 150b. (Second video data) iu, by referring to the reference table 151, the data conversion processing shown in the above equation (27) is performed so as to correspond to the RGB color components, and the conversion data nd()U1 is generated. The correction data corresponding to each pixel stored in the memory 155 is read. The K parameter setting circuit 158 sets the parameter K of the parameter K. Here, the parameter K is set, for example, to K = 1.1. Then, in the multiplication function circuit 1 5 3b The digital data (conversion data) no output from the voltage amplitude setting function circuit 152b is read, and the read correction data Δ/3 and the multiplication processing of the parameter K (Κχη^, χΔ泠) are performed. - 201113851 'Next' reads the detection data nm...(t.) and the bias voltage (“Voffset= — 1/(^ xt〇))) of the specified correction data nth stored in the memory 15 5 , and in the multiplication function circuit 157a and 157b perform multiplication processing of the parameter K (κχ nmeas(t〇), KxVoffset). Next, in the addition function circuit 154b, the digital data (Kxnd()U1) from the multiplication function circuit 15 3b is called, Performing the test data nmeas(t〇) multiplied by the parameter κ and The addition processing of the bias voltage (a Voffset) (κχ(ηι)...X Δ /? + n i h)) 修正 By performing the above-described series of correction processing, the corrected image data is generated and supplied to the data driver 14〇. Further, the writing operation of the corrected image data for each pixel PIX is performed in a state in which the pixel PIX to be written is set to the selected state, and is written in the data line Ld(j) in response to the corrected image data ndt() nip. Gray scale voltage Vdata. Specifically, as shown in FIG. 40 and FIG. 42, first, a selection signal Ssel' of a selected level (high level: Vgh) is applied to the selection line Ls to which the pixel PIX is connected, and a low level is applied to the power supply line La. The power supply voltage vsa (non-lighting level: DVSS = ground potential GND). In this case, the state 'the switch SWi is turned on, and the switches SW4 and SW5 are set to be connected to the contact Nb, whereby the corrected image data nd supplied from the controller 15〇b is sequentially taken into the data. The memory circuit 142' is held by the data latch 41(j) corresponding to each row. -89- 201113851 Image data kept ^〃. ^ Analog conversion is performed by the DAC 42(j), and the data line Ld(j) applied to each row is used as the gray scale voltage (third voltage) V d a t a. Here, the gray scale voltage Vdau is defined as the following equation (29) according to the definition ' shown by the above formula (14). ^data = - AV(nd_comp - 1)) (29) Therefore, at the light-emitting drive circuit DC constituting the pixel PIX, a low level is applied to the gate terminal of the transistor Tr13 and the one end side (connection point Nil) of the capacitor Cs. Supply voltage Vsa ( = GND). Further, the source terminal of the transistor Tr13 and the other end side of the capacitor Cs (connection point N1 2) are applied corresponding to the corrected image data. . The gray scale voltage of ^ is V d a t a. Therefore, the drain current Id flowing in accordance with the potential difference (gate and source-to-source voltage Vgs) generated between the gate and the source terminal of the transistor Tr 1 3 flows in accordance with the potential difference according to the gate current Id. The illuminating voltage (=Vdata) charges both ends of the capacitor Cs. At this time, since a lower voltage is applied to the anode (connection point N 12) of the organic electroluminescence element OEL than the cathode (common electrode Ec), the current does not flow to the organic electroluminescence element OEL, and the light emission operation is not performed. . Then, in the pixel light-emitting period T3t) 2, as shown in Fig. 40, in a state where the pixels PIX of the respective columns are set to the non-selected state, the respective pixels PIX are simultaneously illuminated. -90- 201113851 - Specifically, as shown in FIG. 4, a selection signal Ssel of a non-selected level (low level: Vgl) is applied to the selection line Ls connected to the full pixel 显示 of the display panel 丨丨〇 'At the same time, a power supply voltage Vsa of a high level (light emission level: ELVDD > GND) is applied to the power supply line La. Therefore, the transistors Tr11 and Tr12 of the light-emitting drive circuit DC provided in each of the pixels PIX perform the OFF operation, and maintain the voltage charged to the capacitor Cs connected between the gate and the source of the transistor Tr 13 (= Vdata: gate Pole and source voltage Vgs). Therefore, the transistor T r 1 3 is turned on, the drain current I d flows, and the potential of the source terminal (connection point N 1 2) of the transistor Tr 1 3 rises to be applied to the organic electroluminescent element OEL. When the voltage ELVSS (= GND) of the cathode (common electrode Ec) is higher, the light-emission drive current Iel flows from the light-emitting drive circuit DC to the organic electroluminescent element OEL. Since the light-emission drive current Iel is defined based on the voltage 値 of the voltage (=Vdata) held between the gate and the source of the transistor Tr 13 in the write operation of the corrected image data, the organic electroluminescence element The 〇EL emits light in response to the luminance gray scale of the luminance measurement image data Ildwnp. Further, in the above-described embodiment, as shown in Figs. 35 and 40, in the operation for performing the correction data Δβ and the display operation, the luminance measurement is performed on the pixel of the specific column (for example, the first 歹U). After the writing operation of the image data or the corrected image data is completed, the pixel 该 of the column is set to the hold state until the writing operation of the image data of the pixel of the other column (the second column or later) is completed. . -91- 201113851 Here, in the hold state, the selection signal Ssel' of the non-selected level is applied to the selection line Ls of the column to set the pixel PIX to the non-selected state, and the power supply line La is applied to the non-light-emitting level. The power supply voltage Vsa is set to a non-light emitting state. This hold state is as shown in Fig. 40, Fig. 40, and the time is set differently for each column. In addition, after the writing operation of the luminance measurement image data or the corrected image data of the pixels pIX of each column is completed, the driving control for causing the pixel PIX to emit the light is performed immediately, and the holding state may not be set. In this manner, the display device (the light-emitting device including the pixel driving device) and the driving control method of the light-emitting device of the present embodiment have the unique automatic zero-return method applied to the present invention, and are in different timings (mitigation). Time) The method of taking in the data line voltage and converting it into a series of characteristic parameters composed of digital data to obtain a plurality of actions. Therefore, according to the present embodiment, it is possible to obtain a parameter for correcting the variation of the threshold voltage of the driving transistor of each pixel and the variation of the current amplification factor of each pixel. Further, in the present embodiment, in the design stage of the display panel or each pixel, the illuminance caused by the parasitic capacitance added to the driving transistor provided in each pixel is calculated in advance based on the parasitic capacitance added to the driving transistor. The parameter K of the fluctuation of the voltage is appropriately set in accordance with the operation state of the display device. Therefore, according to the present embodiment, it is possible to apply a variation of the threshold voltage of each pixel to the image data written by each pixel, and the current amplification - 92 - 201113851 • the deviation of the rate and the parasitic capacitance of each pixel Correction processing of the fluctuation of the illuminating voltage caused. Further, in the present embodiment, the correction data based on the correction of the variation between the threshold voltage and the current amplification factor between the pixels and the variation of the emission voltage of each pixel are set to be uniform. A method in which the light-emitting driving current flows to each pixel and the luminance of each pixel is measured. Therefore, according to the present embodiment, it is possible to obtain a parameter for correcting the variation in the luminous current efficiency between the pixels. Therefore, according to the present embodiment, when the image data is written, the image data written in each pixel can be applied to compensate for the variation of the threshold voltage of each pixel, and the current amplification ratio and the light emission between the pixels. The variation in current efficiency and the correction processing of the fluctuation of the light-emitting voltage of each pixel. Therefore, according to the present embodiment, regardless of the characteristic change of each pixel or the state of the variation of the characteristics, the light-emitting element (organic electroluminescence element) can be made to emit light in accordance with the original luminance gray scale of the image data. Active organic electroluminescence driving system with good luminescent properties and uniform image quality. Further, in the present embodiment, it is possible to perform a process of calculating a correction data for correcting a variation of a current amplification factor including an emission current efficiency in a sequence of one of the controllers 150b having a single correction data acquisition function circuit 156, and The processing for compensating the correction data for compensating for the variation of the threshold voltage of the driving transistor is calculated. Therefore, according to the present embodiment, it is not necessary to provide an individual configuration (function circuit) in accordance with the content of the calculation processing of the correction data, and the reference table '-93-201113851 can be based on the conversion table corresponding to each color (7). Since the correction processing for compensating for the fluctuation of the light-emission voltage of each pixel is applied to the table, the configuration of the display device (light-emitting device) can be simplified. (Third Embodiment) Next, a third embodiment in which the display devices according to the first and second embodiments described above are applied to an electronic device will be described with reference to the drawings. As described in the first and second embodiments, the display device 100 including the display panel 110 having the light-emitting elements including the organic electroluminescence element OEL in each pixel PIX can be applied to a digital camera or a mobile personal person. Various electronic devices such as computers and mobile phones. Fig. 44A and Fig. 44B are perspective views showing a configuration example of a digital camera to which the display device (light emitting device) of the first embodiment is applied. Fig. 45 is a perspective view showing a configuration example of a mobile personal computer to which the display device (light-emitting device) of the first embodiment is applied. Figure 46 is a perspective view showing a configuration example of a mobile phone to which the display device (light-emitting device) of the first embodiment is applied. In the 44A and 44B, the digital camera 200 includes a main body 201, a lens unit 202, an operation unit 203, a display unit 204 including a display device 100 including the display panel 110 of the present embodiment, and a shutter button 205. In this case, in the display unit 204, the light-emitting elements of the respective pixels of the display panel 110 perform light-emission operation in accordance with an appropriate luminance gray scale corresponding to the image data, thereby achieving a good and uniform image quality. Further, in Fig. 45, the personal computer 210 includes a main body unit 21 1 , a keyboard 212 , and a display unit 213 including a display device 100 including the display panel 11 of the present embodiment. In this case, in the display unit 213, the light-emitting elements of the respective pixels of the display panel 110 perform light-emission operation in accordance with an appropriate luminance gray scale corresponding to the image data, thereby achieving a good and uniform image quality. Further, in Fig. 46, the mobile phone 220 includes an operation unit 221, a listening port 222, a mouthpiece 223, and a display unit 224 including a display device 100 including the display panel 110 of the present embodiment. In this case as well, in the display unit 224, the light-emitting elements of the respective pixels of the display panel 110 are illuminated in an appropriate brightness gray scale corresponding to the image data, thereby achieving a good and uniform image quality. In the embodiment, the present invention is applied to a display device (light-emitting device) 100 including a display panel 110 having a light-emitting element composed of an organic electroluminescence device OEL in each pixel PIX, but The invention is not limited to this. The present invention is also applicable to, for example, a light-emitting element array including a plurality of pixels having a light-emitting element composed of an organic electroluminescence element OEL arranged in one direction, and irradiating light emitted from the light-emitting element array in response to image data to the photoreceptor. Drum-exposed exposure device. In this case, the light-emitting elements of the respective pixels of the light-emitting element array can be made to emit light in response to appropriate brightness of the image data, and a good exposure state can be obtained. Other advantages and modifications will readily occur to those skilled in the art, and therefore, the scope of the present invention is not limited to the specific details shown and described herein and the representative embodiment of the present invention. Therefore, various modifications may be made without departing from the spirit and scope of the general inventive concept as defined by the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic block diagram showing an example of a display device to which a light-emitting device of the present invention is applied. Fig. 2 is a schematic block diagram showing an example of a data driver applied to the display device of the first embodiment. Fig. 3 is a schematic circuit configuration diagram showing an example of a configuration of a main part of a data driver applied to the display device of the first embodiment. Fig. 4 is a view showing an output input characteristic of a digital-analog conversion circuit and an analog-to-digital conversion circuit applied to the data driver of the first embodiment. Fig. 5 is a functional block diagram showing the function of the controller applied to the display device of the first embodiment. Fig. 6 is a circuit configuration diagram showing an embodiment of a pixel applied to the display panel of the first embodiment. Fig. 7 is a view showing an operational state when a pixel of the light-emitting drive circuit of the first embodiment is applied to image data. Fig. 8 is a view showing a voltage-current characteristic when the pixel of the light-emitting drive circuit of the first embodiment is applied in the address operation. Fig. 9 is a diagram showing changes in the data line voltage of the technique (automatic zeroing method) applied to the characteristic parameter obtaining operation of the first embodiment. Fig. 10 is a timing chart (1) showing the operation of obtaining the characteristic parameters of the display device of the first embodiment. -96-201113851' Fig. 1 is a view showing the operation of the detection voltage application operation of the display device of the first embodiment. Fig. 12 is a view showing the operation of the natural mitigation operation of the display device of the first embodiment. Fig. 13 is a view showing the operation of the data line voltage detecting operation of the display device of the first embodiment. Fig. 14 is a view showing the operation of the detection data output operation of the display device of the first embodiment. Fig. 15 is a functional block diagram showing a correction data calculation operation of the display device of the first embodiment. Fig. 16 is a timing chart (2) showing the operation of obtaining the characteristic parameters of the display device of the first embodiment. Fig. 17 is a functional block diagram showing the operation of generating luminance image data for the display device of the first embodiment. Fig. 18 is a view showing the operation of the writing operation of the image data for luminance measurement of the display device of the first embodiment. Fig. 19 is a view showing the operation of the light-emitting operation for luminance measurement of the display device of the first embodiment. Fig. 20 is a block diagram showing the function of the correction data calculation operation of the first embodiment (Part 2). Fig. 21 is a timing chart showing the light-emitting operation of the display device of the first embodiment. Fig. 22 is a functional block diagram showing the operation of correcting the image data of the display device of the first embodiment. -97-201113851 Fig. 23 is a view showing the operation of the image data reading operation after the correction of the display device of the first embodiment. Fig. 24 is a view showing the operation of the light-emitting operation of the display device of the first embodiment. Fig. 25 is a functional block diagram showing the function of the controller applied to the display device of the second embodiment. Fig. 26 is a view showing an operation state of the organic electroluminescence device to which the pixel of the light-emitting drive circuit of the second embodiment is applied, when light is emitted. Fig. 27 is a characteristic diagram showing the relationship between the light-emitting voltage of the electroluminescent device and the light-emission drive current during the light-emitting operation of the pixel of the second embodiment. Fig. 28 is a view for explaining the data conversion processing of the reference table applied to the controller of the second embodiment. Fig. 29 is a timing chart (1) showing the operation of obtaining the characteristic parameters of the display device of the second embodiment. Fig. 30 is a view showing the operation of the detection voltage applying operation of the display device of the second embodiment. Fig. 3 is a view showing the operation of the natural mitigation operation of the display device of the second embodiment. Fig. 32 is a view showing the operation of the data line voltage detecting operation of the display device of the second embodiment. Fig. 3 is a view showing the operation of the detection data output operation of the display device of the second embodiment. • 98-201113851 • Fig. 34 is a functional block diagram (1) showing the correction data calculation operation of the display device of the second embodiment. Fig. 35 is a timing chart (2) showing the operation of obtaining the characteristic parameters of the display device of the second embodiment. Fig. 3 is a functional block diagram showing the operation of generating image data for luminance measurement of the display device of the second embodiment. Fig. 3 is a view showing the operation of the writing operation of the image data for luminance measurement of the display device of the second embodiment. Fig. 3 is a view showing the operation of the light-emitting operation for luminance measurement of the display device of the second embodiment. Fig. 39 is a functional block diagram (part 2) showing the correction data calculation operation of the second embodiment. Fig. 40 is a timing chart showing the light-emitting operation of the display device of the second embodiment. Fig. 41 is a functional block diagram showing the operation of correcting the image data of the display device of the second embodiment. Fig. 42 is a view showing the operation of the operation of writing the corrected image data of the display device of the second embodiment. Fig. 43 is a view showing the operation of the light-emitting operation of the display device of the second embodiment. Fig. 44A and Fig. 44B are perspective views showing the configuration of a digital camera of the third embodiment. Fig. 45 is a perspective view showing the configuration of a mobile personal computer according to the third embodiment. -99- 201113851 Composition. Figure 46 shows the hand of the third embodiment [Description of component symbols] 100 Display device 110 Display panel 120 Selection driver 130 Power driver 140 Data driver 140A, 140B Internal circuit 141 Shift register circuit 142 Data register circuit 143 Data Latch Circuit 144 DAC/ADC Circuit 145 Output Circuit 146 Logic Power Supply 147 Analog Power Supply 150, 150a, 1 50 0b Controller 151 Reference Table (LUT) 152a Voltage Amplitude Setting Function Electricity 153a Multiplication Function Circuit (Image 1 154a Addition Function Circuit (Image | 155 Words of Remembrance (Jiyi Circuit) 156 Correction Data Acquisition Function 1 Circuit) Road: Material Correction Circuit): Material Correction Circuit): Road (Feature Parameter Acquisition -100- 201113851 41(j) 42(j) 43(j) 44(j) ' 45(j) Ld La Ls SW1' SW2 ' SW3 SW4, SW5
SI 、 S2 ' S3 、 S4 ' S5 PIX 資料閂鎖 DAC (數位一類比轉換電路) ADC (類比一數位轉換電路) 緩衝器 資料線 電源線 選擇線 、 開關 切換控制信號 像素 -101 -SI, S2 'S3, S4 ' S5 PIX data latch DAC (digital to analog conversion circuit) ADC (analog-to-digital conversion circuit) buffer data line power line select line, switch switching control signal pixel -101 -
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JP2009163602A JP4877536B2 (en) | 2009-07-10 | 2009-07-10 | Pixel drive device, light emitting device, drive control method thereof, and electronic apparatus |
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JP2010110932A JP4935920B2 (en) | 2009-07-10 | 2010-05-13 | Pixel drive device, light emitting device, drive control method thereof, and electronic apparatus |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI467558B (en) * | 2011-08-11 | 2015-01-01 | Lg Display Co Ltd | Liquid crystal display and driving method thereof |
TWI469114B (en) * | 2012-02-16 | 2015-01-11 | Innocom Tech Shenzhen Co Ltd | Liquid crystal display panel and liquid crystal display device |
TWI684975B (en) * | 2019-01-11 | 2020-02-11 | 大陸商北京集創北方科技股份有限公司 | Dynamic power management method of display drive circuit, display drive chip and display device |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI467558B (en) * | 2011-08-11 | 2015-01-01 | Lg Display Co Ltd | Liquid crystal display and driving method thereof |
TWI469114B (en) * | 2012-02-16 | 2015-01-11 | Innocom Tech Shenzhen Co Ltd | Liquid crystal display panel and liquid crystal display device |
TWI684975B (en) * | 2019-01-11 | 2020-02-11 | 大陸商北京集創北方科技股份有限公司 | Dynamic power management method of display drive circuit, display drive chip and display device |
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