KR20150077706A - Organic light emitting display device - Google Patents

Abstract

The present invention relates to an organic light emitting display device capable of sensing the threshold voltage of a switching transistor included in a pixel. An organic light emitting display device according to the present invention includes a display panel which has a pixel which includes an organic light emitting element, a first switching transistor which outputs a data voltage supplied to a data line, a second switching transistor which outputs a reference voltage supplied to a reference line, and a driving transistor which controls the data voltage and controls a current flowing through the organic lighting element from the driving line based on a voltage difference between the data voltage and the reference voltage; and a panel driving part which drives the pixel with a first sensing mode, a second sensing mode, or a display mode. The panel driving part senses the threshold voltage of the driving transistor through the reference line while supplying a driving voltage to the driving power line in the first sensing mode, and senses the threshold voltage of the second switching transistor through the driving power line while supplying the driving voltage to the reference line in the second sensing mode.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an organic light-

The present invention relates to an organic light emitting display.

2. Description of the Related Art In recent years, the importance of flat panel display devices has been increasing with the development of multimedia. In response to this, flat panel display devices such as liquid crystal display devices, plasma display devices, and organic light emitting display devices have been commercialized. Among such flat panel display devices, organic light emitting display devices have attracted attention as a next generation flat panel display device because they have a high response speed, low power consumption, and self light emission, so that there is no problem in viewing angle.

1 is a circuit diagram for explaining a pixel structure of a general organic light emitting display device.

Referring to FIG. 1, a pixel P of a general organic light emitting display includes a switching transistor Tsw, a driving transistor Tdr, a capacitor Cst, and an organic light emitting diode (OLED).

The switching transistor Tsw is switched according to a scan pulse SP supplied to the scan line SL and supplies a data voltage Vdata supplied to the data line DL to the drive transistor Sdr.

The driving transistor Tdr is driven according to the data voltage Vdata supplied from the switching transistor Tsw to control the data current Ioled flowing from the driving power supply line EVdd to the organic light emitting diode OLED.

The capacitor Cst is connected between the gate terminal and the source terminal of the driving transistor Tdr to store a voltage corresponding to the data voltage Vdata supplied to the gate terminal of the driving transistor Tdr, (Tdr).

The organic light emitting diode OLED is electrically connected between the source terminal of the driving transistor Tdr and the cathode line EVss and emits light by the data current Ioled supplied from the driving transistor Tdr.

Each pixel P of the general organic light emitting display device controls the magnitude of the data current Ioled flowing through the organic light emitting diode OLED by using the switching of the driving transistor Tdr according to the data voltage Vdata, And a predetermined image is displayed by causing the element OLED to emit light.

In such a general organic light emitting display, there is a problem that the threshold voltage (Vth) characteristic of the driving transistor Tdr varies according to the position of the organic light emitting display panel according to the non-uniformity of the manufacturing process of the thin film transistor. Accordingly, in a general organic light emitting display device, even if the same data voltage (Vdata) is applied to the driving transistor Tdr of each pixel P, a uniform image quality can not be realized due to a variation in current flowing through the organic light emitting diode OLED There is a problem.

In order to solve such a problem, an organic electroluminescent display device of Korean Patent Laid-Open Publication No. 10-2012-0076215 (hereinafter referred to as "prior art document") adds a sensor transistor to each pixel, Discloses an external compensation technique for compensating a threshold voltage of a driving transistor by sensing a threshold voltage of a driving transistor through a reference line connected to a sensor transistor using switching of the driving transistor.

However, in the organic light emitting display device of the prior art document, the threshold voltage of the driving transistor Tdr can be compensated by the external compensation technique. However, due to the voltage stress due to the driving at a high temperature for a long time, Vth) characteristic of the liquid crystal display device, the luminance is lowered and the lifetime is reduced.

In addition, since the sensor transistor included in each pixel of the prior art document serves to initialize the voltage of the source electrode of the driving transistor, when the threshold voltage of the sensor transistor changes, the source voltage of the driving transistor can be initialized to a desired level I will not.

Therefore, it is necessary to sense the threshold voltage (Vth) of the switching transistor included in each pixel and compensate for the threshold voltage (Vth).

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and it is an object of the present invention to provide an organic light emitting diode display capable of sensing a threshold voltage of a switching transistor included in a pixel.

It is another object of the present invention to provide an organic light emitting display device capable of simultaneously compensating a threshold voltage of a driving transistor and a switching transistor included in a pixel.

Other features and advantages of the invention will be set forth in the description which follows, or may be obvious to those skilled in the art from the description and the claims.

According to an aspect of the present invention, there is provided an organic light emitting diode display comprising: an organic light emitting diode; a first switching transistor for outputting a data voltage supplied to a data line according to a first scan pulse supplied to a scan control line; A second switching transistor for outputting a reference voltage supplied to the reference line according to a second scan pulse supplied to the line, a current flowing from the driving power supply line to the organic light emitting element based on a difference voltage between the data voltage and the reference voltage, A display panel having a pixel including a driving transistor for controlling the driving transistor and a capacitor connected between the gate and the source of the driving transistor; And a panel driver for driving the pixel in a first sensing mode, a second sensing mode, or a display mode, wherein the panel driver supplies a driving voltage to the driving power line in the first sensing mode, The threshold voltage of the driving transistor may be sensed and the threshold voltage of the second switching transistor may be sensed through the driving power supply line while supplying the driving voltage to the reference line in the second sensing mode.

The panel driver supplies a driving voltage to the driving power supply line in the first sensing mode, connects the reference line to the sensing unit, connects the driving power supply line to the sensing unit in the second sensing mode, A line selector for supplying the driving voltage to the reference line; And sensing the threshold voltage of the driving transistor through the reference line in the first sensing mode to generate first sensing data, sensing the threshold voltage of the second switching transistor through the driving power supply line, And a sensing unit which senses the sensed signal.

Wherein the panel driving unit supplies the reference voltage to the fourth terminal of the line selecting unit or connects the fourth terminal of the line selecting unit to the sensing unit in accordance with the first sensing mode, the second sensing mode, And < / RTI >

Wherein the panel driver generates and supplies to the data line a sensing data voltage for operating the driving transistor in a source follower mode in the first sensing mode and a first data voltage for operating the first switching transistor in a switch mode A scan pulse is generated and supplied to the scan control line, and a second scan pulse for operating the second switching transistor in the switch mode is generated and supplied to the sensing control line.

Wherein the panel driver generates a sensing data voltage for operating the driving transistor in the switch mode in the second sensing mode and supplies the sensing data voltage to the data line and a first scan for operating the first switching transistor in the switch mode Generates a second scan pulse for operating the second switching transistor in the source follower mode, and supplies the second scan pulse to the sensing control line.

Wherein the panel driving unit calculates compensation data for simultaneously compensating the threshold voltage of the driving transistor and the threshold voltage of the second switching transistor based on the first and second sensing data in the display mode, The data to be supplied to the pixel can be corrected.

Wherein the panel driving unit calculates a first compensation value for compensating a threshold voltage of the driving transistor based on the first sensing data in the display mode and outputs data to be supplied to the pixel in accordance with the calculated first compensation value A second compensation value for compensating the threshold voltage of the switching transistor based on the second sensing data and varying the voltage level of the second scan pulse according to the calculated second compensation value .

According to the present invention, the threshold voltage of the driving transistor or the second switching transistor can be sensed by exchanging the roles of the reference line and the driving voltage line in the first or second sensing mode using the line selection unit.

According to the present invention, the data voltage is corrected based on the threshold voltage of the driving transistor sensed by the sensing mode and the threshold voltage of the second switching transistor, or the data voltage and the gate voltage of the second switching transistor are optimized, The threshold voltage of the driving transistor and the switching transistor can be simultaneously compensated.

As a result, the present invention can prevent the voltage transfer rate from lowering in accordance with a change in the threshold voltage of the second switching transistor included in the pixel, thereby securing the reliability and lifetime of the organic light emitting diode display according to long- have.

1 is a circuit diagram for explaining a pixel structure of a general organic light emitting display device.
2 is a view for explaining an organic light emitting diode display according to a first embodiment of the present invention.
FIG. 3 is a view for explaining a column driving part of one pixel and a panel driving part shown in FIG. 2. FIG.
4 is a driving waveform diagram of the first sensing mode in the OLED display according to the first embodiment of the present invention.
5A and 5B are diagrams for explaining the pixel operation in the first sensing mode according to the driving waveform shown in FIG.
6 is a driving waveform diagram of the second sensing mode in the OLED display according to the first embodiment of the present invention.
FIGS. 7A and 7B are diagrams for explaining the pixel operation in the second sensing mode according to the driving waveform shown in FIG.
FIG. 8 is a view schematically showing a typical pixel and a column driving unit of a display panel in an organic light emitting diode display according to a second embodiment of the present invention.
9 is a driving waveform diagram of a display mode in the organic light emitting display according to the first and second embodiments of the present invention.

The meaning of the terms described herein should be understood as follows.

The word " first, "" second," and the like, used to distinguish one element from another, are to be understood to include plural representations unless the context clearly dictates otherwise. The scope of the right should not be limited by these terms.

It should be understood that the terms "comprises" or "having" does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or combinations thereof.

Hereinafter, preferred embodiments of the organic light emitting display according to the present invention will be described in detail with reference to the accompanying drawings.

FIG. 2 is a view for explaining an organic light emitting display according to a first embodiment of the present invention, and FIG. 3 is a view for explaining a column driving part of a pixel and a panel driving part shown in FIG.

Referring to FIGS. 2 and 3, the organic light emitting diode display according to the first embodiment of the present invention includes a display panel 100 and a panel driver 200.

The display panel 100 includes first to mth scan control lines SL1 to SLm, first to mth sensing control lines SSL1 to SSLm, first to nth scan control lines SL1 to SLm, (n is a natural number greater than m) data lines DL1 to DLn, first to nth reference lines RL1 to RLn, first to nth driving power lines PL1 to PLn, a cathode power line And a plurality of pixels (P).

Each of the first to mth scan control lines SL1 to SLm is formed in parallel to the display panel 100 so as to be spaced apart from each other along the first direction, i.e., the horizontal direction.

Each of the first through m-th sensing control lines SSL1 through SSLm is formed at regular intervals so as to be parallel to each of the scan control lines SL1 through SLm.

The first to the n-th data lines DL1 to DLn are connected to the scan control lines SL1 to SLm and the sensing control lines SSL1 to SSLm in the second direction of the display panel 100, And are formed so as to be spaced apart from each other at regular intervals along the longitudinal direction.

Each of the first to nth reference lines RL1 to RLn is formed at regular intervals so as to be parallel to the data lines DL1 to DLn.

Each of the first to nth driving power supply lines PL1 to PLn is formed at regular intervals to be parallel to the data lines DL1 to DLn. Here, each of the first to nth driving power supply lines PL1 to PLn may be formed at regular intervals so as to be parallel to each of the scan control lines SL1 to SLm.

The cathode power supply line is formed on the entire surface of the display panel 100 or formed at regular intervals so as to be parallel to the data lines DL1 to DLn or the scan control lines SL1 to SLm, It is possible. A cathode voltage (EVss) is supplied to the cathode power line from an external cathode power supply (not shown).

Each of the plurality of pixels P is formed for each pixel region defined by each of the first to m-th scan control lines SL1 to SLm and the first to the n-th data lines DL1 to DLn, do. Here, each of the plurality of pixels P may be any one of a red pixel, a green pixel, a blue pixel, and a white pixel. One unit pixel for displaying one image may include an adjacent red pixel, a green pixel, a blue pixel, and a white pixel, or may include a red pixel, a green pixel, and a blue pixel.

Each of the plurality of pixels P may include a first switching transistor Tsw1, a second switching transistor Tsw2, a driving transistor Tdr, a capacitor Cst, and an organic light emitting diode OLED. Here, the transistors Tsw1, Tsw2, and Tdr may be an a-Si TFT, a poly-Si TFT, an oxide TFT, an organic TFT, or the like as an N-type thin film transistor (SFT).

The first switching transistor Tsw1 is switched by the first scan pulse SP1 and outputs a data voltage Vdata supplied to the data line DL. The first switching transistor Tsw1 includes a gate electrode connected to an adjacent scan control line SL, a first electrode connected to an adjacent data line DL, and a first electrode connected to a first node of the driving transistor Tdr, and a second electrode connected to the first node n1. Here, the first and second electrodes of the first switching transistor Tsw1 may be a source electrode or a drain electrode depending on the current direction.

The second switching transistor Tsw2 is switched by the second scan pulse SP2 to apply a reference voltage Vref supplied to the reference line RL to the second node n2 which is the source electrode of the driving transistor Tdr Supply. To this end, the second switching transistor Tsw includes a gate electrode connected to an adjacent sensing control line SSL, a first electrode connected to an adjacent reference line RL, and a second electrode connected to a second node n2 do. Here, the first and second electrodes of the second switching transistor Tsw2 may be a source electrode or a drain electrode depending on the current direction. The second switching transistor Tsw operates in the switch mode according to the voltage level of the display mode and the second scan pulse SP in the first sensing mode and the second scan pulse SP in the second sensing mode, The voltage of the second node n2, and the voltage of the parasitic capacitor between the gate electrode and the source electrode, as a source follower.

The capacitor Cst includes first and second electrodes connected between the gate electrode and the source electrode of the driving transistor Tdr, that is, the first and second nodes n1 and n2. A first electrode of the capacitor Cst is connected to the first node n1 and a second electrode of the capacitor Cst is connected to the second node n2. The capacitor Cst charges the difference voltage of the voltage supplied to the first and second nodes n1 and n2 according to the switching of the first and second switching transistors Tsw1 and Tsw2, And drives the driving transistor Tdr according to the applied voltage.

The driving transistor Tdr is driven by the voltage of the capacitor Cst to control the amount of current flowing from the driving power supply line PL to the organic light emitting diode OLED. To this end, the driving transistor Tdr includes a gate electrode connected to the first node n1, a source electrode connected to the second node n2, and a drain electrode connected to the driving power supply line PL. The driving transistor Tdr operates in the source follower mode according to the voltages of the first and second nodes n1 and n2 and the voltage of the capacitor Cst in the first sensing mode to be described later, And operates in the switch mode according to the voltage of the first node n1.

The organic light emitting diode OLED emits light by emitting a current Ioled according to driving of the driving transistor Tdr. For this, the OLED includes a first electrode (for example, an anode electrode) connected to the second node n2, an organic layer (not shown) formed on the first electrode, and a second electrode Electrode (e. G., A cathode electrode). At this time, the organic layer may have a structure of a hole transporting layer / an organic light emitting layer / an electron transporting layer or a structure of a hole injecting layer / a hole transporting layer / an organic light emitting layer / an electron transporting layer / an electron injecting layer. Further, the organic layer may further include a functional layer for improving the luminous efficiency and / or lifetime of the organic light emitting layer. The second electrode is connected to the cathode power supply line.

The panel driver 200 drives the display panel 100 or the pixel P in a first sensing mode, a second sensing mode, or a display mode. Here, the first and second sensing modes may be performed for each pre-shipment inspection process of the OLED display, a set period, a power on / off point of the OLED display, or a user setting.

In the first sensing mode, the panel driver 200 operates in response to a current flowing to the driving transistor Tdr through the reference line RL while operating the driving transistor Sdr in a source follow mode And generates a first sensing data Sdata_Tdr. The threshold voltage of the pixel driving transistor Tdr is calculated based on the first sensing data Sdata_Tdr and stored in a memory (not shown). Then, the panel driver 200 calculates the first sensing compensation value for each pixel corresponding to the threshold voltage of the pixel-by-pixel driving transistor Tdr stored in the memory, and calculates the first sensing compensation value for each pixel, (Or previous) compensation value of the pixel-by-pixel driving transistor Tdr stored in the memory 212, and then adds the calculated compensation value for each pixel to the initial (or previous) gray level compensation value And updates the resultant value to the first compensation value for each pixel and stores it in the memory unit 212. [

In the second sensing mode, the panel driver 200 operates the second switching transistor Tsw2 through the driving power line PL while operating the second switching transistor Tsw2 in a source follow mode, And the threshold voltage of the second switching transistor Tsw2 for each pixel is calculated on the basis of the second sensing data Sdata_Tsw2 to generate a second sensing data Sdata_Tsw2 by sensing the voltage corresponding to the current flowing in the memory Time. Then, the panel driver 200 calculates the per-pixel sensing compensation value corresponding to the threshold voltage of the second switching transistor Tsw2 for each pixel stored in the memory, and outputs the calculated second per- (Or previous) compensation value of the pixel-by-pixel second switching transistor Tsw2 stored in the memory 212, and then adds the calculated compensation deviation value of each pixel to the initial (or previous) compensation value And stores the resultant value in the memory unit 212 as the second compensation value for each pixel.

In the display mode, the panel driver 200 according to an exemplary embodiment of the present invention controls the driving transistor Tdr and the second switching unit 210 based on the first compensation value and the second compensation value for each pixel stored in the memory unit 212, And compensates the input data Idata for each pixel according to the calculated compensation data so that the data voltage corresponding to the corrected data is supplied to the pixel P Supply. The panel driver 200 according to another exemplary embodiment corrects the pixel-by-pixel input data Idata according to the first compensation value for each pixel stored in the memory unit 212 and supplies the data voltage corresponding to the corrected data to the pixel P and supplies a second scan pulse SP set according to a second compensation value for each pixel stored in the memory unit 212 to the sensing control line SSL. At this time, the panel driver 200 according to another example may supply the scan control line SL with a first scan pulse SP1 having the same voltage level as the second scan pulse SP.

The panel driver 200 includes a timing controller 210, a voltage supplier 220, a row driver 230, and a column driver 240.

The timing controller 210 may control the threshold voltage of the driving transistor Tdr or the second switching transistor Tsw2 for each pixel according to a first or a second sensing mode, The driving unit 230 and the column driving unit 240 are operated. The timing controller 210 operates the row driving unit 230 and the column driving unit 240 according to a display mode for displaying an image on the display panel 100.

In the first or second sensing mode, the timing controller 210 operates the corresponding transistors Tdr and Tsw2 in a source follow mode to sense the threshold voltages of the transistors Sdr and Tsw2, The scan pulse level data L1 / L2, and the switching control signals SS1 to SS4 for the pixel data DATA for the pixel data DATA and the control signals DCS, RCS1 and RCS2. For example, in the first sensing mode, the timing controller 210 receives the sensing pixel data DATA for sensing the threshold voltage of the pixel driving transistor Tdr of the display panel 100 and the control signals DCS, And the first scan pulse level data L1 for supplying the second scan pulse SP2 of the first gate high voltage VGH to the sensing control line SSL. The first scan pulse level data L1, RCS1, RCS2, SS1 to SS4, . In the second sensing mode, the timing controller 210 receives the sensing pixel data DATA for sensing the threshold voltage of the second switching transistor Tsw2 for each pixel of the display panel 100 and the control signals DCS, And a second scan pulse SP2 of a second gate high voltage VGH 'lower than the first gate high voltage VGH to the sensing control line SSL And generates second scan pulse level data (L2) for the second scan pulse level.

In the display mode, the timing controller 210 according to an exemplary embodiment outputs pixel-by-pixel input data Idata input from an external driving system (or a graphics card) And supplies the generated pixel data DATA to the column driver 240. The timing synchronization signal TSS input from an external driving system (or a graphics card) A data control signal DCS, first and second row control signals RCS1 and RCS2 for controlling the row driving unit 230 and the column driving unit 240, And generates control signals SS1 to SS4. At this time, the timing controller 210 according to an exemplary embodiment controls the driving transistor Tdr and the second switching transistor Tsw2 (Tsw2) based on the first compensation value and the second compensation value for each pixel stored in the memory unit 212, ), And generate the pixel-by-pixel data (DATA) by correcting the pixel-by-pixel input data (Idata) according to the calculated compensation data.

The timing controller 210 according to another exemplary embodiment adjusts pixel-by-pixel input data Idata input from an external driving system (or a graphics card) according to a first compensation value for each pixel stored in the memory 212 And supplies the generated pixel data DATA to the column driving unit 240. The row driving unit 240 drives the column driving unit 240 based on a timing synchronization signal TSS input from an external driving system The data control signal DCS, the first and second row control signals RCS1 and RCS2 and the switching control signals SS1 to SS4 for controlling the driving unit 230 and the column driving unit 240, . In addition, the timing controller 210 according to another exemplary embodiment may further include a third compensation value for compensating the voltage transmission rate of the threshold voltage of the second switching transistor Tsw according to a second compensation value for each pixel stored in the memory unit 212. [ Thereby generating scan pulse level data L3. For example, the timing controller 210 analyzes the threshold voltages of all the second switching transistors Tsw2 stored in the memory unit 212 to calculate a maximum value, a minimum value, an average value, an average value of upper values, The third scan pulse level data L3 may be generated based on the calculated compensation reference value and may be provided to the voltage supply unit 220 described above.

The voltage supplier 220 generates the gate low voltage VGL having the reference low voltage level using the input power Vin input from the outside in the first and second sensing modes and the display mode, And provides the gate-low voltage VGL to the row driver 230.

In the first sensing mode, the voltage supplier 220 generates a first gate high voltage VGH having a reference high voltage level based on the first scan pulse level data L1 supplied from the timing controller 210 And provides it to the row driving unit 230.

In the second sensing mode, the voltage supplier 220 generates a second gate high voltage VGH 'corresponding to the second scan pulse level data L2 supplied from the timing controller 210, to the row driving unit 230. Here, the second gate high voltage VGH 'has a voltage level lower than the first gate high voltage VGH, and the second gate high voltage VGH' has a voltage level lower than the first gate high voltage VGH, And may be set to the gate bias voltage level of the transistor Tsw2. For example, the second gate high voltage VGH 'may be at the same voltage level as the sensing data voltage supplied to the gate electrode of the driving transistor Tdr in the first sensing mode.

In addition, when the third scan pulse level data L3 supplied from the timing control unit 210 is supplied, the voltage supply unit 220 supplies a third gate high voltage V3 corresponding to the third scan pulse level data L3, To generate the voltage VGH ' ', and to supply the generated voltage VGH ' ' to the row driver 230. In this case, the third gate high voltage VGH '' has a voltage level for compensating the voltage transfer rate according to the threshold voltage of the second switching transistor Tsw2.

The row driver 230 receives the first row control signal RCS1 supplied from the timing controller 210 and the gate low voltage VGL supplied from the voltage supplier 220 and the first gate high voltage VGL And sequentially supplies the first scan pulse SP1 to the first to m-th scan control lines SL1 to SLm. The row driving unit 230 may include a second row control signal RCS2 supplied from the timing controller 210 and a first to a third gate high voltage VGH supplied from the voltage supplying unit 220. [ And the second scan pulse SP2 according to the gate-low voltage VGL and sequentially supplies the second scan pulse SP2 to the first through the m-th sensing control lines SSL1 through SSLm. For this, a row driver 230 according to an exemplary embodiment includes a scan line driver 232 and a sensing line driver 234.

The scan line driver 232 is connected to one side and / or the other side of each of the first to mth scan control lines SL1 to SLm. The scan line driver 232 generates a first scan signal that is sequentially shifted based on the first row control signal RCS1 and generates a first scan signal by sequentially shifting the gate low voltage VGL and the first gate high voltage VGH, Level shifts the first scan signal to the first scan pulse SP1 and sequentially supplies the first scan signal to the first to m-th scan control lines SL1 to SLm.

The sensing line driver 234 is connected to one and / or the other of the first through m-th sensing control lines SSL1 through SSLm, respectively. The sensing line driver 234 generates a second scan signal that is sequentially shifted based on the second row control signal RCS2 and outputs the first to third gate high voltages VGH, VGH ', and VGH " Level shifting the second scan signal to the second scan pulse SP2 using the gate-low voltage VGL and sequentially supplying the second scan signal to the first to m-th sensing control lines SSL1 to SSLm, do. That is, in the first sensing mode, the sensing line driver 234 supplies the second scan pulse SP2 including the gate low voltage VGL and the first gate high voltage VGH to the sensing control line SSL, . In the second sensing mode, the sensing line driver 234 applies the second scan pulse SP2 including the gate low voltage VGL and the second gate high voltage VGH 'to the sensing control line SSL Supply. In the display mode, the sensing line driver 234 supplies the second scan pulse SP2, which includes the first or third gate high voltages VGH and VGH '' and the gate low voltage VGL, To the control line (SSL).

The column driver 240 includes first to nth data lines DL1 to DLn and first to nth reference lines RL1 to RLn and first to nth driving power lines PL1 to PLn, And operates in a first sensing mode, a second sensing mode, or a display mode according to the mode control of the timing controller 210. [ The column driver 240 may include a plurality of data integrated circuits.

In the first sensing mode, the column driver 240 receives the sensing pixel data DATA, the data control signal DCS, and the first to fourth switching control signals SS1 to SS4) to generate the first sensing data Sdata_Tdr by sensing a voltage corresponding to the current flowing through the pixel driving transistor Tdr formed on one horizontal line through the reference lines RL1 to RLn And provides it to the timing control unit 210. In the second sensing mode, the column driver 240 receives the sensing pixel data DATA, the data control signal DCS, and the first to fourth switching control signals SS2 to SS4 through the driving power supply lines PL1 to PLn to sense the voltage corresponding to the current flowing in the second switching transistor Tsw2 for each pixel formed on one horizontal line to generate the second sensing data Sdata_Tsw2, And provides it to the timing controller 210. [ In the display mode, the column driver 240 receives the display pixel data DATA, the data control signal DCS, and the first to fourth switching control signals SS1 to SS4 to supply the data voltages Vdata to the corresponding data lines DL1 to DLn and supply the reference voltages Vref to the corresponding reference lines RL1 to RLn, respectively. 3, the column driver 240 includes a data driver 242, a line selector 244, a switching unit 246, and a sensing unit 248, .

3, the data driver 242 is connected to one data line DL, but it is substantially connected to each of the first to the nth data lines DL1 to DLn. Although only one line selector 244, one switching unit 246 and one sensing unit 248 are shown in FIG. 3, the column driver 240 includes first to nth lines A selection unit 244, first through n-th switching units 246, and first through n-th sensing units 248.

The data driver 242 converts input pixel data DATA into analog data voltages in response to a data control signal DCS input in accordance with the display mode or the sensing mode, To the data lines DL1 to DLn. To this end, the data driver 242 includes a shift register unit (not shown), a latch unit (not shown), a gradation voltage generator (not shown), and first to nth digital-to-analog converters .

The shift register unit sequentially outputs the sampling signal by shifting the source start signal according to the source shift clock using the source start signal and the source shift clock of the data control signal DCS. The latch unit sequentially samples and latches pixel data (DATA) input according to the sampling signal, and simultaneously outputs latch data for one horizontal line according to a source output enable signal of the data control signal (DCS). The gradation voltage generator generates a plurality of different gradation voltages corresponding to the number of gradations of pixel data (DATA) using a plurality of reference gamma voltages (RGV) input from the outside. Each of the first to n-th digital-to-analog converters selects a gradation voltage corresponding to the latch data among the plurality of gradation voltages supplied from the gradation voltage generator as a data voltage and outputs the selected data voltage to the data lines DL1 to DLn.

In response to the first and second switching control signals SS1 and SS2 supplied in accordance with the first sensing mode in the first sensing mode, the line selector 244 outputs a driving voltage And the reference line RL is connected to the sensing unit 248. In addition, in the second sensing mode, the line selector 244 selects the driving power line PL in response to the first and second switching control signals SS1 and SS2 supplied in accordance with the second sensing mode. And the driving voltage (EVdd) is supplied to the reference line (RL). The line selector 244 may include first through fourth transistors T1, T2, T3 and T4 and first through fourth transistors T1, T2, T3 and T4. .

The first terminal T1 is connected to the driving power supply line PL and the second terminal T2 is connected to the reference line RL. The third terminal T3 is connected to the driving power source and receives the driving voltage EVdd from the driving power source. The fourth terminal T4 receives the reference voltage Vref from the reference power supply or is connected to the sensing unit 248. [

The first transistor Q1 is connected between the first terminal T1 and the third terminal T3 and is switched according to the first switching control signal SS1. Accordingly, the first transistor Q1 is turned on according to the first switching control signal SS1 of the gate-on voltage supplied in accordance with the first sensing mode so that the driving voltage EVdd is applied to the driving power line PL). On the other hand, the first transistor Q1 is turned off according to the first switching control signal SS1 of the gate-off voltage supplied in accordance with the second sensing mode, And the voltage EVdd is cut off.

The second transistor Q2 is connected between the second terminal T2 and the fourth terminal T4 and is switched according to the first switching control signal SS1. Accordingly, the second transistor Q2 is turned on according to the first switching control signal SS1 of the gate-on voltage supplied in accordance with the first sensing mode so that the reference line RL is connected to the sensing unit 248, . On the other hand, the second transistor Q2 is turned off according to the first switching control signal SS1 of the gate-off voltage supplied in accordance with the second sensing mode and is connected to the reference line RL and the sensing unit 248, (Or disconnects) the connection of the battery.

The third transistor Q3 is connected between the first terminal T1 and the fourth terminal T4 and is switched according to the second switching control signal SS2. Accordingly, the third transistor Q3 is turned on according to the second switching control signal SS2 of the gate-on voltage supplied in accordance with the second sensing mode so that the driving power line PL is electrically connected to the sensing unit 248 . On the other hand, the third transistor Q3 is turned off according to the second switching control signal SS2 of the gate-off voltage supplied in accordance with the first sensing mode, so that the driving power line PL and the sensing unit 248 (Or disconnects) the connection of the battery.

The fourth transistor Q4 is connected between the second terminal T1 and the third terminal T3 and is switched according to the second switching control signal SS2. Accordingly, the fourth transistor Q4 is turned on according to the second switching control signal SS2 of the gate-on voltage supplied in accordance with the second sensing mode, so that the driving voltage EVdd is applied to the reference line RL . On the other hand, the fourth transistor Q4 is turned off according to the second switching control signal SS2 of the gate-off voltage supplied in accordance with the first sensing mode, so that the driving voltage Vdd supplied to the reference line RL EVdd.

In response to the third and fourth switching control signals SS3 and SS4 supplied from the timing controller 210, the switching unit 246 switches between the initialization period of the first or second sensing mode and the data addressing period of the display mode And supplies the reference voltage Vref to the fourth terminal T4 of the line selector 244. [ In response to the third and fourth switching control signals SS3 and SS4, the switching unit 246 switches the sensing unit 248 to the line selecting unit 242 in the sensing period of the first or second sensing mode 244 to the fourth terminal T4. In addition, the switching unit 246 is responsive to the third and fourth switching control signals SS3 and SS4 to switch the sensing unit 248 and the line selection unit 246 in the line charging period of the first or second sensing mode, (RL) or the driving power supply line (PL) by cutting off the connection between the fourth terminal (T4) of the first power supply line (244). To this end, the switching unit 246 includes first and second switching elements SW1 and SW2.

The first switching device SW1 is connected between the reference power supply and the fourth terminal T4 of the line selector 244 and is switched according to the third switching control signal SS3. The first switching device SW1 is turned on by the third switching control signal SS3 of the gate-on voltage so that the reference voltage Vref is applied to the fourth terminal T4 of the line selector 244 And is turned off by the third switching control signal SS3 of the gate-off voltage to cut off the reference voltage Vref supplied to the fourth terminal T4 of the line selector 244. [

The second switching device SW2 is connected between the sensing unit 248 and the fourth terminal T4 of the line selecting unit 244 and is switched according to the fourth switching control signal SS4. The second switching device SW2 is turned on by the fourth switching control signal SS4 of the gate-on voltage so that the sensing unit 248 is connected to the fourth terminal T4 of the line selecting unit 244 And turns off (or disconnects) the connection between the sensing unit 248 and the fourth terminal T4 of the line selection unit 244 by the fourth switching control signal SS4 of the gate- do.

The sensing unit 248 is connected to the reference line RL in the sensing period of the first sensing mode and is connected to the reference line RL in which the voltage corresponding to the current flowing in the driving transistor Tdr is charged. Generates a first sensing data (Sdata_Tdr) corresponding to the sensed voltage, and provides the first sensing data (Sdata_Tdr) to the timing controller (210). In the sensing period of the second sensing mode, the sensing unit 248 is connected to the driving power supply line PL, and the sensing unit 248 drives the second switching transistor Tsw2, which is charged with a voltage corresponding to the current flowing through the second switching transistor Tsw2, Generates a second sensing data (Sdata_Tsw2) corresponding to the sensed voltage, and provides the second sensing data (Sdata_Tsw2) to the timing controller (210). The sensing unit 248 may be an analog-to-digital converter that senses the voltage of the reference line RL or the driving power line PL according to a sensing mode to generate corresponding sensing data Sdata_Tdr / Sdata_Tsw2 .

The sensing unit 248 may include a current-voltage conversion circuit that converts a current flowing in the reference line RL or the driving power supply line PL into a voltage according to a sensing mode and supplies the voltage to the analog-to-digital converter, , And an operational amplifier.

In addition, the sensing unit 248 may include the second switching device SW2 of the switching unit 244. [

FIG. 4 is a driving waveform diagram of the first sensing mode in the organic light emitting diode display according to the first embodiment of the present invention. FIGS. 5A and 5B are graphs showing the driving waveforms of the pixels in the first sensing mode Fig.

Referring to FIGS. 4, 5A and 5B, the operation of a representative pixel in the first sensing mode of the organic light emitting display according to the first embodiment of the present invention will be described below.

First, in the first sensing mode, the line selector 244 turns on the first and second transistors Q1 and Q2 according to the first switching control signal SS1 of the gate-on voltage Von, The third and fourth transistors Q3 and Q4 are turned off according to the second switching control signal SS2 of the gate-off voltage Voff. The driving voltage EVdd is supplied to the driving power supply line PL connected to the pixel P through the first transistor Q1 and the reference line RL connected to the pixel P is supplied to the second transistor Q2. ≪ / RTI >

In the first sensing mode, the pixel P may be driven in the initialization period t1, the line charging period t2, and the sensing period t3.

4 and 5A, in the initialization period t1, the first scan pulse SP1 of the first gate high voltage VGH is supplied to the scan control line SL, The second scan pulse SP2 of the gate high voltage VGH is supplied to the sensing control line SL and the sensing data voltage Vsen is supplied to the data line DL. Accordingly, the sensing data voltage Vsen supplied to the data line DL by the first switching transistor Tsw1 is turned on by the first scan pulse SP1 to the first node n1, The second switching transistor Tsw2 is turned on by the second scan pulse SP2 and the reference voltage Vref supplied to the reference line RL is supplied to the gate electrode of the transistor Tdr, (n2), that is, the source electrode of the driving transistor Tdr. At this time, the sensing data voltage Vsen has a level of the target voltage set for sensing the threshold voltage of the driving transistor Tdr. Therefore, in the initialization period t1, the source voltage of the driving transistor Tdr and the reference line RL are initialized to the reference voltage Vref.

Then, in the line charging period t2, the first and second switching transistors Tsw1 and Tsw2 are turned on in the column mode by the first gate high voltage VGH, The reference line RL is switched to the floating state by the switching unit 246 of the driving unit 240. Accordingly, the driving transistor Tdr is operated in the source follower mode by the sensing data voltage Vsen supplied to the gate electrode, so that the sensing data voltage Vsen is applied to the floating reference line RL, (Vsen-Vth_Tdr) of the threshold voltage (Vth_Tdr) of the driving transistor Tdr is charged.

4 and 5B, in the sensing period t3, the first switching transistor Tsw1 maintains the turn-on state, and the second switching transistor Tsw2 maintains the turn- The reference line RL is turned on by the switching unit 246 of the column driver 240 and the line selection unit 244 is turned off by the second scan pulse SP2 of the voltage VGL, The second transistor Q2 of the switching unit 246 and the second switching device SW3 of the switching unit 246. [ Accordingly, the sensing unit 248 senses the voltage (Vsense = Vsen-Vth_Tdr) charged in the reference line RL, converts the sensed voltage Vsense to analog-digital conversion, and outputs the first sensing data Sdata_Tdr And provides it to the timing control unit 210.

Accordingly, the timing controller 210 controls the threshold voltage Vth_Tdr (Vth_Tdr) of the pixel driving transistor Tdr based on the sensing data voltage Vsen and the first sensing data Sdata_Tdr provided from the sensing unit 248 And calculates a first compensation value for each pixel based on the calculated threshold voltage Vth_Tdr of the pixel-by-pixel driving transistor Tdr, and stores the calculated first compensation value in the memory 212. At this time, the threshold voltage Vth_Tdr of the driving transistor Tdr may be a voltage (Vsen-Vsense) obtained by subtracting the sensing voltage Vsense of the sensing unit 248 from the sensing data voltage Vsen.

FIG. 6 is a driving waveform diagram of the second sensing mode in the organic light emitting display according to the first embodiment of the present invention. FIGS. 7A and 7B are graphs showing the driving waveforms of the pixels in the second sensing mode Fig.

6, 7A, and 7B, the operation of a representative pixel in the second sensing mode of the organic light emitting display according to the first embodiment of the present invention will now be described.

First, in the second sensing mode, the line selector 244 turns off the first and second transistors Q1 and Q2 according to the first switching control signal SS1 of the gate-off voltage Voff, The third and fourth transistors Q3 and Q4 are turned on in response to the second switching control signal SS2 of the gate-on voltage Von. The driving power supply line PL connected to the pixel P is connected to the switching unit 246 through the third transistor Q1 and the reference line RL connected to the pixel P is connected to the fourth transistor The driving voltage EVdd is supplied through the transistors Q4 and Q4.

In the second sensing mode, the pixel P may be driven in the initialization period t1, the line charging period t2, and the sensing period t3, as in the first sensing mode.

6 and 7A, in the initialization period t1, the first scan pulse SP1 of the first gate high voltage VGH is supplied to the scan control line SL, The second scan pulse SP2 of the gate high voltage VGH 'is supplied to the sensing control line SL and the sensing data voltage Vsen for operating the driving transistor Tdr in the switch mode is supplied to the data line DL. Here, the sensing data voltage Vsen may be at the same voltage level as the first gate high voltage VGH. Accordingly, the sensing data voltage Vsen supplied to the data line DL by the first switching transistor Tsw1 is turned on by the first scan pulse SP1 to the first node n1, Is supplied to the gate electrode of the transistor Tdr, whereby the driving transistor Tdr is turned on and operates in the switch mode. The reference voltage Vref supplied to the driving power supply line PL is supplied to the second node n2 which is the source electrode of the second switching transistor Tsw2 through the driving transistor Tdr, Is supplied to the drain electrode of the second switching transistor Tsw2. Therefore, in the initialization period t1, the source voltage of the driving transistor Tsw2 and the driving power supply line PL are initialized to the reference voltage Vref.

Then, in the line charging period t2, the first switching transistor Tsw1 operates in the switch mode by the first gate high voltage VGH, and the driving transistor Tdr operates in the sensing data voltage The driving power supply line PL is switched to the floating state by the switching unit 246 of the column driver 240 in a state in which the power supply line PL is operated in the switch mode by the driver Vss. Accordingly, the second switching transistor Tsw2 is operated in the source follower mode by the second gate high voltage VGH 'of the sensing data voltage level supplied to the gate electrode, (VGH'-Vth_Tsw2) between the second gate high voltage VGH 'and the threshold voltage Vth_Tsw2 of the second switching transistor Tsw2 is charged in the capacitor PL.

6 and 7B, in the sensing period t3, the second switching transistor Tsw2 maintains the turn-on state, and the first switching transistor Tsw1 maintains the turn- Off by the first scan pulse SP1 of the voltage VGL and the driving power line PL is turned on by the switching unit 246 of the column driving unit 240 to the line selecting unit 244 And the second switching element SW3 of the switching unit 246. The second switching element SW3 of the switching unit 246 is connected to the sensing unit 248 through the third transistor Q3. Accordingly, the sensing unit 248 senses a voltage (Vsense = VGH'-Vth_Tsw2) charged in the driving power supply line PL, and analog-digital converts the sensed voltage Vsense to generate second sensing data (Sdata_Tsw2) to the timing controller 210.

Accordingly, the timing controller 210 controls the threshold of the pixel-by-pixel second switching transistor Tsw2 based on the second gate high voltage VGH 'and the second sensing data Sdata_Tsw2 provided from the sensing unit 248, Calculates the second compensation value for each pixel based on the calculated threshold voltage (Vth_Tsw2) of the second switching transistor Tsw2 for each pixel, and stores the calculated second compensation value in the memory 212. At this time, the threshold voltage Vth_Tsw2 of the second switching transistor Tsw2 is a voltage VGH'-Vsense obtained by subtracting the sensing voltage Vsense of the sensing unit 248 from the second gate high voltage VGH ' .

8 is a view schematically showing a typical pixel and a column driving unit of a display panel in an organic light emitting diode display according to a second embodiment of the present invention in which the above-described line selecting unit is formed on a display panel . Only different configurations will be described below.

The line selector 244 is formed in the non-display region of the display panel 100 to be connected to the driving power supply line PL and the reference line RL of the pixel P and is connected to the switching unit 246 of the column driver 3, except for the fact that the connection is connected to the ground.

5A and 5B, in the first sensing mode, the line selector 244 selects one of the first and second transistors Tr1 and Tr2 according to the first switching control signal SS1 of the gate- Q1 and Q2 are turned on and the third and fourth transistors Q3 and Q4 are turned off according to the second switching control signal SS2 of the gate off voltage Voff. The driving voltage EVdd is supplied to the driving power supply line PL connected to the pixel P through the first transistor Q1 and the reference line RL connected to the pixel P is supplied to the second transistor Q2. ≪ / RTI >

7A and 7B, in the second sensing mode, the line selector 244 selects one of the first and second transistors < RTI ID = 0.0 > Q1 and Q2 are turned off and the third and fourth transistors Q3 and Q4 are turned on according to the second switching control signal SS2 of the gate-on voltage Von. The driving power supply line PL connected to the pixel P is connected to the switching unit 246 through the third transistor Q1 and the reference line RL connected to the pixel P is connected to the fourth transistor The driving voltage EVdd is supplied through the transistors Q4 and Q4.

2, except that the line selection unit 244 is formed on the display panel 100, the organic EL display according to the second embodiment of the present invention may have a first or second sensing The driving method of the pixel according to the mode is the same as that shown in FIG. 5A and FIG. 5B or FIG. 7A and FIG. 7B, so that a duplicate description thereof will be omitted.

Meanwhile, in the OLED display according to the second embodiment of the present invention, the display panel 100 may further include the switching unit 246.

9 is a driving waveform diagram of a display mode in the organic light emitting display according to the first and second embodiments of the present invention.

Referring to FIG. 9, the operation of a representative pixel in the display mode of the organic light emitting display according to the first and second embodiments of the present invention will be described as follows.

First, in the display mode, the line selector 244 turns on the first and second transistors Q1 and Q2 according to the first switching control signal SS1 of the gate-on voltage Von, The third and fourth transistors Q3 and Q4 are turned off according to the second switching control signal SS2 of the voltage Voff. The driving voltage EVdd is supplied to the driving power supply line PL connected to the pixel P through the first transistor Q1 and the driving voltage Vdd is supplied to the reference line RL connected to the pixel P, The reference voltage Vref is supplied through the first switching element SW1 of the switching unit 246 and the first switching element SW1 of the switching unit 246.

In the display mode, the timing controller 210 corrects input pixel-by-pixel input data Idata according to the first and second compensation values for each pixel stored in the memory unit 212, And supplies the generated data DATA to the column driver 240. The row driver 230 drives the row driver 230 and the column driver 230 based on a timing synchronization signal TSS input from an external driving system And generates the data control signal DCS, the first and second row control signals RCS1 and RCS2, and the switching control signals SS1 to SS4 for controlling the column driver 240, respectively. At this time, the pixel-by-pixel pixel data DATA includes compensation data for simultaneously compensating the threshold voltages of the driving transistor Tdr and the second switching transistor Tsw2.

In the display mode, the pixel P may be driven in the data addressing period AP and the light emission period EP.

In the data addressing period AP, a first scan pulse SP1 of the first gate high voltage VGH is supplied to a scan control line SL, and a second scan of the first gate high voltage VGH, A pulse SP2 is supplied to the sensing control line SL and the display data voltage Vdata converted from the pixel data DATA is supplied to the data line DL. Accordingly, the display data voltage Vdata supplied to the data line DL by the first switching transistor Tsw1 is turned on by the first scan pulse SP1 to the first node n1, The second switching transistor Tsw2 is turned on by the second scan pulse SP2 and the reference voltage Vref supplied to the reference line RL is supplied to the gate electrode of the transistor Tdr, (n2), that is, the source electrode of the driving transistor Tdr. Therefore, the capacitor Cst connected to the first node n1 and the second node n2 is charged with the difference voltage Vdata-Vref between the display data voltage Vdata and the reference voltage Vref. The display data voltage Vdata charged in the capacitor Cst includes a compensation voltage for compensating a threshold voltage of each of the driving transistor Tdr and the second switching transistor Tsw2.

Then, in the light emission period EP, the first and second switching transistors Tsw1 and Tsw2 are turned off by the first and second scan pulses SP1 and SP2 of the gate low voltage VGL, do. Accordingly, the driving transistor Tdr is turned on by the voltage (Vdata-Vref) stored in the capacitor Cst. Accordingly, the data current Ioled, which is determined by the differential voltage (Vdata-Vref) between the display data voltage (Vdata) and the reference voltage (Vref), is controlled by the turn- The organic light emitting diode OLED emits light in proportion to the data current Ioled flowing from the driving power supply line PL to the cathode power supply line CPL. That is, in the light emission period EP, when the first and second switching transistors Tsw1 and Tsw2 are turned off, a current flows in the driving transistor Tdr, and the organic light emitting diode OLED The voltage of the second node n2 rises and the voltage of the first node n1 rises by the voltage of the second node n2 by the capacitor Cst, The gate-source voltage Vgs of the driving transistor Tdr is constantly maintained by the voltage of the organic light emitting diode OLED so that the organic light emitting diode OLED continues to emit light until the addressing period AP of the next frame. Here, the current Ioled flowing through the organic light emitting diode OLED is controlled by a threshold voltage change of the corresponding driving transistor Tdr and a threshold voltage of the second switching transistor Tsw2 by the data voltage Vdata including the compensation voltage, It is not affected by the change.

On the other hand, in the display mode of the OLED display according to the first and second embodiments of the present invention, the pixel-by-pixel input data Idata is stored in the memory unit 212 according to the first compensation value for each pixel And a second compensation transistor for compensating a threshold voltage change of the driving transistor Tdr by correcting the second compensation transistor Tsw based on a second compensation value for each pixel stored in the memory unit 212, The gate high voltage VGH '' of the second scan pulse SP2 may be set to compensate the voltage transfer rate according to the threshold voltage change of the second switching transistor Tsw.

As described above, according to the present invention, the driving voltage EVdd is supplied to the reference line RL in accordance with the sensing mode using the line selection unit 244, and the driving voltage line PL is connected to the sensing unit 248 The threshold voltage of the second switching transistor Tsw2 can be sensed through the driving voltage line PL by operating the second switching transistor Tsw2 in the source follower mode.

Further, the present invention corrects the data voltage based on the threshold voltage of the driving transistor (Tdr) sensed by the sensing mode and the threshold voltage of the second switching transistor (Tsw2) so that the threshold voltage of the driving transistor and the switching transistor Can be compensated at the same time. According to the present invention, the data voltage is corrected based on the threshold voltage of the driving transistor Tdr sensed by the first sensing mode, and the threshold voltage of the second switching transistor Tsw2 sensed by the second sensing mode The threshold voltage of the driving transistor and the switching transistor included in the pixel can be simultaneously compensated by optimizing the gate voltage of the second switching transistor Tsw2.

As a result, the present invention prevents degradation of the voltage transfer rate due to a change in the threshold voltage of the second switching transistor Tsw1 included in the pixel P, thereby improving the reliability and lifetime of the organic light emitting display according to long- .

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents. Will be clear to those who have knowledge of. Therefore, the scope of the present invention is defined by the appended claims, and all changes or modifications derived from the meaning and scope of the claims and their equivalents should be interpreted as being included in the scope of the present invention.

100: display panel 210: timing controller
220: power supply unit 230: row driving unit
232: scan line driver 234: sensing line driver
240: column driver 242: data driver
244: Line selection unit 246:
248:

Claims (10)

A first switching transistor for outputting a data voltage supplied to the data line according to a first scan pulse supplied to the scan control line, a second switching transistor for supplying a reference voltage supplied to the reference line according to a second scan pulse supplied to the sensing control line, A driving transistor for controlling a current flowing from the driving power supply line to the organic light emitting element based on a difference voltage between the data voltage and the reference voltage, and a capacitor connected between the gate and the source of the driving transistor A display panel having pixels included therein; And
And a panel driver for driving the pixel in a first sensing mode, a second sensing mode, or a display mode,
Wherein the panel-
Sensing a threshold voltage of the driving transistor through the reference line while supplying a driving voltage to the driving power supply line in the first sensing mode,
And the threshold voltage of the second switching transistor is sensed through the driving power supply line while supplying the driving voltage to the reference line in the second sensing mode. The method according to claim 1,
Wherein the panel-
The driving voltage is supplied to the driving power supply line in the first sensing mode, the reference line is connected to the sensing unit, the driving power supply line is connected to the sensing unit in the second sensing mode, A line selector for supplying the driving voltage to the scan line driver; And
Sensing the threshold voltage of the driving transistor through the reference line in the first sensing mode to generate first sensing data, sensing the threshold voltage of the second switching transistor through the driving power supply line, And a sensing unit configured to sense the light emitted from the organic light emitting diode. 3. The method of claim 2,
Wherein the line selection unit supplies the driving voltage to the driving power supply line in the display mode and supplies the reference voltage to the reference line. The method of claim 3,
Wherein the line selector comprises:
A first terminal connected to the driving power supply line;
A second terminal coupled to the reference line;
A third terminal to which the driving voltage is supplied;
A fourth terminal selectively connected to the sensing unit or selectively supplied with the reference voltage;
A first transistor for connecting the first terminal and the third terminal in the first sensing mode and the display mode;
A first transistor for connecting the second terminal and the fourth terminal in the first sensing mode and the display mode;
A third transistor for connecting the first terminal and the fourth terminal in the second sensing mode; And
And a fourth transistor for connecting the second terminal and the third terminal in the second sensing mode. 5. The method of claim 4,
Wherein the panel driving unit supplies the reference voltage to the fourth terminal of the line selecting unit or connects the fourth terminal of the line selecting unit to the sensing unit in accordance with the first sensing mode, the second sensing mode, And an organic light emitting diode (OLED). 6. The method according to any one of claims 2 to 5,
And the line selection unit is formed on the display panel. 6. The method according to any one of claims 1 to 5,
In the first sensing mode,
Generating a sensing data voltage for operating the driving transistor in a source follower mode and supplying the sensing data voltage to the data line,
Generates a first scan pulse for operating the first switching transistor in a switch mode and supplies the first scan pulse to the scan control line,
And a second scan pulse for operating the second switching transistor in a switch mode is generated and supplied to the sensing control line. 6. The method according to any one of claims 1 to 5,
In the second sensing mode,
Generating a sensing data voltage for operating the driving transistor in a switch mode, supplying the sensing data voltage to the data line,
Generates a first scan pulse for operating the first switching transistor in a switch mode and supplies the first scan pulse to the scan control line,
And generates a second scan pulse for operating the second switching transistor in a source follower mode, and supplies the second scan pulse to the sensing control line. 6. The method according to any one of claims 2 to 5,
The panel driving unit, in the display mode,
Calculating compensating data for simultaneously compensating a threshold voltage of the driving transistor and a threshold voltage of the second switching transistor based on the first and second sensing data and outputting data to be supplied to the pixel in accordance with the calculated compensating data Wherein the organic light emitting display device comprises: 6. The method according to any one of claims 2 to 5,
The panel driving unit, in the display mode,
A first compensation value for compensating a threshold voltage of the driving transistor based on the first sensing data, correcting data to be supplied to the pixel according to the calculated first compensation value,
A second compensation value for compensating a threshold voltage of the switching transistor based on the second sensing data and varying a voltage level of the second scan pulse according to the calculated second compensation value, Display device.

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