201104381 六、發明說明: 【發明所屬之技術領域】 本發明係屬於類比晶片設計領域,其可 與=购崎她之__,糾= 動電路、參考電流電路及參考電壓 极等電路所構成,可關時提供與溫 =的參恤齡彻,__输瓣力;再者,利 用=電路’該帶差參考電路可叫低電壓條件下操作,達到節省功率的 效果者。 【先前技術】 在類比電路範紅廣泛制電壓與電流參考祕,—個理想的參考電 ’〜矛$源乂、應/皿度及製程參數無關。惟因溫度變化會大大影響半導 體的物理特性,容易造成電路駐作點偏移,所以必須利用正負溫係數相 互抵消的方式,來抑制溫度對電路的影響,這也是一個好的參考電路所必 備的條件。 • I騎示為f知帶差參考電路的基本架構®,其箱兩個電壓訊號 所組合應用而成。第-個電壓訊號為雙載子接面電晶體的射基極電壓I, 其係為-種貞溫度舰f壓;第二個賴訊縣正溫度魏 Vp,其被 放大K倍後與第一個電壓訊號相加,藉以達到溫度補償功能。 依第-圖之習知架構’曾經有人提出以pM〇s輸入的運算放大器來開 發低電壓TT差參考電路。第二圖所示為一種習知的低電壓帶差參考電路 200 ’其包括金氧半埸效電晶體M20 i、M202、M203、雙極接面電晶體Q2⑴、 Q202、電阻 R2(H、R202、R203、R204、R205、R206 以及運算放大器 A2m。 錢路可以產生穩定的參考電流1,流經電阻㈣6產生穩定的輸出參考電 201104381 壓vref_2。惟因溫度的變化依然會影響到電阻幻〇6的阻值變化,易造成輪 出參考電壓的變動,因此仍需要進―步進行補償。再者,在單電源供應的 條件下,使用具PMOS輸入的運算放大器會有直流偏壓偏低與溫度漂移的 問題,會造成接地端偏壓電晶體無法操作在飽和區,而出現不正常運作的 情形;解決之道可以改用具NMOS輸入的運算放大器,惟仍需要進一步進 行偏壓的補償X作’以使運算放大器可以正常工作。至於應时面,大部 分的參考電路只能單獨提供參考或參考餘,若制時提供與溫度無 關的參考龍及參考電流,將可擴大該帶差參考電路業應用範圍。 【發明内容】 本發明的目的係在於:提供-種與溫度無_參考,朗係關於 啟動電路、參考電流電路及參考電壓電路所構成,可以同時輸出與溫度無 關的參考電流與參考電壓,提高其產業利用性;並可透過啟動電路在 壓條件下操作,達到節省功率的效果者。 _ "本發明的目的又在於:使用含有三個電晶體耕的啟動(start_up)電路, 參田所有的電晶體流過的電流為零時,該三個電晶體處於關閉狀態;待加入 電源電壓時,該啟動電路能於低電壓(小於15伏特)條件下啟動帶差夫考 =作並衫姐於作鶴人餘織,不會影_帶差參考電路的正 本發明的目的還在於:_同時可以提供與溫度無_參考電壓及; 考電流的輸出,可明加帶差參考電路的魏·性 料 用性的效n ,、度料 為貫現上述本發明的目的, 點,本發明提供了一種具有啟動 亚且根據如所實施和概括描述的相關優 電路並了同日彳提供與溫度無關的參考電流 201104381 與參考電壓之帶差參考電路,其技術特徵在於: :為啟動電路、參考電流電路及參考電壓電路所構成;其中,所述的 啟動電路,具有-第—P型金氧半場效電晶體(Mp) 第二P型金氧半場 效電晶體_與一第三N型金氧半場效電晶體(Mn)等之電性連接所組成; 所述的參考電流電路,具有—第四P型金氧半場效電晶體⑽)、—第五p 型金乳半場效電晶體(M2)、一第七P型金氧半場效電晶體_)、一 N型差 動輸入的運算放大器(N_type 〇PA)、一第一升壓電阻㈣)、—第二升壓電阻 (Ra2)、-第四補償電阻()、一第五補償電阻(卿、一第七偏壓電阻㈣、 -第-雙極接面電晶體(Q1)及一第二雙極接面電晶體㈣等之電性連接所 組成;所述的參考電壓電路,具有―f六p型金氧半場錢m(m3)、_ N型差動輸人的運算放大孙咖〇ρΑ)、_第—升壓電阻陶)、—第二升 壓電阻(Ra2)、-第二升壓餘(Ra3)、—第四補償電阻(胞)、—第五補償電 阻(Rb2)、-帛六補償酬Rb3)、_第七電阻㈣、—第—雙極接面電晶體 (Q1)帛—雙極接面電晶體(q2)及—第三雙極接面電晶體(⑼等之電性連 接所組成。 另’本發明所述之—種具有啟動電路並可_提供與溫度無關的參考 電肌與參考I壓之帶差參考電路,其中該帶差參考電壓電路中所設置之第 -升壓電阻(Ral)與第二升壓電阻(Ra2_以提升該N型差動輸入的運算 放大器之正負極的偏壓電位。 又,所述之參考電流電路之第二雙極接面電晶體(Q2)的射基極電壓 (vd具有貞電壓溫度係數特性,而使第五補償電阻(Rb2)具有負電流溫度係 數,第-雙極接面電晶體(Q1)與第二雙極接面電晶體㈣的射基極電壓差 (△VBE)具狂電壓溫度舰,使得赫帛七碰雜㈣㈣流具有正電流 溫度係數,其可鮮五猶電峰b2)之貞獅溫度舰互她;肖,形成與 201104381 溫度無_參考電流,經由第四p型金氧半場效電晶體(M1)、第五p型金 氧半心體(M2)與第★ P型金氧半場效電晶體(叫所、城的電流鏡輪 出參考電流’如此即可制與溫度無_參考電流心)。 再’所述之參考電壓電路的第六p型金氧半場效電晶體州)可以藉由 電"_<·鏡效應、而提供與溫度無關的參考電流;由於第三雙極接面電晶體(Q3) 的射基極電壓(νΒΕ)具有負電壓溫度係數特性,加入第三升壓電阻(㈣)所具 有的正電壓恤度係數’如此可以補償第三雙極接面電晶體(⑼的射基極電壓 (νΒε)之貞電壓溫錢數,剌與溫度無_參考電壓(vj。 另外所述之第-升壓電阻(Ral)、第二升壓電阻(㈣、第三升壓電阻 ㈣、第四補償電阻_)、第五補償電阻_)與第六補償電阻_係由 里井(N well)所製成,具有較兩的溫度係數;而第七偏壓電阻㈣則由n 型擴散區域(n+-diffusiGn)所製成,具有較低的溫度係數。 【實施方式】201104381 VI. Description of the Invention: [Technical Field of the Invention] The present invention belongs to the field of analog wafer design, and can be composed of circuits such as = saki, her correction circuit, reference current circuit, and reference voltage pole. When the off can be provided with the temperature = the age of participation, __ loser force; in addition, the use of = circuit 'the difference between the reference circuit can be called low voltage operation, to achieve power saving effect. [Prior Art] In the analog circuit Fan Hong, the voltage and current reference secrets are widely used, and the ideal reference voltage is not related to the source, the dish, and the process parameters. However, because the temperature change will greatly affect the physical properties of the semiconductor, it is easy to cause the circuit to be offset. Therefore, the positive and negative temperature coefficients must be used to cancel each other to suppress the influence of temperature on the circuit. This is also a good reference circuit. condition. • I rides as the basic architecture of the referenced difference reference circuit, which is a combination of two voltage signals. The first voltage signal is the base voltage I of the double-carrier junction transistor, which is the temperature of the ship type f; the second temperature of the Weixi County is Wei Vp, which is amplified by K times and then A voltage signal is added to achieve temperature compensation. According to the conventional architecture of the first figure, an operational amplifier input with pM〇s has been proposed to develop a low voltage TT difference reference circuit. The second figure shows a conventional low voltage band difference reference circuit 200' which includes a gold-oxygen semiconductor transistor M20 i, M202, M203, a bipolar junction transistor Q2 (1), Q202, and a resistor R2 (H, R202). , R203, R204, R205, R206 and operational amplifier A2m. Qian Road can generate a stable reference current 1, flowing through the resistor (4) 6 to produce a stable output reference power 201104381 pressure vref_2. However, due to temperature changes will still affect the resistance illusion 6 The change of the resistance value is easy to cause the fluctuation of the reference voltage, so it still needs to be compensated further. Moreover, under the condition of single power supply, the operational amplifier with PMOS input will have low DC bias and temperature. The drift problem will cause the grounding bias transistor to be inoperable in the saturation region, and the abnormal operation will occur. The solution can be changed to the operational amplifier of the NMOS input, but further compensation of the bias voltage is required. So that the op amp can work normally. As for the time, most of the reference circuits can only provide a reference or reference separately, if the temperature-free reference is provided. And the reference current, the application range of the band difference reference circuit can be expanded. SUMMARY OF THE INVENTION The object of the present invention is to provide a reference to a temperature and no reference, and to a reference circuit, a reference current circuit and a reference voltage circuit. The utility model can simultaneously output the reference current and the reference voltage which are independent of temperature, thereby improving the industrial utilization thereof, and can be operated under the pressure condition through the starting circuit to achieve the effect of saving power. _ " The purpose of the invention is further: use A start_up circuit with three transistor cultivators. When all the currents flowing through the fields of the field are zero, the three transistors are in a closed state; when the power supply voltage is to be added, the starting circuit can be at a low voltage ( Under the condition of less than 15 volts, the start of the belt with the test is = 并 衫 衫 于 于 鹤 鹤 余 余 余 , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , The output of the test current can clearly show the effect of the material of the difference reference circuit, and the degree of the material is the purpose of the present invention. A differential reference circuit having a start-up sub-phase and a correlation circuit as described and generally described, and providing a temperature-independent reference current 201104381 and a reference voltage, the technical characteristics of which are: a start-up circuit, a reference current circuit And a reference voltage circuit; wherein the starting circuit has a -P-type MOS half-effect transistor (Mp), a second P-type MOS field-effect transistor _ and a third N-type oxy-half field The electric current crystal (Mn) or the like is electrically connected; the reference current circuit has a fourth P-type gold oxygen half field effect transistor (10), and a fifth p-type gold emulsion half field effect transistor (M2) a seventh P-type MOS half-effect transistor _), an N-type differential input operational amplifier (N_type 〇PA), a first boost resistor (four)), a second boost resistor (Ra2), - Electrical properties of the fourth compensation resistor (), a fifth compensation resistor (Qing, a seventh bias resistor (4), - a - bipolar junction transistor (Q1), and a second bipolar junction transistor (4) The connection is composed; the reference voltage circuit has "f six p-type gold oxygen half-time money m (m3), _ N The differential input operator magnifies the sun coffee 〇 Α), the _ first boosting resistor, the second boosting resistor (Ra2), the second boosting residual (Ra3), and the fourth compensating resistor (cell) , - fifth compensation resistor (Rb2), - six compensation compensation Rb3), _ seventh resistance (four), - first bipolar junction transistor (Q1) 帛 - bipolar junction transistor (q2) and - Three bipolar junction transistors ((9) and other electrical connections. Another 'the invention has a start-up circuit and can provide a temperature-independent reference electrode and a reference I voltage difference reference circuit, wherein the differential-reference voltage circuit is provided with a first-boost resistor ( Ral) and a second boosting resistor (Ra2_ to boost the bias potential of the positive and negative terminals of the operational amplifier of the N-type differential input. Further, the second bipolar junction transistor of the reference current circuit (Q2) The base voltage of the base (vd has a temperature coefficient of 贞 voltage, and the fifth compensation resistor (Rb2) has a negative current temperature coefficient, the first bipolar junction transistor (Q1) and the second bipolar junction transistor (4) The base voltage difference (ΔVBE) of the base is mad voltage temperature ship, so that the Hertz seven collisions (four) (four) flow has a positive current temperature coefficient, which can be fresh five heat peak b2) lion temperature ship mutual her; Xiao, Forming a temperature-free reference current with 201104381, via a fourth p-type gold-oxygen half-field effect transistor (M1), a fifth p-type gold-oxygen half-body (M2), and a ★P-type gold-oxygen half-field effect transistor (called The current mirror of the city rotates the reference current 'so that it can be made with temperature without reference current core.' The sixth p-type MOS field-effect transistor state of the circuit can provide a temperature-independent reference current by the electric "_<· mirror effect; due to the base of the third bipolar junction transistor (Q3) The pole voltage (νΒΕ) has a negative voltage temperature coefficient characteristic, and the positive voltage coefficient of the third boosting resistor ((4)) is added to compensate the third bipolar junction transistor ((9) the base voltage (νΒε) ) 贞 voltage and temperature, 剌 and temperature without _ reference voltage (vj. Also described as the first - boost resistor (Ral), second boost resistor ((four), third boost resistor (four), fourth compensation resistor _), the fifth compensating resistor _) and the sixth compensating resistor _ are made of N well, and have two temperature coefficients; and the seventh bias resistor (4) is composed of an n-type diffusion region (n+- Made of diffusiGn) with a lower temperature coefficient.
以下兹將本發明為達成其發明目的之整體構造、設計,配合附圖及實 施例’作進一步詳細說明如下: 首先印參閱第三圖卿,縣發明之具有啟動電路並可同時提供與溫 度無關的參考電流與參考電壓之帶差參考電路·,其特徵在於··係為啟動 (start-up)電路卜參考電流電路2及參考電壓電路3所構成,可在低電壓(小 於1.5伏特)條件下工作,達到節省功率的效果;其甲, 所述的啟動電路(請參考第三圖),含有三個電晶體讀,分別為第一 錄氧半場效電晶體(Mp)、第二p型金氧半場效電晶體(Ms)與第三N型 氧半琢放電曰曰體(㈣,其巾,該第一 p型金氧半場效電晶體(Mp)包括— 閘極第—雜、—第三祕與__第四基底㊉吻),該第—閘極電性 201104381 接至該N型差動輸入的運算放大器之輸出端,該第二源極與第四基底電性 耦接至電源的正端(VDD),而該第三汲極則電性耦接至第二p型金氧半場效 電晶體(Ms)之第-閘極端;該第二p型金氧半場效電晶體(Ms)包括一第— 閘極、一第二源極、一第三汲極與一第四基底,該第一閘極電性耦接至該 第- P型金氧半場效電晶體(Mp)之第三沒極端,該第二源極與第四基底電 性耗接至電源的正端(Vdd) ’而該第三沒極則電性搞接至N型差動輸入的運 算放大器(N-type OPA)之負極輸入端(Vin·);該第三_金氧半場效電晶體 (Μη)包括-第-閘極、一第二源極、一第三沒極與一第四基底吻),該第 -閘極、第I源極與第四基底(Body)同時電性搞接纟電源的接地端㈤), 而該第三沒極則電性耗接至第-P型金氧半場效電晶體_之第三沒極端。 請同時參考第三®、第四®與第五圖,#該帶差參考電路處於無電源 狀態時’所有的電晶體進人關絲’使得電晶體職過的電流為零;而 當電源電壓VDDS漸升高時(請參考第四圖),因為該第一 p型金氧半場效電 B曰體(Mp)與第二N型金氧半場效電晶體(Mn)操作於三沒區(Tri〇de邮吵 使付該第二P型金氧半場效電晶體(Ms)之.端的電位約為電源電壓d) 的一半;而當該第二p型金氧半場效電晶體(Ms)的閑極電壓(Vmsg)迅速提 兩時’該第二P型金氧半場效電晶趙(Ms)立即進入導通狀態,源極電流“ 快速提高(請參考第五®),缝制龍織人的運算放A||(N_type〇pA) 下方的第-升壓電阻(Rai)與細補償電阻(Rbl),使縣㈣差動輸入的運 算放大器(N-type 0PA)之輸入電壓開始啟動,同時在該N型差動輸入的運算 放大器(Ν-typeOPA)的輸出端(V〇pA〇ut)產生電壓輸出,進而啟動第四p型金 氧半场效電晶體(Ml)、第五p型金氧半場效電晶體(M2)、第六p型金氧半 場效電晶體(JVG)與第七P型金氧半場效電晶體阐。在啟動工作完成後, „亥第一 P型金氧半場效電晶體⑽)的間極電壓(v_)持續上升,導致第二p 201104381 型金氧半場效電晶體(MS)進入截止狀態,源極電流Ims下降至零;此時,第 一 P型金氧半場效電晶體(Mp)操作於三汲區,其功能近似電阻,因而使得 第一 P型金氧半場效電晶體(Ms)的閘極電壓(vMSG)會隨著電源電壓vDD的 上升而同步上升’促使第一 p型金氧半場效電晶體(Mp)瞬間進入截止狀態, 啟動電路與主電路分離而不會影響到帶差參考電路的正常操作。 所述的參考電流電路(請再參考第三圖),具有一第四卩型金氧半場效電 aa體(Ml)第五P型金氧半場效電晶體(M2)、一第七p型金氧半場效電 晶體(M4)、— N型絲輸人的運算放大器(N_tyPe 升壓電阻 (Ral)、一第二升壓電阻(Ra2)、一第四補償電阻(Rbl)、一第五補償電阻 _)、—第七偏壓電阻㈣、一第一雙極接面電晶體_及一第二雙極接 面電晶體(Q2)等之f性連接而成,可以形成與溫度無_參考電流㈣其 中.玄第四p S金氧半場效電晶體(Ml)包括一第一間極、一第二源極、一 第-;及極與-第四基邮Gdy),該第―閘極紐雛至該N型差動輸入的 運异放大器之輸出端’該第二源極與第四基底電性祕至電源的正端 (VDD),而該第级極觸時電_接至第二?型金氧半場效電晶體⑽)之 春第这極端及㈣型絲輸人的運算放A||之貞極輸人端⑽·);該第五p 型金氧半場效電晶體(M2)包括一第一閘極、一第二源極、一第三沒極與一 第四基底,縣電,_接至該N型絲輸人的料放A||(N_type 0伙)之輸出端’该第二源極與第四基底電性麵接至電源的正端〜),而該 第三汲極則雜_至該N型差動輸人的運算放墙 OPA)之正極 3端(Vin+),該第七P型金氧半場效電晶體(M4)包括一第一間極、一第二 、’、。第—雜與—第四基底,該第-fg極電⑽接至該N型差動輸入 的運开放大益之輸出端’該第二源極與第四基底電性輕接至電源的正端 (DD)而。亥第―;及極則電性輕接至該參考電流電路的輸出端(U ;該Ν型 201104381 =^_A||(N_type _包括_人端—、正極輸入端 .、輸出端(V〇pAQut)等端點’該負極輸入端⑽恫時電性 p 型=場效電晶體(Ms)之第三汲極端、該第四p型金氧半場效電晶體_ 之二及極端與第一升壓電阻(Ral)之第一端,該正極輸入端㈤+)同時電 _接到第五p型金氧半場效電晶體(M2)之第三赌端與第二升壓電阻 _之第-端,而該輸出端(VOPAOUt)則同時電性耗接至第一陶、第四 _、第五_與第七(卿型金氧半場效電晶體之第一閉極端;該第一 升塾電T(Ral)包括第一端與第二端,該第一端係電性輕接到該N型差動輸 入的運減大器之負極輸人端(Vin_) ’而該第二酬同時紐祕到第四補 償電阻陶的第-端與第—雙極接面電晶卿)之第二射極端;該第二升 堅電阻(Ra2)包括第—端與第二端,該第—端係電性_到該n型絲輸入 的運算放大H之正極輸續νιη+),_第二端卿時電_㈣第五補償 電阻(Rb2)的第-端與第七偏壓電阻(R2)之第一端;該第四補償電阻剛包 括第一端與第二端’該第—端係同時電_制該第-升壓電阻(Ral)的第 二端與該第-雙極接面電晶卿)之第二射極端,而該第二端則接地;該第 五補償電阻(Rb2)包括第-端與第二端,該第—端_時電性输到二 升壓電阻_)的第二端無第七驗雅㈣㈣―端,而該第二端則接 地;該第七偏Μ電阻(R2)包括第一端與第二端,該第—端係同時電性雛到 該第二升壓f阻(Ra2)的第二端與該第五補償電阻_)之第—端,而該第二 端則電性減到第二雙極接面電晶體(Q2)之第二射極端;該第一雙極接面電 晶體(Q1)包括-第-基極(Base)、一第二射極(Emi㈣與一第三集極 (Coitoor),該第一基極同時電性耦接到第二雙極接面電晶體(Q2)的第—基 極及接地端,該第二射極同時電性·到第一升屢電阻㈣)的第二端與該 第四補償電阻(Rbl)之第-端,而該第三集極則接地;該第二雙極接面電晶 1! 201104381 體(Q2)包括一第一基極(Base)、一第二射極(Emitter)與一第三集極 (Collector) ’該第-基極jgj時電性到第一雙極接面電晶體(Qi)的第—基 極及接地端,該第二射極電性搞接到第七偏壓電阻(R2)的第二端,而該第三 集極則接地。 所述的參考電壓電路’具有一第四p型金氧半場效電晶體陶、一第 五P型金氧半場效電晶體(M2)、一第六p型金氧半場效電晶體、一 N 型差動輸入的運算放大器(N_type 〇PA)、—第一升壓電阻㈣)、一第二升壓 電阻_)、一第二升壓電阻(Ra3)、一第四補償電阻(Rbl)、-第五補償電阻 • -第六補償電阻_)、一第七偏壓電阻㈣、一第一雙極接面電晶 體(Q1)第一雙極接面電晶體(q2)及一第三雙極接面電晶體(q3)等之電性 連接所組成,其巾,該第四p型金氧半場效電晶體(mi)、第五p型金氧半 場效電晶體(M2)、N型差動輸入的運算放大器(Ν__〇ρΑ)、第一升壓電阻 (Ral)第一升壓電阻⑽2)、第四補償電阻卿)、第五補償電阻(咖)、第 七偏壓電阻(R2)、第-雙極接面電晶體(Q1)與第二雙極接面電晶體㈣等元 件之電性連接方式如同參考f流電路之連接方式,不縣述。*該第六p # f金氧半場效電晶體(M3)包括—第一閘極、—第二源極、—第三沒極與一 _基底,該第-_電_接至該N型絲輸人簡算放大器之輸出 知’销二源極與第四基底電性輕接至電源的正端(I),而該第三沒極則 紐耦接至該參考龍電路的輸出端(I);該第三升壓電阻㈣他括第— 端與第二端’該第一端係電性輕接到該參考電壓電路的輪出端(Vref) ’㈣ 第二端則同時電性輕接到第六補償電阻_)的第一端與第三雙極接面電2 體(Q3)之第二射極端;該第六補償電阻_)包括第一端與第二端,該第— 端係同時電性雛到該第三升麼電阻(Ra3)的第二端與該第三雙極料電晶 體(Q3)之第二射極端,而該第二端則接地;該第三雙極接面電晶_)包= 12 m 201104381 一第一基極(Base)、一第二射極(Emitter)與一第三集極(c〇Uect〇r),該第一基 極接地,該第二射極同時電性耦接到第三升壓電阻(Ra3)的第二端與第六補 償電阻(Rb3)之第一端,而該第三集極則接地。 所设置之第-升壓電阻(Ral)與第二升壓電阻係用以提升該n型 差動輸入的運算放大器(N-type OPA)之偏壓電位,而第三升壓電阻(Ra3)係用 以補償第二雙極接面電晶體㈣騎紐輕。也就是說該帛—雙極接面 電晶體(Q1)、第二雙極接面電晶體(Q2)及第三雙極接面電晶體(Q3)的躲極 電坚句…有負電度係數特性,因而造成流經第四補償電阻(RM)、第五 補償電阻_)與第六補償電阻_)的電流均具有負電流溫度係數,配合流 經第七偏壓電阻之正電流溫度係數(係由第一雙極接面電晶體则與第二雙 極接面電晶體(Q2)之射基極電位差所產生的正電壓溫度係數),即可得到與 溫度變化無_參考電流。再者,由於紐第三升壓fm(Ra3)的電流為盘 溫度變化無_料鎌,使鄕三聽纽_)料壓线正電壓溫度 係數,可以用來麵第三雙極接面電晶卿)之射基極電壓的負電壓溫度係 數1而得到與溫度變化無關的參考電壓(I)。請參考第六圖,在未加入 補償電阻(Rb系列)時’其輸出參考電壓對溫度變化的變異性相 的:出參考電壓);而在加入補償電阻後,明顯使得輸出參考電壓對溫度^ ^篁所產生的變化下降(補償後的輸出參考電壓),翻補償效果。並請灸考 :,其係本魏製作成晶片後所實爾_輸出參钱壓對溫度變化 生的輸出結果;在溫度範圍介於此〜峨間,其帶差參考電壓的平 約為咖6伏特(V),而其輸出參考電因溫度變化所產生的最大 考電ΪΓ5微伏特(mv);若溫度範於3G°C〜靴間,帶差參 生的出值約為_6伏特(V) ’而其輸_因溫度變化所產 、最大變異值為0.8微伏特(mV),舰輸出參她已達穩定補償效 13 201104381 =二:示為本電路晶片所實測得到的輸出參考電_源供峨 應電塵為統^叫知,轉絲找料於電源供 ,,㈣4參考電路可財低電祕件下操作, 々aL/ 、的效果。第九圖所示為本電路晶片所實測得到的輸出參考電 ^表者題魏rc)職__結果,由·絲㈣得知,本 $ / —電路的電輸出相當穩定,己達到補償效果。 仰接者。月參考第十圖’係本發明所採用之具N型差動輸入的運算放大 電路實現圖,係由鏡射㈣放大電路、輸出放大電 〇 p ,^tfM(M6〇1) ^ ^ -第杨效電晶體(刪2)、—第切型錄半場效電晶體(獅3)、 (刪5)料^氧Γ效電晶體(觸4)與—料二N型錄半場效電晶體 議==物域心,象嗜购效電晶體 弟閘極、一第二源極、一第一牮 第-閘極同時電性输到m h — 、1基底(B〇dy),該 ^ 雛到雜九Ρ型金氧半場效電晶體(Μ602)之第-閘 極、该第八Ρ型金氧半場效電晶體(Μ6〇ι)之第三祕及該第十Ν型金氧半 陳第三祕,該第二源極與細基底紐输至電源的 Ί亥第^及極則同時電性輕接至該第八?型金氧半場效電晶體 、該第九ρ型金氧半場效電晶體(刪2)之第—閘極及該 效姆(_3)也咖嫩ρ嶋半場效電 日曰體_〇2)包括—第一閉極、一第二源極、一第三及極與—第四基底 (Body) H閘極同時電 Α _ 小閘極敝她㈣购==== 極’該第二源極與第四基底電性_至電源的正端(I),而該第三祕則 同時電_接至該第十一 N型金氧半場效電晶體(刪句之第三沒極、該第 201104381 -p型金氧半場效電晶鄉娜)之第—間極及該針五p型金氧半場效 電晶體(M_RC)之第二源極;該第十N型金氧半場效電晶體(M㈣包括—第 閘極第一源極、一第三汲極與一第四基底(Body),該第一閘極電性耦 接到邊第-升壓電阻(Ra⑽第—端(vin_),該第二源極與第四基朗時電性 輕接到第十-N型金氧半場效電晶體(腦4)之第二源極及該第十二n型金 氧半场效電晶體(M6〇5)之第三沒極,該第三及極貝,】電性輕接至第八p型金 氧半场效電晶體(刪1)的第-祕與第三祕;該第十 電晶體(刪)包括-第-問極、-第二源極、-第三錄與一第四基: (Body),該第一閘極電性耦接到該第二升壓電阻(Ra2)的第一端㈣,該第 二祕與細基制時電_接辦十N ^錢半雜^郎侧)之第 二源極及該第十二N型金氡半場效電晶鄉娜)之第三_,該第三沒極 則同時電性祕至第九P型金氧半場效f晶體(觸辦第王汲極、第十五p 型金氧半場效電晶體(M_Rc)的第二源極與第十三p型金氧半場效電晶體 _)6)的第-閘極;該第忙N型魏半場效電晶郵娜脑一第一間 極、-第二源極、-第三沒極與一第四基底(B〇dy),該第一閉極同時電性耗 鲁接到該偏壓電壓(ν_與該第十四N型金氧半場效電晶體(购7)之第一閘 極,該第二源極與第四基底同時電性減到接地端,該苐三賊則同時電 性轉接至第十N型金氧半場效電晶體(醜3)的第二源極與第十一 n型金氧 半場效電晶體(M604)的第二源極。 該輸出放大電職卜料三P餐氧半場效電晶歡麵6)與一第十 四N型金氧半場效電晶體(廳7)等電晶體之紐連接所喊;其中,該第 十三P型金氧半場效電晶體_6)包括一第—閑極、一第 沒極與-第四基底(B〇dy),該第一閘極同時電性輕接到該第九p型金氧半: 效電晶體峰)之第三祕 '該第十一 N型金氧半場效電晶體_句之第 15 201104381The invention will be further described in detail below with reference to the accompanying drawings and embodiments' as follows: Firstly, reference is made to the third figure, the county invention has a start-up circuit and can simultaneously provide temperature-independent The difference between the reference current and the reference voltage reference circuit is characterized in that it is composed of a start-up circuit, a reference current circuit 2 and a reference voltage circuit 3, and can be used in a low voltage (less than 1.5 volts) condition. Working under, to achieve power saving effect; its A, the starting circuit (please refer to the third figure), contains three transistor readings, respectively, the first oxygen absorbing half field effect transistor (Mp), the second p type a gold-oxygen half field effect transistor (Ms) and a third N-type oxygen semiconductor discharge body ((4), the towel thereof, the first p-type gold oxide half field effect transistor (Mp) includes - gate first - miscellaneous, - The third source and the __ fourth base ten kisses, the first gate electrode 201104381 is connected to the output end of the N-type differential input operational amplifier, the second source and the fourth substrate are electrically coupled to The positive terminal (VDD) of the power supply, and the third drain is electrically coupled a first p-gate of a second p-type MOS field-effect transistor (Ms); the second p-type MOS field-effect transistor (Ms) includes a first gate, a second source, and a third a pole and a fourth substrate, the first gate is electrically coupled to the third terminal of the P-type MOS field-effect transistor (Mp), and the second source is electrically connected to the fourth substrate To the positive terminal (Vdd) of the power supply, and the third pole is electrically connected to the negative input terminal (Vin·) of the N-type differential input operational amplifier (N-type OPA); the third _ gold oxygen The half field effect transistor (Μη) includes a -th gate, a second source, a third pole and a fourth base kiss, the first gate, the first source and the fourth substrate At the same time, the grounding end (5) of the power supply is electrically connected, and the third pole is electrically connected to the third-P type metal oxide half-effect transistor. Please refer to the third, fourth, and fifth diagrams at the same time. #The differential reference circuit is in the no-power state, 'all the transistors enter the wire' so that the current of the transistor is zero; and when the power supply voltage When VDDS rises gradually (please refer to the fourth figure), because the first p-type MOS field-effect B body (Mp) and the second N-type MOS field-effect transistor (Mn) operate in the three-zone ( Tri〇de mailing the second P-type MOS half-effect transistor (Ms) at the end of the potential is about half of the power supply voltage d); and when the second p-type MOS half-effect transistor (Ms) The idle voltage (Vmsg) is quickly raised two times. 'The second P-type gold-oxygen half-field effect crystal (Ms) immediately enters the conduction state, and the source current is “rapidly improved (please refer to the fifth®), sewing the dragon weaving The human-computing amplifier A||(N_type〇pA) lowers the first-boost resistor (Rai) and the fine compensation resistor (Rbl), so that the input voltage of the county (four) differential input operational amplifier (N-type 0PA) starts. At the same time, a voltage output is generated at the output terminal (V〇pA〇ut) of the N-type differential input operational amplifier (Ν-typeOPA), thereby starting the fourth p-type MOS field-effect transistor (Ml), Five p-type gold-oxygen half-field effect transistor (M2), sixth p-type gold-oxygen half-field effect transistor (JVG) and seventh P-type gold-oxygen half-field effect transistor. After the startup work is completed, „海第一P The inter-electrode voltage (v_) of the type of gold-oxygen half-field effect transistor (10) continues to rise, causing the second p 201104381 type gold-oxygen half-field effect transistor (MS) to enter an off state, and the source current Ims drops to zero; A P-type gold-oxygen half-field effect transistor (Mp) operates in the three-turn region, and its function approximates the resistance, thus making the gate voltage (vMSG) of the first P-type MOS field-effect transistor (Ms) follow the power supply voltage. The rise of vDD and the synchronous rise' causes the first p-type gold-oxygen half-field effect transistor (Mp) to enter the off state instantaneously, and the startup circuit is separated from the main circuit without affecting the normal operation of the difference reference circuit. The reference current circuit (please refer to the third figure), has a fourth 卩 type MOS half field effect aa body (Ml) fifth P type MOS half field effect transistor (M2), a seventh p type Gold oxygen half field effect transistor (M4), N type wire input operational amplifier (N_tyPe boost resistor (Ral), a second boost resistor (Ra2), a fourth compensation resistor (Rbl), a fifth The compensation resistor _), the seventh bias resistor (four), a first bipolar junction transistor _ and a second bipolar junction transistor (Q2) are connected by f, and can be formed without temperature _ Reference current (4) wherein the mysterious fourth p S gold oxygen half field effect transistor (Ml) comprises a first pole, a second source, a first - and a pole and a fourth base Gdy), the first The gate is connected to the output terminal of the N-type differential input, and the second source and the fourth substrate are electrically connected to the positive terminal (VDD) of the power supply, and the first-level pole is electrically connected. To the second? The type of gold-oxygen half-field effect transistor (10)) is the extreme of the spring and the input of the (4)-type wire input operator A||the bungee input end (10)·); the fifth p-type gold-oxygen half-field effect transistor (M2) The utility model comprises a first gate, a second source, a third pole and a fourth base, and the county electric power is connected to the output of the N-shaped wire input A||(N_type 0 gang) 'The second source and the fourth substrate are electrically connected to the positive end of the power supply~), and the third drain is multiplexed to the positive terminal 3 of the N-type differential input wall (OPA) Vin+), the seventh P-type MOS field effect transistor (M4) includes a first interpole, a second, ',. a first-and-fourth substrate, the first-fg pole (10) is connected to the output terminal of the N-type differential input, and the second source and the fourth substrate are electrically connected to the power source End (DD) instead. Haidi-; and the extreme electrical connection to the output of the reference current circuit (U; the type 201104381 = ^_A|| (N_type _ including _ human-end, positive input., output (V〇 pAQut) and other endpoints 'the negative input (10) 恫 electrical p-type = field effect transistor (Ms) third 汲 extreme, the fourth p-type MOS half-effect transistor _ bis and extreme and first The first end of the boost resistor (Ral), the positive input terminal (5)+) is simultaneously connected to the third peg end of the fifth p-type MOS field-effect transistor (M2) and the second boost resistor _ - the end, and the output (VOPAOUt) is simultaneously electrically connected to the first pottery, the fourth _, the fifth _ and the seventh (the first closed end of the Qing type MOS half-effect transistor; the first liter The first end and the second end are electrically connected to the negative input end (Vin_) of the negative input of the N-type differential input and the second remuneration Simultaneously to the second end of the fourth compensating resistor, the first end and the second bipolar junction, and the second rising resistor (Ra2) includes a first end and a second end, the first - terminal electrical _ to the operation of the n-type wire input amplification H极 Continuation νιη+), _ second end qing _ _ (four) the first end of the fifth compensation resistor (Rb2) and the seventh bias resistor (R2); the fourth compensation resistor just includes the first And the second end of the second end 'the first end is electrically _ the second end of the first boost resistor (Ral) and the second emitter of the first bipolar junction), and the second The terminal is grounded; the fifth compensating resistor (Rb2) includes a first end and a second end, and the second end of the first end _ electrical input to the second boosting resistor _) has no seventh (4) (four) ― end, The second end is grounded; the seventh bias resistor (R2) includes a first end and a second end, and the first end is electrically connected to the second end of the second boosting f (Ra2) And the first end of the fifth compensation resistor _), and the second end is electrically reduced to the second emitter end of the second bipolar junction transistor (Q2); the first bipolar junction transistor ( Q1) includes a - base - a second emitter (Emi (four)) and a third collector (Coitoor), the first base is electrically coupled to the second bipolar junction transistor (Q2) The first base and the ground end, the second emitter is electrically connected to the first rising resistor (4)) the second end is opposite to the first end of the fourth compensating resistor (Rb1), and the third collector is grounded; the second bipolar junction is electro-crystal 1! 201104381 The body (Q2) includes a first base a base, a second emitter (Emitter) and a third collector (Collector) 'the first base jigj electrically connected to the first base of the first bipolar junction transistor (Qi) The grounding end electrically connects the second emitter to the second end of the seventh bias resistor (R2), and the third collector is grounded. The reference voltage circuit 'has a fourth p-type MOSFET, a fifth P-type MOS field-effect transistor (M2), a sixth p-type MOS field-effect transistor, a N Type differential input operational amplifier (N_type 〇PA), - first boosting resistor (four)), a second boosting resistor _), a second boosting resistor (Ra3), a fourth compensation resistor (Rbl), - a fifth compensation resistor - a sixth compensation resistor _), a seventh bias resistor (four), a first bipolar junction transistor (Q1), a first bipolar junction transistor (q2) and a third pair The electrical connection of the pole junction transistor (q3) or the like, the towel, the fourth p-type gold oxide half field effect transistor (mi), the fifth p-type gold oxide half field effect transistor (M2), N type Differential input operational amplifier (Ν__〇ρΑ), first boost resistor (Ral) first boost resistor (10) 2), fourth compensation resistor), fifth compensation resistor (coffee), seventh bias resistor ( The electrical connection between the R2), the first bipolar junction transistor (Q1) and the second bipolar junction transistor (4) is the same as that of the reference f-current circuit. * The sixth p #f gold oxygen half field effect transistor (M3) includes - a first gate, a second source, a third pole and a substrate, the first -_ electric_ connected to the N type The output of the wire input short circuit amplifier knows that the pin 2 source and the fourth substrate are electrically connected to the positive terminal (I) of the power supply, and the third pole is coupled to the output end of the reference dragon circuit ( I); the third boosting resistor (4) includes a first end and a second end 'the first end is electrically connected to the wheel terminal (Vref) of the reference voltage circuit '(4), the second end is simultaneously electrically Lightly connected to the first end of the sixth compensation resistor _) and the second end of the third bipolar junction 2 (Q3); the sixth compensation resistor _) includes a first end and a second end, the first — the end is simultaneously electrically connected to the second end of the third liter resistor (Ra3) and the second end of the third bipolar transistor (Q3), and the second end is grounded; Bipolar junction crystal _) package = 12 m 201104381 A first base (Base), a second emitter (Emitter) and a third collector (c〇Uect〇r), the first base is grounded The second emitter is electrically coupled to the second end of the third boosting resistor (Ra3) at the same time. And the first end of the sixth compensation resistor (Rb3), and the third collector is grounded. The set first boosting resistor (Ral) and the second boosting resistor are used to boost the bias potential of the n-type differential input operational amplifier (N-type OPA), and the third boosting resistor (Ra3) ) is used to compensate for the second bipolar junction transistor (4) riding light. That is to say, the 帛-bipolar junction transistor (Q1), the second bipolar junction transistor (Q2) and the third bipolar junction transistor (Q3) have a negative electric coefficient. The characteristic, thus causing the current flowing through the fourth compensation resistor (RM), the fifth compensation resistor _) and the sixth compensation resistor _) to have a negative current temperature coefficient, and a positive current temperature coefficient flowing through the seventh bias resistor ( The temperature coefficient of the positive voltage generated by the first bipolar junction transistor and the base potential difference of the second bipolar junction transistor (Q2) can be obtained without a reference current. Furthermore, since the current of the third boost fm (Ra3) is not changed by the temperature of the disk, the temperature coefficient of the positive voltage of the pressurization line can be used for the third bipolar junction. The negative voltage temperature coefficient 1 of the base voltage of Jing Jing) gives a reference voltage (I) which is independent of the temperature change. Please refer to the sixth figure. When the compensation resistor (Rb series) is not added, the variability of the output reference voltage to the temperature change is: the reference voltage; and after the compensation resistor is added, the output reference voltage is obviously made to the temperature ^ ^ The resulting change in the drop (the compensated output reference voltage), the compensation effect. And please moxibustion test: It is the output result of the temperature change after the production of the wafer into the wafer. The temperature range is between this and the temperature, and the reference voltage of the difference is about 6 volts (V), and its output reference voltage due to temperature changes produced by the maximum test power ΪΓ 5 microvolts (mv); if the temperature range between 3G ° C ~ boots, the difference between the value of the difference is about _6 volts (V) 'And its output _ due to temperature changes, the maximum variation is 0.8 microvolts (mV), the ship output has reached a stable compensation effect 13 201104381 = 2: shown as the measured output of the circuit chip The electricity source is supplied by the electric dust as the system, and the wire is used to supply the power supply. (4) The ninth figure shows the output of the reference chip of the circuit chip. The results of the rc_ job __, the wire (4), the electric output of the $ / - circuit is quite stable, and the compensation effect has been achieved. . Pick up. Referring to the tenth figure of the month, the implementation of the operational amplifier circuit with the N-type differential input used in the present invention is performed by a mirror (four) amplifying circuit, an output amplifying circuit p, ^tfM(M6〇1) ^ ^ - Yang Xiaodian crystal (deleted 2), - the first cut type half field effect transistor (Lion 3), (deleted 5) material ^ oxygen effect transistor (touch 4) and material II N type recorded half field effect transistor ==The domain of the object, like the singularity of the transistor, the second source, the first 牮-gate, and the electrical input to mh —, 1 base (B〇dy), the ^ chick The first gate of the hybrid nine-dimensional gold-oxygen half-field effect transistor (Μ602), the third secret of the eighth-type gold-oxygen half-field effect transistor (Μ6〇ι), and the tenth-type gold oxide half-Chen The third secret, the second source and the thin substrate are connected to the power supply, and the second and the second are electrically connected to the eighth. Type MOS half-field effect transistor, the ninth ρ-type gold-oxygen half-field effect transistor (deleted 2) - the gate and the effect (_3) also the 嫩 嶋 嶋 half-field effect electricity 曰 〇 ) 2) Including - first closed pole, one second source, one third pole and - fourth body (Body) H gate at the same time _ _ small gate 敝 her (four) purchase ==== pole 'the second source The pole and the fourth substrate are electrically connected to the positive terminal (I) of the power source, and the third secret is simultaneously connected to the eleventh N-type gold-oxygen half field effect transistor (the third step of the sentence is deleted, No. 201104381 - p-type gold oxygen half-field effect electric crystal Xiangna) - the second source of the interpole and the five-p-type gold-oxygen half field effect transistor (M_RC); the tenth N-type gold oxygen half-field effect The crystal (M(4) includes a first gate of the first gate, a third drain and a fourth body, the first gate is electrically coupled to the edge-boost resistor (Ra(10) first end (vin_) The second source and the fourth base time are electrically connected to the second source of the tenth-N-type metal oxide half field effect transistor (brain 4) and the twelfth type n-type gold oxygen half-field effect The third pole of the transistor (M6〇5), the third and the pole, the electrical lightly connected to the eighth p-type gold oxide The first secret and the third secret of the field effect transistor (deleted 1); the tenth transistor (deleted) includes - the first-question pole, the second source, the third record and the fourth base: (Body The first gate is electrically coupled to the first end (four) of the second boosting resistor (Ra2), and the second secret and the fine base system are electrically connected to each other. The second source and the twelfth N-type gold 氡 half-field effect electric crystal Xiangna) third _, the third immersion is simultaneously electrically secret to the ninth P-type MOS half-effect f crystal (touch The second gate of the king plutonium, the fifteenth p-type gold oxide half field effect transistor (M_Rc) and the thirteenth p-type gold oxide half field effect transistor _) 6); the first busy N The type of Wei half-field electric crystal is the first pole, the second source, the third pole and the fourth base (B〇dy), and the first closed pole is electrically connected to the first base. a bias voltage (ν_ and the first gate of the fourteenth N-type gold-oxygen half field effect transistor (purchased 7), the second source and the fourth substrate are simultaneously electrically reduced to the ground, the third thief At the same time, the second source and the eleventh n-type gold-oxygen half-field electric power are electrically transferred to the tenth N-type gold-oxygen half-field effect transistor (ugly 3). The second source of the body (M604). The output magnifies the electric work material, the three-P meal oxygen half-field effect electric crystal face 6) and the fourteenth N-type gold oxygen half-field effect transistor (office 7) isoelectric crystal The neon connection is screamed; wherein the thirteenth P-type metal oxide half-field effect transistor _6) includes a first-idle pole, a first pole and a fourth base (B〇dy), and the first gate is simultaneously Electrically lightly connected to the ninth p-type gold oxide half: the third secret of the effect transistor peak] 'the eleventh N-type gold oxygen half field effect transistor _ sentence of the 15th 201104381
_ 三祕麟料五p型錄铸《晶__&)ϋ極,該第二源極 土底電J·生輕接至電源的正端(D ’而言亥第三沒極則同時電性輕接至 遺弟-補償電容(Ce)的第一端、該第四卩型金氧半場效電晶體⑽)之第一閑 t該第五P型錄半場效f晶體_之第—閘極與鱗十四N型金氧半 两^電明體(刪7)之第三及極。該第十四N型金氧半場效電晶體(M6〇7)包 括一第-閘極、-第二源極、—第三·與—第四基底(B。切,該第一閑極 同夺電賴接到邊第型金氧半場效電晶體(腦〇之第—閘極,該第 二源極與第四基錢_触電源_地端(Μ,_第三祕則同時電 性耗接至該第-補償電容(Ce)的第—端、該第心型金氧半場效電晶卿) 之第—閘極、該第五P型金氧半場效電晶體(M2)之第—閘極與該第十三p 型金氧半場效電晶體(刪6)之第三沒極。 /韻電路係由-第十五P型金氧半場效電晶體(M_RC)與—第一_ 1 容㈣粒件之電性連接所組成;其中,該第十五p型金氧半場效㈣ 包括-第-、_第二源極、—第三祕與—第四基底(B吻) Γ閘極電絲接到接地端,該第二源極同時電性輕接到該第九P㈣ :笛=電日日體(細2)之第三赌、該第十—㈣金氧半場效電晶體(娜 ,沒概該奸三”錢半場效電㈣(M_)U極,該第三 :職減到第-補償電容(Ce)的第二端,該第四基底則電雜接至賴 ;該第-補償電容(Ce)包括一第一端與第二端,該第一端同時 β接十三P型金氧半場效電晶體(娜6)之第三(祕、該第四p型 第辨场效電4(Μ1)之第―閘極、該第五ρ型金氧半·電晶體之 ^極與該第十四N型金氧半場效電晶體_7)之第三難,該第二端 性輕接到第十五p型金氧半場效電晶體(M—Re)之第三沒極。 著兄月本發明之d參考電流的公式推導。首先,假定第三圖中 201104381 的電晶體皆為理想、電晶體1VH、M2與M3皆相同、電阻Ral與Ra2相同、 電阻Rbl與Rb2相同且放大器的正負輸入端為虛短路(Vin+ = Vin-),則_ Three Secrets, five materials, p-type casting, "crystal __&" bungee, the second source of earth-bottom electricity J. Sheng lightly connected to the positive end of the power supply (D 'in terms of the third, the second is not the same, then the electrical Lightly connected to the first end of the younger-compensating capacitor (Ce), the first end of the fourth-type gold-oxygen half-effect transistor (10), the fifth-P-type half-field effect f crystal_the first gate And the scale of the fourteenth N-type gold oxygen half two ^ electric body (deleted 7) of the third and pole. The fourteenth N-type metal oxide half field effect transistor (M6〇7) includes a first gate, a second source, a third and a fourth substrate (B. cut, the first idle pole The power-receiving reliance on the side of the type of gold oxygen half-field effect transistor (the first cerebral palsy - the gate, the second source and the fourth base money _ touch power _ ground end (Μ, _ third secret while electrical The first gate of the first compensation capacitor (Ce), the first gate of the first cardiac type MOS field, and the fifth P-type MOS half-effect transistor (M2) - the gate and the third nothing of the thirteenth p-type gold-oxygen half-field effect transistor (deleted 6). / rhythm circuit system - the fifteenth P-type gold-oxygen half-field effect transistor (M_RC) and - first _ 1 consisting of electrical connections of the (four) granules; wherein the fifteenth p-type oxy-half field effect (4) includes - the first -, the second source, the third secret and the fourth base (B kiss) The gate electrode is connected to the ground terminal, and the second source is electrically connected to the ninth P (four): the third bet of the flute = electric day body (fine 2), the tenth - (four) gold oxygen half field effect Transistor (Na, not the traitor three) money half-time power (four) (M_) U pole, the third: job reduction to the first - compensation a second end of the capacitor (Ce), the fourth substrate is electrically connected to the lag; the first compensation capacitor (Ce) includes a first end and a second end, and the first end is simultaneously connected with the thirteenth P-type gold The third half of the oxygen half-field effect transistor (Na 6), the first gate of the fourth p-type phenotype 4 (Μ1), the fifth pole of the fifth ρ-type MOS and the transistor The fourth difficulty of the fourteenth N-type gold-oxygen half field effect transistor _7) is lightly connected to the third step of the fifteenth p-type MOS field-effect transistor (M-Re). The formula of the d reference current of the invention is firstly assumed. First, it is assumed that the transistors of 201104381 in the third figure are all ideal, the transistors 1VH, M2 and M3 are the same, the resistances Ral and Ra2 are the same, and the resistances Rbl and Rb2 are the same. The positive and negative inputs of the amplifier are virtual short circuits (Vin+ = Vin-), then
Vebi = VEB2+ Vr2................................................(公式 1) iRbl = lRb2...........................................................(公式 2) iRal = lRa2..............................................................(公式 3) lRa2 = lRb2 + IR2.....................................................(公式 4) 以(公式4)為例,其對溫度(T)的變化為 ^Ra2 _ ^Rb2 | ^R2 dT — dT dT .........................................(公式 5) 因為1处2- VEB|/Rb2且IR2 = (VEB1-VeB2)/R2 ’可以得知1处2是負電流溫 度係數,且存在著調整因子Rb2 ;同理,Ir2是正電流溫度係數,且存在著調 整因子R2。藉由調整因子的調整可以使“與Ir2的溫度變化值對消,得到 與溫度變化無關的電流IRa2,經由第五p型金氧半場效電晶體(M2)與第七p 型金氧半場效電晶體(M4)所組成的電流鏡,將電流lRa2鏡射至輸出電流,即 可得到與溫度變化無關的參考電流(iref)。 請再參考第三® ’本發明之參考賴(Vrcf)在加人帛三升壓電阻(Ra3)之 後,可以得到 vref = Ir33 X Ra3 + VBE3 其對溫度(T)的變化為 d-w-R^d-w f/Vebi = VEB2+ Vr2................................................ ..(Formula 1) iRbl = lRb2...................................... ..................(Formula 2) iRal = lRa2......................... ...............................(Formula 3) lRa2 = lRb2 + IR2.... ................................................. Equation 4) Taking (Formula 4) as an example, the change in temperature (T) is ^Ra2 _ ^Rb2 | ^R2 dT — dT dT .................. .......................(Equation 5) Since 1 - VEB|/Rb2 and IR2 = (VEB1-VeB2)/R2 ' can be known 1 is a negative current temperature coefficient, and there is an adjustment factor Rb2; similarly, Ir2 is a positive current temperature coefficient, and there is an adjustment factor R2. By adjusting the adjustment factor, "the temperature change value of Ir2 can be canceled, and the current IRa2 irrelevant to the temperature change is obtained, via the fifth p-type gold-oxygen half-field effect transistor (M2) and the seventh p-type gold-oxygen half-field effect. A current mirror composed of a transistor (M4) mirrors the current lRa2 to the output current to obtain a reference current (iref) independent of the temperature change. Please refer to the third ® 'Vrcf' of the present invention. After adding a boost resistor (Ra3), you can get vref = Ir33 X Ra3 + VBE3. The change in temperature (T) is dwR^dw f/
Ra3Ra3
, dV^ dT dT (公式6) (公式7) 其中,IRa3為與溫度變化無關的參考電流(取满,,電阻r 溫 度係數的電阻,而第三雙極接面電晶卿)之錄極電壓為負電壓溫度係數 _3/㈣);藉域#地海〜心的值,可以得顺溫度變化無關 17 201104381 的輸出參考電壓Vref。值得注意的是,所有的升壓電阻队系列博補償電阻 列)均需採用昇有較高溫度係數之N型井電阻(N_well),而帛七偏壓電 阻則需採料有較低溫度魏之N贿健離+·硫㈣。 以摘述,穌發明較佳可行實施例之具體說明,惟非因此即拘限本 發月=利關’對於本領_技術人M,很鴨地,在不脫離本發明的精 砷或feu的情況τ ’麟本發明進行多種改進和變化。因此,如果這些改, dV^ dT dT (Equation 6) (Equation 7) where IRa3 is the reference current irrespective of temperature change (total, resistance r temperature coefficient of resistance, and third bipolar junction electro-crystal clear) The voltage is the negative voltage temperature coefficient _3 / (four)); borrowing the domain #地海~心的值, can be obtained according to the temperature change irrespective 17 201104381 output reference voltage Vref. It is worth noting that all the boost resistors series Bo compensation resistors are required to use N-well resistors with higher temperature coefficients, while the seven-bias resistors require lower temperatures. N bribes away from + sulfur (four). In the following, the invention describes the specific description of the preferred embodiment, but it is not the case that the present month is limited to the profit of the person, the technical person M, the duck, without departing from the arsenic or feu of the present invention. Situation τ 'Linthe invention has undergone various improvements and variations. So if these changes
進^化’直接或間接落在賴權利要求及其等同物的細内,則本發明 涵蓋這些改進和變化,合予陳明。 再為使本發明更加顯現其進步性與實用性,兹將其使用實施上之優 點另列舉如下: 1. 本發明設有三個元件所組成的啟動(start Up)電路,當該帶差參考電 路正常運作時,該啟動電路即進入關閉狀態,不會影響其他電路的 正常操作;該啟動電路元件數少,具有架構簡單、省電與快速啟動 等優點。 2. 本毛明啊具有輸出與溫度變化無_參考電壓及參考電流,可以使 本發明之應用範圍擴大,提高本發明的附加價值並具有小型化等優 .發明具有較佳的溫度補償功能,可以使得參考電壓的輸出值相對穩 定’並且能在低電壓下工作,減少功率消耗,具有省能效果,符合 工商界或產業界的實際所需,具產業利用價值。 综上所述,本發明在突破先前之技術結構下,確實已達到所欲增進之 功效’且也非縣該概藝者所級思及;再者,本發明具有進步性、實 用性’顯已符合發明專利之”要件’纽法提出發明申請。 201104381 【圖式簡單說明】 第-圖係習知帶差參考電路的基本架構圖。 第二圖係習知的低電壓帶差參考電路的電路圖。 第二圖係本發明之電路實現圖(代表圖)。 第四圖係本發明之啟動電路的電壓輸出波形圖。 第五圖係本發明之啟動電路的電流輪出波形圖。 =、圖係本發明之補㈣、後的參考電壓輪出對溫度變化之齡波形圖。 第七圖係本發明之參考電壓對溫度變化所實_電壓㈣結果圖。 第八圖係本發明之參考電壓對電源供應電壓所制的頓輸丨結果圖。 第九圖係本發明之參考較雌«化所實_電流輸出結果圖。 第十圖係本發明所之差動輸人的運算放大器之電路實現圖。 【主要元件符號說明】 低電壓帶差參考電路......200 金氧半埸效電晶體.............. 雙極接面電晶體................. 電阻................. f差參考電路.....................300 參考電流電路.....................2 第一 P型金氧半場效電晶體...Mp 第三N型金氧半場效電晶體...Μη 第五Ρ型金氧半場效電晶體...M2 第七Ρ型金氧半場效電晶體...Μ4 第一升壓電阻.....................Ral 運算放大器..................A201 ............................M201、M202、M203 參 .......................................Q201、Q202 R201、R202、R203、R204、R205、R206 啟動電路............................ 參考電壓電路.....................3 第二P型金氧半場效電晶體...Ms 第四P型金氧半場效電晶體...Ml 第六P型金氧半場效電晶體...M3The present invention encompasses these improvements and variations, directly or indirectly, within the scope of the claims and their equivalents, and is incorporated herein by reference. Further, in order to make the present invention more progressive and practical, the advantages of its implementation are listed as follows: 1. The present invention is provided with a start up circuit composed of three components, when the difference reference circuit is used During normal operation, the startup circuit enters a shutdown state and does not affect the normal operation of other circuits; the number of components of the startup circuit is small, and has the advantages of simple architecture, power saving, and fast startup. 2. The present invention has an output and temperature change without a reference voltage and a reference current, which can expand the application range of the present invention, improve the added value of the present invention, and has the advantages of miniaturization. The invention has a better temperature compensation function. The output value of the reference voltage can be made relatively stable' and can work at a low voltage, reducing power consumption, having a energy-saving effect, meeting the actual needs of the industrial and commercial circles or the industry, and having industrial utilization value. In summary, the present invention has achieved the desired effect under the prior art structure, and it is also considered by the county to be considered by the general artist; further, the invention is progressive and practical. The invention has been filed in accordance with the "requirements" of the invention patent. 201104381 [Simple description of the diagram] The first diagram is the basic architecture diagram of the conventional reference circuit with low difference. The second diagram is the conventional low voltage difference reference circuit. The second diagram is a circuit implementation diagram (representative diagram) of the present invention. The fourth diagram is a voltage output waveform diagram of the startup circuit of the present invention. The fifth diagram is a current rotation waveform diagram of the startup circuit of the present invention. The figure is a waveform diagram of the age of the reference voltage turn-off versus temperature change of the present invention. The seventh figure is the result of the reference voltage versus temperature change of the present invention. The eighth figure is the reference of the present invention. The result of the voltage-to-power supply voltage is shown in Fig. 9. The ninth figure is the reference of the present invention. The tenth figure is the differential input of the operating amplifier of the present invention. Circuit implementation [Main component symbol description] Low voltage band difference reference circuit...200 Gold oxide half-effect transistor.............. Bipolar junction transistor... .............. Resistance................. f difference reference circuit.............. .......300 Reference Current Circuit.....................2 First P-type Gold Oxygen Half Field Effect Crystal...Mp Third N Type gold oxide half field effect transistor...Μη The fifth type of gold oxide half field effect transistor...M2 The seventh type of gold oxide half field effect transistor...Μ4 The first step-up resistor... ...............Ral Operational Amplifier..................A201 ............. ...............M201, M202, M203 .................................... ..........Q201, Q202 R201, R202, R203, R204, R205, R206 start circuit........................ .... Reference voltage circuit.....................3 Second P-type gold-oxygen half-field effect transistor...Ms Fourth P-type gold-oxygen half-field Effect transistor...Ml sixth P-type gold oxygen half field effect transistor...M3
N型輸入的運算放大器......〇PA 第二升壓電阻....................... 201104381 第二升壓電阻............... ......Ra3 第四補償電阻.............. ,"···Rbl 第五補償電阻............... ..···.Rb2 第六補償電阻.............. …·.Rb3 第七偏壓電阻................ ......R2 第一雙極接面電晶體..... …….Q1 第二雙極接面電晶體...... •…..Q2 第=雙極接面電晶體.…. ........Q3 電源的正端.................. ......Vdd 電源的接地端.............. .......Vss 參考電流..................... .......Iref 參考電壓.................... ……vref 第一補償電容............... ……Cc 偏壓電壓..................... •600N-type input operational amplifier...〇PA second boosting resistor....................... 201104381 Second boosting resistor.. ...................Ra3 Fourth compensation resistor..............,"···Rbl Fifth compensation resistor. ................................Rb2 sixth compensation resistor....................Rb3 seventh bias resistor.. ....................R2 first bipolar junction transistor.................Q1 second bipolar junction transistor... .. •.....Q2 No.=Bipolar junction transistor.................Q3 Power supply positive terminal.................. .....Vdd Ground of the power supply....................Vss Reference current................ ..... .......Iref Reference voltage ..........................vref First compensation capacitor........ ....... ......Cc bias voltage.....................600
•M601 •M602 •M603 •M604 •M605 •M606 •M607 •M Rc 具N型差動輸入的運算放大器-第八P型金氧半場效電晶體···* 第九P型金氧半場效電晶體…· 第十N型金氧半場效電晶體…· 第十一 N型金氧半場效電晶體· 第十二N型金氧半場效電晶體· 第十三P型金氧半場效電晶體· 第十四N型金氧半場效電晶體· 第十五P型金氧半場效電晶體· 20• M601 • M602 • M603 • M604 • M605 • M606 • M607 • M Rc Operational Amplifier with N-Type Differential Input - Eighth P-type Gold Oxygen Half Field Effect Transistor···* Ninth P-type Gold Oxygen Half-Field Effect Crystal...· The tenth N-type gold-oxygen half-field effect transistor...· The eleventh N-type gold-oxygen half-field effect transistor · The twelfth N-type gold-oxygen half-field effect transistor · The thirteenth P-type gold-oxygen half-field effect transistor · Fourteenth N-type gold oxygen half field effect transistor · Fifteenth P-type gold oxide half field effect transistor · 20