201103031 六、發明說明： 【發明所屬之技術領域】 的方法’特別是有關 本發明是有關於一種測試記憶體 於一種電腦裝置測試記憶體的方法。 【先前技術】 隨=導體製程尺寸不斷縮小，Ic設計規模越來越 大，间度禝雜的ic產品正面臨著高可靠性、高性能、高 品質、低成本以及更短的產品上市週期等日益嚴^的挑 戰。隨著處理器技術的不斷進步，過去幾年_ 體的設計和開發呈指數級成長。 a 同時，隨著記憶體的容量及其規模的複雜性提昇，記 憶體可能存在的缺陷類型越來越多，且記憶體緊密的έ士構 特徵使其更料受到各類缺陷的料。記憶體戰的主要 目標是驗證記憶體上的每-個儲存位元都能夠可靠地儲 存數據，記憶體測試包括驗證實體連接是否正確以及確保 記憶體的每一個記憶位置功能正常。 ’' 在現今遠端賴的純巾’若❹者欲對伺服器端 (Server-End )的電腦進行記憶體測試時，客戶端 (Cliem-End)的電腦對伺服器端的電腦下達進行記憶體 測試的命令，健H端的t腦便_對其讀體騎 試。 隨著記憶體的容量及其規模的複雜性不斷地提昇，要 201103031 全部完成記憶體測試往往需要大量的時間，期間所進行程 式的記憶體使用資源也有可能被降低，如此，如何研發= 一種遠端協助測試記憶體的方法，可有效改善上述所帶來 的缺點，以加速完成測試的時間，實乃相關^者目前刻不 容緩之一重要課題。 【發明内容】 有繁於此，本發明之目的係揭露—種遠端協助記憶體 測4的方法，同時藉由二電腦裝置對其中一電腦裝置之不 =記憶體區段進行記憶體測試’減少單—電腦裝置進行記 憶體測試所需之時間’降低電腦裝置中程式進行被降 憶體使用資源之風險。 此種遠端協助記憶體測試的方法，應用於一網路上相 互接通的至少-第—電腦裝置及—第二電腦裝置之間，方 法包括劃分第-電腦裝置之一第一記憶體為—第一 一第二記憶體區段。之後，分配第-記憶體區： ^-電腦裝置，並使第-電腦裝置對第—記憶體區段進 : = 、體測g ’分配第二記憶體區段至第二電腦裝置，並 ^二電腦裝置對第二記憶體區段進行記憶體測試。之 ί果第-記憶體區段及第二記憶體區段之記憶體測試 本^之另—實施射，第—電腦裝置具有—第一網 定之第^網路卡具有一遵守「遠距直接記憶體存取」協 網器。第二電腦裝置具有—第二網路卡，第二 ”有-遵守「遠距直接記憶體存取」協定之第二處 201103031 本發明之一實施例中，劃分第一記憶體區段及第二記 憶體區段之方式更包括，取得第一記憶體的容量、對網路 進行資料存取的第一速度、第一電腦裝置對第一記憶體進 行資料存取的第二速度。之後，依據第一速度與第二速度 之比例，分別劃分出第一記憶體中對應第一速度的第一記 憶體區段’以及對應第二速度的第二記憶體區段。 本發明之另一實施例中，分配第二記憶體區段至第二 • 電腦裝置之步驟更包括將第二記憶體區段映射至第二電 腦裝置之一第二記憶體之一第三記憶體區段上。之後，使 第二電腦裝置對第三記憶體區段進行記憶體測試。 【實施方式】 以下將以圖示及詳細說明清楚說明本發明之精神，如 熟悉此技術之人員在瞭解本發明之實施例後，當可由本發 明所教示之技術，加以改變及修飾，其並不脫離本發明之 • 精神與範圍。 按’當電腦裝置欲與一網路之另一電腦裝置交換訊號 時，電腦裝置需透過其主機板（mb)上之中央處理單元 (CPU)製作出符合TCP/IP的封包，然而，中央處理單 元之效能便因此而被降低，其他正在進行工作之其他程式 便因此而遲緩’甚至會有使電腦裝置造成當機的可能。 本發明係揭露一種遠端協助記憶體測試的方法，係應 用於多個遵守遠距直接記憶體存取（Rem〇te Direet201103031 VI. Description of the Invention: [Technical Field of the Invention] In particular, the present invention relates to a method of testing memory for testing memory in a computer device. [Prior Art] As the size of the conductor process continues to shrink, the Ic design scale is getting larger and larger, and the moderately complex ic products are facing high reliability, high performance, high quality, low cost, and shorter product launch cycle. The increasingly serious challenge. With the continuous advancement of processor technology, the design and development of the past few years has grown exponentially. a At the same time, as the capacity of the memory and the complexity of its size increase, there may be more and more types of defects in the memory, and the dense memory structure of the memory makes it more susceptible to various types of defects. The main goal of memory warfare is to verify that every memory location on the memory can reliably store data. Memory tests include verifying that the physical connections are correct and that each memory location of the memory is functioning properly. ''In today's remote-looking pure towel', if the client wants to perform a memory test on the server-end computer, the client (Cliem-End) computer sends the memory to the server-side computer. The test command, the health of the H-end t-brain _ on its body riding test. As the capacity of the memory and the complexity of its size continue to increase, it takes a lot of time to complete the memory test in 201103031. The memory usage resources of the program during the process may also be reduced. So, how to develop = a far The method of assisting in testing the memory can effectively improve the shortcomings caused by the above, so as to speed up the time of completing the test, which is an important subject that cannot be delayed. SUMMARY OF THE INVENTION In view of the above, the object of the present invention is to disclose a method for remotely assisting memory measurement 4, and simultaneously performing a memory test on a non-memory segment of one of the computer devices by two computer devices. Single—The time required for the computer device to perform a memory test' reduces the risk of the program in the computer device being used by the memory. The remote assisted memory test method is applied between at least a first computer device and a second computer device connected to each other on a network, and the method comprises dividing the first memory of the first computer device into a The first first second memory segment. After that, the first memory area is allocated: ^-the computer device, and the first computer device inputs the second memory segment to the second computer device for the first memory segment: =, physical measurement g ', and ^ two The computer device performs a memory test on the second memory segment. The memory test of the first-memory segment and the second memory segment is performed separately, and the first computer device has a first network card that has a compliance with "remote direct Memory access" co-networker. The second computer device has a second network card, and the second one has a second place to comply with the "remote direct memory access" protocol. 201103031. In one embodiment of the present invention, the first memory segment and the first memory segment are divided. The method of the second memory segment further includes: obtaining a capacity of the first memory, a first speed for accessing the data to the network, and a second speed at which the first computer device accesses the first memory. Then, according to the ratio of the first speed to the second speed, the first memory segment ' corresponding to the first speed in the first memory and the second memory segment corresponding to the second speed are respectively divided. In another embodiment of the present invention, the step of allocating the second memory segment to the second computer device further comprises mapping the second memory segment to one of the second memory devices and the third memory. On the body segment. Thereafter, the second computer device is caused to perform a memory test on the third memory segment. BRIEF DESCRIPTION OF THE DRAWINGS The spirit of the present invention will be clearly described in the following description and the detailed description of the embodiments of the present invention, which can be modified and modified by the teachings of the present invention, Without departing from the spirit and scope of the present invention. Press 'When the computer device wants to exchange signals with another computer device on the network, the computer device needs to make a TCP/IP-compliant packet through the central processing unit (CPU) on its motherboard (mb). However, the central processing The performance of the unit is thus reduced, and other programs that are working are slowed down. 'There may even be a possibility of causing the computer device to crash. The present invention discloses a method for remotely assisting memory testing, which is applied to multiple compliance with remote direct memory access (Rem〇te Direet)
Memory Access ’後稱RDMA)協定之電腦裝置之間，藉 201103031 由共同分擔其中一電腦裝置之記憶體測試，對此電腦裝置 之不同記憶體區段進行記憶體測試，減少先前單一電腦裝 置進行記憶體測試時所需之時間，降低電腦裝置中程式進 行時，被降低記憶體使用資源之風險。 請參閱第1圖所示，第1圖繪示本發明遠端協助記憶 體測試的方法於一實施方式中之方塊示意圖。本發明之一 實施方式中，此些電腦裝置中之至少一第一電腦裝置100 為位於一伺服端之電腦裝置、第二電腦裝置200為位於一 客戶端之電腦裝置。第一電腦裝置100具有一第一主機板 110、中央處理單元120、第一記憶體130、第一網路卡 140、第一處理器142及代理人程式150。中央處理單元 120、第一記憶體130及第一網路卡140位於第一主機板 110上，與第一主機板110電性連接。第一處理器142遵 守RDMA協定，位於第一網路卡140上，與第一網路卡 140電性連接。 第二電腦裝置200具有一第二主機板210、第二記憶 體220、第二網路卡230、第二處理器232。第二記憶體 220及第二網路卡230位於第二主機板210上，與第二主 機板210電性連接。第二處理器232遵守RDMA協定， 位於第二網路卡230上，與第二網路卡230電性連接，當 第二電腦裝置200與第一電腦裝置100於一網路300 (例 如乙太網路）連結時，第一電腦裝置100透過第一網路卡 140與第二電腦裝置200之第二網路卡230電性連接。 請參閱第2圖所示，第2圖繪示繪示本發明遠端協助 記憶體測試的方法於此實施方式中之初步流程圖。此實施 201103031 方式中，當使用者發出記憶體測試命令至第一電腦裝置 100之代理人程式150時，代理人程式150依據下列步驟 進行： 步驟（201)劃分第一電腦裝置1〇〇之第一記憶體ι3〇 為至少一弟一 έ己憶體區段13 2及一第二記憶體區段13 4， 其中第一記憶體區段132及第二記憶體區段134的大小可 依網路傳輸速度及記憶體讀寫速度之比例、使用者喜好進 行分配； 步驟（ 202)分配第一記憶體區段132至第一電腦裝 置100’以供第一電腦裝置100對第一記憶體區段132進 行記憶體測試： 此步驟中，中央處理單元12〇對第一記憶體13〇進行 记憶體測試之資料存取，其中資料存取之種類例如為資料 線測試、位址線測試、資料增/減測試、延遲存取測試、 承載測試及隨機測試。 步驟（ 203)分配第二記憶體區段134至第二電腦裝 置200，以供第二電腦裝置200對第二記憶體區段134進 行記憶體測試： 此步驟中，第二處理器232不透過第一電腦裝置1〇〇 之中央處理單元120進行TCP/IP的封包包裝，直接使第 二處理器14 2對第二記憶體區段13 4進行記憶體測試之資 料存取，並進行TCP/IP的封包包裝。如此，中央處理單 元120便可提供其他正在進行工作之程式使用，而仍可保 持其效能。 需說明的是，步驟（2〇2)與步驟（2〇3)並非限定其 201103031 順序，亦可同時進行，之後，進行步驟（2〇4)。 步驟（ 204)報告記憶體測試結果： 此步驟中，將上述第一記憶體區段132與第二記憶 區段134之測試結果對外報告。 一 具體而言，請參閱第3圖所示，第3圖繪示第2圖之 乂驟（201)之細部流程圖。代理人程式I%可依一實施 例而進行步驟（2〇1)所包括之下列細節步驟：Memory access 'RDMA' agreement between the computer devices, by 201103031 by sharing the memory test of one of the computer devices, memory testing of different memory segments of the computer device, reducing the memory of the previous single computer device The time required for the body test reduces the risk of the memory being used when the program in the computer device is reduced. Referring to FIG. 1, FIG. 1 is a block diagram showing a method for testing a remote assisted memory of the present invention in an embodiment. In one embodiment of the present invention, at least one of the first computer devices 100 is a computer device located at a server end, and the second computer device 200 is a computer device located at a client. The first computer device 100 has a first motherboard 110, a central processing unit 120, a first memory 130, a first network card 140, a first processor 142, and an agent program 150. The central processing unit 120, the first memory 130, and the first network card 140 are located on the first motherboard 110 and are electrically connected to the first motherboard 110. The first processor 142 is compliant with the RDMA protocol and is located on the first network card 140 and is electrically connected to the first network card 140. The second computer device 200 has a second motherboard 210, a second memory 220, a second network card 230, and a second processor 232. The second memory 220 and the second network card 230 are located on the second motherboard 210 and are electrically connected to the second motherboard 210. The second processor 232 is in compliance with the RDMA protocol and is located on the second network card 230 and is electrically connected to the second network card 230. When the second computer device 200 and the first computer device 100 are connected to a network 300 (for example, Ethernet) When the network is connected, the first computer device 100 is electrically connected to the second network card 230 of the second computer device 200 through the first network card 140. Referring to FIG. 2, FIG. 2 is a schematic flow chart showing the method for testing the remote assisted memory of the present invention in this embodiment. In the embodiment 201103031, when the user issues a memory test command to the agent program 150 of the first computer device 100, the agent program 150 proceeds according to the following steps: Step (201) divides the first computer device 1 A memory ι3〇 is at least one younger one, the first memory segment 13 2 and a second memory segment 134, wherein the size of the first memory segment 132 and the second memory segment 134 can be The ratio of the path transmission speed and the memory read/write speed is distributed by the user; the step (202) assigning the first memory segment 132 to the first computer device 100' for the first computer device 100 to the first memory region The segment 132 performs the memory test: in this step, the central processing unit 12 performs the data access of the memory test on the first memory 13〇, wherein the data access type is, for example, a data line test, a bit line test, Data increase/decrease test, delayed access test, bearer test, and random test. Step (203) assigning the second memory segment 134 to the second computer device 200 for the second computer device 200 to perform a memory test on the second memory segment 134: in this step, the second processor 232 is not transparent. The central processing unit 120 of the first computer device performs TCP/IP packet packaging, and directly causes the second processor 14 2 to perform memory test data access to the second memory segment 13 4 and performs TCP/IP. IP packet packaging. In this way, the central processing unit 120 can provide other programs that are working in progress while still maintaining its performance. It should be noted that the steps (2〇2) and the steps (2〇3) are not limited to the order of 201103031, and may be performed simultaneously, and then the steps (2〇4) are performed. Step (204) Reporting the memory test result: In this step, the test results of the first memory segment 132 and the second memory segment 134 are externally reported. Specifically, referring to Fig. 3, Fig. 3 is a detailed flow chart showing the step (201) of Fig. 2. The agent program I% can perform the following detailed steps in the step (2〇1) according to an embodiment:
步驟（2011)取得第一記憶體13〇的容量， 10 GB(十億位元組，gigabytes); 步 速度： (2012)取得網路3〇〇傳輸速度以及記憶體讀寫 此步驟中，代理人程式150自第一網路卡14〇取 路300傳輸速度，即網路3〇〇可供進行 ’ 度，例如為刪秒，以及中央處理單元12〇對 體130之記憶體讀寫速度，即進行資料存取的第二速产: 例如為9GB/秒。其中，步驟（2〇11)與步驟（2〇ι^並 非限定其順序’亦可同時進行，之後，進行步驟（2013)。 期）依據各速度之_，t㈣—記憶體區 丰又132及弟二記憶體區段134 : 此步驟中’依據第一速度與第二速度之 分別劃分出第—記憶體13Gt對應第—速度的第^ 3體區段134,其容量例如為！ GB，以及對應第二速度 記憶體區段132 ’其容量例如為9GB。如此，可推 區段134之大小與第二電腦裝置綱對網路 300之資料存取速度成正比。 201103031 請參閱第4圖所示，第4圖繪示第2圖之步驟（ 203) . 之細部流程圖。代理人程式150可依一實施例而進行步驟 ( 203 )所包括之下列細節步驟： 步驟（ 2031 )將第二記憶體區段134映射（Memory Mapping)至第二記憶體220之一第三記憶體區段222上， 第三記憶體區段222等同於第二記憶體區段134 ; 步驟（ 2032)使第二電腦裝置200直接對相同於第三 記憶體區段2 2 2之第二記憶體區段13 4進行記憶體測試之 φ 資料存取。代理人程式150可依另一實施例而進行步驟 ( 2032)所包括之下列細節步驟，請參閱第5圖所示，第 5圖繪示第4圖之步驟（2032 )之細部流程圖： 步驟（ 2032a)對第二記憶體區段134進行一定 值錯誤測試（stuck-at fault test )、一轉換錯誤測試 (transition fault test)、一 柄合錯誤測試（coupling fault test)及一相鄰矢量敏化故障測試（neighborhood pattern sensitive faultiest)其中之一或多； 鲁步驟（2032b )判斷第二記憶體220之測試是否 產生錯誤，若是，進行步驟（2032c )，否則進行步驟 (2032d)； 步驟（ 2032c)紀錄第二記憶體區段134發生錯 誤之位址。 步驟（ 2032d)使第二電腦裝置200重複進行上 述之測試。 此步驟（ 204)中，上述第一記憶體區段132與第二 記憶體區段134之測試結果並非限定由第一電腦裝置 201103031 100、第二電腦裝置2GG或又—電職置整合出。盆 另-實施例中，請參閱第6圖所示，“圖取 步驟（204)之細部流程i包括之下列細節步驟： 步驟（ 204U將第-記憶體區段132 (或第二記憶體 =段134) U憶體測試結果傳至第二電腦 第一電腦裝置100); 步驟（ 2042)將第二記憶體區段134 (或 區段間之記憶體測試結果與第一記憶體區段ι^或 第-記憶體區段132)之記憶體測試結果進行整合； 步驟（2043)於第二電腦裝置或第^腦裝置 100)上輸出整合後之記憶體測試結果。 ，詈，二斤述換ίΓ月藉由多個遵守rdma協定之電腦 裝置’共同勿擔其中一電腦裝置之記憶體測試，對 ^置之不同記憶體區段進行記憶體測試，減少先前單 月®裝置進行記憶體測試時所需之時間。同時，透過直 記憶體進行測試’不需使用電腦裝置之中央處理單元⑶ 進行TCP/IP的封包包梦 · 的工作效能可大大維持中央處理單元原有 本發明所揭露如上之各實施例中，並非用以 = 此技藝者，在不脫離本發明之精神和範圍 损^ I 更動與濁飾，因此本發明之保護範圍各 視後附之申請專㈣_界定者為準。 乾圍田 【圖式簡單說明】 201103031 為讓本發明之上述和其他目的、特徵、優點 能更明顯易懂，所附圖式之詳細說明如下：〜實〜例 第1圖繪示本發明遠端協助記憶體測試的方 實施方式中之方塊示意圖。 /於一 測試的方法 第2圖繪示繪示本發明遠端協助記憶體 於此實施方式中之初步流程圖。Step (2011) to obtain the capacity of the first memory 13〇, 10 GB (gigabytes, gigabytes); step speed: (2012) to obtain the network 3〇〇 transmission speed and memory read and write, the agent in this step The human program 150 captures the transmission speed of the way 300 from the first network card 14, that is, the network 3 is available for performing degrees, for example, deleting seconds, and the memory reading and writing speed of the central processing unit 12 to the body 130. That is, the second speed of data access: for example, 9 GB / sec. Wherein, the step (2〇11) and the step (2〇ι^ are not limited to the order thereof) may be performed simultaneously, and then the step (2013) is performed. The period is based on each speed _, t (four) - the memory area is 132 and Second memory segment 134: In this step, the third body segment 134 corresponding to the first speed is divided by the first speed and the second speed, respectively, and the capacity is, for example, ! GB, and corresponding second speed memory section 132' has a capacity of, for example, 9 GB. Thus, the size of the pushable section 134 is proportional to the data access speed of the second computer device pair network 300. 201103031 Please refer to FIG. 4, and FIG. 4 is a detailed flow chart of the step (203) of FIG. The agent program 150 may perform the following detailed steps included in the step ( 203 ) according to an embodiment: Step (2031) Map the second memory segment 134 to the third memory of the second memory 220. On the body segment 222, the third memory segment 222 is identical to the second memory segment 134; the step (2032) causes the second computer device 200 to directly access the second memory identical to the third memory segment 2 2 2 The body segment 13 4 performs the φ data access of the memory test. The agent program 150 may perform the following detailed steps included in the step (2032) according to another embodiment, as shown in FIG. 5, and FIG. 5 shows a detailed flow chart of the step (2032) in FIG. 4: (2032a) performing a stuck-at fault test on the second memory segment 134, a transition fault test, a coupling fault test, and an adjacent vector sensitivity One or more of the neighborhood pattern sensitive faultiest; the step (2032b) determines whether the test of the second memory 220 generates an error, and if so, proceeds to step (2032c), otherwise proceeds to step (2032d); step (2032c) Recording the address where the second memory segment 134 has an error. Step (2032d) causes the second computer device 200 to repeat the above test. In this step (204), the test results of the first memory segment 132 and the second memory segment 134 are not limited to be integrated by the first computer device 201103031 100, the second computer device 2GG, or the electrical device. In the alternative embodiment, please refer to Fig. 6, "The detailed process of the drawing step (204) i includes the following detailed steps: Step (204U will be the first memory segment 132 (or the second memory = Section 134) U memory test result is transmitted to the second computer first computer device 100); step (2042) is to store the second memory segment 134 (or the memory test result between the segments and the first memory segment ι The memory test result of the ^ or the first memory segment 132 is integrated; the step (2043) outputs the integrated memory test result on the second computer device or the brain device 100). In the case of a computer device that complies with the rdma protocol, the memory test of one of the computer devices is not shared, and the memory test is performed on different memory segments of the device, and the memory test of the previous single month device is reduced. At the same time, the test is carried out through the direct memory. The central processing unit (3) without using a computer device performs the TCP/IP packet. The performance of the package can greatly maintain the central processing unit. In each of the embodiments It is not intended to be used by the skilled person, without departing from the spirit and scope of the present invention, and the scope of protection of the present invention is subject to the application of the application (4)_Definition. BRIEF DESCRIPTION OF THE DRAWINGS The above and other objects, features and advantages of the present invention will become more apparent and understood. A block diagram of the tested embodiment. / Method for testing 1 Figure 2 depicts a preliminary flow chart of the remote assist memory of the present invention in this embodiment.
第3圖繪示第2圖之步驟（2〇1)之細部流程圖。 第4圖繪示第2圖之步驟（203)之細部流程圖。 第5圖綠示第4圖之步驟（2〇32)之細部流程圖。 第6圖繪示第2圖之步驟（204)之細部流程圖。Figure 3 is a detailed flow chart showing the steps (2〇1) of Figure 2. Figure 4 is a flow chart showing the details of the step (203) of Figure 2. Figure 5 is a green flow chart showing the steps (Fig. 2) of Figure 4. Figure 6 is a flow chart showing the details of step (204) of Figure 2.
【主要元件符號說明】 1〇〇:第一電腦裝置 110 :第一主機板 120 :中央處理單元 13〇:第一記憶體 1321第一記憶體區段 134 :第二記憶體區段 14〇 :第一網路卡 142 :第一處理器 15〇:代理人程式 2〇〇:第二電腦裝置 210:第二主機板 220 :第二記憶體 222 :第三記憶體區段 230 :第二網路卡 232 :第二處理器 300 :網路 201〜204 :步驟 2011〜2013 :步驟 2031〜2032 :步驟 2032a〜2032d :步驟 2041〜2043 :步驟 12[Main component symbol description] 1〇〇: First computer device 110: First motherboard 120: Central processing unit 13A: First memory 1321 First memory segment 134: Second memory segment 14〇: The first network card 142: the first processor 15: the agent program 2: the second computer device 210: the second motherboard 220: the second memory 222: the third memory segment 230: the second network Road card 232: second processor 300: network 201~204: steps 2011~2013: steps 2031~2032: steps 2032a~2032d: steps 2041~2043: step 12