201041462 六、發明說明： 【發明所屬之技術領域】 本發明涉及一種檢查系統及方法，尤其涉及一種關於 過孔尺寸分佈的檢查系統及方法。 【先前技術】 印刷電路板（Printed Circuit Board，PCB)是電子產 品中電路元件的支撐件，它提供了電路元件之間的電氣連 接。其將元件與元件之間複雜的電路導線，經過細緻整齊 〇 的規劃後，蝕刻在一塊板子上，提供電子元件在安裝與互 連時的主要支撐體’是所有電子產品不可或缺的基礎零件。 印刷電路板是以不導電材料所製成的平板，在板面上 印製有導線以連接電子元件。將所述電子元件的ΠΝ腳（引 腳）穿過PCB後，再以導電性的金屬焊條黏附在pcB上 形成電路。 依應用領域，PCB可分為單層板和多層板（包括兩層 或以上）。隨著技術的發展，多層PCB得到越來越多的應 〇 用。過孔（via)是多層PCB的重要組成部分，尤其是體 積小且密度高的PCB。 過孔的使用隨之帶來了寄生電感（equivalent serial inductance，ESL即等效串連電感），寄生電感阻礙了電容 迅速回應電流變化的能力，進而造成低頻電源雜訊或者高 頻電磁干擾。由於電流通道產生的寄生電感與過孔的直 徑、數量成一定比例，因此控制過孔的尺寸可以有效地控 制寄生電感。 4 201041462 :統般採用人工檢查過孔的尺寸 時費力，且難以鱗檢查結果的準雜。 相田費 【發明内容】 蓉於以上内容，有必要提供—種過孔尺寸 統及^法，可以迅速準確地檢查過孔尺寸及其分佈一系 今主機寸分佈檢查系統，該系統運行於主機上， ο 二元件分:=，樹儲存有待檢查的元件群 該系統包括元件群組對應的的標準過孔尺寸 件•及該元件群組中每個元件的過=取的元 用於選擇待檢查“件群組對應的標準過二組， 組，用於將所讀取的每個元件的過孔 對模 〇 孔尺寸是否合看所讀取的每個元件的過 孔尺寸不合格的元件;及生成在元件分佈圖上顯示過 該報:上顯示所有元件過孔的::結:於生成檢查報表’ 寸；將所靖待檢查的凡件群組對應的標準過孔尺 標準過孔^寸進=疋件的過孔尺寸與該元件群組對應的 寸是否人格.户丁^對，查看所讀取的每個元件的過孔尺 件；及生成於杰凡件分佈圖上顯示過孔尺寸不合格的元 查結果。—報表，該報表上顯示有所有元件過孔的檢 5 201041462 相較於習知技術，所述過孔尺寸分佈檢查系統及方 法’透過檢查過孔的尺寸，迅速找出不符合設計規範的分 佈，使得PCB抗高頻干擾與低頻雜訊的設計控制更準確。 【實施方式】 如圖1所示，係本發明過孔尺寸分佈檢查系統之硬體 架構圖。該過孔尺寸分佈檢查系統100運行於主機1上， 該主機1分別連接資料庫2，鍵盤3，滑鼠4及顯示器5。 Ο201041462 VI. Description of the Invention: [Technical Field] The present invention relates to an inspection system and method, and more particularly to an inspection system and method for a via size distribution. [Prior Art] A Printed Circuit Board (PCB) is a support for circuit components in an electronic product that provides electrical connection between circuit components. It combines the complicated circuit wires between components and components, and after careful planning, etches on a board to provide the main support for electronic components during installation and interconnection. It is an indispensable basic part for all electronic products. . A printed circuit board is a flat plate made of a non-conductive material on which conductors are printed to connect electronic components. After the foot (pin) of the electronic component is passed through the PCB, the conductive metal electrode is adhered to the pcB to form an electric circuit. Depending on the application, PCBs can be divided into single and multi-layer boards (both inclusive). With the development of technology, multi-layer PCBs are getting more and more applications. Vias are an important part of a multilayer PCB, especially for PCBs with small bulk and high density. The use of vias leads to an equivalent serial inductance (ESL), which is a parasitic inductance that prevents the capacitor from responding quickly to changes in current, resulting in low frequency power supply noise or high frequency electromagnetic interference. Since the parasitic inductance generated by the current path is proportional to the diameter and number of vias, the size of the control vias can effectively control the parasitic inductance. 4 201041462: It is laborious to manually check the size of the via hole, and it is difficult to check the result of the scale. Xiang Tian Fei [Invention] In the above content, it is necessary to provide a kind of through-hole size and method, which can quickly and accurately check the size and distribution of the via-hole system. The system runs on the host computer. , ο Two component points: =, the tree stores the component group to be inspected. The system includes the standard via size component corresponding to the component group. • and the over-element of each component in the component group is used to select the to-be-checked "The standard group corresponding to the group of groups, the group, is used to compare the via hole size of each element read to see if the size of the die hole is unqualified; And the generation shows the report on the component map: the display of all the components of the via:: knot: in the generation of the inspection report 'inch; the standard through-hole standard hole corresponding to the group of objects to be inspected ^ Inch = the size of the via of the component and the size of the component corresponding to the component group. The household is right, check the via hole of each component read; and the display shows the via on the map of Jiefan The results of the unqualified yuan check.—Report, The report shows the detection of all component vias. 201041462 Compared to the prior art, the via size distribution inspection system and method 'by quickly checking the size of the vias to quickly find out the distribution that does not conform to the design specifications, so that the PCB is resistant. The design control of the high frequency interference and the low frequency noise is more accurate. [Embodiment] The hardware structure diagram of the via size distribution inspection system of the present invention is shown in Fig. 1. The via size distribution inspection system 100 operates on the host 1 The host 1 is connected to the database 2, the keyboard 3, the mouse 4 and the display 5. Ο
所述主機1可以是IBM架構的電腦（IBM Personal Computer ’ IBM PC )、Apple 公司的 Mac PC、個人電腦、 網路伺服器’還可以是任意其他適用的電腦。 所述資料庫2可以内置於所述主機1，也可外置所述 主機1，該資料庫2中儲存有pcb的元件庫，該元件庫中 儲存有很多元件群組。所述元件是指PCB上的元器件的符 號。該資料庫2中還儲存有每個元件群組的標準過孔尺寸 及凡件的分佈圖。所述標準過孔尺寸是指過孔產生的寄生 電感和寄生電容在允許的寄生電感和寄生電容範圍之内所 符合的過孔尺寸。如圖4所示，過孔由三部分組成：一是 孔；二是孔週圍的焊盤區；三是p〇WER層隔離區。該過 孔尺寸包括：過孔直徑D、焊盤直徑D1、隔離孔直徑D2 及PCB厚度H。過孔產生的寄生電容c的近似計算公式 為· C-1.Wh*D1/(D2-D1)，其中ε為板基材介電常數。 過孔的寄生電容值越小則對pcB電路的影響越小。過孔的 ^生電感L的近似§十算公式為嫌⑴㈣彻^)。因 it所述過孔的標準尺寸參數包括過孔直徑D、焊盤直徑 6 201041462 D1、隔離孔直徑D2。 所述鍵盤3、滑鼠4及顯示器5分別作為過孔 =入輸出裝置。所述顯示器5還提供了圖形化二 面（GmPh1C User Interface，GUI )，該圖形化 顯示有PCB的元件過孔分佈圖。 ；丨面上 Ο Ο 如圖2所示，係本發明圖1中過孔尺寸分佈檢查^ 100之功純_。所賴組是具有料錢的 = 段，該軟體儲存於電腦可讀儲存介f或其他 &式 被電腦或其他包含處理器的計算裝置執行， 可 孔尺寸分佈檢查的系職程。所述過孔尺寸二對過 娜包括：讀取模組H)、選擇模組12、比對模組^^统 模組16及生成模組18。 觸不 =取模組U)㈣從元件庫中讀取待檢查的元件群 、'且、該元件群組中的每個元件的過孔尺寸。 選擇模組丄2用於選擇待檢查的元件群組對應的 過孔尺寸。該料祕尺寸包括對標㈣孔直徑； 準焊盤直徑及鮮隔離孔直㈣選擇。本難實施例中^ 標準過孔直徑為1Gmils，標準焊盤直#為2Qmiis，標準隔 離孔直徑為28mils。其中，lmiis為千分之一英寸。 比對模組14用於將所讀取的元件的過孔央尺寸斑所選 擇的該元件群㈣標⑽纽寸進行崎，查看所述過孔 尺寸是否合格。當所述祕尺寸的如以徑不大於所選擇 的過孔直徑標準，且焊盤直徑不小於選擇的焊盤直徑標準 及當該過孔的隔離孔直财大於所選_標準祕孔直徑 7 201041462 時，所述比對模組14判斷該過孔尺寸合格。當所述過孔尺 寸的過孔直徑大於所選擇的過孔直徑標準，或者焊盤直俨 小於所選擇的焊盤直徑標準，或當過孔的隔離孔直徑大= 所選擇的標準隔離孔直徑時，所述比對模組u :紝莩 為該過孔尺寸不合格。 顯示模組16用於在分佈圖上顯示過孔尺寸不人格的 元件。本較佳實施例中，所述顯示模組16透過用戶的 顏色來標識所述過孔尺寸不合格的元件。 Ο 生成模組18用於生成檢查報表，該報表上顯 元件過孔的檢查結果。 如圖3所示，係本發明過孔尺寸分佈檢查方法較 施例之方法流程圖。 貝 步驟S3〇,讀取模、组1〇從元件庫中讀取待檢查的 群組、該元件群組中每個元件的過孔尺寸。 步驟S3!，選擇模組12選擇待檢查的元件群組 的標準過孔尺寸。該㈣過孔尺寸包括對標準過孔 徑、標準焊盤直徑及鮮隔離孔餘的選擇。本較佳實施 例中，標準過孔直徑為1Gmils，標準焊盤直徑為邮s， 標準隔離孔直徑為28mils。其中，lmils為千分之一英寸。 步驟S32,比對模組14料將所讀取的每個元件 孔尺寸與所選擇的該元料_鮮過孔尺寸進行比對， 查看所述過孔尺寸是否合格。當所述過孔尺寸的過孔直徑 不大於所·的標準過孔錄，且雜直徑科於所選^ 的標準焊盤絲及f該過㈣隔錄不纽所選擇的 8 201041462 • 標準隔離孔直徑時，所述比對模組14判斷該過孔尺寸合 格。當所述過孔尺寸的過孔直徑大於所選擇的過孔直徑標 準’或者焊盤直徑小於所選擇的焊盤直徑標準，或當過孔 的隔離孔直徑大於所選擇的標準隔離孔直捏時，所述比對 模組14判斷的結果為該過孔尺寸不合格。 步驟S33’顯示模組16在分佈圖上顯示過孔尺寸不人 格的元件。本較佳實施例中，所述顯示模組16透過用戶設 定的顏色來標識所述過孔尺寸不合格的元件。 〇 步驟S34，生成模組18生成檢查報表，該報表上顯示 有所有元件過孔的檢查結果。 步驟S35,當還需要繼續檢查其他元件群組時轉至步 驟S30。當不需要時結束流程。 最後所應說明的是，以上實施例僅用以說明本發明的 技術方案而非限制，儘管參照以上較佳實施例對本發明進 行了詳細說明，本領域的普通技術人員應當理解，可以對 ❹本發明的技術方案進行修改或等同替換，而不脫離本發明 技術方案的精神和範圍。 【圖式簡單說明】 圖1係本發明過孔尺寸分佈檢查系統之硬體架構圖。 圖2係圖1中過孔尺寸分佈檢查系統之功能模組圖。 圖3係本發明過孔尺寸分佈檢查方法較佳實施例之流 程圖。 机 圖4係元件過孔平面示意圖。 【主要元件符號說明】 9 1 201041462 ' 主機 資料庫 2 鍵盤 3 滑鼠 4 顯示器 5 過孔尺寸分佈檢查系統 100 讀取模組 10 選擇模組 12 〇 比對模組 14 顯示模組 16 生成模組 18 從元件庫中讀取待檢查的元件群組、該元件群組中每 個元件的過孔尺寸 S30 選擇待檢查的元件群組的對應的標準過孔尺寸S31 將讀取的每個元件的過孔尺寸與所選擇的該元件群 組的標準過孔尺寸進行比對，查看所讀取的每個元件 的過孔尺寸是否合格 S32 在分佈圖上顯示過孔尺寸不合格的元件 S33 生成檢查報表 S34 是否需要繼續檢查其他元件群組？ S35 10The host 1 may be an IBM-based computer (IBM Personal Computer 'IBM PC), an Apple Mac PC, a personal computer, a web server' or any other suitable computer. The database 2 may be built in the host 1 or externally connected to the host 1. The database 2 stores a component library of pcbs, and a plurality of component groups are stored in the component library. The component refers to the symbol of the component on the PCB. The library 2 also stores the standard via size and distribution map of each component group. The standard via size refers to the via size of the parasitic inductance and parasitic capacitance generated by the via within the allowable parasitic inductance and parasitic capacitance. As shown in Figure 4, the via is composed of three parts: one is a hole; the other is a pad area around the hole; and the third is a p〇WER layer isolation area. The via size includes: via diameter D, pad diameter D1, isolation hole diameter D2, and PCB thickness H. The approximate calculation formula of the parasitic capacitance c generated by the via hole is · C-1.Wh*D1/(D2-D1), where ε is the dielectric constant of the plate substrate. The smaller the parasitic capacitance value of the via hole, the smaller the influence on the pcB circuit. The approximation of the via inductance ^ § ten is calculated as (1) (four) thoroughly ^). The standard size parameters for the vias include the via diameter D, the pad diameter 6 201041462 D1, and the isolation hole diameter D2. The keyboard 3, the mouse 4 and the display 5 respectively function as a via = input/output device. The display 5 also provides a GmPh1C User Interface (GUI), which graphically displays the component via layout of the PCB.丨 Ο Ο Ο As shown in Fig. 2, the perforation size distribution inspection of Fig. 1 of the present invention is pure _. The group is a profitable = segment, and the software is stored in a computer-readable storage device or other & type computer system or other computing device including a processor, and the hole size distribution inspection is performed. The through-hole size two-pass includes: a reading module H), a selection module 12, a comparison module module 16, and a generation module 18. Touch = Take module U) (4) Read the component group to be inspected from the component library, 'and the via size of each component in the component group. The selection module 丄 2 is used to select the via size corresponding to the component group to be inspected. The material size includes the diameter of the standard (four) hole; the diameter of the quasi-pad and the diameter of the fresh isolation hole (four). In the difficult embodiment, the standard via diameter is 1 Gmils, the standard pad straight # is 2Qmiis, and the standard isolation hole diameter is 28 mils. Among them, lmuis is one thousandth of an inch. The comparison module 14 is configured to perform the component group (4) mark (10) selected by the center size of the read element, and check whether the via size is acceptable. When the size of the secret dimension is not greater than the selected via diameter standard, and the pad diameter is not less than the selected pad diameter standard and when the via hole of the via hole is larger than the selected _ standard secret hole diameter 7 At 201041462, the comparison module 14 determines that the via size is acceptable. When the via size of the via size is larger than the selected via diameter standard, or the pad diameter is smaller than the selected pad diameter standard, or when the via isolation hole diameter is large = the selected standard isolation hole diameter is selected At the same time, the comparison module u: 纴莩 is that the via size is unqualified. The display module 16 is used to display elements of the via size that are not personal in the distribution map. In the preferred embodiment, the display module 16 identifies the component with a failed via size by the color of the user. Ο The generation module 18 is configured to generate an inspection report, and the inspection result of the component via is displayed on the report. As shown in Fig. 3, it is a flow chart of the method for inspecting the via size distribution of the present invention. Step S3〇, the read mode, the group 1〇 read the group to be inspected from the component library, and the via size of each component in the component group. In step S3!, the selection module 12 selects the standard via size of the component group to be inspected. The (iv) via size includes a choice of standard via diameter, standard pad diameter, and fresh isolation vial. In the preferred embodiment, the standard via diameter is 1 Gmils, the standard pad diameter is s, and the standard isolation hole diameter is 28 mils. Among them, lmills is one thousandth of an inch. In step S32, the comparison module 14 compares each of the component hole sizes read with the selected material_fresh via size to check whether the via size is acceptable. When the via size of the via size is not larger than the standard via record, and the impurity diameter is selected in the standard pad of the selected ^ and the over (four) spacer is selected 8 201041462 • Standard isolation When the hole diameter is reached, the comparison module 14 determines that the via size is acceptable. When the via size of the via size is greater than the selected via diameter standard 'or the pad diameter is less than the selected pad diameter standard, or when the via isolation hole diameter is greater than the selected standard isolation hole pinch The result of the comparison module 14 is that the via size is unacceptable. The step S33' display module 16 displays on the map a component whose via size is unqualified. In the preferred embodiment, the display module 16 identifies the component with a failed via size through a color set by the user. 〇 Step S34, the generation module 18 generates an inspection report, and the inspection result of all component vias is displayed on the report. In step S35, when it is necessary to continue checking other component groups, the process goes to step S30. End the process when it is not needed. It should be noted that the above embodiments are merely illustrative of the technical solutions of the present invention and are not intended to be limiting, although the present invention has been described in detail with reference to the preferred embodiments thereof, The technical solutions of the present invention are modified or equivalently substituted without departing from the spirit and scope of the technical solutions of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a hardware structural diagram of a via size distribution inspection system of the present invention. 2 is a functional block diagram of the via size distribution inspection system of FIG. 1. Fig. 3 is a flow chart showing a preferred embodiment of the via size distribution inspection method of the present invention. Figure 4 is a schematic diagram of the via hole plane of the component. [Main component symbol description] 9 1 201041462 'Host database 2 Keyboard 3 Mouse 4 Display 5 Via size distribution inspection system 100 Read module 10 Select module 12 〇 Align module 14 Display module 16 Generate module 18 Read the group of components to be inspected from the component library, the via size of each component in the component group S30 Select the corresponding standard via size S31 of the component group to be inspected. The via size is compared with the selected standard via size of the component group, and the via size of each component read is checked. S32 is displayed on the profile. The component with the via size is unqualified. Does report S34 need to continue checking other component groups? S35 10