201041110 六、發明說明： 【發明所屬之技術領域】 本發明是有關於一種積體電路封裝結構及封裝方法，特別是 有關於一可降低積體電路封裝厚度之積體電路封裝結構及其封裝 方法。 【先前技術】 〇 隨著電子元件技術之發展’積體電路(integrated cjrcuit)已取代 電晶體及真空管等用以傳遞電子訊號或作運算用途電子零件，使 得電子產品，如電視、收音機可較數十年前之產品相對輕薄短小。 然而，積體電路晶片需經由封裝(package)之方式，以固定及電性 連接於電路基板上，及防潮渥水氣之侵襲。 S知技藝之積體電路晶片之封装技術，其藉將一個或多個晶 片連接至一印刷電路板(printed eircuit board，PCB)或印刷電路卡 (printed circuit card)等基板上。而晶片可以多種方式連接基板。常 〇 見的連接方式如打金線式(wire bonding)，藉由晶片元件處到基板 連接點的極細微金線作電性連接。另外-種職晶(flip ehip)之方 式’以錫塊(solderbump)作為晶片的實體接觸及電性連接。 由於肩費者對於電子產品之功能要求亦日漸增多，因此如何 ^破半導體製造與積體電路設計之技術，以製造功能更為強大之 ，頻晶片，顯然已成為今日研究上之重要課題。然而，對於採用 向頻aa片之半導體封裝件而言，其運作過程巾往往具有極為嚴重 的電磁波問題’此係由於高頻晶片進行運算或傳輸雜往會產生 很強的電魏’而此電磁酬透過封裝賴傳達餅界，造成周 3 201041110 圍電子^的電磁干擾(elec_ic i触㈣ 可此降低封裝件之電性品質與散熱效能，形成摘半 導體封裝件的一大問題。 〜成同頻牛 =知的解決方式為—金屬殼體u覆蓋於封裝件12上， 亚將金屬 11接地或與基板13紐連接 擾=，如第1圖所示。然而，受限於製程技術二： 金屬破體11之厚度僅馳繼α2公釐(_)左右，砂法進一步 薄Γ 'Γ ’金屬殼體11需以沖切一)、_腦)或 模造(moldlng)成形之方式製作以完全吻合電路基板13。再者，金 屬，體接地之接置方式，多半如人工方式完成，難以進行自動 化罝f，而不符技術_化、低成本、高量產等發展趨勢， 實為南頻晶片封襄上的障礙。 此外，亦有相關從業人員開發出利用冑電漆(⑽ductive 咖㈣_rial)或真空濺鍍(v啊deposits)之方式，於封裝件上 設置-層電磁波遮蔽結構。然:而，導電漆不但價格昂貴，且易受 溫度、缝等影響喊落。喊空濺鍍受限於目前麟之限制， 其所形成之金屬細厚度過細，無法有效發揮電磁波遮 蔽之功能。再者’雖亦魏業人㈣發出姻電鍍的方式製作電 磁防護層’然而其需利用酸性液體，如硫酸作為電解液，而屬於 ，製f(wetpr〇cess)，易產生對人體有害物質，而無法符合日益嚴 密之環保規範。此外’由於酸性電解液易雜“封裝層，導致 生產良率下降。 【發明内容】 有鑑於上述習知技藝之問題，本發明之目的就是在提供—種 201041110 積體電路封裝結構及方法’轉決習知技藝之積體電路封裝結構 厚度無法有效降低，以應用於曰益輕薄短小之電子產品中。 根據本發明之目的，提出一種積體電路封裝結構，包含一電 路基板、一封裝件、一黏著層及一金屬薄膜。封裝件係設置於電 ，基板上。黏著層係崎於封裝件之外侧^金屬細係貼附於黏 著層上’且金屬薄膜係與電路基板電性連接，以形成_電磁波遮 蔽結構^ Ο201041110 VI. Description of the Invention: [Technical Field] The present invention relates to an integrated circuit package structure and a package method, and more particularly to an integrated circuit package structure and a package method thereof capable of reducing the thickness of an integrated circuit package . [Prior Art] With the development of electronic component technology, integrated circuit (cjrcuit) has replaced electronic components such as transistors and vacuum tubes for transmitting electronic signals or for computing purposes, making electronic products such as televisions and radios comparable. Ten years ago, the products were relatively light and thin. However, the integrated circuit chip needs to be fixedly and electrically connected to the circuit substrate via a package, and is protected from moisture and moisture. The packaging technology of the integrated circuit chip of the prior art is to connect one or more wafers to a substrate such as a printed eircuit board (PCB) or a printed circuit card. The wafer can be connected to the substrate in a variety of ways. The connection method commonly seen is, for example, wire bonding, which is electrically connected by a very fine gold wire from the chip component to the substrate connection point. In addition, the 'flip ehip' method uses a solderbump as a physical contact and an electrical connection of the wafer. Since the functional requirements of electronic products are increasing, how to break the technology of semiconductor manufacturing and integrated circuit design to manufacture more powerful, frequency chips has become an important topic in today's research. However, for a semiconductor package using a frequency aa chip, the operation process towel often has an extremely serious electromagnetic wave problem. This is because the high frequency wafer performs calculation or transmission miscellaneous, which generates a strong electrical wave. Remuneration through the package to convey the cake world, causing the electromagnetic interference of the electronic circuit (elec_ic i touch (4) can reduce the electrical quality and heat dissipation performance of the package, forming a major problem in the semiconductor package. The solution to the problem is that the metal casing u covers the package 12, and the metal 11 is grounded or connected to the substrate 13 as shown in Fig. 1. However, it is limited by the process technology 2: metal The thickness of the broken body 11 is only about α2 mm (_), and the sand method is further thinned. The 'Γ' metal shell 11 needs to be formed by punching a), _ brain, or molding (moldlng) to form a complete fit. Circuit board 13. Furthermore, the connection method of metal and body ground is mostly done manually, which is difficult to automate, and does not conform to the development trend of technology, low cost, high volume production, etc. . In addition, relevant practitioners have developed a method of using a enamel paint ((10) ductive coffee (4) _rial) or vacuum sputtering (v ah deposits) to provide a layer-electromagnetic wave shielding structure on the package. However: conductive paint is not only expensive, but also susceptible to temperature, seams, etc. Shouting splashing is limited by the current limitations of Lin, and the thin metal formed by it is too thin to effectively function as an electromagnetic wave. In addition, 'While Weiye people (4) issued a method of electroplating to make an electromagnetic protective layer', however, it needs to use an acidic liquid, such as sulfuric acid as an electrolyte, and belongs to, f (wetpr〇cess), which is easy to produce harmful substances to the human body, but cannot Meet the increasingly stringent environmental regulations. In addition, due to the problem that the acidic electrolyte is easy to be mixed with the encapsulating layer, the production yield is lowered. SUMMARY OF THE INVENTION In view of the above-mentioned problems of the prior art, the object of the present invention is to provide a 201041110 integrated circuit package structure and method. According to the object of the present invention, an integrated circuit package structure including a circuit substrate, a package, and a package is provided. An adhesive layer and a metal film. The package is disposed on the electric substrate, and the adhesive layer is attached to the outer side of the package, and the metal thin film is attached to the adhesive layer, and the metal film is electrically connected to the circuit substrate. Forming _ electromagnetic wave shielding structure ^ Ο
其中’金屬薄膜係以-膜内裝飾成形方式或一壓差吸附貼合 方式貼附於黏著層上。 、其中，金屬薄膜係為一銅箱或一銘羯等金屬镇，金屬薄膜係 以一電解方式或一滾壓方式所製成。 其中，金屬薄膜係以-點焊、雷射溶接或點鍚球之方式與電 路基板電性連接。 、，此外’本發明更提出一種積體電路封I方法，包含下列步驟。 百，’提供-封裝件，其係設置於—電路基板上。接著，附著一 ^層至封裝件之外側。再者，蘭—金屬薄膜至黏著層。最後 電性連接金屬薄膜至電路基板，以形成1磁波遮蔽結構。 其中，金屬_係以—咖裝飾成形方式或―壓差 方式貼附於黏著層上。 其中，金屬薄膜係為一鋪或一㈣，但並不以此為限。 其中’銅紐以-電解方式或—轉方柄製成。 路』=薄膜係以一點焊'雷•接或點錫球之方式與電 5 201041110 其中’金屬_係進行—表面後處理製程，此表面後處理製 程係設置一鍍材於金屬薄膜上。 其中，表面後處理製程係為真空蒸鍍(Vac_ evap〇rati⑽、 真空濺鍍(Vacuum Sputtering dep〇siti〇n)、真空離子鑛(Vacuum -plating)、電鐘(Electr0piating)或無電鍍法(Electr〇less plating)。 其中’鍍材係為不勒、鎳、鉻、鈇、錄鉻合金、銅合金或 紹合金。 承上所述，依本發明之積體電路封裝結構及封裝方法，可藉 由黏著層將金屬薄親附於封裝件上，並使金屬薄膜與電路基板 電性連接以形成-電磁波遮蔽結構，而可達到降低封裝厚度之效 果。此外，由於本發明之封裝結構及方法為乾式製程(办p^ss)， 可避免電賴需之導電液產生有害物質或損害封裝件之問題。 【實施方式】 請參閱第2圖及第3圖，其分職為本發明之積體電路封裝 結構及方法之立體圖及舰圖。圖巾，频電路封裝結構包含一 電路基板21、-封裝件22、-黏著層23及一金屬薄膜％。 電路基板21可為印刷電路板__ circuk b〇ard)。封裝件22 可以-封裝塑膠22!包覆-顆或多顆積體㈣晶片扣，而構成一 系統晶片（system in Chip，SIC)之封裝體。其中，積體電路晶片211 3¾ ^ (base band chip) > 3¾ (radio frequency chip) 或一數位訊號處理器(digital signal processor DSP)。 黏著層23可以樹脂來實施，如環氧樹脂(ep〇xy)。金屬薄膜 24可為銅賊射轉金屬⑽(metal foil)，细電解方式或滾壓方 201041110 式所製成’且金屬薄膜24藉由黏著層23貼附於封裝件22上。其 中，金屬薄膜24可以點焊、雷射熔接或錫球點焊方式與電路基板 21電性連接’以形成一電磁波遮蔽結構。此外，金屬薄膜24可以 一膜内裝飾(in-molddecoration，IMD)，亦稱為薄膜射出法，或壓差 吸附貼合等表面黏著技術(surface mount technology，SMT)方式， Ο ❹ 將金屬薄膜24藉由麼力彎折後貼附於黏著層23上。其中，金屬 薄膜24亦可先貼附於封裝件22後，再將黏著層23附著於金屬薄 膜24之外層及封裝件22上，以固定金屬薄膜24於封装件22上， 如第4圖所示。由於金屬薄膜24之厚度非常薄，其與黏著層23 貼附成形於封裝件22上所增加的厚度(僅約1//m至3〇〇⑽左 右），遠較習知技藝，利用金屬殼體(約〇2mm)之厚度為薄，因此 可大幅降鶴㈣厚度，以達成_則、之設計要求。再者 屬薄膜24可再藉由—表面後處理製程設置—麟(未繪示於 中），鑛材之材質可為不_、鎳、鉻、鈦、祕合金、銅合 娜術如触，目 上 SU .提供封裝件22 ’此封裝件22係設置於-電路基板21 犯：附著-黏著層23至封裝_之外側。 S13:貼附—金屬薄膜24至黏著層23。 遮蔽電性連接金屬_24至電路基板21，以形成1 201041110 請參閱第6圖，其係為本發明之積體電路封装方法之第二步 驟流程圖。其中，積體電路封裝方法包含下列步驟： ， 521 :提供一封裝件22，此封裝件22係設置於一電路基板 上。 土 522 :貼附一金屬薄膜24至封裝件22之外側。 523 ··附著一黏著層之金屬箔膜24外侧及封裝件22。 524 :電性連接金屬_至電路基板上，以形成—電磁波遮蔽 結構。如第7圖所示。 其中上述步驟流程之電路基板Μ可為印刷電路板㈣^ circuit board)，封裝件22可為一基頻晶片（basebandchip)、一射頻 晶片（radio frequency chip)或一數位訊號處理器(Dsp)，包覆於封裝 塑膠中以成型域賴。黏㈣23可為環氧翻旨(epQxy)，金屬^ 膜24可為輔或㈣’细電解方式或賴方式所成型。金屬薄 膜24更可職焊、錄職祕絲财式電錢接於電路基板 2卜以形成-電磁波遮蔽結構。此外，金屬馳24湘模内裝飾 (in-mold decoration，細)或縣吸附方式貼附於黏著層23上將 其^合固定於封裝件上。另外，金屬細24更可進行—表面後處 理製程，此表面後處理製程對金屬薄膜24之表面以物理金屬塗層 2鑛上-層麟，此表面後處謂程可為真空級、真空減鑛、 電鑛或無電鑛法’以增加金屬薄膜24之抗腐姓或抗 綜上騎’本發明㈣電路職結構及方法，其功效在於可 ==屬_黏接於封料上，#金屬_接地或電性連接電 土板時，並可形成-薄片形電磁波遮蔽結構，不但可遮蔽高頻 201041110 電磁波以避免其干擾晶片正常運作 適合日益輕薄短小之電子產品。 ，並可降低整體封裝厚度 以 ，其另一功效在於貼附成型 不會產生對人體有害物質， 本發明積體電路封裝結構及方法 之過程中均為乾式製程(dry process)， 及酸性電解液侵银晶片之問題。 夕所·為舉讎’而料限雛者。任何未脫離本發明 Ο ==對其進行之等效修改或變更，均應包含於後附 之曱晴專利範圍中。 【圖式簡單說明】 第1圖係為習知技藝之抗電磁波干擾晶片封裝結構之示意圖； 第2圖係為本發明之積體電路封震結構一實施例之立體圖； 第3圖係為本發明之積體電路封裝結構-實施例之剖視圖； 第4圖係為本發明之積體電路封袭之另一實施例之立體圖； Ο第5圖係為本發明之積體電路封裝方法之第一步驟流程圖； 第6圖係為本發明之積體電路封襄方法之第二步驟流程圖；及 第7圖係為本發曰月之積體電路封裝結構另—實施例之剖視圖。 【主要元件符號說明】 11 :金屬殼體； 12'22 :封裝件； 13、21 :電路基板； 221 :封裝塑膠； 9 201041110 222 :積體電路晶片； 23 :黏著層； 24 :金屬薄膜；及 S11〜S14 :步驟流程。The metal film is attached to the adhesive layer by an in-film decorative molding method or a differential pressure adsorption bonding method. The metal film is a metal case such as a copper box or a metal film, and the metal film is made by an electrolytic method or a rolling method. Among them, the metal thin film is electrically connected to the circuit substrate by spot welding, laser welding or smashing. Further, the present invention further provides an integrated circuit sealing method comprising the following steps. One hundred, 'providing-packages, which are disposed on a circuit substrate. Next, attach a layer to the outside of the package. Furthermore, the blue-metal film is attached to the adhesive layer. Finally, the metal film is electrically connected to the circuit substrate to form a magnetic wave shielding structure. Among them, the metal _ is attached to the adhesive layer by a decorative method or a pressure difference. The metal film is a shop or a (four), but is not limited thereto. Among them, the 'copper button is made by electrolysis or - square handle. Road 』=The film is made by a little soldering 'Thunder' or a solder ball. 5 201041110 Where 'metal _ is a surface finishing process, this surface finishing process is provided with a plating material on the metal film. Among them, the surface post-treatment process is vacuum evaporation (Vac_evap〇rati (10), vacuum sputtering (Vacuum Sputtering dep〇siti〇n), vacuum ion-plating, electric clock (Electr0piating) or electroless plating (Electr) 〇less plating). The 'plating material is not, nickel, chrome, tantalum, chrome alloy, copper alloy or alloy. According to the invention, the integrated circuit package structure and packaging method can be borrowed. The metal thin film is attached to the package by the adhesive layer, and the metal film is electrically connected to the circuit substrate to form an electromagnetic wave shielding structure, thereby achieving the effect of reducing the package thickness. Further, since the package structure and method of the present invention are The dry process (doing p^ss) can avoid the problem that the conductive liquid required by the electric power source generates harmful substances or damages the package. [Embodiment] Please refer to Fig. 2 and Fig. 3, which are divided into the integrated body of the invention. A perspective view and a ship chart of a circuit package structure and method. The cover circuit, the frequency circuit package structure comprises a circuit substrate 21, a package 22, an adhesive layer 23 and a metal film %. The circuit substrate 21 can be a printed circuit board __ circuk b ard). The package 22 can be packaged with a plastic 22! coated or a plurality of integrated (four) wafer buckles to form a system in chip (SIC) package. The integrated circuit chip 211 33⁄4 ^ (base band chip) > 33⁄4 (radio frequency chip) or a digital signal processor (digital signal processor DSP). The adhesive layer 23 can be implemented by a resin such as an epoxy resin (ep〇xy). The metal film 24 may be a metal foil, a fine electrolytic method or a rolled side made of the type 201041110, and the metal film 24 is attached to the package 22 by the adhesive layer 23. The metal film 24 can be electrically connected to the circuit substrate 21 by spot welding, laser welding or solder ball spot welding to form an electromagnetic wave shielding structure. In addition, the metal film 24 can be an in-mold decoration (IMD), also known as a film ejection method, or a surface mount technology (SMT) method such as differential pressure adsorption bonding, and a metal film 24 After being bent, the force is attached to the adhesive layer 23. The metal film 24 may be attached to the package 22 first, and then the adhesive layer 23 is attached to the outer layer of the metal film 24 and the package 22 to fix the metal film 24 on the package 22, as shown in FIG. Show. Since the thickness of the metal thin film 24 is very thin, it is attached to the adhesive layer 23 to increase the thickness formed on the package 22 (only about 1//m to 3 〇〇 (10) or so), which is far superior to the conventional technique, using a metal shell. The thickness of the body (about 2mm) is thin, so the thickness of the crane (4) can be greatly reduced to achieve the design requirements. In addition, the film 24 can be further set by the surface post-treatment process - Lin (not shown in the middle), the material of the mineral material can be non-, nickel, chromium, titanium, secret alloy, copper alloy, such as touch, SU. Providing a package 22' This package 22 is disposed on the circuit board 21 from the adhesion-adhesion layer 23 to the outside of the package. S13: attaching - the metal film 24 to the adhesive layer 23. The electrical connection metal _24 is shielded to the circuit substrate 21 to form 1 201041110. Referring to FIG. 6, it is a second step flow chart of the integrated circuit packaging method of the present invention. The integrated circuit packaging method includes the following steps: 521: A package 22 is provided, and the package 22 is disposed on a circuit substrate. Soil 522: A metal film 24 is attached to the outside of the package 22. 523 · The outer side of the metal foil film 24 and the package 22 attached to an adhesive layer. 524: Electrically connecting the metal _ to the circuit substrate to form an electromagnetic wave shielding structure. As shown in Figure 7. The circuit board of the above step process may be a printed circuit board (4), and the package 22 may be a baseband chip, a radio frequency chip or a digital signal processor (Dsp). Covered in the package plastic to form the domain. The adhesive (4) 23 can be an epoxy epQxy, and the metal film 24 can be formed by a secondary or (four) 'fine electrolysis method or a lamination method. The metal film 24 is more capable of welding, recording the secret wire, and the money is connected to the circuit board 2 to form an electromagnetic wave shielding structure. In addition, the in-mold decoration (fine) or the county adsorption method is attached to the adhesive layer 23 to fix it to the package. In addition, the metal fine 24 can be further subjected to a surface post-treatment process, the surface post-treatment process is applied to the surface of the metal film 24 by a physical metal coating 2 ore-layered, and the surface can be vacuum grade, vacuum reduced ore, The electric ore-free ore method is used to increase the anti-corrosion name of the metal film 24 or to resist the ride. The circuit structure and method of the invention (four) are effective in that it can be bonded to the sealing material, #metal_grounding. Or electrically connected to the earthboard, and can form a sheet-shaped electromagnetic wave shielding structure, which can not only shield the high-frequency 201041110 electromagnetic wave to avoid the interference with the normal operation of the wafer, and is suitable for increasingly thin and light electronic products. And the overall package thickness can be reduced, and the other effect is that the attachment molding does not produce harmful substances to the human body, and the integrated circuit packaging structure and method of the present invention are both a dry process and an acidic electrolyte. The problem of invading silver chips. In the evening, it is for the sake of the squatting. Any equivalent modifications or changes to the invention that are not deviated from the present invention shall be included in the scope of the patents attached to the following. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic view showing a structure of an anti-electromagnetic interference chip package of the prior art; FIG. 2 is a perspective view showing an embodiment of the integrated circuit sealing structure of the present invention; The integrated circuit package structure of the invention is a cross-sectional view of the embodiment; FIG. 4 is a perspective view of another embodiment of the integrated circuit blockage of the present invention; FIG. 5 is the first embodiment of the integrated circuit package method of the present invention. A first step flow chart; Fig. 6 is a flow chart showing the second step of the integrated circuit sealing method of the present invention; and Fig. 7 is a cross-sectional view showing another embodiment of the integrated circuit package structure of the present invention. [Main component symbol description] 11: metal case; 12'22: package; 13, 21: circuit substrate; 221: package plastic; 9 201041110 222: integrated circuit chip; 23: adhesive layer; 24: metal film; And S11~S14: Step flow.