201039104 六、發明說明： 【發明所屬之技術領域】 本發明係有關於一種用以控制晶片溫度的系統及方法，且 特別係有關於利用動態調整供給於晶片的電壓來控制晶片溫 度的系統與方法。 【先前技術】 隨著科技的進步，人們對於微處理器等晶片之工作速度與 ❹效能的高求愈來愈高，且晶片的電路密度需不斷地增加，因而 功率消耗和晶片溫度控制成為晶片的重要設計因素。過高的工 作溫度可能影響晶片的工作效能，並會影響其運算結果甚至 可能造成晶片的損傷和燒毀。 然而，隨著晶片的工作效能要求與電路複雜度不斷地提 高，晶片溫度控制的困難亦隨之提高。因此，需要一種簡易且 有效的晶片溫度控制機制，以確保晶片的正常工作效能和可靠 度。 ❹ 【發明内容】 因此本發明之-方面係在於提供—種用以控制晶片溫度 的系統及方法，藉以利關單的震㈣來感測晶片的工作溫 度，並有效地實現晶片溫度感測及其動態調控。 根據本發明之實施例，本發明之用以控制晶片溫度的系統 包含至少-溫度感測單元和動態電麼調整控制器。溫度感測單 凡内建於晶片中’其中溫度感測單元包含震盈環計數器及解 :器。震盪環具有震蘆頻率’其中震蘯頻率係反比於晶片的溫 度，計數器電性連接於震盪環，用以記錄震盈頻率，並根據震 3 201039104 盈頻率來產生計算值，解瑪器電 算值來決定供給於晶片的電壓。 於溫度感測單元，用以根據解碼 片的電壓。 性連接於計數器，用以根據計 動態電壓調整控制器電性連接 器的決定來動態調整供给於晶 ，又’根據本發明之實施例’本發明之用以控制晶片溫度的 方法匕含如下步驟.内建溫度感測單元於晶片中，溫度感測單 7C包S震靈環、叶數器及解碼器；利用計數器來記錄震盪環的 震錢率，並根據震盪頻率來產生計算值；根據計算值，利用 〇解碼器來決定供給於晶片的電壓；以及根據解碼器的決定，動 態調整供給於晶片的電壓。 曰因此，本發明之用以控制晶片溫度的系統可簡易地整合於 晶片設計中，以有效地實現晶片溫度感測及其動態調控。且可 即時地監測晶片的溫度’並立即據以進行電壓（及時脈頻率）的 調整，而可大幅地提升晶片的可靠度和良率，並確保晶片具有 最佳的工作效能。 Q 【實施方式】 為讓本發明之上述和其他目的、特徵、優點與實施例能更 明顯易懂，本說明書將特舉出一系列實施例來加以說明。但值 得注意的係，此些實施例只係用以說明本發明之實施方式，而 非用以限定本發明。 請參照第1圖，其繪示依照本發明之一實施例之用以控制 晶片溫度之系統的方塊示意圖。本實施例之用以控制晶片溫度 的系統100包含溫度感測單元U0和動態電壓調整控制器 UO »溫度感測單元11〇係内建於晶片200中，用以感測晶片 200的工作溫度，動態電壓調整控制器12〇係電性連接於溫度 4 201039104 感測單70 110 ’用以根據溫度感測單元110的感測結果來動態 地調整供給於晶片2〇〇的電壓，藉以進行動態溫度管理， 並得到最佳的晶片工作效能。 請參照第2圖’其繪示依照本發明之一實施例之内建有溫 度感測單το之晶片的示意圖。本實施例之晶片2〇〇例如為微處 理器曰日片亦可為系統單晶片（System-on-a-chip，SoC)。當晶 片200例如為系統單晶片時，晶片2〇〇可包含多個電路模組 201、202 ' 203 ’例如數位電路、類比電路、混合訊號或射頻 〇 電路等模組，用以進行不同工作。此時，溫度感測單元11〇可 内建於每一電路模組2〇卜2〇2、2〇3中，用以分別感測晶片2〇〇 之每一電路模組2〇1、202、203的工作溫度。在第2圖中，晶 片200例如具有三個電路模組201、202、203，然不限於此， 在其他實施例中’晶片200可具更少或更多數量的電路模組。 請參照第3圖，其繪示依照本發明之一實施例之溫度感測 單凡的示意圖。本實施例之溫度感測單元11〇可包含震盪環 111、計數器112及解碼器113❶震盪環1U可以係由多個反向 〇 器nia所組成，較佳係奇數個（例如9個）反向器111a所組成。 此些反向器111a可串接成一閉合迴圈的環狀結構，來自動產生 震盪信號fosc，此震盪信號fosc的週期係由震盪環u〗之迴路中 的訊號延遲(Propagation delay)所決定，而訊號延遲係由環境溫 度所決定。因此’震盪環Hi的震盪頻率f〇sc與晶片2〇0的工 作溫度之間具有一線性關係’當晶片2〇〇的工作溫度上升時， 迴路中的訊號延遲情形會增加，因而延長此震盪信號的週期， 亦即震盪環111的震盪頻率下降；反之，當晶片2〇〇的工 作溫度下降時，迴路中的訊號延遲情形會減少，因而縮短此震 盪信號的週期，亦即震盪環111的震盪頻率f()sc下降。因此， 5 201039104 由上述可清楚得知’本實施例之震盪環111的震盪頻率匕^係 反比於晶片200的工作溫度’亦即可利用此震盪環m來進行 晶片200之工作溫度的感測。 在本實施例中，可設定門檻頻率foscL、f0SCH，用以決定晶 片200之工作溫度的高低。當震盪環1U的震盪頻率f。^小於 低門檻頻率f〇scL時，即可代表晶片2〇〇處於一高溫度狀態亦 即其工作溫度較高；當震盈環lu的震蘯頻率。係介於門播 頻率foscL與之間時’即可代表晶片2〇〇處於一標準溫度狀 〇 ‘態’亦即其工作溫度正常；當震盈環lu的震盪頻率U於 间門檻頻率foscH時’即可代表晶片2〇〇處於一低溫度狀態’亦 即其工作溫度較低。201039104 VI. Description of the Invention: The present invention relates to a system and method for controlling the temperature of a wafer, and more particularly to a system and method for controlling the temperature of a wafer by dynamically adjusting the voltage supplied to the wafer. . [Prior Art] With the advancement of technology, people are increasingly demanding the speed and efficiency of wafers such as microprocessors, and the circuit density of the wafers needs to be continuously increased, so that power consumption and wafer temperature control become wafers. Important design factors. Excessive operating temperatures can affect the performance of the wafer and can affect its operation and may even cause damage and burnout of the wafer. However, as wafer operating performance requirements and circuit complexity continue to increase, the difficulty of wafer temperature control increases. Therefore, there is a need for an easy and efficient wafer temperature control mechanism to ensure proper wafer performance and reliability. SUMMARY OF THE INVENTION Accordingly, it is an aspect of the present invention to provide a system and method for controlling the temperature of a wafer, thereby sensing the operating temperature of the wafer by the shock (4) of the gate, and effectively achieving wafer temperature sensing and Its dynamic regulation. In accordance with an embodiment of the present invention, a system for controlling wafer temperature of the present invention includes at least a temperature sensing unit and a dynamic power adjustment controller. The temperature sensing unit is built into the wafer. The temperature sensing unit includes an alarm ring counter and a solution. The oscillating ring has a seismic reed frequency 'where the shock frequency is inversely proportional to the temperature of the wafer, and the counter is electrically connected to the oscillating ring to record the seismic frequency, and the calculated value is generated according to the seismic frequency of the earthquake 3 201039104, and the numerator is calculated. The voltage supplied to the wafer is determined. The temperature sensing unit is configured to be based on the voltage of the decoder. Connected to the counter for dynamically adjusting the supply to the crystal according to the decision of the dynamic voltage adjustment controller electrical connector, and the method for controlling the temperature of the wafer according to the embodiment of the present invention includes the following steps The built-in temperature sensing unit is in the wafer, the temperature sensing single 7C package S shock ring, the leaf counter and the decoder; the counter is used to record the shaking rate of the oscillating ring, and the calculated value is generated according to the oscillating frequency; The calculated value is determined by the 〇 decoder to determine the voltage supplied to the wafer; and the voltage supplied to the wafer is dynamically adjusted according to the decision of the decoder. Therefore, the system for controlling the temperature of the wafer of the present invention can be easily integrated into the wafer design to effectively realize wafer temperature sensing and dynamic regulation thereof. And the temperature of the wafer can be monitored immediately and the voltage (time-frequency frequency) can be adjusted immediately, which can greatly improve the reliability and yield of the wafer and ensure the best performance of the wafer. [Embodiment] The above and other objects, features, advantages and embodiments of the present invention will become more apparent and understood. However, it is to be understood that the embodiments are merely illustrative of the embodiments of the invention and are not intended to limit the invention. Referring to Figure 1, a block diagram of a system for controlling the temperature of a wafer in accordance with one embodiment of the present invention is shown. The system 100 for controlling the temperature of the wafer in this embodiment includes a temperature sensing unit U0 and a dynamic voltage adjustment controller UO. The temperature sensing unit 11 is built in the wafer 200 for sensing the operating temperature of the wafer 200. The dynamic voltage adjustment controller 12 is electrically connected to the temperature 4 201039104. The sensing unit 70 110 ′ is used to dynamically adjust the voltage supplied to the wafer 2 根据 according to the sensing result of the temperature sensing unit 110, thereby performing dynamic temperature. Manage and get the best wafer performance. Referring to Figure 2, there is shown a schematic diagram of a wafer having a temperature sensing sheet τ built in accordance with an embodiment of the present invention. The wafer 2 of the embodiment may be a system-on-a-chip (SoC), for example, a microprocessor. When the wafer 200 is, for example, a system single chip, the chip 2 can include a plurality of circuit modules 201, 202 '203' such as digital circuits, analog circuits, mixed signals, or RF 电路 circuits for different operations. At this time, the temperature sensing unit 11 can be built in each of the circuit modules 2, 2, 2, and 3, for sensing each of the circuit modules 2, 1, 202 of the wafer 2, respectively. , 203 operating temperature. In Fig. 2, the wafer 200 has, for example, three circuit modules 201, 202, 203, but is not limited thereto, and in other embodiments, the wafer 200 may have a smaller or greater number of circuit modules. Referring to Figure 3, there is shown a schematic diagram of temperature sensing in accordance with an embodiment of the present invention. The temperature sensing unit 11A of the present embodiment may include an oscillating ring 111, a counter 112, and a decoder 113. The oscillating ring 1U may be composed of a plurality of reverse nia nia, preferably an odd number (for example, 9). The device 111a is composed of. The inverters 111a can be connected in series to form a closed loop annular structure to automatically generate an oscillating signal fosc. The period of the oscillating signal fosc is determined by the Propagation delay in the loop of the oscillating ring u. The signal delay is determined by the ambient temperature. Therefore, there is a linear relationship between the oscillation frequency f〇sc of the oscillation ring Hi and the operating temperature of the wafer 2〇0. When the operating temperature of the wafer 2〇〇 rises, the signal delay in the loop increases, thereby prolonging the oscillation. The period of the signal, that is, the oscillation frequency of the oscillating ring 111 is decreased; conversely, when the operating temperature of the chip 2 下降 decreases, the signal delay in the loop is reduced, thereby shortening the period of the oscillating signal, that is, the oscillating ring 111 The oscillation frequency f()sc drops. Therefore, it can be clearly seen from the above that the oscillation frequency of the oscillating ring 111 of the present embodiment is inversely proportional to the operating temperature of the wafer 200, and the oscillating ring m can be used to sense the operating temperature of the wafer 200. . In this embodiment, the threshold frequencies foscL, f0SCH can be set to determine the operating temperature of the wafer 200. When the oscillation frequency of the ring 1U is f. ^ Less than the low threshold frequency f 〇 scL, it can represent the wafer 2 〇〇 in a high temperature state, that is, its operating temperature is higher; when the shock ring lu shock frequency. When the system is between the gate frequency foscL and the 'between, it can represent the wafer 2〇〇 in a standard temperature state', that is, its working temperature is normal; when the oscillation frequency U of the seismic ring lu is at the threshold frequency foscH 'It can represent that the wafer 2 is in a low temperature state', that is, its operating temperature is low.
如第3圖所示’在本實施例中，震盪環m可更包括邏輯 閑111b ’例如為NAND邏輯閘，用以接收一重置信號Reset， 藉以使震盪環111無法運作，並同時初始化計數器112的内容。 因此‘邏輯閘111b接收到重置信號Reset，震蘯環111即停 止對於溫度的感測；當重置信號Reset設定為〇時，震盪環lu ζ)即在一預定時間範圍内定時地對晶片溫度進行取樣，以確保晶 片200的溫度受到嚴密監控。因此，可利用此重置信號Res付 來控制此震盪環111以一預設時間週期性地進行晶片2〇〇之工 作溫度的感測，因而本實施例之溫度感測單元11〇可以係週期 性地進行晶片200之工作溫度的感測，以節省能量耗費。且由 於震盪環111的邏輯閘111b的個數較少，相較於現有其他溫度 感測器，震盪環111可具有面積小的優點。此外，震盡環1]U 可谷易地欲設於晶片2〇〇中，亦可動態地移除，因而有良好的 機動性。 如第3圖所示’本實施例之溫度感測單元丨1()的計數器U2 201039104 係電性連接於震簠環m，用以記錄震盤環Ul的震盈頻率， 並根據此震蘯頻率來產生一計算值n。在本實施例中，門檀頻 率W、可分別代表門植計算值把、nH，當計算值η小於 低門檀計算值〜時，即可代表晶片細處於高溫度狀態；當叶 算值η係介於門檻計算值此與nH之間時，即可代表晶片扇 處於標準溫度狀態；當計算值nA於高門檻計算值如時即可 代表晶片200處於低溫度狀態。 如第3圖所示’本實施例之溫度感測單元11〇的解碼器 〇 係電性連接於計數器112,用以根據計數器112的計算值11來 決定供給於晶片200的電壓。在本實施例中，解碼器113的輪 入例如為汁數器112之最先的四位元，而其輸出的三位元(控制 信號d?、d10、du)可決定供給於晶片2〇〇的電壓。當計數器η。 所輸出的計算值η小於門檻計算值nL時，解碼器113所提供的 控制信號d9為1 ’動態電壓調整控制器120即降低所供給於晶 片200的電壓Vdd至一低供給電壓vddl;當計數器m所輸出 的計算值η係介於門檻計算值耻與nH之間時，解碼器所 Ο 提供控制信號dio為1 ’動態電壓調整控制器120即調整或維持 所供給於晶片200的電壓Vdd至一標準供給電壓Vdds;當計數 器112所輸出的計算值η大於門檻計算值nH時，解碼器113所 提供控制信號dl1為1，動態電壓調整控制器120即提高所供給 於晶片200的電壓Vdd至一高供給電壓Vddh。其中，低供給電 壓Vddl約為標準供給電壓Vdds的90%，而高供給電壓Vddh 約為標準供給電壓¥〇加的11〇%。 如第1圖所示，本實施例之動態電壓調整控制器120係電 性連接於溫度感測單元u〇，用以根據解碼器113的決定（控制 心號（^、d10、<!„)來動態調整供給於晶片2〇〇的電壓Vdd，藉 201039104 以控制晶片200的工作溫度。其中，動態電壓調整控制器120 可提供多層級的供給電壓，例如低供給電壓VDDL、標準供給電 壓Vdds、尚供給電壓Vddh 等三個層級。 在本實施例中，當晶片200包含m個電路模組201、202、 203時，每一電路模組201、202、2030内建有溫度感測單元110, 而動態電壓調整控制器120係根據整體控制信號D9、D10、Dn 來調整供給於晶片200的電壓VDD，當動態電壓調整控制器120 接收到控制信號D9為1時，即降低電壓VDD至低供給電壓 〇 VDDL;當動態電壓調整控制器120接收到控制信號D1Q為1時， 即調整或維持電壓VDD至標準供給電壓VDDS;當動態電壓調整 控制器120接收到控制信號Dn為1時，即提高電壓VDD至高 供給電壓VDDH。其中控制信號D9、D1Q、D„可根據下列布林 方程式（1)、（2)及（3): D9=d9，i+ d9,2+…+ d9，m (i) Dii=dii，i . Dn,2 ·…· dii’m (2) Dl〇=D9 · Dll (3)。 因此，由上述方程式（1)、（2)及（3)可得知，當晶片200中 有任一電路模組201、202、203過熱時，D9訊號為1，即降低 電壓VDD至低供給電壓VDDL。當所有電路模組201、202、203 的溫度都偏低時，Du訊號為1，即提高電壓VDD至高供給電壓 VDDH。其他狀況時D1()訊號為1，則電壓VDD可使用標準供給 電壓Vdds。 請參照第4圖，其繪示依照本發明之一實施例之用以控制 晶片溫度之方法的流程圖。當進行本實施例之用以控制晶片溫 度的方法時，首先，内建溫度感測單元110於晶片120中（步驟 301)。接著，利用溫度感測單元110的計數器112來記錄震盪 8 201039104 環111的震盪頻率f〇sc (步驟302)，並根據震盪頻率fQSC來產生 計算值η。接著，根據計算值η，利用解碼器113來決定供給於 晶片120的電壓VDD(步驟303)。接著，根據解碼器113的決定， 動態電壓調整控制器120可動態調整供給於晶片200的電壓 VDD (步驟304)。當晶片200的工作溫度提高時，則震盪環111 的震盪頻率f〇se下降，且計數器112的計算值η減少，若此時 計算值η小於低門檻計算值nL，即代表晶片200處於高溫度狀 態，因而動態電壓調整控制器120可降低電壓VDD至低供給電 〇 壓VDDL，以降低晶片200的溫度，避免晶片200過熱。反之， 當晶片200的工作溫度降低時，則震盪環111的震盪頻率Lc 提高，且計數器112的計算值η增加，若此時計算值η大於高 門檻計算值ηΗ，即代表晶片200處於低溫度狀態，因而動態電 壓調整控制器120可提高電壓VDD至高供給電壓VDDH，以提升 晶片200的執行效能，並確保晶片200可處在最佳的工作狀態。 在一實施例中，此動態電壓調整控制器120亦可動態地調 整供給於晶片200的電壓VDD與時脈頻率fclk，亦即動態電壓 Q 頻率調整（DVFS)，藉以更有效地調控晶片200的溫度和執行效 能。當晶片200處於高溫度狀態時，動態電壓調整控制器120 可動態地調整電壓VDD與時脈頻率fclk至低供給電壓VDDL和低 時脈頻率fcikL，以降低晶片200溫度；當晶片200處於標準溫 度狀態時，動態電壓調整控制器120可調整或維持電壓VDD與 時脈頻率fclk於標準供給電壓VDDS和標準時脈頻率fclks ;當晶 片200處於低溫度狀態時，動態電壓調整控制器120可動態地 調整電壓VDD與時脈頻率fclk至高供給電壓VDDH和高時脈頻率 fclkH，以轉保晶片200的執行效能。 由上述本發明的實施例可知，本發明之用以控制晶片溫度 201039104 的系統及方法可利用簡單的震盪環來感測晶片的工作溫度，並 可根據所感測的工作溫度來動態地調整供給於晶片的電壓（及 時脈頻率），因而本發明之系統可簡易地整合於晶片設計中，有 效地實現晶片溫度感測及其動態調控。且由於溫度感測單元可 内建於晶片的每一核心（電路模組）中，因而可即時地監測晶片 的溫度，並立即據以進行電壓（及時脈頻率）的調整，而可大幅 地提升晶片的可靠度和良率’並可確保晶片具有最佳的工作效 能0 〇 综上所述，雖然本發明已用較佳實施例揭露如上，然其並 非用以限定本發明，本發明所屬技術領域中具有通常知識者， 在不脫離本發明之精神和範圍内’當可作各種之更動與潤饰， 因此本發明之保護範圍當視後附之申請專利範園所界定者為 準。 【圖式簡單說明】 為讓本發明之上述和其他目的、特徵、優點與實施例能更 Q 明顯易懂，所附圖式之詳細說明如下： 第1圖緣示依照本發明之一實施例之用以控制晶片溫度之 系統的方塊示意圖。 第2圖鳍·示依照本發明之一實施例之内建有溫度感測單元 之晶片的示意圖。 第3圖緣示依照本發明之一實施例之溫度感測單元的示意 圖。 . 、 第4圖繪示依照本發明之一實施例之用以控制晶片溫度之 方法的流程圖。 201039104 【主要元件符號說明】 100 :系統 110 :溫度感測單元 111 :震盪環 111a :反向器 111b :邏輯閘 112 :計數器 113 :解碼器 120 :動態電壓調整控制器 200 :晶片 201、202、203 :電路模組 301 :内建溫度感測單元於晶片中 〇 302:記錄震盪環的震盪頻率，並根據震盪頻率來產生計 算值 303 :根據計算值來決定供給於晶片的電壓 304 :動態調整供給於晶片的電壓 ❹ 11As shown in FIG. 3, in the present embodiment, the oscillating ring m can further include a logic idle 111b, such as a NAND logic gate, for receiving a reset signal Reset, so that the oscillating ring 111 cannot be operated, and the counter is initialized at the same time. 112 content. Therefore, the logic gate 111b receives the reset signal Reset, and the shock ring 111 stops sensing the temperature; when the reset signal Reset is set to 〇, the oscillating ring ζ) is the timing of the wafer within a predetermined time range. The temperature is sampled to ensure that the temperature of the wafer 200 is closely monitored. Therefore, the reset signal Res can be used to control the oscillating ring 111 to periodically perform the sensing of the operating temperature of the wafer 2 at a predetermined time. Therefore, the temperature sensing unit 11 of the embodiment can be cycled. Sensing of the operating temperature of the wafer 200 is performed to save energy costs. Moreover, since the number of logic gates 111b of the oscillating ring 111 is small, the oscillating ring 111 can have an advantage of a small area compared to other existing temperature sensors. In addition, the shock ring 1]U can be easily placed in the wafer 2, and can be removed dynamically, so that it has good maneuverability. As shown in FIG. 3, the counter U2 201039104 of the temperature sensing unit 丨1() of the present embodiment is electrically connected to the shock ring m for recording the shock frequency of the shock disk ring U1, and according to the shock The frequency produces a calculated value n. In this embodiment, the gate sand frequency W, which can respectively represent the calculated value of the door implant, nH, when the calculated value η is less than the low threshold value, can represent that the wafer is in a high temperature state; when the leaf value is η When the threshold value is between nH and HH, it means that the wafer fan is in the standard temperature state; when the calculated value nA is at the high threshold, the wafer 200 is in a low temperature state. As shown in Fig. 3, the decoder of the temperature sensing unit 11A of the present embodiment is electrically connected to the counter 112 for determining the voltage supplied to the wafer 200 based on the calculated value 11 of the counter 112. In the present embodiment, the rounding of the decoder 113 is, for example, the first four bits of the juice counter 112, and the output of the three bits (control signals d?, d10, du) can be determined to be supplied to the wafer 2〇. The voltage of 〇. When the counter η. When the calculated value η is less than the threshold value nL, the control signal d9 provided by the decoder 113 is 1'. The dynamic voltage adjustment controller 120 reduces the voltage Vdd supplied to the wafer 200 to a low supply voltage vddl; When the calculated value η output by m is between the threshold value and the value of nH, the decoder provides the control signal dio to 1'. The dynamic voltage adjustment controller 120 adjusts or maintains the voltage Vdd supplied to the wafer 200 to a standard supply voltage Vdds; when the calculated value η output by the counter 112 is greater than the threshold calculation value nH, the control signal dl1 provided by the decoder 113 is 1, and the dynamic voltage adjustment controller 120 increases the voltage Vdd supplied to the wafer 200 to A high supply voltage Vddh. Here, the low supply voltage Vddl is about 90% of the standard supply voltage Vdds, and the high supply voltage Vddh is about 11% of the standard supply voltage. As shown in FIG. 1, the dynamic voltage adjustment controller 120 of the present embodiment is electrically connected to the temperature sensing unit u 〇 for determining according to the decoder 113 (control heart number (^, d10, <!„ To dynamically adjust the voltage Vdd supplied to the wafer 2, by 201039104 to control the operating temperature of the wafer 200. The dynamic voltage adjustment controller 120 can provide a multi-level supply voltage, such as a low supply voltage VDDL, a standard supply voltage Vdds In the present embodiment, when the chip 200 includes m circuit modules 201, 202, and 203, each of the circuit modules 201, 202, and 2030 has a temperature sensing unit 110 built therein. The dynamic voltage adjustment controller 120 adjusts the voltage VDD supplied to the wafer 200 according to the overall control signals D9, D10, Dn. When the dynamic voltage adjustment controller 120 receives the control signal D9 of 1, the voltage VDD is lowered to a low level. The supply voltage 〇VDDL; when the dynamic voltage adjustment controller 120 receives the control signal D1Q is 1, the voltage VDD is adjusted or maintained to the standard supply voltage VDDS; when the dynamic voltage adjustment controller 120 receives the control signal Dn When it is 1, it raises the voltage VDD to the high supply voltage VDDH. The control signals D9, D1Q, D„ can be based on the following Boolean equations (1), (2) and (3): D9=d9, i+ d9, 2+... + d9,m (i) Dii=dii,i . Dn,2 ·...· dii'm (2) Dl〇=D9 · Dll (3) Therefore, by the above equations (1), (2) and (3) It can be seen that when any of the circuit modules 201, 202, 203 in the chip 200 is overheated, the D9 signal is 1, that is, the voltage VDD is lowered to the low supply voltage VDDL. When the temperature of all the circuit modules 201, 202, 203 When both are low, the Du signal is 1, that is, the voltage VDD is raised to the high supply voltage VDDH. In other cases, the D1 () signal is 1, the voltage supply VDD can use the standard supply voltage Vdds. Please refer to Figure 4, which is shown in accordance with this A flowchart of a method for controlling the temperature of a wafer in one embodiment of the invention. When the method for controlling the temperature of a wafer of the present embodiment is performed, first, the temperature sensing unit 110 is built in the wafer 120 (step 301). Next, the counter 112 of the temperature sensing unit 110 is used to record the oscillation frequency f〇sc of the oscillation of the ring 10 201039104 (step 302), and according to the oscillation The rate fQSC is used to generate the calculated value η. Then, based on the calculated value η, the voltage VDD supplied to the wafer 120 is determined by the decoder 113 (step 303). Then, according to the decision of the decoder 113, the dynamic voltage adjustment controller 120 can be dynamic. The voltage VDD supplied to the wafer 200 is adjusted (step 304). When the operating temperature of the wafer 200 is increased, the oscillation frequency f〇se of the oscillating ring 111 is decreased, and the calculated value η of the counter 112 is decreased. If the calculated value η is less than the low threshold calculated value nL, the wafer 200 is at a high temperature. State, and thus dynamic voltage regulation controller 120 can reduce voltage VDD to low supply voltage VDDL to reduce the temperature of wafer 200 and avoid overheating of wafer 200. On the contrary, when the operating temperature of the wafer 200 decreases, the oscillation frequency Lc of the oscillation ring 111 increases, and the calculated value η of the counter 112 increases. If the calculated value η is greater than the high threshold calculated value ηΗ, the wafer 200 is at a low temperature. The state, and thus the dynamic voltage adjustment controller 120, can increase the voltage VDD to the high supply voltage VDDH to enhance the performance of the wafer 200 and ensure that the wafer 200 can be in an optimal operating state. In an embodiment, the dynamic voltage adjustment controller 120 can also dynamically adjust the voltage VDD and the clock frequency fclk supplied to the wafer 200, that is, the dynamic voltage Q frequency adjustment (DVFS), thereby more effectively regulating the wafer 200. Temperature and performance. When the wafer 200 is in a high temperature state, the dynamic voltage adjustment controller 120 can dynamically adjust the voltage VDD and the clock frequency fclk to the low supply voltage VDDL and the low clock frequency fcikL to lower the temperature of the wafer 200; when the wafer 200 is at the standard temperature In the state, the dynamic voltage adjustment controller 120 can adjust or maintain the voltage VDD and the clock frequency fclk to the standard supply voltage VDDS and the standard clock frequency fclks; when the wafer 200 is in the low temperature state, the dynamic voltage adjustment controller 120 can dynamically adjust The voltage VDD and the clock frequency fclk are supplied to the high supply voltage VDDH and the high clock frequency fclkH to transfer the performance of the wafer 200. It can be seen from the above embodiments of the present invention that the system and method for controlling the wafer temperature 201039104 of the present invention can sense the operating temperature of the wafer by using a simple oscillating ring, and can dynamically adjust the supply according to the sensed operating temperature. The voltage of the wafer (time-frequency), so that the system of the present invention can be easily integrated into the wafer design, effectively achieving wafer temperature sensing and dynamic regulation. Moreover, since the temperature sensing unit can be built in each core (circuit module) of the wafer, the temperature of the wafer can be monitored immediately, and the voltage (time-frequency frequency) can be adjusted immediately, which can be greatly improved. The reliability and yield of the wafer 'can be used to ensure the best working efficiency of the wafer. </ RTI> Although the present invention has been disclosed in the preferred embodiments as above, it is not intended to limit the present invention, and the technical field to which the present invention pertains. Those skilled in the art will be able to make various changes and modifications without departing from the spirit and scope of the invention, and the scope of the present invention is defined by the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS The above and other objects, features, advantages and embodiments of the present invention will become more <RTIgt; A block diagram of a system for controlling the temperature of a wafer. Fig. 2 is a schematic view showing a wafer in which a temperature sensing unit is built in accordance with an embodiment of the present invention. Figure 3 is a schematic view of a temperature sensing unit in accordance with an embodiment of the present invention. Figure 4 is a flow chart showing a method for controlling the temperature of a wafer in accordance with an embodiment of the present invention. 201039104 [Description of main component symbols] 100: System 110: Temperature sensing unit 111: Oscillation ring 111a: Inverter 111b: Logic gate 112: Counter 113: Decoder 120: Dynamic voltage adjustment controller 200: Wafers 201, 202, 203: The circuit module 301: the built-in temperature sensing unit is in the wafer 302: records the oscillation frequency of the oscillation ring, and generates a calculated value 303 according to the oscillation frequency: determining the voltage 304 supplied to the wafer according to the calculated value: dynamic adjustment Voltage supplied to the wafer ❹ 11