KR20180112771A - System and method for controlling operating voltage - Google Patents

Abstract

A control system (100) for controlling the operating voltage of an electronic device is presented. The electronic device is provided with a timing event detector responsive to timing events (such as errors) associated with the operation of the electronic device. The control system decreasing the operating voltage when the rate of timing events is below the target level to find a threshold voltage that is the minimum operating voltage at which the rate of timing events is substantially at the target level and that the rate of timing events exceeds the target level And a controller (101) for increasing the operating voltage. The control system includes a controllable clock signal generator (102) for generating a clock signal for operating the electronic device such that the clock frequency follows an increasing function of the operating voltage. Thus, a voltage-frequency operating point where energy consumption is minimized can be found.

Description

System and method for controlling operating voltage

The present invention generally relates to controlling the energy consumption of electronic devices, such as, for example, a digital processor circuit (but not necessarily a digital processor circuit). More particularly, the present invention relates to a method and system for controlling an operating voltage supplied to an electronic device. The present invention also relates to a computer program for controlling an operating voltage supplied to an electronic apparatus.

In many cases, the energy consumption of electronic devices such as digital processor circuits is an important issue. For example, technologies such as Internet-of-Things (IOT), Industrial Internet (II) and Internet-of-Everything (IoE) are at the threshold of massive innovation and the main reason for innovation is ubiquitous wireless processing nodes. However, the energy consumption of a bit transmission across a given distance is not as beneficial as digital processing within a wireless node in accordance with Moore's Law. Therefore, the energy cost of wireless transmission will increase proportionally compared to digital processing. Therefore, in order to increase energy efficiency, it is necessary to increase the internal throughput of nodes to minimize the wireless transmission of data. So processors and digital signal processing (DSP) will be one of the most important parts to be optimized, even if they are not the most important part to be optimized. This will become more complicated as the functions of wireless nodes such as machine learning, video, etc. increase.

For example, in a conventional CMOS (Complementary Metal Oxide Semiconductor) design, the operating voltage, i.e., the power supply voltage VDD, is typically greater than 1 volt. The energy consumption indicated by the power consumption is substantially quadratically dependent on the operating voltage VDD. That is, the power consumption is substantially proportional to VDD ² . Thus, there is a strong need to reduce the operating voltage (VDD) in a wide range of applications, from energy limited systems (e.g., Internet-of-things (IoT)) to systems with limited heat There is motivation. There is a lower limit for the operating voltage (VDD) due to: a) functional limitations of technologies such as, for example, CMOS technology; and b) performance limitations such as, for example, restrictions on operating speed. By operating slightly below the lower limit of the operating voltage (VDD) or close to the threshold voltage (NTV), the digital design is robust, energy efficient and has excellent performance. Therefore, more and more researchers and companies are building digital NTV designs. In some cases, and especially with central processing (CPU), the operating voltage is often referred to as the core voltage.

NTV's potential market is in the near future electronics for applications such as IoT and wireless wellness and healthcare mentioned above. Growth in the healthcare industry is expected to be one of the key drivers, and is expected to have a positive impact on embedded system demand. This may be due to the large number of embedded systems used in medical devices, such as blood glucose monitors.

Ideally, the electronic system will be able to scaling down its operation from its nominal operating voltage to NTV. However, lowering the operating voltage below the threshold voltage can significantly degrade performance and can actually cause malfunctions. Therefore, in order to operate in NTV, a method of identifying where the threshold voltage is located is needed. This method is advantageously dynamic because, for example, the threshold voltage of CMOS devices changes to both local variations and global variations (e.g., temperature). Further, in recent CMOS, a body bias is used to intentionally move the threshold voltage. In a known technical solution for reducing energy consumption, the operating voltage VDD is determined with the aid of a look-up table that provides a value of the operating voltage as a function of operating parameters, for example, throughput requirements and / or temperature. However, the look-up table is finalized at the design stage of the electronic system, and therefore the look-up table should include a safety margin to overcome dynamic changes and post design variables. This safety margin results in energy loss at runtime.

Technological solutions that can be used in conjunction with energy consumption optimization and / or optimization of energy consumption are described, for example, in the following publications: US 8924902, US 8237477 and US 8072796.

The following presents a simplified summary in order to provide a basic understanding of some aspects of various embodiments of the invention. This summary is not an extensive overview of the invention. This Summary is neither intended to identify key or critical elements of the invention nor to delineate the scope of the invention. The following summary merely presents some concepts in a simplified form as a prelude to the detailed description illustrating embodiments of the invention.

In accordance with the present invention, a new control system is provided for controlling an operating voltage (VDD) supplied to an electronic device (e.g., a digital processor circuit). The electronic device is provided with a timing event detector responsive to timing events associated with the operation of the electronic device. The timing events may be responsive to, for example, errors associated with the operation of the electronic device and / or responsive to signals for dynamic operation of the device (such as time-borrowing signals) And / or may respond to any other signals or events that directly or indirectly indicate the quality, performance, or other appropriate characteristics or characteristics of the operation of the electronic device.

A control system according to the present invention includes:

Decreasing the operating voltage if the rate of timing events is less than the target level, to determine the rate of timing events and to find a threshold voltage which is the minimum value of the operating voltage at which the rate of timing events is substantially at the target level, A controller that increases the operating voltage when the rate of the target voltage exceeds a target level; And

- a controllable clock signal generator for generating a clock signal for operating said electronic device, wherein said clock frequency ( _Fclk ) indicative of the pulse rate of said clock signal is at least one of said timing when said operating voltage is greater than said threshold voltage Wherein the rate of the timing events exceeds the target level when the rate of events is substantially at the target level and the operating voltage is below the threshold voltage.

In this document, the term "increasing function" means a function whose derivative coefficient is positive (e.g., dF _clk / dVDD> 0). That is, the clock frequency decreases when the operating voltage decreases and increases when the operating voltage increases. The rate of the above-mentioned timing events may, but need not, be, for example, the rate of errors associated with the operation of the electronic device.

It is possible to find a voltage-frequency operating point where the energy consumption of the electronic device is minimized since the above-mentioned clock frequency _Fclk changes with the operating voltage VDD when searching for the above-mentioned threshold voltage, The timing event rate is maintained at an acceptable level so that performance does not degrade. Advantageously, the control system is configured to operate during operation of the electronic device to dynamically adapt the operating voltage (VDD) and clock frequency ( _Fclk ) to changes in operating conditions (e.g., temperature).

According to the present invention, there is also provided a new electronic system comprising:

An electronic device having a timing event detector responsive to timing events associated with operation of the electronic device; And

A control system according to the invention for controlling the operating voltage supplied to the electronic equipment.

The electronic device may further include error-correcting and / or error prevention logic responsive to errors associated with the operation of the electronic device for repairing errors associated with operation of the electronic device.

According to the present invention, there is also provided a new method for controlling an operating voltage supplied to an electronic device provided with a timing event detector responsive to timing events associated with operation of the electronic device. The method according to the present invention comprises:

Determining a rate of timing events; And

Decreasing the operating voltage if the rate of timing events is below the target level to find a threshold voltage which is the minimum value of the operating voltage at which the rate of timing events is substantially at the target level and if the rate of timing events exceeds the target level Increasing the operating voltage.

In the method according to the invention, the clock frequency indicative of the pulse rate of the clock signal operating the electronic device is dependent on the increasing function of the operating voltage, whereby when the operating voltage is greater than the threshold voltage, The rate is substantially at the target level and the rate of the timing events exceeds the target level when the operating voltage is below the threshold voltage.

According to the present invention, there is also provided a new computer program for controlling an operating voltage supplied to an electronic device provided with a timing event detector responsive to timing events associated with operation of the electronic device. A computer program according to the present invention includes computer executable instructions for controlling a programmable processing system to:

- determining the rate of timing events;

Decreasing the operating voltage if the rate of timing events is below the target level to find a threshold voltage which is the minimum value of the operating voltage at which the rate of timing events is substantially at the target level and if the rate of timing events exceeds the target level Increasing the operating voltage; And

- controlling a controllable clock signal generator to generate a clock signal for operating the electronic device, the clock frequency being in accordance with an increasing function of the operating voltage, whereby when the operating voltage is greater than the threshold voltage, Wherein the rate of events is substantially at the target level and the rate of timing events exceeds the target level when the operating voltage is below the threshold voltage.

According to the present invention, a new computer program product is also provided. The computer program product includes a non-volatile computer readable medium (e.g., a compact disc (CD)) encoded with a computer program according to the present invention.

According to the present invention, there is also provided a new signal carrying information defining a computer program according to an embodiment of the present invention. The signal may be received, for example, from a communications network, for example from a cloud service.

Numerous exemplary and non-limiting embodiments of the present invention are described in the appended dependent claims.

Various illustrative and non-limiting embodiments of the present invention, both as to organization and method of operation, together with additional objects and advantages of the present invention, will be readily apparent when the following description of specific embodiments is read in conjunction with the accompanying drawings, It will be best understood.

The phrases "to comprise" and "to include" are used as open limitations, not excluding or requiring the presence of features not cited in this document.

The features recited in the appended dependent claims may be freely mutually coupled unless otherwise specified. It should also be understood that the use of the singular forms throughout this specification does not exclude a plurality.

BRIEF DESCRIPTION OF THE DRAWINGS Exemplary and non-limiting embodiments of the invention and their advantages are described in more detail below with reference to the accompanying drawings.
Figure 1 shows a functional block diagram of an electronic system including a control system according to exemplary, non-limiting embodiments of the present invention for controlling the operating voltage of an electronic system.
Fig. 2 shows the operation of the control system shown in Fig.
Figure 3 shows a functional block diagram of an electronic system including a control system according to another exemplary, non-limiting embodiment of the present invention for controlling the operating voltage of an electronic system.
Fig. 4 shows the operation of the control system shown in Fig.
Figure 5 shows a flow diagram of a method according to an exemplary, non-limiting embodiment of the present invention for controlling the operating voltage of an electronic device.
Figure 6 illustrates an implementation of a portion of an exemplary test system to demonstrate the utility of an exemplary, non-limiting embodiment of the present invention.

The specific examples provided in the following description should not be construed as limiting the scope and / or applicability of the appended claims. The groups and lists of examples provided in the following description are not exhaustive unless explicitly stated.

Figure 1 shows a functional block diagram of an electronic system according to an exemplary, non-limiting embodiment of the present invention. The electrical system includes an electronic device 103, which may be, for example, a digital processor circuit. The electronic device 103 is provided with a timing event detector responsive to timing events (e.g., errors) associated with the operation of the electronic device. The electronic device 103 generates a timing event signal 107 that includes pulses corresponding to timing events associated with the operation of the electronic device. For example, each pulse in the timing event signal 107 may, but need not, correspond to, for example, one error in the operation of the electronic device 103. In addition to the timing event detector, the electronic device 103 may further include error-correction and / or error prevention logic in response to an error to repair the error. Exemplary electronic devices provided with a timing event detector of the kind described above and error-correcting and / or error prevention logic can be found, for example, in published specification US 20070288798.

The electronic system includes a control system (100) for controlling the operating voltage (VDD) supplied to the electronic device (103). The control system 100 is configured to generate a voltage control signal 104 for controlling a voltage regulator 108. [ The voltage regulator 108 is configured to convert the voltage of the energy source 109 to a DC "DC" voltage having a value that depends on the voltage control signal 104. [ The voltage regulator 108 may be, for example, a switched mode DC-DC converter or an AC-DC converter. The energy source 109 may be, for example, a battery, a fuel cell, a power grid supplying an alternating voltage, or an energy harvesting source.

The control system 100 includes a controllable clock signal generator 102 for generating a clock signal 106 for operating the electronic device 103. The control system 100 further includes a controller 101 for determining a rate of timing events (e.g., errors) associated with the operation of the electronic device 103. [ The rate of timing events can be determined, for example, with the aid of two counters, such that one of the counters counts the pulses of the clock signal 106 and the other of the counts counts the pulses of the timing event signal 107 have. The rate of timing events may be defined, for example, as the ratio of the number of pulses of the timing event signal 107 counted during the appropriate sample period to the number of pulses of the clock signal 106. [ The controller 101 is configured to decrease the operating voltage VDD if the rate of timing events is below a predetermined target level and when the rate of timing events exceeds the target level, , The rate of timing events is configured to search for a threshold voltage (Vth) which is the minimum value of the operating voltage substantially at the target level. The target level may be, for example, 0.1%. That is, the pulse rate of the timing event signal 107 is 1000 times smaller than the pulse rate of the clock signal 106.

A controllable clock signal generator 102 is configured to generate a clock signal 106 wherein the clock frequency F _clk indicative of the pulse rate of the clock signal 106 is _{dependent on} an increasing function of the operating voltage VDD, The rate of timing events is substantially at the target level when the operating voltage is greater than the threshold voltage (Vth), and the rate of timing events exceeds the target level when the operating voltage is below the threshold voltage.

Figure 2 shows an exemplary case where detected timing events are errors related to the operation of the electronic device 103. [ Thus, in Figure 2, the rate of detected timing events is the rate of errors. In Figure 2, the error rate as a function of the operating voltage VDD is shown as curve 221 and the clock frequency Fclk as a function of the above-mentioned increase in operating voltage VDD is shown as curve 223. In curve 223, the clock frequency _Fclk may be substantially in accordance with the following equation (1) when the operating voltage VDD is sufficiently greater than the threshold voltage Vth:

, (1)

, (One)

Where K is the delay-fitting parameter, Cg is the output capacitance of the characteristic inverter associated with the transistor technology of the electronic device, and [alpha] _v is the velocity saturation index between 1 and 2. [ Curve 223 may be approximated, for example, by an appropriate polynomial function of VDD.

2, when the operating voltage VDD is greater than the threshold voltage Vth and the clock frequency _Fclk follows the curve 223, the error rate shown by curve 221 is substantially equal to the target It is in the level. When the operating voltage VDD decreases below the threshold voltage Vth and the clock frequency _Fclk follows the curve 223, the error rate increases sharply. In Figure 2, a curve 224 shows how the clock frequency ( _Fclk ) should be reduced when the operating voltage (VDD) drops below the threshold voltage (Vth) to keep the error rate at the target level. In curve 224 the clock frequency _Fclk can be substantially in accordance with the following equation (2) when the operating voltage VDD is less than or equal to the threshold voltage Vth:

, (2)

, (2)

Where I _o is the ON current of the characteristic inverter associated with the transistor technology of the electronic device, n is the sub-threshold swing coefficient, and U _T is the thermodynamic voltage. More detailed information on the above-mentioned equations can be found, for example, in Wang A., Calhoun B., and Chandrakasan A, Sub-threshold Design for Ultra Low-Power Systems, Springer,

2, when the operating voltage VDD is greater than the threshold voltage Vth, the curves 223 and 224 coincide, and when the operating voltage VDD is below the threshold voltage Vth, 223 and 224 are apart from each other. The curve 222 shown in FIG. 2 shows the average energy consumption per operation of the electronic device 103. The operation may be, for example, an arithmetic-logic operation, writing to a register, or edition from a register. As shown by the curve 222, when the operating voltage VDD is high or when the operating voltage VDD is low, the energy per operation is high. A high operating voltage causes a high energy consumption per operation because the current for charging and discharging the internal capacitance of the electronic device 103 increases with the operating voltage while a low operating voltage causes the semiconductor switches of the electronic device 103 Resulting in high energy consumption per operation.

As can be seen in FIG. 2, the minimum value of energy per operation is located near the threshold voltage Vth. In conjunction with many types of electronic devices (e.g., CMOS circuits), the minimum value of energy per operation is located near the threshold voltage, and when the operating voltage is reduced below the threshold voltage and the clock frequency is raised convexly below the operating voltage When you follow the function, you find that the error rate starts to increase sharply. The term "downward convex function" means that the graph of the function is at each point under consideration on the tangent of the graph. Thus, the energy consumption of the electronic device 103 can be optimized by controlling the operation voltage VDD to a threshold voltage Vth or slightly above (e.g., 1-10%).

In a control system according to an exemplary, non-limiting embodiment of the present invention, a controllable clock signal generator 102 is programmed such that the clock frequency _Fclk operates in a desired manner when the operating voltage VDD changes, Is configured to generate the clock signal (106) such that the clock signal (F _clk ) follows a desired increasing function of the operating voltage (VDD). The controllable clock signal generator 102 may include a voltage-controlled-oscillator (VCO) responsive to the operating voltage VDD, for example, according to a desired increasing function of the operating voltage VDD.

In some cases, however, it may be necessary to tune the clock signal generator 102, which is controllable to generate the clock signal 106 so that the clock frequency _Fclk will operate in a desired manner when the operating voltage VDD changes . In the control system according to the exemplary and non-limiting embodiment of the present invention, the controller 101 sets an initial value V_ini that is greater than the threshold voltage Vth before the threshold voltage Vth is searched It s so as to have further configured to set, and the timing event (e.g., errors) in consists rate is to control the target level lower than when the clock frequency (F _clk) the controllable clock signal generator 102 to increase, and reducing the clock frequency (F _clk) when the rate of the initial value of the timing event to find (F_ini) of the clock frequency (F _clk) corresponding to the initial value (V_ini) of the operating voltage (VDD) exceeds the target level . The controller 101 controls the clock signal generator 102, which is controllable to operate in accordance with the increasing function shown in curve 223, in a manner that the controllable clock signal generator 102 is based on the initial values (V_ini and F_ini) . In Figure 1, the tuning of the controllable clock signal generator 102 is shown by the dashed arrow 110. The tuning may be to set the input bias voltage of the VCO to be, for example, F _clk = F_ini when VDD = V_ini.

Figure 3 shows a functional block diagram of an electronic system according to an exemplary, non-limiting embodiment of the present invention. The electrical system includes an electronic device 303 provided with a timing event detector responsive to timing events (e.g., errors) associated with the operation of the electronic device. The electronic device 303 generates a timing event signal 307 that includes pulses corresponding to timing events associated with the operation of the electronic device. In addition to the timing event detector, the electronic device 303 may further include error-recovery and / or error prevention logic in response to errors to correct errors associated with operation of the electronic device. The electronic system includes a control system (300) for controlling the operating voltage (VDD) supplied to the electronic device (303). The control system 300 is configured to generate a voltage control signal 304 for controlling the voltage regulator 308.

The control system 300 includes a controllable clock signal generator 302 for generating a clock signal 306 to operate the electronic device 303. [ The control system 300 further includes a controller 301 for determining the rate of timing events (e.g., errors) associated with the operation of the electronic device 303. [ The controller 301 is configured to decrease the operating voltage VDD if the rate of timing events is below a target level and to increase the operating voltage VDD when the rate of timing events exceeds a target level, And finds a threshold voltage Vth whose rate of timing events is the minimum value of the operating voltage VDD at the target level.

The controller 301 is configured to generate a frequency control 305 signal to control the clock signal generator 302. The clock signal generator 302 is controlled to generate a clock signal 306 such that the clock frequency _Fclk follows an increasing function of the operating voltage VDD so that the rate of timing events is such that the operating voltage is equal to the threshold voltage Vth, The rate of timing events exceeds the target level when the operating voltage is below the threshold voltage.

Figure 4 shows an exemplary case where detected timing events are errors related to the operation of the electronic device 303. [ Thus, in Figure 4, the rate of detected timing events is the rate of errors. In Figure 4, the rate of errors as a function of the operating voltage VDD is shown by curve 421 and the clock frequency F _{clk is} shown by curve 423. In curve 423, the clock frequency _Fclk may be substantially in accordance with equation (1) presented above when the operating voltage VDD is sufficiently greater than the threshold voltage Vth. Curve 423 may be approximated, for example, by an appropriate polynomial function of VDD.

4, the rate of errors illustrated by curve 421 is such that when the operating voltage VDD is greater than the threshold voltage Vth and the clock frequency _Fclk follows the curve 423, It is at the target level. The error rate increases sharply as the operating voltage VDD decreases below the threshold voltage Vth and the clock frequency _Fclk follows the curve 423. In Figure 4, curve 424 shows how the clock frequency _Fclk should be reduced when the operating voltage VDD decreases below the threshold voltage Vth to maintain the error rate at the target level. In curve 424, the clock frequency _Fclk may be substantially in accordance with equation (2) presented above when the operating voltage VDD is not greater than the threshold voltage Vth. Curve 422 shown in Fig. 4 shows the average energy consumption per operation of the electronic device 303. Fig. 4, the energy consumption of the electronic device 303 can be optimized by controlling the operation voltage VDD to the threshold voltage Vth or slightly higher than the threshold voltage Vth (1-10%) .

In the exemplary control system 300 shown in FIG. 3, the controller 301 determines the fitting voltage values V_ft1, V_ft2, and V_ft2, in which the operating voltage VDD is greater than the threshold voltage Vth before finding the threshold voltage Vth. And V_ft3, respectively. Controller 301 increases the clock frequency when the error rate is less than the target value when the operating voltage has each of the fitting voltage values and decreases the clock frequency when the error rate exceeds the target level (F_ft1, F_ft2, and F_ft3) corresponding to the fitting voltage values (V_ft1, V_ft2, and V_ft3) shown in FIG. The controller 301 may be configured to determine one or more setting parameters associated with control of the clock frequency based on the fitting voltage and fitting frequency values to set the clock frequency to follow an increasing function of the operating voltage VDD , Whereby the error rate follows curve 421. The controller 301 includes a digital signal processor (DSP) configured to control the clock signal generator 302 with the help of the above-described setting parameters such that the clock frequency changes in a desired manner, for example when the operating voltage VDD changes can do.

Figure 5 is a flow diagram of a method according to an exemplary, non-limiting embodiment of the present invention for controlling an operating voltage (VDD) supplied to an electronic device having a timing event detector responsive to timing events associated with operation of the electronic device / RTI > The method includes:

- action 501: determining the rate of timing events, and

Actions 502 and 503: decreasing the operating voltage (VDD) if the rate of timing events is below the target level, and increasing the operating voltage when the rate of timing events exceeds the target level, Find the threshold voltage (Vth), which is the minimum value of the operating voltage at the level.

In the method shown in Figure 5, the clock frequency ( _Fclk ), which indicates the pulse rate of the clock signal operating the electronic device, is such that the rate of the timing events when the operating voltage is above the threshold voltage is substantially equal to the target level (VDD) of the operating voltage so that the rate of the timing events exceeds the target level when the operating voltage is below the threshold voltage.

In a method according to an exemplary, non-limiting embodiment of the present invention, a clock signal is generated using a controllable clock signal generator comprising a voltage controlled oscillator responsive to the operating voltage in accordance with an increasing function of the operating voltage.

A method according to an exemplary, non-limiting embodiment of the present invention includes generating a voltage control signal for controlling the voltage regulator to generate the operating voltage and a controllable clock signal for generating the clock frequency in accordance with an increasing function of the operating voltage. And generating a frequency control signal for controlling the generator.

A method according to an exemplary, non-limiting embodiment of the present invention includes:

- setting the operating voltage to have an initial value greater than the threshold voltage, before finding the threshold voltage;

Increasing the clock frequency when the rate of the timing events is below the target level, and when the rate of the timing events exceeds the target level to find an initial value of the clock frequency corresponding to an initial value of the operating voltage Decreasing the clock frequency; And

- tuning a clock signal generator controllable to operate in accordance with an increasing function of the operating voltage, based on the operating voltage and the initial values of the clock frequency.

A method according to an exemplary, non-limiting embodiment of the present invention includes:

- setting the operating voltage to have successively each fitting voltage value greater than the threshold voltage, before finding the threshold voltage;

Increasing the clock frequency when the rate of the timing events is less than the target level and comparing the rate of the timing events when the operating voltage has a respective fitting voltage value, Decreasing the clock frequency when the target frequency exceeds the target level; And

- determining one or more setting parameters relating to the control of the clock frequency, based on the fitting voltage values and the fitting frequency values, and setting the clock frequency to follow an increasing function of the operating voltage.

In a method according to an exemplary, non-limiting embodiment of the present invention, the increasing function of the operating voltage is a convex increasing function below the operating voltage. For example, the increase function of the operating voltage may substantially follow the following equation when the operating voltage VDD is sufficiently greater than the threshold voltage Vth:

Here, F _clk is a clock frequency, K is the delay-and fittings (delay-fitting) is a parameter, C _g is the output capacitance of the characteristic inverter associated with transistor technology of the electronic device, Vth is a threshold voltage, and αv 1 2 < / RTI >

In a method according to an exemplary, non-limiting embodiment of the present invention, the determination of the rate of timing events includes:

Receiving a timing event signal comprising pulses corresponding to timing events associated with operation of the electronic device;

- receiving said clock signal; And

Calculating the rate of timing events based on the amount of pulses of the timing event signal occurring during the sample period and the amount of pulses of the clock signal occurring during the same sample period.

A computer program according to an exemplary, non-limiting embodiment of the present invention includes computer executable instructions for controlling a programmable processing system to perform operations related to a method according to any of the above described exemplary embodiments of the present invention .

A computer program according to an exemplary, non-limiting embodiment of the present invention includes software modules for controlling an operating voltage supplied to an electronic device having a timing event detector responsive to timing events associated with operation of the electronic device. Software modules are programmable processing systems that:

- determining the rate of timing events;

Decreasing the operating voltage if the rate of timing events is below the target level to find a threshold voltage which is the minimum value of the operating voltage at which the rate of timing events is substantially at the target level and if the rate of timing events exceeds the target level Increasing the operating voltage; And

Controlling a controllable clock signal generator to generate a clock signal for operating the electronic device such that a clock frequency indicative of a pulse rate of the clock signal is in accordance with an increasing function of the operating voltage, A computer execution for controlling the computer to perform the operation of causing the rate of the timing events to be substantially at the target level and the rate of the timing events to exceed the target level when the operating voltage is below the threshold voltage Possible commands include.

The software modules described above may be, for example, subroutines or functions implemented in a suitable programming language and in a compiler suitable for the programming language and programmable processing system considered. It is also noteworthy that the source code corresponding to a suitable programming language represents computer executable software modules. This is because the source code contains the information necessary to control the programmable processing system to perform the presented operations, and compiling only changes the format of the information. It is also possible to provide an interpreter in the programmable processing system so that the source code implemented in a suitable programming language does not need to be compiled before execution.

A computer program product in accordance with an exemplary, non-limiting embodiment of the present invention includes a computer readable medium (e.g., a compact disc (CD)) encoded with a computer program in accordance with an embodiment of the present invention.

A signal according to an exemplary, non-limiting embodiment of the present invention is encoded to carry information defining a computer program in accordance with an embodiment of the present invention.

Example case :

The above-described method for controlling the operating voltage has been confirmed as a test system similar to the electronic system shown in Fig. In the test system, the electronic device 103 is a 32-bit microprocessor based on CMOS technology and equipped with a timing event detector. The implementation of the controller 101 of the test system is shown in FIG. 6, where "clk sgn" is the clock signal 106 and "err sgn" is the timing event signal 107. (VDD) and its corresponding clock frequency ( _Fclk ) so that the clock frequency is substantially quadratically reduced as a function of the operating voltage until an increase in the rate of timing events (e.g., errors) ) Was decreased. The point at which the rate of the timing events increases is approximately the threshold voltage Vth, and the energy consumption is optimized slightly above the threshold voltage Vth.

Two tests were performed. In these tests, the detected timing events are errors related to the operation of the electronic device. In the first test, the BB (body bias) voltage was lower than in the second test. The measurement results of the first test are shown in Table 1 below.

F _ckl  / MHz VDD  / Volts Number of errors in the sample period 25.0 0.40 0 21.6 0.39 0 18.7 0.38 0 16.1 0.37 0 13.8 0.36 0 11.9 0.35 1000 10.2 0.34 > 1000

In the first test, the threshold voltage (Vth) is about 0.35V.

The measurement results of the second test are shown in Table 2 below.

F _ckl  / MHz VDD  / Volts Number of errors in the sample period 11.3 0.40 0 9.85 0.39 0 8.51 0.38 One 7.34 0.37 counter overflow

In the second test, the threshold voltage Vth is about 0.38V.

The specific examples provided in the foregoing description should not be construed as limiting the scope of the appended claims and / or their applicability. The lists and example groups provided in the foregoing description do not cover everything unless otherwise specified.

Claims (20)

A control system (100, 300) for controlling an operating voltage supplied to an electronic device provided with a timing event detector responsive to timing events associated with operation of an electronic device,
The control system comprising:
Decreasing the operating voltage if the rate of timing events is less than the target level, to determine the rate of timing events and to find a threshold voltage which is the minimum value of the operating voltage at which the rate of timing events is substantially at the target level, A controller (101, 301) for increasing the operating voltage when the rate of the rate exceeds a target level; And
- a controllable clock signal generator (102, 302) for generating a clock signal for operating said electronic device,
Wherein the clock frequency representing the pulse rate of the clock signal is dependent on an increasing function of the operating voltage,
Wherein the rate of the timing events is substantially at the target level when the operating voltage is greater than the threshold voltage and the clock frequency is in accordance with an increasing function of the operating voltage and wherein the operating voltage is less than the threshold voltage Wherein the rate of the timing events exceeds the target level in accordance with an increasing function of the operating voltage. The method according to claim 1,
Wherein the controllable clock signal generator (102) comprises a voltage controlled oscillator responsive to the operating voltage in accordance with an increasing function of the operating voltage. The method according to claim 1,
The controller 301 includes a voltage control signal 304 for controlling the voltage regulator to generate the operating voltage and a controllable clock signal generator 302 for generating the clock frequency in accordance with the increasing function of the operating voltage And to generate a frequency control signal (305) for control. The method according to claim 1 or 2,
The controller comprising:
Setting the operating voltage to an initial value greater than the threshold voltage, before finding the threshold voltage;
Increasing the clock frequency when the rate of the timing events is below the target level, and when the rate of the timing events exceeds the target level to find an initial value of the clock frequency corresponding to an initial value of the operating voltage Control the controllable clock signal generator to reduce the clock frequency; And
And to adjust the controllable clock signal generator to operate in accordance with an increasing function of the operating voltage, based on the operating voltage and the initial values of the clock frequency. The method according to claim 1 or 3,
The controller comprising:
Setting the operating voltage to continuously have respective fitting voltage values greater than the threshold voltage, before finding the threshold voltage;
Increasing the clock frequency when the rate of the timing events is less than the target level and comparing the rate of the timing events when the operating voltage has a respective fitting voltage value, Decreasing the clock frequency when the target frequency exceeds the target level; And
- determine one or more setting parameters related to control of the clock frequency based on the fitting voltage values and the fitting frequency values to set the clock frequency to follow an increasing function of the operating voltage. The method according to any one of claims 1 to 5,
Wherein the increasing function of the operating voltage is a convex increasing function below the operating voltage. The method of claim 6,
Wherein the increasing function of the operating voltage is substantially equal to the following equation when VDD > Vth:

Lt; / RTI >
Here, F _clk is a clock frequency, K is the delay-and fittings (delay-fitting) is a parameter, C _g is the output capacitance of the characteristic inverter associated with transistor technology of the electronic device, Vth is a threshold voltage, and αv 1 2 < / RTI > saturation index. The method according to any one of claims 1 to 7,
The controller comprising:
- receive a timing event signal comprising pulses corresponding to timing events associated with operation of the electronic device;
- receiving said clock signal; And
- calculate the rate of timing events based on the amount of pulses of the timing event signal occurring during the sample period and the amount of pulses of the clock signal occurring during the same sample period. An electronic device (103, 303) having a timing event detector responsive to timing events associated with operation of the electronic device; And
An electronic system comprising a control system (100, 300) according to any one of claims 1 to 8 for controlling an operating voltage supplied to the electronic device. The method of claim 9,
Wherein the electronic device includes error-correcting and / or error protection logic responsive to the errors to repair errors associated with operation of the electronic device. CLAIMS 1. A method for controlling an operating voltage supplied to an electronic device having a timing event detector responsive to timing events associated with operation of the electronic device,
The method comprising:
- determining (401) the rate of timing events; And
(402) if the rate of timing events is less than the target level, to find a threshold voltage that is the minimum value of the operating voltage at which the rate of timing events is substantially at the target level, (403) an operating voltage,
Wherein the clock frequency representing the pulse rate of a clock signal for operating the electronic device is dependent on an increasing function of the operating voltage,
Wherein the rate of the timing events is substantially at the target level when the operating voltage is greater than the threshold voltage and the clock frequency is in accordance with an increasing function of the operating voltage and wherein the operating voltage is less than the threshold voltage Wherein the rate of the timing events exceeds the target level in accordance with an increasing function of the operating voltage. The method of claim 11,
Wherein the clock signal is generated using a controllable clock signal generator comprising a voltage controlled oscillator responsive to the operating voltage in accordance with an increasing function of the operating voltage. The method of claim 11,
The method includes generating a frequency control signal for controlling a clock signal generator controllable to generate the clock frequency in accordance with a voltage control signal for controlling the voltage regulator to generate the operating voltage and an increasing function of the operating voltage ≪ / RTI > The method according to claim 11 or 12,
The method comprising:
- setting the operating voltage to have an initial value greater than the threshold voltage, before finding the threshold voltage;
Increasing the clock frequency when the rate of the timing events is below the target level, and when the rate of the timing events exceeds the target level to find an initial value of the clock frequency corresponding to an initial value of the operating voltage Decreasing the clock frequency; And
- tuning a clock signal generator controllable to operate in accordance with an increasing function of the operating voltage, based on the operating voltage and the initial values of the clock frequency. 14. The method of claim 13,
The method comprising:
- setting the operating voltage to have successively each fitting voltage value greater than the threshold voltage, before finding the threshold voltage;
Increasing the clock frequency when the rate of the timing events is less than the target level and comparing the rate of the timing events when the operating voltage has a respective fitting voltage value, Decreasing the clock frequency when the target frequency exceeds the target level; And
- determining one or more setting parameters related to the control of the clock frequency, based on the fitting voltage values and the fitting frequency values, and setting the clock frequency to follow an increasing function of the operating voltage . The method according to any one of claims 11 to 15,
Wherein the increasing function of the operating voltage is a convex increasing function below the operating voltage. 18. The method of claim 16,
Wherein the increasing function of the operating voltage is substantially equal to the following equation when VDD > Vth:

Lt; / RTI >
Here, F _clk is a clock frequency, K is the delay-and fittings (delay-fitting) is a parameter, C _g is the output capacitance of the characteristic inverter associated with transistor technology of the electronic device, Vth is a threshold voltage, and αv 1 2 < / RTI > The method according to any one of claims 11 to 15,
Wherein determining the rate of the timing events comprises:
- receiving a timing event signal comprising pulses corresponding to timing events associated with operation of the electronic device;
- receiving the clock signal; And
Calculating the rate of timing events based on the amount of pulses of the timing event signal occurring during the sample period and the amount of pulses of the clock signal occurring during the same sample period. A computer program for controlling an operating voltage supplied to an electronic device having a timing event detector responsive to timing events associated with operation of an electronic device,
The computer program comprises a programmable processing system:
- determining the rate of timing events;
Decreasing the operating voltage if the rate of timing events is below the target level to find a threshold voltage which is the minimum value of the operating voltage at which the rate of timing events is substantially at the target level and if the rate of timing events exceeds the target level Increasing the operating voltage; And
- controllable clock signal generator for generating a clock signal for operating the electronic device,
Wherein the clock frequency representing the pulse rate of the clock signal is dependent on an increasing function of the operating voltage,
Wherein the rate of the timing events is substantially at the target level when the operating voltage is greater than the threshold voltage and the clock frequency is in accordance with an increasing function of the operating voltage and wherein the operating voltage is less than the threshold voltage Wherein the rate of the timing events exceeds the target level in accordance with an increasing function of the operating voltage. 20. A computer program product comprising a non-transitory computer readable medium encoded with a computer program according to claim 19.

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