201033799 六、發明說明： 【發明所屬之技術領域】 本發明是有關於一種低壓差線性穩壓器，且特別是有 關於一種包含放電電路之低壓差線性穩壓器。 【先前技術】 低壓差線性穩壓器是在可提供大電流的同時，維持非 ^ 常小的輸入及輸出電壓壓差的電路。然而，低壓差線性穩 攀 壓器的輸出端所連接的外接負載電路，常常會在重載週期 及輕載週期間切換運作。當外接負載電路位於重載週期 時，須要汲取大量的電流，但是當位於輕載週期時，將不 再須要大量的電流，而使得低壓差線性穩壓器的輸出端所 輸出的大電流無法在短時間内被消耗，進而在輸出端產生 突升的輸出電壓，容易造成電路損壞之不理想的後果。 因此，如何設計一個新的低壓差線性穩壓器，可以在 • 轉換至輕載週期時迅速地將輸出電流進行放電，而不致產 生突升輸出電壓，乃為此一業界亟待解決的問題。 【發明内容】 因此，本發明之一態樣是在提供一種低壓差線性穩壓 器，包含：輸出p型金氧半電晶體、負載、放電電路以及 操作放大器。輸出P型金氧半電晶體包含閘極、源極以及 汲極，其中源極係接收供應電壓，汲極具有輸出電壓及輸 出電流，汲極更電性連接外接負載電路，外接負載電路具 有重載週期及輕載週期；負載係電性連接汲極以根據輸出 201033799 電壓產生輸出分壓；放電電路係電性連接汲極以使輸出電 流自汲極經由放電電路放電；以及操作放大器根據輸出分 壓以及參考電壓產生控制電壓，俾控制輸出p型金氧半電 晶體之閘極以及放電電路；其中當外接負載電路自重載週 期轉換至輕載週期，進而使輸出分壓大於參考電壓，控制 電壓係關閉輸出p型金氧半電晶體，並啟動放電電路，而 當外接負載電路自輕載週期轉換至重載週期，進而使輸出 分壓小於參考電壓，控制電壓係啟動輸出P型金氧半電晶 參 體，並關閉放電電路·。 應用本發明之優點係在於藉由根據輸出分壓及參考電 壓所產生之控制電壓，即時控制P型金氧半電晶體的電流 輸出及放電電路之運作，迅速地將輸出電流進行放電，而 輕易地達到上述之目的。 【實施方式】 請參照第1圖，係為本發明之一實施例之低壓差線性 ® 穩壓器1之一方塊圖。低壓差線性穩壓器1包含：輸出P 型金氧半電晶體10、負載π、放電電路14以及操作放大 器16。輸出P型金氧半電晶體10包含閘極、源極以及汲 極。其中源極係接收供應電壓Vdd，汲極具有輸出電壓Vo 及輸出電流11。汲極則電性連接外接負載電路18，其中外 接負載電路具有重載週期及輕載週期。外接負載電路18在 工作於重載週期時，具有強力的電流汲取能力，意即在重 載週期時，外接負載電路18將會消耗大量來自低壓差線性 穩壓器1之輸出電流11。因此，低壓差線性穩壓器1將在 201033799 =大量的輸出電流11至外接負載電路18,並維持 ^\輪出錢VG。絲在外接負載電路18切換至輕載 == 寺雪，要如此大量的輸出電流11，而僅有小 =的輸出電流在此時為外接負載電路18所消耗。負載 含二電Hit接〉及極。於本實施例中，負載12係實質上包 t間耙播於山及122。因此’負載〗2將在二電阻120及122 輸出電壓V〇產生輸出分壓V〇d。放電電路14係 的輸出電使產生於輸出金氧半電晶體10的汲極 广操作放大 13,俾控制耠屮考電I力產生控制電壓 14 〇 尘金氧半電晶體10之閘極以及放電電路 大器：出端大包含非反相輸入端、反相輸入端以及放 者）用以、壷姐^、非反相輸入端（於第1圖中以+記號表示 (於第i圖中：載二2表以=輸出分壓爾。反相輸入端 哭輸出诚)用以接收參考電壓Vr。放大 i半電日』=中以。記號表示者）連接輸出p型金 社日日 之閘極，以產生控制電壓13並傳送至閘極。 電^為本發明之一實施例中，輸出 叹匕則電壓丨3之波形圖。第2圖中，v 代時’輸出電壓V。之波形圖，而v°2則 ::波形圖。其中==== =表輕載週期23,而週期25則代表再下一期 =峨線嶋器1並未使用放電電流Η，則在外接 、载電路18由重載週期2i切換至輕載週期23時，將由於 6 201033799 輸出電流η為外接負載電路18所消耗之部份下降，無法 完全消耗而產生電壓突波2G。剩下未被消耗的輸出電淀 η ’將自負載12放電。然而負載12的放電速度缓慢 使放電時間拉長而導致上述之電壓突波2G，而容易影雷 路之正常運作。 f电 本發明之放電電路14係提供了快速的放電機制。 實施例中’放電電路14係實f上為—N型金氧半電晶體 14 N 3L金氧半電晶體14包含汲極、源極以及閘極， 電性連接輸出p型金氧半電晶體ι〇之汲極，源極係 電性連接接地電位_，以及閘極係接收控制電壓134 外，負載電路18自重載週期21轉換至輕載週期23，輪= 電a U中未破外接負載電路18消耗的部份將使輸出電壓 Vo上升ϋ而使輸出分壓偏跟著上升，而大於參考電壓 Vr。此時’操作放大器16在經過比較後，將產生高準位之 控制電壓13’以關輸出p型金氧半電晶體.1()，並立即啟 動放電電路14，其中控制電壓13之波形料示於第2圖 中。因此’輸出P型金氧半電晶體1〇將在閘極接收高準位 控制電壓13後停止提供輸出電流11，而已經輸出的輸出 電流11將同時自負載12及放電電路14放電，而使放電速 ，加快。如此的快速放電機制將使放電時間減少，並且如 第2圖所不，將大幅降低輸出電壓％的電壓突波u。而 當外接負載電& 18自輕载週期23轉換至下-重載週期 25::卜接負載電路18將開始大量汲取輸出電流”，使輸 出電壓Vo產生-電壓下降24，並進而使輸出分壓v〇d小 於參考電M力。㈣’操作放大H 16在經過比較後，將 201033799 fo生電壓13 ’以啟動輸出？型金氧半電晶體 、’關閉放電電路14,岐輸出電流 給至外接負載電路18。 ^ 失去月之低壓差線性穩壓11 ’係藉由根據輸出分壓及 ，考廷壓所產生之控制電壓，即時控制p型金氧半 =二輸出及放電電路之運作，迅速地將輸出電流進：放 電而鈿短放電時間，並減少電壓突波之產生。 魯 =本發明已以實施方式揭露如上，然其並非用以限 任何熟習此技藝者’在不脫離本發明之精神和 ^ 田可作各種之更動與潤飾，因此本發明之保護範 圍虽視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 处承二月之上述和其他目的、特徵、優點與實施例 月b更明顯易懂’所附圖式之說明如下·· 方塊為本發明之一實施例之健差線性穩壓器之 壓之係為本發明之一實施例中，輸出電壓及控制電 【主要元件符號說明】 1〇 :輸出P型金氧半電晶體 12 :負載 13 :控制電壓 16 :操作放大器 I .低壓差線性穩壓器 II :輸出電流 !20、〗22 :電阻 14 :放電電路 201033799 18 外接負載電路 21 :重載週期 22 電壓突波 23 :輕載週期 24 電壓下降 25 :下一重載週期201033799 VI. Description of the Invention: [Technical Field] The present invention relates to a low dropout linear regulator, and more particularly to a low dropout linear regulator including a discharge circuit. [Prior Art] A low-dropout linear regulator is a circuit that maintains a large current while maintaining a non-normally small input and output voltage drop. However, the external load circuit connected to the output of the low dropout linear voltage regulator often switches between heavy duty and light load cycles. When the external load circuit is in the heavy duty cycle, a large amount of current needs to be drawn, but when it is in the light load cycle, a large amount of current is no longer needed, so that the large current outputted from the output of the low dropout linear regulator cannot be It is consumed in a short time, and then a sudden output voltage is generated at the output end, which is likely to cause undesired consequences of circuit damage. Therefore, how to design a new low-dropout linear regulator can quickly discharge the output current when switching to a light-duty cycle without causing a sudden rise in the output voltage, which is an urgent problem to be solved in the industry. SUMMARY OF THE INVENTION Accordingly, it is an aspect of the present invention to provide a low dropout linear regulator comprising: an output p-type MOS transistor, a load, a discharge circuit, and an operational amplifier. The output P-type MOS transistor includes a gate, a source and a drain, wherein the source receives the supply voltage, the drain has an output voltage and an output current, and the drain is more electrically connected to the external load circuit, and the external load circuit has a weight Load period and light load period; the load is electrically connected to the drain to generate an output voltage according to the output voltage of 201033799; the discharge circuit is electrically connected to the drain to discharge the output current from the drain through the discharge circuit; and the operational amplifier is divided according to the output The voltage and the reference voltage generate a control voltage, and the gate of the p-type MOS transistor and the discharge circuit are controlled by the ; control; wherein when the external load circuit is switched from the heavy load period to the light load period, the output partial pressure is greater than the reference voltage, and the control is performed. The voltage system closes and outputs the p-type MOS transistor, and starts the discharge circuit. When the external load circuit switches from the light load cycle to the heavy load cycle, the output voltage is smaller than the reference voltage, and the control voltage starts to output the P-type gold oxide. Semi-electric crystal body, and close the discharge circuit. The advantage of the application of the present invention is that the current output of the P-type MOS transistor and the operation of the discharge circuit are instantaneously controlled by the control voltage generated by the output voltage division and the reference voltage, and the output current is quickly discharged. The ground achieves the above purpose. Embodiments Please refer to FIG. 1 , which is a block diagram of a low dropout linear ® voltage regulator 1 according to an embodiment of the present invention. The low dropout linear regulator 1 includes an output P-type MOS transistor 10, a load π, a discharge circuit 14, and an operational amplifier 16. The output P-type MOS transistor 10 includes a gate, a source, and a drain. The source receives the supply voltage Vdd, and the drain has an output voltage Vo and an output current 11. The bungee is electrically connected to the external load circuit 18, wherein the external load circuit has a heavy duty cycle and a light load cycle. The external load circuit 18 has a strong current draw capability when operating in a heavy duty cycle, meaning that the external load circuit 18 will consume a large amount of output current 11 from the low dropout linear regulator 1 during the reload period. Therefore, the low dropout linear regulator 1 will be at 201033799 = a large amount of output current 11 to the external load circuit 18, and maintain the ^\ round of money VG. The wire is switched to the light load at the external load circuit 18 == Temple Snow, so a large amount of output current 11 is required, and only the output current of the small = is consumed by the external load circuit 18 at this time. The load contains two electric Hits and the poles. In this embodiment, the load 12 is substantially broadcast between the mountains and 122. Therefore, 'load> 2 will generate an output divided voltage V 〇 d at the output voltage V 二 of the two resistors 120 and 122. The output of the discharge circuit 14 is electrically amplified 13 generated by the output of the MOS transistor 10, and the gate is controlled by the electric force I to generate the control voltage 14 and the gate of the dust MOS transistor 10 and the discharge. The circuit is large: the non-inverting input terminal, the inverting input terminal and the releaser are used for the output, and the non-inverting input terminal is used (indicated by the + mark in Fig. 1 (in the i-th picture) : Load 2 2 table to = output divided voltage. Inverting input end crying output Cheng) to receive the reference voltage Vr. Enlarge i semi-electric day 』 = in the middle. The symbol indicates that the connection output p-type Jinshe day The gate is generated to generate a control voltage 13 and transmitted to the gate. In the embodiment of the present invention, the output voltage is a waveform diagram of the voltage 丨3. In Fig. 2, v is the generation voltage V. Waveform, while v°2 is :: waveform. Where ==== = the light load cycle 23, and the cycle 25 represents the next phase = the switch 1 does not use the discharge current Η, then the external and load circuit 18 is switched from the heavy duty cycle 2i to the light load At the time of the cycle 23, the output current η of 6 201033799 is a part of the consumption of the external load circuit 18, and the voltage surge 2G is not completely consumed. The remaining unspent output electrode η ' will discharge from the load 12. However, the discharge speed of the load 12 is slow, and the discharge time is elongated to cause the above-mentioned voltage surge 2G, which is easy to cause normal operation of the lightning. f Electrical The discharge circuit 14 of the present invention provides a fast discharge mechanism. In the embodiment, the discharge circuit 14 is a N-type MOS transistor 14 N 3L MOS transistor 14 includes a drain, a source and a gate, and is electrically connected to output a p-type MOS transistor. The drain of the ι〇, the source is electrically connected to the ground potential _, and the gate receives the control voltage 134, the load circuit 18 transitions from the heavy duty cycle 21 to the light load cycle 23, and the wheel = electric a U is not broken. The portion of the load circuit 18 that is consumed will cause the output voltage Vo to rise and the output divided voltage to rise, which is greater than the reference voltage Vr. At this time, after the comparison, the operational amplifier 16 will generate a high-level control voltage 13' to turn off the output of the p-type MOS transistor.1(), and immediately start the discharge circuit 14, wherein the waveform of the control voltage 13 is controlled. Shown in Figure 2. Therefore, the output P-type MOS transistor 1 停止 will stop providing the output current 11 after the gate receives the high-level control voltage 13, and the output current 11 that has been output will simultaneously discharge from the load 12 and the discharge circuit 14, thereby making The speed of discharge is faster. Such a rapid discharge mechanism will reduce the discharge time, and as shown in Fig. 2, the voltage surge u of the output voltage % will be greatly reduced. When the external load power & 18 is switched from the light load cycle 23 to the lower-reload cycle 25:: the load circuit 18 will start to draw a large amount of output current, so that the output voltage Vo is generated - the voltage drops 24, and then the output is made The partial pressure v〇d is smaller than the reference electric M. (4) After the operation is amplified, H 16 is subjected to the comparison, and the current voltage is 13 ' to start the output type MOS transistor, 'close the discharge circuit 14, 岐 output current to To the external load circuit 18. ^ Loss of the month's low-dropout linear regulator 11' is based on the output voltage and the control voltage generated by the Cotting pressure, to instantly control the operation of the p-type gold-oxygen half=two output and discharge circuit Quickly output current into: discharge to shorten discharge time and reduce voltage surge. Lu = The present invention has been disclosed in the above embodiments, but it is not intended to limit anyone skilled in the art' The spirit of the invention and the field can be used for various changes and refinements. Therefore, the scope of protection of the present invention is subject to the definition of the scope of the appended claims. [Simplified description of the drawings] The features, advantages, and embodiments of the present invention are more clearly understood. The description of the drawings is as follows. The block is a pressure of the differential linear regulator of one embodiment of the present invention. , Output voltage and control power [Main component symbol description] 1〇: Output P-type MOS transistor 12: Load 13: Control voltage 16: Operational amplifier I. Low-dropout linear regulator II: Output current! 20, 〗 22: Resistor 14: Discharge circuit 201033799 18 External load circuit 21: Heavy duty cycle 22 Voltage surge 23: Light load cycle 24 Voltage drop 25: Next heavy duty cycle