201030724 nivi-^uu〇-v；036-TW 28508twf.doc/n 六、發明說明： 【發明所屬之技術領域】 • 本發明是有關於一種源極驅動器，且特別是有關於一 種調整輸出訊號迴轉率之源極驅動器。 【先前技術】 源極驅動盗為液晶顯示器（liquid crystal沿咖町， _ LCD)中重要的元件，其可將數位視訊資料轉換為多個電 壓訊號，並且將轉換獲得之電壓訊號傳送至顯示面板上的 晝素，以顯示影像晝面。源極驅動器通常具有多個輸出緩 衝器以增強上述電壓訊號。由於電子元件特性的不同以及 • 製程變異，從這些輸出缓衝器所輸出之電壓訊號於驅動晝 素日可可此不會具有相同迴轉率（slew rate)。如此一來， 因液晶定向所需時間的不同將造成顯示畫面不穩定。 一般來S兒，在液晶顯示裝置中，傳送至晝素的電壓訊 號其極性須週期性地改變，以避免液晶極化而造成殘影現 〇 象。採用極性反轉來驅動顯示面板的方式有三種，即晝面 反轉（frame inversion)、攔反轉（column inversion)及點 反轉（dot inversion)。以點反轉為例，在一晝面中相鄰畫 素分別以相反極性之驅動電壓來驅動，且兩連續晝面中相 同位置的晝素也會以相反極性之驅動電壓來驅動。通常來 說，正極性之驅動電壓會大於耦接至液晶的共用電壓 (common voltage )，而負極性之驅動電壓則小於共用電 j〇36-TW 2850Stwf.doc/n201030724 nivi-^uu〇-v;036-TW 28508twf.doc/n VI. Description of the Invention: [Technical Field] The present invention relates to a source driver, and more particularly to an adjustment of output signal rotation The source of the source drive. [Prior Art] The source driver is an important component in a liquid crystal display (liquid crystal, _LCD), which converts digital video data into multiple voltage signals, and transmits the converted voltage signal to the display panel. The morpheme on the display to display the image. The source driver typically has multiple output buffers to enhance the voltage signals described above. Due to the differences in the characteristics of the electronic components and the variations in the process, the voltage signals output from these output buffers do not have the same slew rate at the time of the drive. As a result, the display screen is unstable due to the difference in time required for the liquid crystal orientation. Generally, in a liquid crystal display device, the polarity of a voltage signal transmitted to a pixel must be periodically changed to avoid polarization of the liquid crystal and cause image sticking. There are three ways to drive the display panel with polarity inversion, namely frame inversion, column inversion, and dot inversion. Taking dot inversion as an example, adjacent pixels in a plane are driven by driving voltages of opposite polarities, and the same position of the two consecutive pupils are driven by driving voltages of opposite polarities. Generally speaking, the driving voltage of the positive polarity is greater than the common voltage coupled to the liquid crystal, and the driving voltage of the negative polarity is less than the shared voltage. j〇36-TW 2850Stwf.doc/n
’顯示面板之 201030724 由於相反極性之驅動電壓具有不同的電虔準位，因此 分別增強不同極性之驅動電壓的輸出緩衝器可能會由不同 的電子元件所組成之。舉例來說，適用於增強正極性的驅 動電廢的輸出缓衝器可包括N型差動對（Ν_τ 爾_制恤），㈣肢高準蚊轉㈣並且控 出緩衝〶之運作。相反地，咖於增強負極性之驅動電壓 的輸出缓衝器可包括Ρ型差動對(p_Type账_201030724 of the display panel Since the driving voltages of opposite polarities have different power levels, the output buffers that respectively enhance the driving voltages of different polarities may be composed of different electronic components. For example, an output buffer suitable for driving positive electrical waste can include an N-type differential pair (Ν_τ尔_shirt), (4) a limb-high-flying mosquito (4) and control the operation of the buffer. Conversely, an output buffer that is used to enhance the driving voltage of the negative polarity may include a 差 type differential pair (p_Type account _
Pair)，用以接收低準位之驅動電壓並且控制輸出緩衝器之 運作。如上所述，由於好元件雜的不同及製程變異， 源極驅動H所輸出的電壓訊號很有可能會具不同的迴轉 驅動率的不同會造成以電壓訊號所 錢-⑽的不同。因此’ #進行極性反轉時， 閃爍越嚴重’導致顯示品質降低。於此，需== 極驅動器以解決上述問題。 ❿4適田_ 【發明内容】 所產動器，其可將不同輸出緩衝器 避免顯示==調整一致。藉此’本發明可以 品質„ 4面閃爍，並進—步地提升： 料線括具有多條資 位驅動态包括第一輪出緩衝器、第二 5Pair), which is used to receive the driving voltage of the low level and control the operation of the output buffer. As mentioned above, due to the difference in the components and the variation of the process, the voltage signal output by the source driver H is likely to have different rotation drive rates, which will cause the voltage signal to be different (10). Therefore, when '# is reversed in polarity, the more severe the flicker' results in lower display quality. Here, the == polar drive is required to solve the above problem. ❿4 适田_ [Summary] The actuator can be used to avoid the display of different output buffers == adjustment. Thus, the present invention can be used to improve the quality of the four sides, and to advance step by step: the material line includes a plurality of resources to drive the state including the first round of the buffer, the second 5
201030724 HM-/UU8-0036-TW 28508twf.doc/n 輸出緩衝If、多工H及第i整單元201030724 HM-/UU8-0036-TW 28508twf.doc/n Output buffer If, multiplex H and ith unit
第一輸入端接收一第一畫素訊號，且豆笛_=出緩衝器之 輸出端’用以增強第-晝素訊號的傳輸強；二=接: :輸出緩衝器之第-輸人端接收—第二晝素訊第 二輸入端耦接至其輪出端，用以增強第二晝素二Z 元;接於第一輪出緩衝器之輪= =之t畫素訊號的迴轉率調整至與第二輸出緩 之第二晝素訊號的迴轉率相匹配，並且傳送第去-3 多工器補第一輸出緩衝器及第二輪:緩： r之輸出编，用以依據控制訊號分別傳送第—晝素訊號及 第一旦素甙號至其一奇資料線及其一偶資料線，^者分別 傳送第—晝素訊號及第二晝素訊號至其一偶資料線及|一 奇資料線。 ^ 在本發明之一實施例中，上述之源極驅動器更包括一 第二調整單元。第二調整單元耦接於第二輸出緩衝器之輸 出端及多工器之間，用以將第二輸出緩衝器所輸出之第二 晝素訊號的迴轉率調整至與第一輸出緩衝器所輸出之第一 晝素訊號的迴轉率相匹配，並且傳送第二晝素訊號至多工 器。 在本發明之一實施例中，上遂之第一晝素訊號及第二 畫素訊號具有互補極性。 基於上述’本發明之源極軀動器利用調整單元將不同 輪出緩衝器所輸出之晝素訊號的迴轉率調整一致。另外， 6The first input end receives a first pixel signal, and the bean flute _= the output end of the buffer is used to enhance the transmission strength of the first-vox signal; and the second=:: the output-input side of the output buffer Receiving - the second input terminal of the second 昼 讯 耦 is coupled to the wheel end thereof for enhancing the second 昼 二 Z Z element; the rotation rate of the t 素 讯 signal connected to the wheel of the first round out buffer Adjusted to match the slew rate of the second output signal of the second output, and transmit the first-3 multiplexer to complement the first output buffer and the second round: slow: r output code for control The signal is transmitted to the first data line and its one data line respectively, and the first and second data signals are transmitted to the first data line and | An odd data line. In an embodiment of the invention, the source driver further includes a second adjustment unit. The second adjusting unit is coupled between the output end of the second output buffer and the multiplexer, and configured to adjust the slew rate of the second halogen signal outputted by the second output buffer to the first output buffer The slew rate of the output first halogen signal is matched, and the second halogen signal is transmitted to the multiplexer. In an embodiment of the invention, the first pixel signal and the second pixel signal of the upper layer have complementary polarities. The source body actuator adjustment unit according to the above aspect adjusts the slew rate of the pixel signals outputted by the different wheel-out buffers. In addition, 6
’附圖舉例 示同樣或相 201030724 ruvj-^.wu〇-v>036-TW28508twf.doc/n 透過調整單元之運作，轮可姑 ±, , ^ 素訊號的上升時間與下降時間較為對稱==輪= =電能力及放電能力對稱，以避免顯示影= 為，明之上述特徵和優點能更明顯易 舉貝細例’舰合所關式作詳細綱如下。 文特 【實施方式】 一以下將參考附圖詳細闡述本發明的實施例 5兒明了本發明的示範實施例，其中相同標號指 似的元件。 圖1為本發明之一實施例之源極驅動器的電路圖。嘖 參照圖1 ’源極驅動H 100適於驅動顯示面板上 料線，、即資料線01及1)2，其中顯示面板例如為液晶顯示 面板或者絲液晶面板。資料線包括乡條奇資料線（即資 料線D1)衫條偶倾線（㈣财D2)交錯地配置於 顯示面板。源極驅動器100包括輪出緩衝器U1及ιΐ2、 多工器120、調整單元131及132。當一掃描線致能時，源 極驅動器100經由輸出缓衝mi及112分別增強晝素訊 號vpi及w2的傳輸強度，接著傳送晝素訊號νρι及糟 ^資料線〇1及02以顯示影像。本領域具有通常知識者應 能理解本實施例之祕驅動ϋ 1⑽的基本齡，故不加以 贅述。 假設輸出緩衝器丨11及112分別負責增強具互補極性 7 201030724 fH , XX...0036-TW28508twf.doc/n 之晝素訊號VP 1及VP2，即正極性及負極性。輸出緩衝器 1 1 1之弟一輸入端（即非反相端 + ”）接收正極性之書素 訊號VP1，且輸出缓衝器111之第二輸入端（即反相端 “一”）耗接輸出缓衝器111之輸出端OUT1。同樣地，輪 出緩衝裔112之弟一輸入端（即非反相端“ + 接收負極 性之晝素訊號VP2，且輸出緩衝器112之第二輸入端（即 反相端“一”）耦接輸出缓衝器112之輸出端〇υτ2。'The figure shows the same or phase 201030724 ruvj-^.wu〇-v>036-TW28508twf.doc/n Through the operation of the adjustment unit, the rise and fall times of the prime signal are more symmetrical == Wheel = = electrical capacity and discharge capacity are symmetrical to avoid the display of shadow =, the above characteristics and advantages of the Ming can be more obvious and easy to use. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. 1 is a circuit diagram of a source driver in accordance with an embodiment of the present invention. Referring to Fig. 1, the source drive H 100 is adapted to drive a display panel feed line, i.e., data lines 01 and 1) 2, wherein the display panel is, for example, a liquid crystal display panel or a silk liquid crystal panel. The data line includes the township odd data line (i.e., the material line D1) and the shirt even line ((4) money D2) are alternately arranged on the display panel. The source driver 100 includes a wheel-out buffer U1 and an multiplexer 2, a multiplexer 120, and adjustment units 131 and 132. When a scan line is enabled, the source driver 100 enhances the transmission strengths of the pixel signals vpi and w2 via the output buffers mi and 112, respectively, and then transmits the pixel signals νρι and the data lines 〇1 and 02 to display the image. Those of ordinary skill in the art should understand the basic age of the secret driver ( 1 (10) of the present embodiment and therefore will not be described again. It is assumed that the output buffers 丨11 and 112 are respectively responsible for enhancing the polar signals VP 1 and VP2 having complementary polarities 7 201030724 fH , XX...0036-TW28508twf.doc/n, that is, positive polarity and negative polarity. The output of the output buffer 1 1 1 (ie, the non-inverting terminal + ′′) receives the positive pixel signal VP1, and the second input of the output buffer 111 (ie, the “one” of the inverting terminal) consumes Connected to the output terminal OUT1 of the output buffer 111. Similarly, the input terminal of the buffered person 112 (ie, the non-inverting terminal "+ receives the negative polarity signal VP2, and the second input of the output buffer 112 The terminal (ie, the inverting terminal "one") is coupled to the output terminal 〇υτ2 of the output buffer 112.
調整單元131耦接於輸出緩衝器U1之輸出端〇UT1 與多工器120之第一輸入端II之間，用以調整輸出緩衝器 111所輸出之晝素訊號VP1的迴轉率。同樣地，調整單元 132耦接於輸出緩衝器112之輸出端〇UT2與多工器12〇 之第二輸入端12之間，用以調整輸出緩衝器 畫素訊號呢的_率。多μ⑽之第_輸出^^ 第一輸出端02分別耦接奇資料線D1及偶資料線。多 工器120依據㈣訊號CQN，分賴送具互補極性之 訊號VH及VP2至奇資料線m及偶資料線的，^分 別傳送畫素訊號vpi及w2至偶資料線D2 D1，以進行點極性反轉。 、.' "來Γ電子電路的迴轉率定義為輪出訊號改變的 1載效應及輸出緩衝器之充放電操作，輸 出緩衝㈣輸出之晝素讀率可能會胖，且 由同-輸出緩衝器所輸出之晝素訊號， 降迴轉率也會不對稱。畫素訊號的迴轉率越 就需要更多的日㈣達到預定電壓準位來驅動液晶1晝1 8 201030724 .........^^-TWsgSOStwf.doc/n ““閃率及下降迴轉率不對稱也會導致所不欲見的 ‘ 喊^轉率不匹配，顯示影像之呈現將會不均句。 - 情本發明之實施例利用調整單元131及132分別 =【緩衝器⑴及112所輪出之晝素訊號νρι及w2 調餐^ ’以解決上述問題。請參照圖1，在本實施例中， =早7L 131及1；32分別以可變電阻VR1及VR2實現之， • 整使輸出緩衝器U1及112所輸出之晝素訊號州 的迴轉率相匹配。可變電阻VR1麵接於輸出緩衝 ϋ之輸出端〇而與多工器120之間，以調整兩者之 • 間的電阻值。可變電阻VR2姻於輸出缓衝器112 • 端0UT2與多工器120之間，以調整兩者之間的電阻值。 當晝素訊號VP1的迴轉率小於晝素訊號VP2的迴轉 率時，可變電阻VR1受控於調整訊號^而調低其電阻值， 以增加晝素訊號VP1的迴轉率，使晝素訊號VP1的迴轉 率與晝素訊號VP2的迴轉率相匹配。另一方面，可變電阻 參 VR2受控於調整訊號T2而調高其電阻值，以降低晝素訊 號VP2的迴轉率，使晝素訊號VP2的迴轉率與晝素訊號 vpi的迴轉率匹配。在一較佳實施例中，可變電阻及 VR2分別受控於調整訊號T1及T2而調低兩者的電阻值， 進而增加晝素訊號VP1及VP2的迴轉率至一預設值，使 晝素訊號VP1及VP2的迴轉率可相互匹配及—致。另外， 藉由調整單元之運作，同一輸出緩衝器所輸出之晝素訊號 的上升及下降的迴轉率能對稱，使各輸出緩衝器&充電能ϋ 9 201030724 —---—W 28508twf.doc/n. 力及放電能力之間的對稱性增加，以避免畫面閃爍。 請參照圖1，多工器120受控於控制訊號CON，其接 收經調整單元131及132所分別調整後之晝素訊號VP1及 VP2’以選擇性地分別傳送晝素訊號Vpi及Vp2至奇資料 線D1及偶資料線D2,或者分別傳送晝素訊號VP1及VP2 至偶資料線D2與奇資料線D1。圖2為本發明實施例圖1 之多工器120的電路圖。請參照圖2，多工器120包括開 關W1〜W4。開關W1依據控制訊號CON之第一訊號CON1 而導通多工器120之第一輸入端II至第一輸出端01，且 開關W3依據控制訊號CON之第二訊號CON2而導通多 工器120之第二輸入端12至第二輸出端02。因此，多工 器120可分別傳送VP1及VP2至奇資料線D1及偶資料線 D2。開關W2依據控制訊號CON之第一反相訊號CON1， 而導通多工器120之第一輸入端II至第二輸出端02，且 開關W4依據控制訊號CON之第二反相訊號C0N2,而導 通多工器120之第二輸入端12至第一輸出端01。第一反 相訊號CON1，及第二反相訊號CON2’為分別經由反相第 —訊號CON1及第二訊號CON2而獲得之。藉此，多工器 120可分別傳送晝素訊號VP1及VP2至偶資料線D2及奇 資料線D1。 圖1及圖2中所示之電路設計圖以一例說明闡述’以 使本領域具通常知識者得以實施本發明，然非用以限定本 發明。為使本領域具有通常知識者可輕易地實現本發明’ 以下以其它實施例詳細描述調整單元131及132之操作。 201030724 xijrA ^vv„-〇〇35~xw 28508twf.doc/n 一圖3為本發明之一實施例之源極驅動器1〇〇中調整單 ，的電路圖。請參照圖3，以調整單元131為例，圖3中 . 调整單元131包括電阻RE—bRE—N，以及開關 SW-UWH ’其中N為正整數。電阻RE_1〜RE_N為以 串聯方式連接一起，而串聯之電阻N其第一端 及第二端分別耦接輸出缓衝器111之輸出端OUT1及接地 嶸GND。在開關SW—i〜sw一N-1中，各開關耦接於對應之 •，且與多工器120之第一輸入端11之間，並依據調整訊號 」而導通輸出緩衝器11 i之輸出端〇UTl至多工器⑽的 • 第一輸入端11之間的電路。電阻RE—1〜RE_N與開關 1 SW—N-1相互運作可等效視為一可變電阻，以調整 畫素訊號VP1的迴轉率。 舉例來說，假設調整訊號T1具有N-1個位元，且調 整訊號T1的這些位元訊號分別控制開關swjjw 的開啟/關閉狀態。若開關SWj導通時’輪出緩衝器—iu =輸出端OUT1與多工器120之第一輸入端n之間的等效 電阻為電阻RE一1。同理類推’若開關SW—2導通時，輪出 緩衝器ill之輸出端ουτι與多工器no之第一輸入端 <間的等效電阻為電阻RE—1與電阻RE—2之和。因此， _ 3所示之調整單元131可藉由增加或者減少等效電阻來 輞整晝素訊號VP1的迴轉率。 圖4為本發明之另一實施例之源極驅動器1〇〇中調整 舉元的電路圖。請參考圖4，以調整單元l3i為例，調整 草元131包括開關S1〜S2以及電容C1。如圖4所示，開 11 x.a. 0036 -TW 28508twf.doc/n 關SI其一端搞接輸出緩衝器111之輸出端ουτί，而另一 端則耦接電容C1其一端與開關S2其—端。另外，電容 . C1另一端耦接接地電壓GND，且開關S2另一端輕接多工 # 120之第一輸入端II。 . 調整單元131經由交替地導通開關S1及S2而產生一 等效電阻。調整單元131所產生之等效電阻值相關於交替 地導通開關S1及S2之切換頻率，亦即R=1/(Cxf)，其中 鲁 R為有效電阻值，c為電容ci之電容值且f為切換頻/率。 因此，圖4所示之調整單元131可藉由增加或減少調整單 元131所產生之有效電阻值來調整晝素訊號νρι的迴轉 * 率〇 - 如上所述，源極驅動器100中的調整單元132也可藉 由圖^及圖4中所示之電路來實現，故於此不多加贅述: =、◊示上所述，上述貫施例之源極驅動器利用調整單元來 調整不同輸岐魅所輸Α之晝素喊的迴轉率，使1相 • 外’經由調整單元，晝素訊號上升及下降的迴 需㈣調整至對稱。如此—來’顯示面板上液晶定向所 〜可近幾相同以提升顯示品質’且輸出缓衝器的充 蝶。一放电旎力之間的對稱性也可提高以避免晝面閃 林Γ然本發明已以實施例揭露如上，然其並非用以限定 木“之ίΐ所屬技術領域中具有通常知識者’在不脫離 赘^之你t範圍内，當可作些許之更動與潤飾，故本 保護粍圍當視後附之申請專利範圍所界定者為準。 12 201030724The adjusting unit 131 is coupled between the output terminal 〇UT1 of the output buffer U1 and the first input terminal II of the multiplexer 120 for adjusting the slew rate of the multiplex signal VP1 outputted by the output buffer 111. Similarly, the adjustment unit 132 is coupled between the output terminal 〇UT2 of the output buffer 112 and the second input terminal 12 of the multiplexer 12A for adjusting the _ rate of the output buffer pixel signal. The first output terminal 02 of the multiple μ (10) is coupled to the odd data line D1 and the even data line, respectively. The multiplexer 120 transmits the pixel signals VH and VP2 of the complementary polarity to the odd data lines m and the even data lines according to the (four) signal CQN, and transmits the pixel signals vpi and w2 to the even data lines D2 D1 respectively to perform the point. Polarity is reversed. ,. ' " The electronic circuit's slew rate is defined as the 1-load effect of the turn-off signal change and the charge-discharge operation of the output buffer. The output buffer (four) output may have a fat reading rate, and the same-output buffer The halogen signal output by the device will also be asymmetric. The higher the slew rate of the pixel signal, the more time it takes (4) to reach the predetermined voltage level to drive the liquid crystal. 1昼1 8 201030724 .........^^-TWsgSOStwf.doc/n ""flash rate and drop The asymmetry of the slew rate will also lead to the unsatisfactory 'calling rate' mismatch, and the display image will be uneven. The embodiment of the present invention solves the above problem by using the adjustment units 131 and 132 = [the buffers (1) and 112, respectively, the halogen signals νρι and w2 to adjust the meal]. Referring to FIG. 1, in the present embodiment, = 7L 131 and 1; 32 are implemented by variable resistors VR1 and VR2, respectively, and the output rate of the output signal buffers U1 and 112 is output. match. The variable resistor VR1 is connected between the output terminal of the output buffer 〇 and the multiplexer 120 to adjust the resistance between the two. The variable resistor VR2 is in the output buffer 112 • between the terminal OUT2 and the multiplexer 120 to adjust the resistance between the two. When the slew rate of the VP1 signal is less than the slew rate of the VP2 signal, the variable resistor VR1 is controlled to adjust the signal and lower its resistance value to increase the slew rate of the VP1 signal, so that the VP1 signal is VP1. The slew rate matches the slew rate of the halogen signal VP2. On the other hand, the variable resistor VR2 is controlled by adjusting the signal T2 to increase its resistance value to lower the slew rate of the VP2 signal, so that the slew rate of the VOV signal VP2 matches the slew rate of the 昼V signal vpi. In a preferred embodiment, the variable resistor and the VR2 are respectively controlled by adjusting the signals T1 and T2 to lower the resistance values of the two, thereby increasing the slew rate of the pixel signals VP1 and VP2 to a preset value, so that 昼The slew rates of the prime signals VP1 and VP2 can be matched and matched. In addition, by adjusting the operation of the unit, the rising and falling slew rates of the output signals output by the same output buffer can be symmetrical, so that the output buffers & charging energy ϋ 9 201030724 —---—W 28508twf.doc /n. The symmetry between force and discharge capability is increased to avoid flickering. Referring to FIG. 1, the multiplexer 120 is controlled by the control signal CON, which receives the respectively adjusted pixel signals VP1 and VP2' adjusted by the adjusting units 131 and 132 to selectively transmit the pixel signals Vpi and Vp2 respectively. The data line D1 and the even data line D2, or the binary signal VP1 and VP2 to the even data line D2 and the odd data line D1, respectively. 2 is a circuit diagram of the multiplexer 120 of FIG. 1 according to an embodiment of the present invention. Referring to Figure 2, the multiplexer 120 includes switches W1 to W4. The switch W1 turns on the first input terminal II to the first output terminal 01 of the multiplexer 120 according to the first signal CON1 of the control signal CON, and the switch W3 turns on the multiplexer 120 according to the second signal CON2 of the control signal CON. Two input terminals 12 to second output terminals 02. Therefore, the multiplexer 120 can transfer the VP1 and VP2 to the odd data line D1 and the even data line D2, respectively. The switch W2 turns on the first input terminal II to the second output terminal 02 of the multiplexer 120 according to the first inverted signal CON1 of the control signal CON, and the switch W4 is turned on according to the second inverted signal C0N2 of the control signal CON. The second input 12 of the multiplexer 120 is to the first output 01. The first inverted signal CON1 and the second inverted signal CON2' are obtained by inverting the first signal CON1 and the second signal CON2, respectively. Thereby, the multiplexer 120 can transmit the pixel signals VP1 and VP2 to the even data line D2 and the odd data line D1, respectively. The circuit diagrams shown in Figures 1 and 2 are illustrated by way of example only to enable those skilled in the art to practice the invention, and are not intended to limit the invention. The present invention can be easily implemented by those skilled in the art. The operation of the adjustment units 131 and 132 will be described in detail below with other embodiments. 201030724 xijrA ^vv„-〇〇35~xw 28508twf.doc/n FIG. 3 is a circuit diagram of an adjustment unit in the source driver 1A according to an embodiment of the present invention. Referring to FIG. 3, the adjustment unit 131 is For example, in FIG. 3, the adjusting unit 131 includes a resistor RE_bRE_N, and the switch SW-UWH 'where N is a positive integer. The resistors RE_1~RE_N are connected in series, and the series resistor N has its first end and The second end is respectively coupled to the output end OUT1 of the output buffer 111 and the ground 嵘 GND. In the switches SW_i~sw-N-1, the switches are coupled to the corresponding ones, and the multiplexer 120 Between an input terminal 11 and according to the adjustment signal, the circuit between the output terminal 〇UT1 of the output buffer 11 i and the first input terminal 11 of the multiplexer (10) is turned on. The resistors RE-1 to RE_N and the switch 1 SW-N-1 operate in a manner equivalent to a variable resistor to adjust the slew rate of the pixel signal VP1. For example, assume that the adjustment signal T1 has N-1 bits, and the bit signals of the adjustment signal T1 respectively control the on/off state of the switch swjjw. If the switch SWj is turned on, the equivalent resistance between the output buffer OUT_iu = the output terminal OUT1 and the first input terminal n of the multiplexer 120 is the resistance RE-1. Similarly, if the switch SW-2 is turned on, the equivalent resistance between the output terminal ουτι of the output buffer ill and the first input terminal of the multiplexer no is the sum of the resistor RE-1 and the resistor RE-2. . Therefore, the adjusting unit 131 shown in FIG. 3 can adjust the slew rate of the halogen signal VP1 by increasing or decreasing the equivalent resistance. Fig. 4 is a circuit diagram showing an adjustment of a lifting element in a source driver 1 in another embodiment of the present invention. Referring to FIG. 4, taking the adjustment unit l3i as an example, the adjustment unit 131 includes switches S1 S S2 and a capacitor C1. As shown in Fig. 4, the open 11 x.a. 0036 - TW 28508 twf. doc / n off SI one end of the output buffer 111 output ου τί, and the other end coupled to the capacitor C1 one end and the switch S2 its end. In addition, the other end of the capacitor C1 is coupled to the ground voltage GND, and the other end of the switch S2 is lightly connected to the first input terminal II of the multiplex #120. The adjustment unit 131 generates an equivalent resistance by alternately turning on the switches S1 and S2. The equivalent resistance value generated by the adjusting unit 131 is related to the switching frequency of the switches S1 and S2 alternately, that is, R=1/(Cxf), where Lu is the effective resistance value, c is the capacitance value of the capacitance ci and f To switch frequency/rate. Therefore, the adjusting unit 131 shown in FIG. 4 can adjust the swing rate of the pixel signal νρι by increasing or decreasing the effective resistance value generated by the adjusting unit 131. As described above, the adjusting unit 132 in the source driver 100 It can also be realized by the circuit shown in FIG. 4 and FIG. 4, so the description will not be repeated here: =, the above description, the source driver of the above embodiment uses the adjustment unit to adjust different stuns. The slew rate of the singularity of the singer is adjusted to the symmetry of the 1st and the outside's via the adjustment unit, and the rise and fall of the vegan signal (4). In this way, the liquid crystal orientation on the display panel can be nearly the same to improve the display quality and the output buffer is filled. The symmetry between the discharge and the force of the discharge can also be improved to avoid the flashing of the surface. Although the invention has been disclosed above by way of example, it is not intended to limit the wood "there is a general knowledge in the technical field" Within the scope of the 赘^, you may make some changes and refinements, so this protection is subject to the scope defined in the patent application. 12 201030724
Ai.ivj.-^wo-0036-TW 28508twf.doc/n 【圖式簡單說明】 圖1為本發明之一實施例之源極驅動器的電路圖。 圖2為本發明實施例圖1之多工器的電路圖。 ' 圖3為本發明之一實施例之源極驅動器中調整單元的 • 電路圖。 圖4為本發明之另一實施例之源極驅動器中調整單元 的電路圖。 ❿ 【主要元件符號說明】 100 :源極驅動器 . 111〜112 :輸出緩衝器 120 :多工器 131〜132 :調整單元 OUT1〜OUT2 :輸出端 T1-T2 :調整訊號 VP1〜VP2 :晝素訊號 ®VR1〜VR2 :可變電阻 II :第一輸入端 12 :第二輸入端 01 :第一輸出端 02 :第二輸出端 D1 :奇資料線 D2 :偶資料線 CON :控制訊號 13 201030724u36.TW28_ CONI :第一訊號 C0N2 :第二訊號 RE—1〜RE_N :電阻 〜W4、SW—1 〜SW—N-1、SI、S2 :開關 GND :接地電壓 C1 :電容Ai.ivj.-^wo-0036-TW 28508twf.doc/n [Simplified Schematic] FIG. 1 is a circuit diagram of a source driver according to an embodiment of the present invention. 2 is a circuit diagram of the multiplexer of FIG. 1 according to an embodiment of the present invention. Figure 3 is a circuit diagram of an adjustment unit in a source driver according to an embodiment of the present invention. 4 is a circuit diagram of an adjustment unit in a source driver according to another embodiment of the present invention. ❿ [Main component symbol description] 100: Source driver. 111~112: Output buffer 120: Multiplexer 131~132: Adjustment unit OUT1~OUT2: Output terminal T1-T2: Adjustment signal VP1~VP2: Alizarin signal ®VR1~VR2: Variable Resistor II: First Input 12: Second Input 01: First Output 02: Second Output D1: Odd Data Line D2: Even Data Line CON: Control Signal 13 201030724u36.TW28_ CONI: First signal C0N2: Second signal RE-1~RE_N: Resistor~W4, SW-1~SW-N-1, SI, S2: Switch GND: Ground voltage C1: Capacitance
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