201030525 六、發明說明： 【發明所屬之技術領域】 本發明係關於周邊匯流排，且更特定言之，係關於在周 邊匯流排上於裝置間傳送資料。 【先前技術】 各種類型的周邊匯流排實施主從組態。在此類匯流排 中，主控裝置控制至或自從屬裝置的資料傳送。一種此類 匯流排稱為串列周邊介面（SPI)匯流排。在spi匯流排中， 操作可藉由一主控裝置及一或多個從屬裝置而發生。資料 傳送可發生在主控裝置與任—從屬裝置之間。此外，資料 傳送可以全雙工模式執行，纟中，主控裝置將資料寫入至 從屬裝置，同時自該從屬裝置讀取資料。 隹協定中 ---—汉《木—伙馮展直1] :::，且接著將該資料寫入至第二從屬裝置而實現㈣ =裝置之間的資料傳送。為了執行此操作，該主控裝3 可選擇將自其讀取資料的第 證對該第-從屬裝置二!片選：置，該選擇係藉㈣ -起始位址，且亦可❹；置選广號。該主控裝置設定 該等位址自動地遞增需自：自動遞增操作(亦即’ 址）。該主《置接著心^自^控裝置發送其他位 置。自該第-從屬裝置讀 钭脈…該第-從屬裝 資料傳送至該主控裝置。在二資枓，且經由資料路徑將該 存該資料。—旦讀取所有^主控裝置中的緩衝器接著儲 控裝置解除選擇該第緩衝器已滿’則該主 褒置’且接著啟用至該第二從 144760.doc 201030525 屬裝置之晶片選擇信號。接著，該主控 至該第二從屬袭置，且開始發送資料。發送時脈信號 至該緩衝器已空或該資料傳送已* 操作可繼續，直 ‘ f超過該緩衝ϋ的大小，則重複 若#傳送的資料之 一從屬裝置讀取完成該傳送所需 已自該第 入至該第二從屬裝置。 的所有資料且將該資料寫 【發明内容】 • 4發Γ=Γ個從屬'置之間傳送資料的方法及 3又備在—實施例H統包_接至周邊匯流排的主 控裝置、耦接至該周邊匯流排的第一從屬裝、201030525 VI. OBJECTS OF THE INVENTION: TECHNICAL FIELD OF THE INVENTION The present invention relates to peripheral busbars and, more particularly, to transmitting data between devices on a peripheral busbar. [Prior Art] Various types of peripheral bus bars implement a master-slave configuration. In such a busbar, the master device controls the transfer of data to or from the slave device. One such bus is called a Serial Peripheral Interface (SPI) bus. In a spi bus, operation can occur by a master device and one or more slave devices. Data transfer can occur between the master device and the slave-slave device. In addition, the data transfer can be performed in full-duplex mode, in which the master device writes data to the slave device and reads data from the slave device. In the 隹 agreement --- Han "Wu- gang Fengzhan 1] :::, and then write the data to the second slave device to achieve (4) = data transfer between the devices. In order to perform this operation, the master control device 3 can select the first card to be read from the data to the first slave device! Chip selection: the selection is based on (4) - the starting address, and can also be ❹; Select the wide number. The master device sets the addresses to be automatically incremented from: an auto-increment operation (i.e., an address). The main "sets the heart ^ from the control device to send other locations. The slave-slave device reads the pulse... the first-slave device data is transmitted to the master device. In the second capital, and the data will be stored via the data path. Once the buffers in all of the master devices are read and then the memory device deselects the first buffer is full, then the master device 'and then enables the wafer select signal to the second slave 144760.doc 201030525 device . Then, the master goes to the second slave and starts sending data. Sending the clock signal to the buffer is empty or the data transfer has been* operation can continue, straight 'f exceeds the size of the buffer buffer, then repeat if one of the data transmitted by the slave device reads the completion of the transfer The first entry to the second slave device. All the information and write the data [invention content] • 4 Γ = 从 从 ' 置 置 传送 传送 传送 传送 传送 传送 传送 传送 传送 传送 传送 传送 传送 传送 传送 传送 传送 传送 传送 传送 传送 传送 传送 传送 传送 传送 传送 传送 接 接 接 接 接 接a first slave device coupled to the peripheral busbar,
周邊匯流排的第二從屬裝置。 至U -r屬置该主控裝置可操作以將該第 伙屬裝置組態為讀取操作的來源、將該第二從屬裝置组 態為寫二操作的目標，並提供時脈信號至該第一從屬裝置 及該第：：屬裝置兩者。該主控裝置可進一步操作以起始 對屬裝置的讀取操作，其中起始讀取操作使該第 • U裝置提供資料至該周邊匯流排上。回應於該主控裝 置起始该讀取操作，該第二從屬裝置經組態以接收由該第 一從屬裝置提供料周邊匯流排上的資料。該主控裝置經 組態以忽略由該第一從屬裝置提供於該周邊匯流排上的資 料。因此》該第一> 屈駐罢 矛從屬裝置回應該主控裝置讀取操作，且 認為其正提供資料至該主控裝置。然而，在一實施例中， 該主控裝置實際上忽略此資料，且該第二從屬裝置已經板 態以接收置於該匯流排上的此資料。 —實施例_於用於在包含由周邊匯流排純在一起的 144760.doc 201030525 主控裝置、第一從屬裝置及第二從屬裝置的系統中執行資 料傳送的方法。該方法包括由該主控裝置將該第一從屬裝 置組態為用於讀取操作的資料之來源。該方法進—步包括 由該主控裝置將該第二從屬裝置組態為用於執行寫入操作 的目‘。该主控裝置可接著提供時脈信號至該第—從屬裝 置及該第二從屬裝置，且可起始對該第—從屬裝置 操作。該第-從屬裝置回應於由該主控裝置起始的讀取操 作而提供資料至该周邊匯流排上，且該第二從屬裝置回應 於該主控裝置起始該讀取操作而接收由該第—從屬裝置提 ，該周邊匯流排上的資料。該主控裝置經組態以^略由 该第一從屬裝置提供於該周邊匯流排上的資料。 【實施方式】 當閱讀以下詳細描述且參考所附圖式後，本發明的其他 態樣將變得顯而易見。 現轉至圖1，展示電子系統之一實施例的方塊圖。電子 系統10可為多種不同類型的電子系統中之一者。在一實施 例中，電子系統H)可為掌上型裝置，諸如蜂巢式電話、個 人數位助理（PDA)、前述兩者的結合，或其他類型的無線 通信裝置。在其他實施例中’電子系統1〇亦可為桌上型個 人電腦、膝上型電腦。-般來說，電子系統1〇可為任何類 型的電子系統’其可包括圖式中所示的各種組件，包括控 制器11、快閃記憶體16,及液晶顯示器（LCD)15。電子系 統10的各種實施例不必需要包括所示的所有其他組件(例 如’麥克風20)，而-些實施例可包括此處未展示之其他 144760.doc 201030525 組件（例如，微處理機，匯流排橋接單元等）β 在所示的實施例中，電子系統10包括可執行多種不同控 制功能的控制器η。控制器丨丨可為適於針對所示的各種^ 他組件而執行控制功能的多種不同類型微控制器中之一 者。在此實施例中，控制器η經耦接以經由周邊匯流排18 接收來自鍵盤12的按鍵輸入，且可提供鍵盤控制器之功能 性。控制器11亦經組態以接收來自麥克風2〇的音訊輸入。b 鲁㈣器11可經組態以處理音訊信號並提供音訊信號輸出至 揚聲器19。在一些實施例中，在控制器11與揚聲器19之間 可存在單獨的音訊處理單元。在所示實施例中的控制器u 亦耦接至隨機存取記憶體（RAM)17，隨機存取記憶體 (RAM)17可用以在電子系統1〇的操作期間儲存資訊。可使 用動態RAM(DRAM)、靜態RAM(SRAM)或其結合來實施 RAM 17。 在本實施财的控制器11包括處理單元、内部記憶體 _ 32及匯流排介面33。處理單元3ι可包括各種類型的組合性 及順序性邏輯電路，其致能提供至其之指令的執行。在一 實施例中，將由處理單元31執行的指令可儲存在内部記憶 體32中。内部記憶體32可包括非揮發性記憶體、揮發性記 憶體或其各種組合。將由處理單元31執行的指令可以非揮 發或揮發性儲存而儲存在内部記憶體32中。此外，將由處 理單元31執行的指令可儲存在其他處（例如，RAM 17中）。 在所不實施例中，控制器u經由周邊匯流排職接至快 4己隱體16 LCD 1 5及鍵盤12。在所示實施例中，匯流排 144760.doc 201030525 介面單元33提供自控制器11至周邊匯流排18的介面。周邊 匯流排18可為按主從組態操作的匯流排。在此特定二 h控制心可為主㈣置，而LCD15、快閃記憶體似 盤12為從屬裝置。在_實施例中，周邊匯流排a可為串 列周邊介面（SPI)匯流排，SPI匯流排為其中單—主控裝置 可麵接至一或更多從屬裝置的匯流排。然而，可❹其他 類型的匯流排來實施周邊匯流排18的實施例係可能且 期的。 快閃記憶體16可為非揮發性記憶體，其可心儲存即使 在電子系統H)電源關閉後仍有必要或需要保留的某此類型 的資訊。舉例而言，若電子系統1〇為舰，則儲存在快閃 2憶體16中的資訊可包括❹者輸人的聯絡人清單。在另 -實施例中，若電子系統為蜂巢式電話，則㈣記憶體16 =以儲存電話號碼。一般來說’快閃記憶體咐用於儲 子^要或需要自電子系統之一次使用保留至下次使用的 何類型的資訊。快閃記憶體16亦可用於儲存一些 鍵資訊，包含起動或起動後操作所需的程式指令：電子系 統10的屬性（例如，在其為格置彳φ & ” 成、“ 桌式電話之狀況下的電話號 ' °此外’㈣記憶體的多個例子可存在於電子 系統10的各種實施例中。 LCD 15可用於提供待自電子系統1〇輸出的各種資訊之視 覺顯不。舉例而言，若電子系統1〇為蜂巢式電話，則㈣ 15可用於顯示來話呼叫或者去話呼叫的電話號碼。在電子 系統ίο可詩發送或接㈣子料的實施财，lcd咖 144760.doc 201030525 用於顯示訊息、傳入訊息的清單（例如，「收件匿 (—Χ)」）、已發送訊息的清單等等。—般來說，咖15A second slave device of the peripheral busbar. Up to U-r, the master device is operable to configure the first slave device as a source of a read operation, configure the second slave device to be a target of a write operation, and provide a clock signal to the The first slave device and the first:: device are both. The master device is further operative to initiate a read operation of the slave device, wherein the initial read operation causes the first U device to provide data to the peripheral bus bar. In response to the master device initiating the read operation, the second slave device is configured to receive data from the peripheral slave bus of the first slave device. The master device is configured to ignore the information provided by the first slave device on the peripheral bus bar. Therefore, the "first" device is returned to the master device read operation and is considered to be providing information to the master device. However, in one embodiment, the master device actually ignores the data and the second slave device has been in an modal state to receive the data placed on the busbar. - Embodiment - A method for performing data transfer in a system comprising a 144760.doc 201030525 master, a first slave, and a second slave that are pure together by a peripheral bus. The method includes configuring, by the master device, the first slave device as a source of data for a read operation. The method further includes configuring, by the master device, the second slave device to perform a write operation. The master device can then provide a clock signal to the first-slave device and the second slave device and can initiate operation of the first-slave device. The first-slave device provides data to the peripheral bus bar in response to a read operation initiated by the master device, and the second slave device receives the read operation in response to the master device initiating the read operation The first-subordinate device mentions the information on the peripheral busbar. The master device is configured to slightly provide data provided by the first slave device on the peripheral busbar. Other aspects of the invention will become apparent from the following detailed description. Turning now to Figure 1, a block diagram of one embodiment of an electronic system is shown. Electronic system 10 can be one of many different types of electronic systems. In one embodiment, electronic system H) can be a palm-sized device, such as a cellular telephone, a personal PDA, a combination of the two, or other types of wireless communication devices. In other embodiments, the electronic system 1 can also be a desktop personal computer or a laptop computer. In general, the electronic system 1 can be any type of electronic system 'which can include the various components shown in the drawings, including the controller 11, the flash memory 16, and a liquid crystal display (LCD) 15. The various embodiments of electronic system 10 need not necessarily include all of the other components shown (eg, 'microphone 20'), and some embodiments may include other 144760.doc 201030525 components not shown here (eg, microprocessor, busbar) Bridging unit, etc.) β In the illustrated embodiment, electronic system 10 includes a controller η that can perform a variety of different control functions. The controller 丨丨 can be one of a number of different types of microcontrollers that are adapted to perform control functions for the various components shown. In this embodiment, controller n is coupled to receive key input from keyboard 12 via peripheral busbar 18 and may provide functionality of the keyboard controller. Controller 11 is also configured to receive audio input from microphone 2〇. The b (four) device 11 can be configured to process the audio signal and provide an audio signal output to the speaker 19. In some embodiments, there may be a separate audio processing unit between the controller 11 and the speaker 19. The controller u in the illustrated embodiment is also coupled to a random access memory (RAM) 17, which can be used to store information during operation of the electronic system. The RAM 17 can be implemented using dynamic RAM (DRAM), static RAM (SRAM), or a combination thereof. The controller 11 of the present embodiment includes a processing unit, an internal memory _32, and a bus interface interface 33. Processing unit 3i may include various types of combining and sequential logic circuits that enable the execution of instructions to them. In an embodiment, the instructions to be executed by processing unit 31 may be stored in internal memory 32. Internal memory 32 can include non-volatile memory, volatile memory, or various combinations thereof. The instructions to be executed by processing unit 31 may be stored in internal memory 32 for non-volatile or volatile storage. Further, the instructions to be executed by the processing unit 31 can be stored elsewhere (e.g., in the RAM 17). In the non-embodiment, the controller u is connected to the fast LCD 16 1 and the keyboard 12 via the peripheral bus. In the illustrated embodiment, the busbar 144760.doc 201030525 interface unit 33 provides an interface from the controller 11 to the peripheral busbar 18. The peripheral bus 18 can be a bus that operates in a master-slave configuration. In this particular two-h control heart can be dominated (four), while the LCD 15, flash memory like disk 12 is a slave device. In an embodiment, the peripheral bus a may be a serial peripheral interface (SPI) bus, and the SPI bus is a bus in which the single-master device can be interfaced to one or more slave devices. However, embodiments in which the peripheral busbars 18 can be implemented with other types of busbars are possible. The flash memory 16 can be a non-volatile memory that can store some type of information that is necessary or necessary to be retained even after the electronic system H) is powered off. For example, if the electronic system 1 is a ship, the information stored in the flash memory 16 may include a contact list of the person who entered the user. In another embodiment, if the electronic system is a cellular telephone, then (4) memory 16 = to store the telephone number. In general, the 'flash memory' is used for storage or what type of information is needed for the next use from the electronic system. The flash memory 16 can also be used to store some key information, including program instructions required for post-start or post-start operations: the attributes of the electronic system 10 (eg, in the case of a grid 彳 φ & ”, "table phone Multiple instances of the telephone number '° in addition' in the condition may exist in various embodiments of the electronic system 10. The LCD 15 may be used to provide visual representation of various information to be output from the electronic system 1 . In other words, if the electronic system 1 is a cellular phone, then (4) 15 can be used to display the telephone number of the incoming call or the outgoing call. In the electronic system ίο can be sent or received (4) the implementation of the sub-material, lcd coffee 144760.doc 201030525 A list for displaying messages, incoming messages (for example, "receiving (-)"), a list of sent messages, etc. - in general, coffee 15
Tk供可由電子系統1〇處理或利用的任何特定類型資訊的 顯示。 ° 現轉至圖2，其為耦接至周邊匯流排之一主控裝置及兩 個從屬裝置的配置之—實施例的方塊圖。在所示實施例 中，系統20包括由匯流排18耦接在一起的主控裝置η、第 ❹—從屬裝置22及第二從屬裝置23。在—實施例中，主控裝 置21、第一從屬裝置22及第二從屬裝置23類似於^的控 制器U、快閃記憶體16及咖15。然而，利用其他類型的 主控及從屬裝置的實施例係可能且可預期的。麵接至主控 裝置21的從屬裝置之數目可因不同實施例而改變，且對於 可麵接至周邊匯流排18的從屬裝置的數目無特定限制。因 此’利用不同數目的從屬裝置(例如，3個或3個以上)之實 施例係可能且可預期的。 • 在所示實施例中，第二從屬裝置23包括SPI輸入，但不 2括spm出（與第—從屬裝置22形成對比）。因此，可傳送 貝口凡至第—從屬裝置23，但不可自第二從屬裝置23傳送資 訊。相比之下，m决a* 山^ 因為苐一從屬裝置22包括SPI輸入及81>1輸 兩者’故可傳送資料至第—你展驻罢H +丄 置22傳送資料。#帛從屬裝置22或自第一從屬裝 M如先别所指出’在一實施例中，匯流排18可為SPI匯流 。口因此，在所示實施例中’匯流排邮括用於奶時脈 的早-路徑，及雙向spi資料線。在此特定實施例中，為 144760.doc 201030525 從屬裝置提供選擇連接。此等選擇連接對本實施例中的每 -從屬裝置而言係唯一的。主控裝置21經組態以在輸出 CS1上確證一啟用信號以選擇第一 攸屬褒置22，且經組態 以在輸出CS2上確證另一啟用彳古μ 〜 紙⑺L篪以選擇第二從屬裝 23。 在-些狀況下，可能需要或有必要自一從屬裝置傳送資 料至另-從屬裝置。以系統2〇實施於蜂巢式電話中的情況 為例，來話呼啊㈣促使自㈣記㈣料電話號碼資 枓至LCD(例如，如上文圖i中所示）。在所示實施例中此 可能在未首先將資料寫入至主控裝置21中的緩衝器的情況 下完成。 為了執行自第一從屬裝置22至第二從屬裝置23的從屬裝 置間資料傳送，主控裝置2 1經組態以確證對於第-從屬裝 =22及第二從屬裝置23兩者的選擇輸人。主控裝置Η可接 者發送貧訊至第-從屬裝置22的奶輸人，該資訊指示第 -從屬裝置22將為用於執行讀取操作的資料之來源(亦 即：將自第-從屬裝置22傳送資料)。主控裝㈣亦可發 送資汛至第二從屬裝置23的spi輸入，該資訊指示第二從 屬裝置23將為寫入操作的目標（亦即，資料將被傳送至第 二從屬裝置23/由第二從屬裝置23接收）。 控裝置21亦可提供起始讀取位址至第一從屬裝置η， 為起始4取位址指示將自其傳送資料的緩衝器或其中的記 隐體的起始位址^»類似地，主控裝置21亦可提供起始寫入 位址至第一從屬裝置22，該起始寫入位址指示資料將被寫 144760.doc 201030525 入至或以其他方式提供的起始位址。主控裝置㈣可組熊 第-從屬裝置22及第二從屬裝置23兩者以自動遞增模式操 # °當第-從屬裝置22及第二從屬裝置23兩者皆以自動遞 增模式操作時，位址在資料傳送期間自動遞增，因此節省 ' ^控裝置21為待傳送的每-資料單元發送讀取及寫入位址 的額外附加項。 除了如前所指出而提供選擇信號並組態裝置，主控裝置 籲21經由圖中所示的spi時脈信號連接提供時脈信號至第一 從屬裝置22及第二從屬裝置23。由主控裝置21所提供的時 脈信號可用於同步化從屬裝置之間的資料傳送。一般而 言，主控裝置21可組態以提供用於匯流排18上的任何類型 資訊傳送的SPI時脈信號。 -旦適當地組態主控裝置21、第一從屬裝置22及第二從 屬裝置23’資料的傳送可開始。第—從屬裝置22可自其 奶輸出提供資料至spi資料線上。資料可被傳送至第二從 # 4裝置23及主控裝置21兩者。然而，主控裝置21可經組態 以忽略該資料，從而有效地執行自第一從屬裝置22之虛設 讀取。另-方面，在此特定實例中，第二從屬裝置。為資 料傳送的實際目標，且因此在匯流排18上傳送的資料由第 二從屬裝置23獲得。如上所指出，資料傳送可藉由主控裝 置21所提供的時脈信號而同步化，同時第一從屬裝置^及 第二從屬裝置23皆經組態以分別自動遞增自其讀取資料的 位址及將資料寫入至的位址。資料傳送可繼續，直至完成 傳送所需的所有資料已由第二從屬裝置23接收。" 144760.doc -11 - 201030525 圖3為耦接至周邊匯流排之一主控裝置及兩個從屬裝置 的配置之另一實施例的方塊圖。與圖2的實施例（其中第二 從屬裝置23經組態用以接收資料而非提供資料）相比，本 實施例中的第二從屬裝置23經組態用以接收並提供資料 (亦即，在本實施例中包括SPI輸入及spi輸出接針）。因 此，為了防止資料線上的競爭（亦即，為了防止第一從屬 裝置22及第—從屬裝置23兩者試圖同時在資料線上提供資Tk is for display of any particular type of information that can be processed or utilized by the electronic system. ° Turning now to Figure 2, a block diagram of an embodiment of a configuration of one of the master and two slaves coupled to the peripheral bus. In the illustrated embodiment, system 20 includes a master device n, a second slave device 22, and a second slave device 23 coupled together by a busbar 18. In the embodiment, the master device 21, the first slave device 22, and the second slave device 23 are similar to the controller U, the flash memory 16, and the coffee maker 15. However, embodiments utilizing other types of master and slave devices are possible and contemplated. The number of slave devices that are interfaced to the master device 21 may vary from embodiment to embodiment, and there is no particular limitation on the number of slave devices that may be interfaced to the peripheral bus bar 18. Thus, embodiments utilizing different numbers of slave devices (e.g., three or more) are possible and contemplated. • In the illustrated embodiment, the second slave device 23 includes an SPI input, but does not include a spm out (compared to the first slave device 22). Therefore, the bayonet can be transferred to the slave-slave device 23, but the second slave device 23 cannot transmit the information. In contrast, m is a* mountain ^ because the slave device 22 includes both the SPI input and the 81>1 input, so the data can be transmitted to the first - you are stationed at H + 丄 22 to transmit the data. #帛 Dependent device 22 or from the first slave device M as previously indicated. In one embodiment, bus bar 18 may be a SPI bus. Thus, in the illustrated embodiment, the 'bus bar' includes an early-path for the milk clock and a two-way spi data line. In this particular embodiment, a selective connection is provided for the 144760.doc 201030525 slave device. These selective connections are unique to each of the slave devices in this embodiment. The master device 21 is configured to validate an enable signal on the output CS1 to select the first slave device 22 and is configured to confirm another enable μ 〜 纸 (7) L 在 on the output CS2 to select the second Dependent equipment 23. In some cases, it may be necessary or necessary to transfer data from a slave device to another slave device. For example, if the system is implemented in a cellular phone, the call is made (4) to facilitate the transfer of the phone number from the (4) (4) to the LCD (for example, as shown in Figure i above). This may be done in the illustrated embodiment without first writing the data to the buffer in the master device 21. In order to perform slave-to-device data transfer from the first slave device 22 to the second slave device 23, the master device 21 is configured to confirm the selection of both the slave-subordinate device=22 and the second slave device 23 . The master device can send a poor message to the milk feeder of the slave-slave device 22, the information indicating that the slave-slave device 22 will be the source of the data for performing the read operation (ie, from the first-subordinate Device 22 transmits the data). The master control device (4) may also send a spi input to the second slave device 23 indicating that the second slave device 23 will be the target of the write operation (ie, the data will be transmitted to the second slave device 23/by The second slave device 23 receives). The control device 21 can also provide an initial read address to the first slave device η, indicating that the start address is the address from which the buffer from which the data will be transferred or the start address of the cipher therein is similarly The master device 21 may also provide a starting write address to the first slave device 22, the initial write address indicating material to be written to or otherwise provided by the 144760.doc 201030525 starting address. The master device (4) can set both the bear-slave-slave device 22 and the second slave device 23 in an auto-increment mode. When both the slave-slave device 22 and the second slave device 23 operate in the auto-increment mode, the bit The address is automatically incremented during data transfer, so the save control unit 21 sends additional entries for the read and write addresses for each data unit to be transmitted. In addition to providing the selection signal and configuring the device as previously indicated, the master device 21 provides the clock signal to the first slave device 22 and the second slave device 23 via the spi clock signal connection shown in the figure. The clock signal provided by the master device 21 can be used to synchronize the data transfer between the slave devices. In general, master device 21 can be configured to provide SPI clock signals for any type of information transfer on bus bar 18. The transfer of the profile of the master device 21, the first slave device 22 and the second slave device 23' can be started appropriately. The first-slave device 22 can provide data from its milk output to the spi data line. The data can be transmitted to both the second slave #4 device 23 and the master device 21. However, the master device 21 can be configured to ignore the data to effectively perform a dummy read from the first slave device 22. In another aspect, in this particular example, the second slave device. The actual target for the data transfer, and thus the data transmitted on the bus 18, is obtained by the second slave device 23. As indicated above, the data transfer can be synchronized by the clock signal provided by the master device 21, while the first slave device and the second slave device 23 are configured to automatically increment the bits from which the data is read, respectively. Address and address to which the data is to be written. The data transfer can continue until all the data required to complete the transfer has been received by the second slave device 23. "144760.doc -11 - 201030525 Figure 3 is a block diagram of another embodiment of a configuration of one master and two slaves coupled to a peripheral bus. In contrast to the embodiment of FIG. 2 in which the second slave device 23 is configured to receive data rather than provide data, the second slave device 23 in this embodiment is configured to receive and provide data (ie, In this embodiment, the SPI input and the spi output pin are included. Therefore, in order to prevent contention on the data line (i.e., to prevent both the first slave device 22 and the slave device 23 from attempting to simultaneously provide resources on the data line
料），需要額外的啟用信號以啟用如本文中所述的在從屬 裝置之間的資料傳送。An additional enable signal is required to enable data transfer between slave devices as described herein.
在此特定實施例中’第一從屬裝置22及第二從屬裝置: 兩者各自包括讀取選擇輸入（RS)及寫入選擇輸入（ws)。j 本實施例中，為了使各別從屬裝置接收資料，必須確證) 寫入選擇輸入，否則在spi資料線上存在的資料會被^ 略。本實施例中，為了使各別從屬裝置提供資料至叫 料線上，必須啟用其各別讀取選擇輸入，否則其各別si 輸出會具有三種狀態（tri_stated)e因此’在本實施例中 若該等從屬裝置巾之-衫㈣裝£將提供資料，則主老 裝置21可選擇該特定從屬裝置，㈣可解除確軸接至月 邊匯流排18的其他從屬裝置之讀取選擇輸人，藉此導致； 各別SPI輸出具有三種狀態。此外’當主控裝置21正提伯 資料至別資料線上時’純至周邊匯流排18的所有從屬 裝置的各別讀取選擇輸人可經解料證。主控裝置21亦可 確證麵接至周邊匯流排18的任何從屬裝置的寫人選擇輸入 (若該從屬裝置將接收資料）。此外，在—個以上從屬 144760.doc 12 201030525 :接收資料的情況下’主控裝置21可確證多 寫入選擇輪入。 u的 因此，為了執行圖3的實施例中自第一從屬裝 二從屬裝置23的資料傳送，主控裝置21可經組態以確證讀 IS:號至第一從屬裝置22且確證第二從屬裳置23的寫 入選擇輪入。因而，第一從屬裝置22將經啟用以自Asp【 輸出接針提供資料（亦即，當確證第一從屬裝置22的讀取 •，擇輸入時，可自第-從屬裝置22讀取資料），同時第二 從屬裝置23將經啟用以接收資料（亦即，資料可經由第二 從屬裝置23的SPI輸入提供至第二從屬裝置23)，此時第二 從屬裝置23之SPI輸出將具有三種狀態，因為在此情況下 其讀取選擇輸入將被解除確證。若想要自第二從屬裝置^ 傳送資料至第一從屬裝置22，則此組態亦可反轉。二旦主 控裝置21、第一從屬裝置22及第二從屬裝置^經組態用於 自一從屬裝置至另—從屬裝置的資料傳送’則該資料傳送 φ 可按上文所述的方式進行。 圖4為用以在主控裝置控制下於周邊匯流排上在兩個從 屬裝置之間傳送資料的方法之一實施例的流程圖，其中不 需要該主控裝置讀取或寫入該資料。在所示實施例中方 法400以主控襄置組態其自身、來源從屬裝置（將自其提供 資料）及目標從屬裝置（將提供資料至目標從屬裝置K區塊 405)開始。更特定言之，主控裝置可組態該來源裝置以用 於讀取操作，亦即，該來源裝置將提供待傳送的資料。目 標裝置可經組態用於接收資料。以此方式組態從屬裝置可 144760.doc 13 201030525 包括經由周邊匯流排18提供一或更多命令，且亦可包括發 送起始讀取位址至該來源裝置，及發送起始寫入位址至該 目標裝置。該主控裝置亦可組態資料傳送中所涉及的從屬 裝置以在傳送資料時自動地遞增其各別讀取及寫入位址。 此可排除主控裝置為所傳送的每一資料單元（例如，每一 資料字）提供此等位址的需要。應注意，在一些實施例中 可選擇一個以上目標從屬裝置。 除了如上所述地組態從屬裝置，主控裝置亦經組態以提 供時脈信號至從屬裝置（區塊410)。該時脈信號用於同步化 至匯流排上的資料之傳送，i因此同步化㈣至該匯流排 的裝置之間的資料之傳送。該時脈信號亦可用於同步化該 匯流排上的其他資訊（例如，命令 '位址等）的傳送。 在已組態來源從屬裝置及目標從屬裝置且已提供時脈信 號之情況下，主控裝置可起始第一從屬裝置的讀取操作 (區塊415) ^在起始讀取操作的情況下’自來源從屬裝置至 匯流排上（且因此，來源從屬裝置與目標從屬裝置之間）的 資料傳送開始（區塊420)。 當自來源從屬裝置傳送資料至匯流排上時，目標從屬裝 置根據主減置組態該目標從屬裝置接收資料而接收該資 料。因此’資料因而自來源從屬裝置傳送至目標從屬裝 置。實際上，寫入操作係在目標從屬裝置上執行，其中寫 入至該目標從屬裝置之資料係由來源從屬裝置提供。然 而，在於來源從屬裝置與目標從屬裝置之間傳送資料期間 (區塊425中）’主控裝置忽略該資料。亦即，主控裝置執行 144760.doc 201030525 虛設讀取操作，從未實際留存或接收回應於其讀取操作而 自第一從屬裝置傳送至第二從屬裝置的資料。因此，本文 中所描述的方法可允許以更有效的方式自一從屬裝置傳送 >料至另一從屬裝置。而先前技術實施例可能需要首先自 來源裝置傳送資料至主控裝置中的緩衝器，且隨後自主控 裝置傳送至目標裝置，本發明的方法可允許資料經由spi 匯流排自一從屬裝置直接傳送至另一從屬裝置。 在區塊425中開始的資料傳送將繼續，直至資料傳送完 成（區塊430，是）。若需要傳送額外資料（區塊43〇，否）， 則資料傳送繼續。 儘官已參考SPI匯流排描述上文所論述的各種實施例， 但應注意，本發明之範疇不限於此。本文中所描述之資料 傳送的方法可應用於主控裝置及多個從屬裝置可耦接至的 任何匯流排。 雖然已相當詳細地描述以上實施例，但一旦完全瞭解以 上的揭示内容，則熟習此項技術者將顯而易見許多變化及 修改。意欲將以下申請專利範圍解釋為涵蓋所有此等變化 及修改。 【圖式簡單說明】 圖1為電子系統之一實施例的方塊圖； 圖2為耦接至周邊匯流排之一主控裝置及兩個從屬裝置 的配置之一實施例的方塊圖； 圖3為耦接至周邊匯流排之一主控裝置及兩個從屬裝置 的配置之另一實施例的方塊圖；及 144760.doc 201030525 圖4為用以在主控裝置之控制下於周邊匯流排上於兩個 從屬裝置之間傳送資料的方法之一實施例的流程圖其中 該主控裝置不需要讀取或寫入該資料。 雖然本發明可容許各種修改及替代形式，但其特定實施 例作為實例展不於圖式中且在本文中加以詳細描述。然 而:應理冑’圖式及其詳細描述並不意欲將本發明限於所 揭不的特定形式’相反，本發明欲涵蓋屬於如由所附申請 專利範圍所界定的本發明之精神及範疇内的所有修改、等 效物及替代物。 / 【主要元件符號說明】 10 電子系統 11 控制器 12 鍵盤 15 液晶顯示器（LCD) 16 快閃記憶體 17 隨機存取記憶體（RAM) 18 周邊匯流排 19 揚聲器 20 麥克風 21 主控裝置 22 第一從屬裝置 23 第二從屬裝置 31 處理單元 32 内部記憶體 33 匯流排介面 144760.docIn this particular embodiment, the first slave device 22 and the second slave device: each include a read select input (RS) and a write select input (ws). j In this embodiment, in order for the respective slave devices to receive the data, it is necessary to confirm the write selection input, otherwise the data existing on the spi data line will be omitted. In this embodiment, in order for the respective slave devices to provide data to the calling line, their respective read selection inputs must be enabled, otherwise their respective si outputs will have three states (tri_stated) e so that in this embodiment The slave device-shirt (four) is provided with information, the master device 21 can select the particular slave device, and (4) the read-selection input of the other slave devices that can be disconnected to the moonside busbar 18 can be removed. This results in; each SPI output has three states. In addition, when the master device 21 is lifting the data to the other data line, the individual read selections of all the slave devices that are pure to the peripheral bus bar 18 can be decrypted. The master device 21 can also confirm the writer selection input of any slave device that is connected to the peripheral busbar 18 (if the slave device will receive the data). In addition, in more than one slave 144760.doc 12 201030525: In the case of receiving data, the master device 21 can confirm the multiple write selection rounds. Thus, in order to perform the data transfer from the first slave second slave device 23 in the embodiment of FIG. 3, the master device 21 can be configured to verify that the IS: number is read to the first slave device 22 and the second slave is confirmed The write of the skirt 23 selects the round. Thus, the first slave device 22 will be enabled to provide data from the Asp [output pin (i.e., when the read of the first slave device 22 is confirmed, the data can be read from the slave device 22). While the second slave device 23 will be enabled to receive data (ie, the data may be provided to the second slave device 23 via the SPI input of the second slave device 23), the SPI output of the second slave device 23 will have three Status, because in this case its read selection input will be de-confirmed. If it is desired to transfer data from the second slave device to the first slave device 22, this configuration can also be reversed. Once the master device 21, the first slave device 22, and the second slave device are configured for data transfer from a slave device to another slave device, the data transfer φ can be performed as described above. . 4 is a flow diagram of one embodiment of a method for transferring data between two slave devices on a peripheral busbar under the control of a master device, wherein the master device is not required to read or write the material. In the illustrated embodiment, the method 400 begins with the master configuration, the source slave device (from which the data will be provided), and the target slave device (which will provide the data to the target slave device K block 405). More specifically, the master device can configure the source device for read operations, i.e., the source device will provide the data to be transmitted. The target device can be configured to receive data. Configuring the slave device in this manner may include 144760.doc 13 201030525 including providing one or more commands via the peripheral bus 18 and may also include transmitting the initial read address to the source device and transmitting the initial write address To the target device. The master device can also configure the slave devices involved in the data transfer to automatically increment their respective read and write addresses as the data is transferred. This eliminates the need for the master to provide such addresses for each data unit (e.g., each data word) transmitted. It should be noted that more than one target slave device may be selected in some embodiments. In addition to configuring the slave device as described above, the master device is also configured to provide a clock signal to the slave device (block 410). The clock signal is used to synchronize the transfer of data to the bus, i thus synchronizing (4) the transfer of data between the devices of the bus. The clock signal can also be used to synchronize the transfer of other information on the bus (e.g., command 'address, etc.). In the case where the source slave device and the target slave device have been configured and the clock signal has been provided, the master device can initiate a read operation of the first slave device (block 415) ^ in the case of the initial read operation Data transfer from the source slave device to the bus bar (and therefore between the source slave device and the target slave device) begins (block 420). When the data is transferred from the source slave to the bus, the target slave receives the data according to the primary slave configuration that the target slave receives the data. Thus the data is thus transferred from the source slave to the target slave. In effect, the write operation is performed on the target slave device, wherein the data written to the target slave device is provided by the source slave device. However, during the transfer of data between the source slave device and the target slave device (in block 425), the master device ignores the data. That is, the master device performs a dummy read operation of 144760.doc 201030525, never actually retaining or receiving data transmitted from the first slave device to the second slave device in response to its read operation. Thus, the methods described herein may allow for the transfer of > from one slave device to another slave device in a more efficient manner. While prior art embodiments may require first transferring data from the source device to a buffer in the master device and then transmitting the master device to the target device, the method of the present invention may allow data to be transmitted directly from a slave device via the spi bus bar to Another slave device. The transfer of data starting in block 425 will continue until the data transfer is complete (block 430, yes). If additional data needs to be transferred (block 43〇, no), the data transfer continues. The various embodiments discussed above have been described with reference to the SPI busbar, but it should be noted that the scope of the invention is not limited thereto. The method of data transfer described herein can be applied to any bus bar to which the master device and multiple slave devices can be coupled. Although the above embodiments have been described in considerable detail, many variations and modifications will be apparent to those skilled in the art. It is intended that the following claims be interpreted as covering all such changes and modifications. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of an embodiment of an electronic system; FIG. 2 is a block diagram of an embodiment of a configuration of one master device and two slave devices coupled to a peripheral bus bar; A block diagram of another embodiment of a configuration of one master and two slaves coupled to a peripheral bus; and 144760.doc 201030525 FIG. 4 is for use on a peripheral busbar under the control of the master A flow diagram of one embodiment of a method of transferring data between two slave devices wherein the master device does not need to read or write the material. While the invention may be susceptible to various modifications and alternative forms, the specific embodiments are not shown in the drawings and are described in detail herein. However, the present invention is not intended to be limited to the specific forms of the present invention. The invention is intended to cover the spirit and scope of the invention as defined by the appended claims. All modifications, equivalents and alternatives. / [Main component symbol description] 10 Electronic system 11 Controller 12 Keyboard 15 Liquid crystal display (LCD) 16 Flash memory 17 Random access memory (RAM) 18 Peripheral busbar 19 Speaker 20 Microphone 21 Master device 22 First Slave device 23 second slave device 31 processing unit 32 internal memory 33 bus interface 144760.doc