TW201029447A - Apparatus and method for compensating image signal and liquid crystal display using the same - Google Patents
Apparatus and method for compensating image signal and liquid crystal display using the same Download PDFInfo
- Publication number
- TW201029447A TW201029447A TW98102566A TW98102566A TW201029447A TW 201029447 A TW201029447 A TW 201029447A TW 98102566 A TW98102566 A TW 98102566A TW 98102566 A TW98102566 A TW 98102566A TW 201029447 A TW201029447 A TW 201029447A
- Authority
- TW
- Taiwan
- Prior art keywords
- signal
- sampling
- unit
- liquid crystal
- clock
- Prior art date
Links
Landscapes
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
Description
201029447 ------乂 1TW 24869twf.doc/n 六、發明說明: 【發明所屬之技術領域】 本發明是有關於一種影像信號的補償裝置,且特別是 有關於一種用於類比傳輸介面的影像信號補償裝置。 【先前技術】 一般電腦與顯示器之間常用的傳輸介面,例如視頻圖 形陣列(video graphics array,VGA),又稱為 D-SUB 介面, 或色差(YPbPr)介面等,都是以類比信號來傳輸晝素資 料’利用電壓改變來表示不同的晝素灰階值。由於目前顯 示器的解析度越來越高,晝素灰階的取樣時間也就愈短, 因此當電腦或影像信號源的電壓轉換能力不足時,便無法 在取樣週期内完成灰階電壓的轉換,顯示器所接收到的晝 素灰階資料便會失真,進而造成例如串音(cross talk)等失 真現象。 以解析度1920*1200@60Hz的顯示器為例,每一個書 素的取樣間隔時間為6ns,表示影像信號源必須在6ns中 ® 完成晝素灰階資料的轉換,不然顯示器所讀取到的晝素矢 階資料便會失真。而一般電腦約需要2〇ns〜3〇ns才能轉換 成功,因此在這種情況下,越高解析度的顯示設定所造成 的失真越嚴重。 由於目前的電腦與顯示器之間的傳輸介面大都採用 VGA ”面,像數位視訊介面(抑制visuai ,dvi) 或尚解析度多媒體介面(High_Defmiti〇n Multimedia hterface ’ HDMI)等數位傳輸介面尚未完全普及,因此對 4 zL 1TW 24869ΐ\ν£ά〇ς/ιι 201029447 於使用VGA介面軸示器而言,如何师或修正類比影 像#號來避免影像失真便顯得相當重要。 【發明内容】 ^發明提供—槪彡像錢補償裝置與方法利用前一 以!號與中間取樣信號之間的變化量來推知目前 所需的補償值’使每—灰階電壓的取樣值更 接近正確的灰时,避細示畫面失真。 詈斜i r明另提出—種液晶顯示11,影像信號補償裝 行顯===::後再經由影像處理單元進 與補=提償裝置’包括過取樣單元 序輪出第—晝素早:用以取樣類比影像信號並依 :信號。補償單元“取晝素取 修正第二晝素取間的變化量輸出-補償值’用以 元、第上述過取樣單元包括時脈單 單元輪㈣—输p二二巧二類比數轉換器。時脈 號與第二時脈信 =與::=,其中第-時脈信 :信號,而第二類比數位;換號f二畫素取 中間取樣信號。、㈣根據第二時脈信號輪出 在本發明-實施例中,上述時脈單元包括鎖相迴路舆 5 1TW 24869twf_ doc/n 201029447 =移器(phase shifter),其令鎖相 轉換器,用以輸出第—時脈 耦接於弟一類比數位 迴路與該第二類比數位轉換^之\’目移器則轉接於該鎖相 信號。 、 用以輸出該第二時脈 在本發明一實施例中,上述 信號之相位差為18〇度。 乐一時脈信號與第二時脈 在本發明另—實施例t,上料 凡、類比數位轉換器以及多工器二早几匕括時脈單 時脈信號,而類比數位轉換器教據則負責輸出倍頻 依序輸出第一晝素取樣信號 頻時脈信號, 素取樣信號。多工器則=及 第一晝素取樣信號、第二晝素 、盗,用以輪出 在本發明另—實施“、广S#u以及中間取樣信號。 一^ Μ 4例中,上述補償 早几、查找單元以及第二運算 k料運异 過取樣單元,並根據第 =异單元輕接於 出-差值信號,查找單元則二取=輪 述之補償值修正第二畫素取樣信號。粟早凡亚利用上 在本發明一實施例中,上述之 表,用以儲存差值信號與補償值之對應找關f 一查找 f本發明一實施例中,上述之過取 接益接收類比影像信號。 更、,二由連 在本發明一實施例中,上述連接器 一㈣)視細_酬色=:)= 6 iaITW 24869twf.doc/n 201029447 接器。 影像上狀錄錢鱗應於類比 科ίίΠ—料财,上狀ρ科料與第二運 .本發明另提出-郷像信號之補償方法,包括下列步 :樣一類比影像信號;然後依序輪出第-晝素 _ 間取樣信號以及第二晝素取樣信號;根據第 素取樣 <吕就與中間取樣信號之變化量輪出一補償值; 接耆利用該補償值修JL該第二晝素取樣信號。 在本發明-實施例中’其中在根據第—晝素取樣作穿 據-==輸出補償值之步驟中,更包_ 本發明另提出—種液晶顯示器,包括 ==置以及—影像處理單元,其中連接;用‘ •用以取/ 像信賴償裝絲接於該連接器, 該第-畫素取樣信號與該中間叫:$根據 .^素取樣信號;影像處理=== =並根據上述第二晝素取樣信號顯示-— 整合=縮其中上述影像信號補償裝置係 7 201029447201029447 ------乂1TW 24869twf.doc/n VI. Description of the Invention: [Technical Field] The present invention relates to an image signal compensation device, and more particularly to an analog transmission interface Image signal compensation device. [Prior Art] A common transmission interface between a computer and a display, such as a video graphics array (VGA), also known as a D-SUB interface, or a color difference (YPbPr) interface, is transmitted by analog signals. The halogen data 'utilizes voltage changes to represent different gray scale values. Due to the increasing resolution of the display, the sampling time of the gray scale of the pixel is shorter, so when the voltage conversion capability of the computer or image source is insufficient, the gray scale voltage cannot be converted in the sampling period. The grayscale data received by the display is distorted, causing distortion such as cross talk. Taking a display with a resolution of 1920*1200@60Hz as an example, the sampling interval of each pixel is 6 ns, indicating that the image source must be converted in 6 ns to complete the conversion of the gray scale data, otherwise the display reads The prime order data will be distorted. In general, a computer requires about 2 ns to 3 ns to be successfully converted, so in this case, the higher the resolution of the resolution setting, the more severe the distortion. Since the current interface between the computer and the display mostly uses a VGA" surface, digital transmission interfaces such as a digital video interface (suppressing visuai, dvi) or a high-definition multimedia interface (High_Defmiti〇n Multimedia hterface 'HDMI) are not yet fully popular. Therefore, for 4 zL 1TW 24869ΐ\ν£ά〇ς/ιι 201029447, it is very important to use the VGA interface axis indicator to prevent image distortion by using the analog image ##. [Summary] The image compensation device and method utilize the amount of change between the previous ! and the intermediate sampling signal to infer that the currently required compensation value 'make the sample value of each gray scale voltage closer to the correct gray, avoiding the fine The picture is distorted. The ir oblique ir is also proposed - a kind of liquid crystal display 11, the image signal compensation loading display ===:: and then through the image processing unit into the complement = compensation device 'including oversampling unit sequence rounded -昼素早: It is used to sample the analog image signal and according to the signal. The compensation unit “takes the change of the second 昼 取 输出 输出 输出 输出 输出 输出 用以 用以 用以 用以 用以 用以 用以The sampling unit includes a clock single unit wheel (four)-transmission p two-two-class two-class ratio converter. The clock signal and the second clock signal = and::=, where the first-clock signal: the signal, and the second analog numeral; the second symbol f-pixel takes the intermediate sampling signal. And (4) according to the second clock signal rotation in the present invention - the embodiment, the clock unit includes a phase-locked loop 舆 5 1TW 24869twf_ doc / n 201029447 = phase shifter, which makes the phase-lock converter The output-time clock is coupled to the analog-type digital loop and the second analog-digital converter is switched to the phase-locked signal. And for outputting the second clock. In an embodiment of the invention, the phase difference of the signal is 18 degrees. The first clock signal and the second clock are in the other embodiment t, the analog input, the analog digital converter and the multiplexer include a clock single clock signal, and the analog digital converter teaching data It is responsible for outputting the multiplier and sequentially outputting the first clock signal of the first pixel sampling signal, and sampling the signal. The multiplexer = and the first pixel sampling signal, the second element, and the thief are used to rotate the other implementation of the present invention, the wide S#u and the intermediate sampling signal. In the case of 4 cases, the above compensation The early several, the search unit and the second operation k are transported to the oversampling unit, and are lightly connected to the out-difference signal according to the different unit, and the search unit is used to determine the compensation value of the second pixel sampling signal. In an embodiment of the present invention, the foregoing table is used to store a correspondence between a difference signal and a compensation value. F. In an embodiment of the present invention, the above-mentioned over-receiving reception analog image In addition, in the embodiment of the present invention, the above connector (4)) has a fine_reward color =:) = 6 iaITW 24869twf.doc/n 201029447 connector. Analogy ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ Signal and second pixel sampling signal; sampling according to the first element < Lu The amount of change of the intermediate sampling signal is rotated by a compensation value; and the second enthalpy sampling signal is modified by the compensation value. In the present invention - the embodiment wherein the sampling is based on the first 昼 - -== In the step of outputting the compensation value, the invention further provides a liquid crystal display, comprising: == setting and - image processing unit, wherein the connection; using '• for taking/relying the reliance wire to the connector, The first pixel sampling signal and the middle are called: $ according to the sampling signal; the image processing === = and according to the second pixel sampling signal display - integration = reduction of the above image signal compensation device system 7 201029447
^ITW 24869twf.doc/n 本發明根據前一晝素取樣信號與中間取樣信號之變 ,量來推知目前晝素取樣信號所需的補償值,並藉^補償 每一筆晝素取樣信號,因此可避免顯示晝面失真。此外, 本發明可根據不同的電腦與顯示器規格建立對應的查找 表,使晝素取樣信號的補償更為快速與準確。 為讓本發明之上述特徵和優點能更明顯易懂,下文特^ITW 24869twf.doc/n The present invention infers the compensation value required for the current pixel sampling signal based on the variation of the previous pixel sampling signal and the intermediate sampling signal, and compensates each pixel sampling signal by the compensation. Avoid showing page distortion. In addition, the present invention can establish a corresponding lookup table according to different computer and display specifications, so that the compensation of the pixel sampling signal is faster and more accurate. In order to make the above features and advantages of the present invention more obvious, the following
舉較佳實施例,並配合所附圖式,作詳細說明如下。 【實施方式】 第一實施例DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The preferred embodiments, together with the drawings, are described in detail below. Embodiments First Embodiment
圖1為根據本發明第一實施例之影像信號補償裝置方 塊圖’影像信號補償裝置(簡稱補償裝置)1〇〇包括過取樣單 =H0與補^單it 12G ’其中補償單元12〇搞接於過取樣 早=110。過取樣單元UG會賴純的獅影像信號 ,彳τ過度取樣(Gvef sampling) ’以取得晝素轉信號ds盘 錢MS。補償單元12G會根據前—晝素轉信 與對應之中間取樣信號MS的變化量來補償目前之 j取樣域DS,使所輸出晝素取樣信號DS更接近正確 人火I5白值-類比影像信號As則例如是介面或 ;ι面中表示晝素灰階之灰階電壓。 節。靖夂昭s 步以圖2A說明補償裝置刚的電路細 H、、、圖2A,過取樣單元UG包括類比數 單元115,而時脈單元则由鎖相迫 129、·η1、夕态U7所構成。補償單元120包括運算單元 以及查找單元126,其中運算單元⑵麵接於類 8 201029447wW 24869twf.doc/n 比數位轉換器112、114的輪出,而運 類比數位轉換器112的輸出,杳杓w 124則耦接於 單元m與122之間。查找早凡126則麵接於運算 鎖相迴路116根據參考時脈, 號㈤,第-時脈信號CK1則經由相移器 脈信號㈤。類比數位轉換器112、ιΐ4根據第時 eo 號㈤與第4脈信號CK2對所接收的類比影像传號2 進订取樣。由於本實施财之相移器117具有⑽产^ 移,所以第-時脈信號cki與第二時脈信號CK2且^8〇 度的相位差’因此類比數位轉換器112、114的取樣點合相 差半個週期。類比數位轉換器112會配合類比影像信號曰八8 的晝素轉換週期來取樣,因此其輸出的晝素取樣信號DS 即表示灰階資料。而類比數位轉換器114所取樣的中U間取 樣信號MS則位於相鄰的晝素取樣信號DS之間。1 is a block diagram of an image signal compensating apparatus according to a first embodiment of the present invention. The image signal compensating apparatus (referred to as a compensating apparatus) 1 includes an oversampling list = H0 and a patching unit it 12G 'where the compensating unit 12 is connected Oversampling early = 110. The oversampling unit UG will rely on the pure lion image signal, 彳τ oversampling (Gvef sampling) to obtain the 昼 转 转 signal ds disk MS. The compensation unit 12G compensates the current j sampling domain DS according to the amount of change of the pre-alloy signal and the corresponding intermediate sampling signal MS, so that the output pixel sampling signal DS is closer to the correct human fire I5 white value-analog image signal. As, for example, is the interface or; the ι surface represents the gray scale voltage of the gray scale of the alizarin. Section. The Jingxi Zhao s step illustrates the circuit H of the compensation device as shown in Fig. 2A, and Fig. 2A. The oversampling unit UG includes the analogy number unit 115, and the clock unit is forced by the phase lock 129, η1, and 夕U7. Composition. The compensation unit 120 includes an operation unit and a search unit 126, wherein the operation unit (2) is connected to the class 8 201029447wW 24869twf.doc/n than the rotation of the digital converters 112, 114, and the output of the digital converter 112 is analogous, 杳杓w 124 is coupled between the units m and 122. Finding the FF is connected to the operation. The phase-locked loop 116 is based on the reference clock, the number (5), and the first-clock signal CK1 is transmitted via the phase-shifted pulse signal (5). The analog-to-digital converters 112, ι4 4 subscribe to the received analog image number 2 according to the first eo number (5) and the fourth pulse signal CK2. Since the phase shifter 117 of the present embodiment has (10) production, the phase difference between the first clock signal cki and the second clock signal CK2 and ^8 degrees is thus analogous to the sampling point of the digital converters 112, 114. The difference is half a cycle. The analog digital converter 112 samples with the analog image signal 曰8 8 pixel conversion period, so the output pixel sample signal DS represents gray scale data. The intermediate-to-U sampling signal MS sampled by the analog-to-digital converter 114 is located between adjacent pixel sampling signals DS.
若以第一晝素取樣信號DS1、第二晝素取樣信號DS2 表不相鄰之晝素灰階資料’則中間取樣信號MS1表示在取 得第一晝素取樣信號DS1後經過半個取樣週期(即配合第 二時脈信號CK2)後所取樣的資料,而第二晝素取樣信號 DS2則疋在取得第一畫素取樣信號DS1後經過一個取樣週 期(即配合第一時脈信號CK1)後所取樣的晝素灰階資料。 根據第一晝素取樣信號DS1與對應之中間取樣信號 MSI ’運算單元122可以算出類比影像信號as的電壓變 化量,然後輪出一差值信號DMS。差值信號DMS可表示 類比影像信號AS在電壓轉換的前半週期的電壓改變量。 9 ▲1TW 24869twf.doc/n 201029447 祕在VGA介喊Y脈介财,晝素岐階值是 壓值來表示,因此對類比影像信號AS取樣, 位資料便可表示其個別晝素的灰階值。因此,、二 DMS也可表示継影像信號批在此取种之電^ 化斜率。 當取樣週期較短時’系統端所傳送之類比影像作穿 AS會因為驅動能力而無法在取樣週期内達 ^ 電壓值。此時查找單元126會根據差值信號= 方得第二畫素取樣信號DS2所需的補償值,然後經由 運算單元124修正第二晝素取樣信號DS2。因此,運& 所輸出之第二晝素取樣信號贈會較接近類比影像 ㈣AS實際所要傳輸的灰階值。*第三晝素取齡號DS3 則會根射f雜樣錢觀與第二取樣錄Ds;之間的 差值信號來取得所需的補償值,然後經由運算單元124修 正後再輸ίϋ,其餘畫素取健號的補__類推,不再 在顯示器中,補償裝置議可設置連接器與影像縮 放益(scaler)之間,或直接整合至影像縮放器中,均可 提升顯示器的晝面品質。 接下來’進-步以圖示方式說明類比影像信號as的 電壓變化與取樣信號之間的關係。請參照圖2B,圖2B表 不類比影像信號AS由灰階0轉換至灰階255之灰階電^ 曲線示意@。第-時脈信號CK1的取樣週解於時間τ, 因士第二時脈信號CK2的取樣點在時間τ/2處。當類比影 像信號AS改變時,類比數位轉換器114會先根據第二時 ,Z1TW 24869twf.doc/n 201029447 脈信號CK2’在時間T/2處對類比影像信號as進行取樣’ 所取樣到的電壓為灰階電壓VI,即以上述之中間取樣信號 MSI表示。 然後,類比數位轉換器112在時間丁處對類比影像信 號AS進行取樣,所取樣到的電壓值為灰階電壓V2,即以 上述之第二取樣信號DS2表示,而上述第一取樣信號DS1 =表不灰階0。由於在高解析度的顯示設定下,類比影像 魯籌 信號AS由灰階〇轉換至灰階255所需的時間通常會大於 =樣時間’因此類比數位轉換器112所取樣到的第二取樣 信號DS2尚未達到所要傳輸的灰階255。第二取樣信號 DS2必須”補償後’才能達到實際所需的灰階值。 〇 運舁單7L 122根據中間取樣信號MS1與第一取樣信 號DS1所輸出的差值信號DMS即表示灰階電壓vi與灰 ^皆電壓G之間的電壓差值,也就是。而查找單元126 =根據AVI推知灰階電壓V3與灰階電壓ν2之間的差而 €3 ’也就是△” ’以修正第二取樣信號DS2。 一一取心號DS2原本等於灰階電壓V2,但經由運算單 =H ^正* ’便會趨近於灰階電壓V 3,也就是灰階25 5。 可元Μ 122 *要是作為資料的加減運算,因此 _本;=,=本技術領域具有通常知 不加累述。 揭路,應輕易推知其實施方式,在此 進行,類峨_AS轉取樣時序 、轉換,如圖2C所示。灰階電壓GL1〜GL3 11 2.Z1TW 24869twf.doc/n 201029447 為類比影像信號AS實際所需達到的灰階電壓,其與實際 上所取樣到的灰階電壓之間的差值則稱為補償值(表示△ V2)。補償裝置100則會利用類比影像信號八3在每一前半 週d所產生的差值彳s號(表示AVI)來推知相對應的補償 值,然後對晝素取樣信號進行補償,使其接近實際所要 送的灰階值。 e f同灰階變化所需的補償值皆不同,須視系統的信號 ^ 驅動能力而定,因此查找單元126會具有一查找表,用以 儲存關於差值信號與補償值之間的對應關係。只要以不同 t灰階變化組合,如灰階200至灰階25〇或灰階252至灰 =180等,預先測量差值信號與所需的補償值即可預先建 ,用的查找表。此外,由於在同一系統中,類比影像信 2壓驅動能力固定,因此也可直接經由差值信號 σ斤而的補償值為何,不需預先建立查找表。 弟二實施例 ⑩塊m圖!I為㈣本發明第二實施例之影像信號補償裝置方 3與圖2主要差別在於過取樣單元3iq,過取樣 训是利用兩倍頻率的取樣時脈來過 效 果。過取樣單元310包括鎖相迪跋侧欢 犯以及多工器318。鎖相稱316、類比數位轉換器 產生兩倍頻率的户頻取揭仁^ "根據'考時脈REF2 會插播^ 虎CK3 ’類比數位轉換器312 矿根據倍頻取樣信號CK3來進 數位轉換3§ 進過度取樣。換言之,類比 ㈣2 9在母個晝素轉換週期中取樣兩次。因此 201029447^Z1TW 24869twf.doc/n 接輪出晝素取樣信號DS與中間 並以間隔方式輪出晝素取樣信號ds與中間 取:=MS中的資料。然後經由多工器318將晝 tf 脱·.)與中間取樣信號(如讀、MS2)分别 异^ 122。補償單元12。之内部結構與其操作 原理與第一實施例相同,在此不加累述❶ 第三實施例 ,4為根據本發明第三實施例之影像信號之補償方法 :王步驟S41〇取樣一類比影像信號,然後在步驟S420 丄依序輸出第-畫素取樣信號、巾間取樣信號以及第二 旦素取樣信號’其巾每-取樣信號皆對應於—晝素灰階 接下來,在步驟S43G巾,根據第—晝素取樣信號與 曰取樣㈣之變化量,輸出補償值,然後利用此補償值 t正第二晝素取樣信號(S440)。 換句話說,在上述步驟S42〇〜S44〇中,會根據中間If the first pixel sampling signal DS1 and the second pixel sampling signal DS2 are not adjacent to the gray scale data, the intermediate sampling signal MS1 indicates that a half sampling period has elapsed after the first pixel sampling signal DS1 is obtained ( That is, the data sampled after the second clock signal CK2) is matched, and the second pixel sample signal DS2 is after one sampling period (ie, the first clock signal CK1) after the first pixel sampling signal DS1 is obtained. The sampled gray scale data. Based on the first pixel sampling signal DS1 and the corresponding intermediate sampling signal MSI' computing unit 122, the voltage variation of the analog image signal as can be calculated, and then a difference signal DMS is rotated. The difference signal DMS can represent the amount of voltage change of the analog image signal AS during the first half of the voltage conversion. 9 ▲1TW 24869twf.doc/n 201029447 The secret is in the VGA to call the Y pulse, the value of the 昼素岐 is the pressure value, so the analog image signal AS is sampled, the bit data can represent the gray level of its individual elements. value. Therefore, the two DMSs can also indicate the slope of the current image of the 継 image signal. When the sampling period is short, the analog image transmitted by the system end will not reach the voltage value within the sampling period because of the driving capability. At this time, the searching unit 126 corrects the compensation value required for the second pixel sampling signal DS2 according to the difference signal = and then corrects the second pixel sampling signal DS2 via the arithmetic unit 124. Therefore, the second pixel sampling signal output by the shipment & is closer to the analog image (4) the grayscale value actually transmitted by the AS. * The third element age DS3 will take the difference signal between the f sample and the second sample Ds; to obtain the required compensation value, and then correct it by the operation unit 124 and then input it. The rest of the pixels are complemented by the __ analog, which is no longer in the display. The compensation device can be set between the connector and the image scaler, or directly integrated into the image scaler, which can enhance the display. Surface quality. Next, the step-by-step diagram illustrates the relationship between the voltage change of the analog image signal as and the sampled signal. Referring to FIG. 2B, FIG. 2B shows that the analog image signal AS is converted from grayscale 0 to grayscale 255. The sampling period of the first-clock signal CK1 is solved at time τ, and the sampling point of the second clock signal CK2 is at time τ/2. When the analog image signal AS changes, the analog-to-digital converter 114 first samples the analog image signal as at the time T/2 according to the second time, Z1TW 24869twf.doc/n 201029447 pulse signal CK2'. It is the gray scale voltage VI, that is, expressed by the intermediate sampling signal MSI described above. Then, the analog-to-digital converter 112 samples the analog image signal AS at time D, and the sampled voltage value is a gray scale voltage V2, that is, represented by the second sampling signal DS2, and the first sampling signal DS1 = The table is not grayscale 0. Since the analog image lupus signal AS is converted from grayscale 〇 to grayscale 255 by a high resolution display setting, the time normally required to be greater than the = sample time is therefore analogized to the second sampled signal sampled by the digital converter 112. DS2 has not reached the gray level 255 to be transmitted. The second sampling signal DS2 must be "compensated" to reach the actual desired gray level value. The differential signal DMS outputted by the intermediate sampling signal MS1 and the first sampling signal DS1 represents the gray scale voltage vi. The voltage difference between the gray voltage and the voltage G, that is, the search unit 126 = infers the difference between the gray scale voltage V3 and the gray scale voltage ν2 according to AVI and €3 'is also Δ" 'to correct the second Sample signal DS2. The one-of-a-kind DS2 is originally equal to the gray-scale voltage V2, but will approach the gray-scale voltage V 3 via the operation list =H ^ positive* ′, that is, the gray scale 25 5 . Μ元Μ 122 * If it is added or subtracted as data, _本; =, = This field is generally not described. To uncover the road, it should be easy to infer its implementation method. Here, class _AS to sample timing and conversion, as shown in Figure 2C. Gray scale voltages GL1 to GL3 11 2.Z1TW 24869twf.doc/n 201029447 is the grayscale voltage actually required to be achieved by the analog image signal AS, and the difference between the grayscale voltage actually sampled is called compensation. Value (indicating Δ V2). The compensating device 100 uses the difference 彳s number (indicating AVI) generated by the analog image signal 八3 in each of the first half weeks d to infer the corresponding compensation value, and then compensates the pixel sampling signal to make it close to the actual The grayscale value to be sent. The compensation values required for e f and gray scale change are different, depending on the signal ^ drive capability of the system. Therefore, the search unit 126 has a lookup table for storing the correspondence between the difference signal and the compensation value. As long as the combination of different t gray scale changes, such as gray scale 200 to gray scale 25 〇 or gray scale 252 to gray = 180, etc., the difference signal and the required compensation value can be measured in advance to be used in advance. In addition, since the analog video signal has a fixed driving capability in the same system, it is also possible to directly pass the difference value of the difference signal, and it is not necessary to establish a lookup table in advance. The second embodiment of the present invention is a block diagram of the image signal compensating device of the second embodiment of the present invention. The main difference between FIG. 3 and FIG. 2 is the oversampling unit 3iq. The oversampling training is performed by using the sampling clock of twice the frequency. effect. The oversampling unit 310 includes a phase locked dice side comrade and a multiplexer 318. The lock phase is called 316, the analog digital converter generates twice the frequency of the household frequency to take out the net ^ " According to the 'test time pulse REF2 will insert the broadcast ^ Tiger CK3 ' analog digital converter 312 mine according to the multiplied sampling signal CK3 into the digital conversion 3 § Into oversampling. In other words, the analogy (4) 2 is sampled twice during the parental conversion cycle. Therefore, 201029447^Z1TW 24869twf.doc/n takes the pixel sampling signal DS and the middle and rotates the pixel sampling signal ds and the intermediate in the interval: = data in the MS. Then, 昼 tf is removed from the intermediate sampling signal (e.g., read, MS2) via the multiplexer 318. Compensation unit 12. The internal structure and the operation principle thereof are the same as those in the first embodiment, and are not described here. The third embodiment is a method for compensating the image signal according to the third embodiment of the present invention: the king step S41 〇 sampling an analog image signal Then, in step S420, the first-pixel sampling signal, the inter-sampling sampling signal, and the second-sampling sampling signal are sequentially outputted, and the towel-sampling signal corresponds to the gradation of the gradation, followed by the step S43G. The compensation value is output according to the amount of change of the first-order pixel sampling signal and the 曰 sampling (four), and then the second-dimensional sampling signal is positively used (S440). In other words, in the above steps S42〇~S44〇, according to the middle
取樣信號與前-晝素取樣信號之間所代表的電壓差值來推 知後一晝素取樣信號的補償值’並藉此方式來修正每一晝 素取樣信號,使其更接近正確的灰階電壓值。本實施例^ 其餘之操作細節,皆已詳述於上述第一與第二實施例,在 本技術領域具有通常知識者經由本發明之揭露應可輕易推 知’在此不加累述。 二綜合上述,本發明利用過取樣的方法,推知灰階電壓 在如半週期内的電壓變化量,並據以修正其灰階電壓的取 4值,使其更接近正確的灰階值。本發明可直接整合於顯 13 201029447 21TW 24869twf.doc/n 示器的連接介面中,使顯示 顯示晝面產生失真。 第四實施例 器可適用於不同的系統,避免 圖1與圖3A中影像錢補償裝置可直接整合於液晶顯 =二提:其晝面顯示品質’請參照圖5,® 5為根據 本發明第四實施例之液晶顯示器。液晶顯示器500包括連 接器102、影像信號補償裝置1〇〇、影像處理單元51〇以及 520。影像信號補糖⑽耦接於連接器102 與影像處理單S51Q之間,用來補償連接器1{)2所接收到 =比,像錢AS,_據以輸出晝素取樣信號Ds。液 曰了理厂51G則根據晝素取樣信號Ds於液晶面板52〇 上顯示相對應的晝面。 號補償單元1GQ以過度取樣的方式來對類比影 =畫=信號與中間取樣信號之變化量來補償』 素取樣信號,藉此補償因系統端驅動能力不 心二ΐΐ號失真問題。關於信號補償裝置100的信號 補貝照上述第—至第三實關,在此科贅述。 的ί ’影像處理單元510中會包括影像縮放 =人111電路’因此影像信號補償單元100可直 ?整== 縮放,是直接設置在連接器與影像處理 早Too的·以補〈貝所接收的類比信號。影像信號補償單 =;=並不限制上述本實施例,可— 14 201029447— 24869twf.doc/a —雖然本發明已以較佳實施例揭露如上,然其並非用以 限定本發明’任何所屬技觸射财料知識者,在不 脫離本發明之精神和範圍内,t可作些許之更動與潤飾, 因此本發明之保護範目當視後附之ψ請專利範圍所界定者 為準。 【圖式簡單說明】 圖1為根據本發明第一實施例之影像信號補償裝置方 塊圖。The voltage difference represented between the sampled signal and the pre-halogen sampled signal is used to derive the compensation value of the latter pixel sampled signal' and thereby correct each pixel sampled signal to be closer to the correct gray scale Voltage value. The rest of the operation details of the present embodiment are described in detail in the first and second embodiments described above, and those skilled in the art should be readily ascertained by the disclosure of the present invention, which is not described herein. In summary, the present invention utilizes the oversampling method to infer the amount of voltage change of the gray scale voltage in, for example, a half cycle, and accordingly corrects the value of the gray scale voltage to be closer to the correct gray scale value. The invention can be directly integrated into the connection interface of the display device, so that the display display surface is distorted. The fourth embodiment can be applied to different systems, and the image money compensation device in FIG. 1 and FIG. 3A can be directly integrated into the liquid crystal display. The surface display quality is as follows. Please refer to FIG. 5, and the controller 5 is according to the present invention. The liquid crystal display of the fourth embodiment. The liquid crystal display 500 includes a connector 102, an image signal compensating device 1, and image processing units 51A and 520. The image signal supplemental sugar (10) is coupled between the connector 102 and the image processing unit S51Q for compensating for the ratio of the received signal of the connector 1{)2, such as the money AS, and the output of the pixel sampling signal Ds. The liquid 51C is used to display the corresponding surface on the liquid crystal panel 52A according to the halogen sampling signal Ds. The number compensating unit 1GQ compensates the analog sampling signal by the analogy of the analog image = the picture signal and the intermediate sample signal in an oversampling manner, thereby compensating for the problem that the system side driving capability is not ambiguous. Regarding the signal of the signal compensating device 100, the above-mentioned first to third real-times are described in this section. ί 'Image processing unit 510 will include image scaling = human 111 circuit' so the image signal compensation unit 100 can be straightened == zoom, is directly set in the connector and image processing early Too · to compensate Analog signal. The image signal compensation list === does not limit the above-mentioned embodiment, and may be used as a preferred embodiment to disclose the above. However, it is not intended to limit the present invention. Those skilled in the art of illuminating the materials may make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the protection of the present invention is defined by the scope of the patent application. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram of an image signal compensating apparatus according to a first embodiment of the present invention.
圖2A為根據本發明第一實施例之影像信號補償裝置 電路圖。 圖2B為根據本發明第二實施例之灰階電壓曲線圖。 圖2C為根據本發明第二實施例之類比影像信號曲線 圖。 圖3為根據本發明第二實施例之影像信號補償裝置方 塊圖。Fig. 2A is a circuit diagram of an image signal compensating apparatus according to a first embodiment of the present invention. 2B is a graph of gray scale voltage according to a second embodiment of the present invention. Figure 2C is a graph of an analog image signal in accordance with a second embodiment of the present invention. Fig. 3 is a block diagram showing an image signal compensating apparatus according to a second embodiment of the present invention.
圖4為根據本發明第三實施例之影像信號之補償方法 流程圖。 圖5為根據本發明第四實施例之液晶顯示器。 【主要元件符號說明】 100 :補償襞置 102 :連接器 11〇 :過取樣單元 112、114、312 :類比數位轉換器 115、315 :時脈單元 15 201029447^1XW 24869twf.doc/n 116、316 :鎖相迴路 117 :相移器 126 :查找單元 120 :補償單元 124、122 :運算單元 318 :多工器 500 .液晶顯不裔 510 :影像處理單元 520 .液晶面板 AS :類比影像信號 DS :晝素取樣信號 MS、MSI、MS2 :中間取樣信號 REF1、REF2 :參考時脈 CK1 :第一時脈信號 CK2 :第二時脈信號 CK3 :倍頻時脈信號 Φ DS1:第一晝素取樣信號 DS2 :第二晝素取樣信號 DMS :差值信號 VI〜V3、GL1〜GL3 :灰階電壓 T :取樣週期 △VI :差值信號所代表的電壓差 △V2 :補償值所代表的補償電壓 S410〜S440 :流程圖步驟 16Fig. 4 is a flow chart showing a method of compensating an image signal according to a third embodiment of the present invention. Figure 5 is a liquid crystal display according to a fourth embodiment of the present invention. [Description of main component symbols] 100: Compensation device 102: Connector 11: Oversampling unit 112, 114, 312: Analog-to-digital converter 115, 315: Clock unit 15 201029447^1XW 24869twf.doc/n 116, 316 : phase-locked loop 117 : phase shifter 126 : search unit 120 : compensation unit 124 , 122 : arithmetic unit 318 : multiplexer 500 . liquid crystal display 510 : image processing unit 520 . liquid crystal panel AS : analog image signal DS : Alien sampling signal MS, MSI, MS2: intermediate sampling signal REF1, REF2: reference clock CK1: first clock signal CK2: second clock signal CK3: multiplied clock signal Φ DS1: first pixel sampling signal DS2: second pixel sampling signal DMS: difference signal VI~V3, GL1~GL3: gray scale voltage T: sampling period △VI: voltage difference represented by the difference signal ΔV2: compensation voltage represented by the compensation value S410 ~S440: Flowchart Step 16
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW98102566A TW201029447A (en) | 2009-01-22 | 2009-01-22 | Apparatus and method for compensating image signal and liquid crystal display using the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW98102566A TW201029447A (en) | 2009-01-22 | 2009-01-22 | Apparatus and method for compensating image signal and liquid crystal display using the same |
Publications (1)
Publication Number | Publication Date |
---|---|
TW201029447A true TW201029447A (en) | 2010-08-01 |
Family
ID=44854033
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW98102566A TW201029447A (en) | 2009-01-22 | 2009-01-22 | Apparatus and method for compensating image signal and liquid crystal display using the same |
Country Status (1)
Country | Link |
---|---|
TW (1) | TW201029447A (en) |
-
2009
- 2009-01-22 TW TW98102566A patent/TW201029447A/en unknown
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR102151949B1 (en) | Display device and driving method thereof | |
US8330699B2 (en) | Liquid crystal display and method of driving the same | |
TWI379112B (en) | Display device, apparatus and method for driving the same | |
US6753840B2 (en) | Image processing system and method of processing image data to increase image quality | |
TW502240B (en) | Image display apparatus | |
US20060192741A1 (en) | Display device, method of controlling the same, and projection-type display apparatus | |
KR101533221B1 (en) | Active matrix type display device | |
JP2007241230A (en) | Display system and related drive method of adjusting skew automatically | |
US20100177089A1 (en) | Gate driver and display driver using thereof | |
TW384407B (en) | Jitter correcting circuit and plane display device | |
TWI267677B (en) | Reference voltage generating circuit for liquid crystal display | |
TWI433090B (en) | A method for handling image data transfer in a display driver and display system | |
JP4892222B2 (en) | Image display device and its correction device | |
US7876130B2 (en) | Data transmitting device and data receiving device | |
KR101696469B1 (en) | Liquid crystal display | |
US20090195564A1 (en) | Driving method in liquid crystal display | |
TWI253050B (en) | Method of multiple-frame scanning for a display | |
KR101696467B1 (en) | Liquid crystal display | |
TW201029447A (en) | Apparatus and method for compensating image signal and liquid crystal display using the same | |
US20060164551A1 (en) | Analog front-end circuit for digital displaying apparatus and control method thereof | |
TWI376663B (en) | Frame buffer apparatus and related frame data obtaining method and data driving circuit and related driving method for hold-type display | |
WO2017201832A1 (en) | Digital-to-analog conversion circuit and data source circuit chip | |
JP2006295607A (en) | Video signal processing apparatus and display device provided therewith | |
TW200823844A (en) | Display devices and driving methods thereof | |
TWI384880B (en) | Method for video conversion of video stream and apparatus thereof |