TW201023219A - Buried capacitor structure - Google Patents

Buried capacitor structure Download PDF

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Publication number
TW201023219A
TW201023219A TW97147808A TW97147808A TW201023219A TW 201023219 A TW201023219 A TW 201023219A TW 97147808 A TW97147808 A TW 97147808A TW 97147808 A TW97147808 A TW 97147808A TW 201023219 A TW201023219 A TW 201023219A
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TW
Taiwan
Prior art keywords
capacitor
layer
dielectric film
negative
positive electrode
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TW97147808A
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Chinese (zh)
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TWI384512B (en
Inventor
Qian-Wei Zhang
ding-hao Lin
Ya-Xiang Chen
yu-de Lv
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Kinsus Interconnect Tech Corp
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Publication of TW201023219A publication Critical patent/TW201023219A/en
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Abstract

This invention is buried capacitor structure. It comprise a first metallic layer, a first dielectric film adhesive, a capacitor, a second dielectric film adhesive, and a second metallic layer, stacked in sequence. The capacitor is buried in between the first dielectric film adhesive and the second dielectric film adhesive. The first metallic layer has a first circuit pattern, and the second metallic layer has a second circuit pattern. The positive electrode and negative electrode of the capacitor are connected to the second metallic layer. The structure of the buried capacitor has a through-hole to connect the first metallic layer and the second metallic layer; moreover, it can be processed by the manufacturing process of a general printed circuit board, to effectively lower the manufacturing cost and increase product reliability.

Description

201023219 九、發明說明: 【發明所屬之技術領域】 本發明係有關於包埋式電容器結構,尤其是將電容器 包埋在電路板内的結構。 【先前技術】 所謂“埋入式被動元件”,係利用多層板之内層板製 程,採行姓刻或印刷方式,將電容器或電阻器直接製作在 ❿ 内層板上,再經壓合成多層板後可取代掉板面上組裝時所 焊接的零散被動元件,以節省板面給主動元件及其佈線 者。 埋入式植入式或藏入式技術最早是公 司是於内層板面原有銅箔毛面上形成一磷鎳合金薄膜層 當成電組成份而壓合成為薄型核心(Thin c〇re),然後再 利用兩次光阻與三次蝕刻的技術於特定位置上形成電阻 器。由於是埋入在内層中,故稱之為埋入式電阻 ❸ Resister , BR)。 一般電容結構中,電源極、介電層以及接地極是依序 堆宜的,並且為了提高電容量,除了採用高介電質的介電 層、大面積的電源極以及接地極之外,就是讓電源極以及 接地極盡可能的接近。 然而S用技術中讓電源極以及接地極太過接近,在後 續進行壓合製程時,很容易因壓迫到較上面的電源極或接 地極,而迫使部份電源極或接地極伸入介電層中,進而導 致電源極以及接地極彼此被導通,使產品變Μ良品。而 5 201023219 大面積的電源極以及#地極會使電容有厚度上的限制,會 增加結構的總厚度。 因此,習用技術愤用壓合方式將電容器埋在介電膠 膜内同時使用具較小間距的梳形電容器以形成埋入式電 容器,藉以解決上述缺點。 —參閱第-圖’制技術之埋人式電容器。如第一 膠膜20的第-表面上具有導電金屬層3〇,用以 ^成電路圖案,而電容器1〇被壓合到介電膠膜2〇的第二 表面内,射該電容H 1G可為_電 贿細2Q除 各用技術之埋入式電容器的缺點為,電容 ===得電容器的電氣特性易受核 壓值,甚至損壞電容器而失效。會降低^的可承受電 響二間距且更不受外在應用環境影 二▲仏的電容器結構,以解決習用技術的所有: 【發明内容】 包括要ΓίΓ—種包埋式電容器結構,係 玉屬層、第一介電膜膠、電容器、 丁 以及第二金屬層,並且依序堆疊成堆疊狀,=7丨電膜膠 包埋在第一介電膜膊 豐狀其中電容器被 第一電路圖案而第二金屬二;金屬層具有 正極端與貞極礙铜第二金 6 201023219 構f有貫穿孔’用以連接第-金屬層與第二金屬層,藉以 提高電容器的可靠度並縮小電容器的面積。201023219 IX. Description of the Invention: TECHNICAL FIELD OF THE INVENTION The present invention relates to a buried capacitor structure, particularly a structure in which a capacitor is embedded in a circuit board. [Prior Art] The so-called "buried passive components" are made by using the inner layer process of the multi-layer board, using the surname or printing method, directly forming the capacitor or resistor on the inner layer of the crucible, and then pressing the composite board. It can replace the scattered passive components welded on the board surface to save the board surface to the active components and their routers. Buried implanted or hidden technology was first formed by the company forming a phosphorous-phosphorus alloy film layer on the original copper foil surface of the inner layer as a thin core (Thin c〇re). The resistor is then formed at a specific location using two photoresist and three etch techniques. Since it is buried in the inner layer, it is called a buried resistor ❸ Resister , BR). In a general capacitor structure, the power supply, the dielectric layer, and the grounding electrode are sequentially stacked, and in order to increase the capacitance, in addition to using a high dielectric dielectric layer, a large-area power supply electrode, and a grounding electrode, Keep the power and ground terminals as close as possible. However, in the S technology, the power supply pole and the grounding pole are too close. When the subsequent pressing process is performed, it is easy to press the upper power source or the grounding pole to force a part of the power source or the grounding pole to extend into the dielectric layer. In this case, the power supply pole and the grounding pole are electrically connected to each other, and the product is deteriorated. And 5 201023219 Large area power poles and #地极 will limit the thickness of the capacitor, which will increase the total thickness of the structure. Therefore, conventional techniques have indiscriminately used a crimping method to embed a capacitor in a dielectric film while using a comb capacitor having a small pitch to form a buried capacitor, thereby solving the above disadvantages. — Refer to the buried capacitors of the figure-picture technology. For example, the first surface of the first film 20 has a conductive metal layer 3〇 for forming a circuit pattern, and the capacitor 1〇 is pressed into the second surface of the dielectric film 2〇, and the capacitor H 1G is injected. The disadvantage of the buried capacitor of the technology is that the electrical characteristics of the capacitor are susceptible to the nuclear pressure value and even damage the capacitor. It will reduce the capacitor structure that can withstand the electric two-pitch and is more unaffected by the external application environment to solve all the conventional technologies: [Summary] Included 种 Γ Γ 种 种 种 种 种 种 种 包 包 包 包a genus layer, a first dielectric film glue, a capacitor, a butyl, and a second metal layer, and are stacked in a stack, and the 丨7 丨 film is embedded in the first dielectric film, wherein the capacitor is used by the first circuit. a pattern and a second metal; the metal layer has a positive electrode end and a bungee barrier copper second gold 6 201023219 structure f has a through hole 'for connecting the first metal layer and the second metal layer, thereby improving the reliability of the capacitor and reducing the capacitor Area.

本發明之另一目的在提供一種包埋式電容器結構,其 中電容器可騎面梳形電容器,此平面獅電容器包括正 極以及負極,正極具有正極端以及複數個正極分支,負極 具有負極端以及複數個負極分支,正極分支與負極分支呈 現梳形線路彼此相隔預賴距並賴地相互平行,且均在 相同層級。正極分支與貞極分支之間可注人電容膏,以提 南絕緣性以及電壓承受力,藉以增加電容量。 因此本發明可解決上述習知技術的缺失,侧介電膠 =埋住細彡電容器,雜❹卜在魏,避器 的電器特性。 a也分口口 ‘頁施方式j ^下配合H元㈣歸本發明之實施方式做更 說明’俾_該項技藝者在研讀本說明書後能據 第-^第二,’本發明包埋式電容器結構之示意圓。如 =、第-導電金屬層31、第二介電:第第: 二絕緣膠層42以及第四導電金屬導=層51、第 =第-介電_與=二=;: ,層31位於第-介電膠膜21上並具有第—電 红導電金觸32聽第二介電_ 22底下並具有^ 7 201023219 ,路圖案。為連接第—導電金屬層31與第二導電声 32 ’藉貫穿孔33貫穿第一介雷藤膜w命 m 四,並填滿導電金屬 膠膜21與第二介電膝膜 德^器1〇具有正極端12與負極端14,分別經正極導 ^接線m極導通麟13而連翻第二導電金 =極導通接線11與負極導通接線_^ ❹ 鲁 部八絕緣膠層41位於第—導電金屬層31上並複蓋住 的二t介電_21’且具有複數個開口以曝露出部分 =-導電金屬層31,而第二絕、轉層 32底下並複蓋住部分的第二介電膠膜四,且且有 :=口:曝露出部分的第二導電金屬層犯,藉以提供 喊絕緣U緣膠層41與第二絕緣膠層42可使用一 路的絕緣綠漆。在第—絕緣膠層41的開口娜 笛屬層51 ’在第二絕緣膠層42的開口上形成 第四導電金朗52 ’第三導電金朗51與細導電金屬 層52係當作焊接層,用以焊接其它電子元件,比如電阻、 電感或電容。 為進-步清楚酬本㈣社要無,請參閱第三 ^顯不出本發明包埋式電容躲構所使㈣平面梳形電 i-疋要A意的疋’本發明的包埋式電容器結構並不 f艮於平面梳形電容器,抑卩其它赋的電容《包含於 本發明的範圍内。 如第三圖所示,平面梳形電容器2包括正極16斑負 極18,正極16包括正極端12以及複數個正極分支17, 9 201023219 18包括負極端14與複數個負極分支19,, 負極〗8之_充具树魏 在正極 正極】6與負極職路,並在有精㈣免 以上所述者僅為用 S 升電容量。 企圖據以物 =明,下所作有關本發明之任 在本發明意圖保護之範_。 认更屦匕Another object of the present invention is to provide an embedded capacitor structure in which a capacitor can ride a face comb capacitor, the planar lion capacitor includes a positive electrode and a negative electrode, the positive electrode has a positive terminal and a plurality of positive electrode branches, the negative electrode has a negative terminal, and a plurality of In the negative electrode branch, the positive electrode branch and the negative electrode branch appear that the comb-shaped lines are separated from each other by a predetermined distance and are parallel to each other, and are all at the same level. A capacitor paste can be injected between the positive electrode branch and the drain pole branch to increase the electrical insulation capacity and voltage withstand capability. Therefore, the present invention can solve the above-mentioned shortcomings of the prior art, the side dielectric glue = buried fine tantalum capacitors, the electrical characteristics of the hybrids in the Wei, the avoidor. a is also divided into the mouth 'page application mode j ^ under the H element (four) according to the implementation of the invention to make more description '俾 _ the artist can study this specification after the second -> second, 'embedded by the invention A schematic circle of the capacitor structure. Such as =, the first conductive metal layer 31, the second dielectric: the first: the second insulating adhesive layer 42 and the fourth conductive metal conductive layer 51, the first = first - dielectric _ and = two =;:, the layer 31 is located The first dielectric film 21 has a first electric red conductive gold contact 32 and a second dielectric _ 22 underneath and has a pattern of ^ 7 201023219. In order to connect the first conductive metal layer 31 and the second conductive sound 32' through the through hole 33, the first dielectric layer is filled with the fourth dielectric film, and the conductive metal film 21 and the second dielectric knee film are filled. 〇 has a positive terminal 12 and a negative terminal 14, respectively, through the positive electrode guide wire m pole conduction through the Lin 13 and turn over the second conductive gold = pole conduction wire 11 and the negative conduction wire _ ^ 鲁 Lu Department eight insulation layer 41 is located - The second metal dielectric _21' is covered on the conductive metal layer 31 and has a plurality of openings to expose a portion of the conductive metal layer 31, and the second insulating layer 32 is covered and covered with a second portion. The dielectric film is four, and has: = port: the exposed portion of the second conductive metal layer is smuggled, thereby providing a shattering insulating U-edge rubber layer 41 and the second insulating rubber layer 42 can use one way of insulating green paint. Forming a fourth conductive gold-language 52' on the opening of the second insulating adhesive layer 42 on the opening of the first insulating layer 41' of the first insulating layer 41. The third conductive gold layer 51 and the fine conductive metal layer 52 are used as solder layers. Used to solder other electronic components such as resistors, inductors or capacitors. For the step-by-step clear remuneration (4), the company must have no, please refer to the third ^ can not show the embedded capacitor hiding of the present invention (four) plane comb-shaped electric i-疋 A meaning of the 疋 'embedded type of the invention The capacitor structure is not limited to a planar comb capacitor, and other capacitors are included in the scope of the present invention. As shown in the third figure, the planar comb capacitor 2 includes a positive electrode 16 spot negative electrode 18, the positive electrode 16 includes a positive terminal 12 and a plurality of positive electrode branches 17, 9 201023219 18 includes a negative terminal 14 and a plurality of negative electrode branches 19, and a negative electrode 8 The _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ It is intended to protect the invention according to the invention. Recognize

【圖式簡單說明】 =一圖為技術之埋人式電容器的示意圖。 第=圖為本發明包埋式電料結構之示意圖。 第二圖為第二圖中電容器之示意圖。 【主要元件符號說明】 2平面梳形電容器 10電容器 11正極導通接線 12正極端 13負極導通接線 14負極端 15電容膏 16正極 17正極分支 18負植 19負極分支 2〇介電膠膜 201023219 21第一介電膠膜 22第二介電膠膜 30導電金屬層 31第一導電金屬層 32第二導電金屬層 33貫穿孔 41第一絕緣膠層 42第二絕緣膠層 51第三導電金屬層 52第四導電金屬層[Simple description of the figure] = A picture is a schematic diagram of a buried capacitor of the technology. The figure is a schematic view of the embedded electric material structure of the present invention. The second figure is a schematic diagram of the capacitor in the second figure. [Main component symbol description] 2 planar comb capacitor 10 capacitor 11 positive conduction wiring 12 positive terminal 13 negative conduction wiring 14 negative terminal 15 capacitance paste 16 positive electrode 17 positive branch 18 negative implant 19 negative branch 2 〇 dielectric film 201023219 21 a dielectric film 22, a second dielectric film 30, a conductive metal layer 31, a first conductive metal layer 32, a second conductive metal layer 33, a through hole 41, a first insulating layer 42, a second insulating layer 51, a third conductive metal layer 52. Fourth conductive metal layer

Claims (1)

201023219 十、申請專利範園: 1. 一種包埋式電容器結構,包括: 一第-介電膠膜,具有-上表面以及―下表面; -電容器,被縣在該第—介電膠_τ表面内,該 電容器具有—正極、—負極以及-電料,該電容^ 位於該正極與負極之間並隔離開該正極與負極,該正 極具有一正極端而該負極具有一負極端; 一第二介電膠膜’具有-上表面以及_下表面,該第 了介電膠膜的上表面__第-介電膠膜的下表面 以及該電容器,且該第二介電膠膜的上表面具有一正 極連接孔以及-負極連接孔,分別通到該電ς器的正 極端與負極端; 一第-導電金屬層,係位於該第—介電_的上表面 上,並具有一第一電路圖案;以及 -第二金屬導電層,係位於該介電膠膜的該下表面 上,該第二導電金屬層具有一第二電路圖案; 其中該第二介電膠膜的正極連接孔與負極連接孔填充 -導電金屬,*分別形成-正極導通接線與一負極導 通接線,域正極導通接線與負極^通接、線連接到該 第二金屬導電層。 2.依射請專概圍第丨項騎之包埋錢容器結構, 進一步包括: -第-絕緣膠層,係位於該第—導電金屬層上,且具 有複數個開口,以曝露出部分的該第一導電金屬層了 11 201023219 層,係位於該第二導電金屬層底下,且 一第三m叫露㈣分麟第二料金屬層,· 口上;以及屬層係位於該第一絕緣膠層的該等開 =四導電金屬層,係位於該第二絕緣膠層 3·=申請專利範圍項所述之包 ❿ 中該電容器的正極包括複數個正極分支,且 複數個負極分支。 刀又且該負極包括 4. 依據中請專利範圍第3項所述之包埋式電容器結構,其 中該等正極分支以及該等貞齡支彼此她—預定間、 距,並成對地相互平行。 B 5. 依據申請專利範圍第3項所述之包埋式電容器結構,其 中該電容膏係一絕緣材料。 〃 12201023219 X. Application for Patent Park: 1. An embedded capacitor structure comprising: a first-dielectric film having an upper surface and a lower surface; - a capacitor, being in the first dielectric gel_τ In the surface, the capacitor has a positive electrode, a negative electrode and an electric material, and the capacitor is located between the positive electrode and the negative electrode and isolates the positive electrode and the negative electrode, the positive electrode has a positive terminal and the negative electrode has a negative terminal; a second dielectric film 'having an upper surface and a lower surface, the upper surface of the first dielectric film __ the lower surface of the first dielectric film and the capacitor, and the second dielectric film The surface has a positive connecting hole and a negative connecting hole respectively leading to the positive end and the negative end of the electric current; a first conductive metal layer is located on the upper surface of the first dielectric layer and has a first a circuit pattern; and a second metal conductive layer on the lower surface of the dielectric film, the second conductive metal layer having a second circuit pattern; wherein the positive electrode connection hole of the second dielectric film Filling hole with negative electrode - conductive metal , * respectively forming a positive conducting wiring and a negative conducting wiring, the domain positive conducting wiring is connected to the negative cathode, and the wire is connected to the second metallic conducting layer. 2. According to the shot, please cover the structure of the money-filled container of the third item, and further include: - a first-insulating adhesive layer on the first conductive metal layer and having a plurality of openings to expose a portion The first conductive metal layer has a layer of 11 201023219, which is located under the second conductive metal layer, and a third m is called a (four) splitting second metal layer, and is on the mouth; and the genus layer is located in the first insulating rubber The open/four conductive metal layers of the layer are located in the package of the second insulating adhesive layer 3·=the scope of the patent application. The positive electrode of the capacitor includes a plurality of positive electrode branches and a plurality of negative electrode branches. The buried capacitor structure according to the third aspect of the invention, wherein the positive electrode branches and the ageing branches are mutually parallel, parallel to each other, predetermined, spaced, and in pairs . B. The embedded capacitor structure according to claim 3, wherein the capacitor paste is an insulating material. 〃 12
TW97147808A 2008-12-09 2008-12-09 Buried capacitor structure TW201023219A (en)

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TWI295912B (en) * 2005-10-14 2008-04-11 Advanced Semiconductor Eng Method for manufacturing a substrate embedded with an electronic component and device from the same
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