TW201017842A - Package structure of optical chip and manufacturing method therefor - Google Patents

Package structure of optical chip and manufacturing method therefor Download PDF

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Publication number
TW201017842A
TW201017842A TW97142249A TW97142249A TW201017842A TW 201017842 A TW201017842 A TW 201017842A TW 97142249 A TW97142249 A TW 97142249A TW 97142249 A TW97142249 A TW 97142249A TW 201017842 A TW201017842 A TW 201017842A
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Taiwan
Prior art keywords
optical
wafer
optical wafer
package structure
conductive metal
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TW97142249A
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Chinese (zh)
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TWI431743B (en
Inventor
Jen-Chieh Kao
Kuo-Chung Yee
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Advanced Semiconductor Eng
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Priority to TW97142249A priority Critical patent/TWI431743B/en
Publication of TW201017842A publication Critical patent/TW201017842A/en
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Publication of TWI431743B publication Critical patent/TWI431743B/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

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  • Led Device Packages (AREA)

Abstract

A package structure of an optical chip and manufacturing method therefore are disclosed. The package structure includes an optical chip and at least two conductive metal balls. The optical chip has an optical surface facing upward, a back surface facing downward, and at least two vias passing through the optical chip. Each of the vias has a first end electrically connected to the optical surface and a two end connected to the back surface. The conductive metal balls are electrically connected to the second end of the vias.

Description

201017842 九、發明說明: 【發明所屬之技術領域】 本發明係種絲W之封裝構造及其製造方法,特 別是關於-種具有導電通孔之光學晶片之封裝構造及其製造 方法。 【先前技術】 隨著生活品質提高及環保意識抬頭,綠色資源的開發及使 用越來越廣泛’其中的-項重點項目即為各種發光二極體 (light emitting diode ’ LED)於照明上之應用,由於發光二極體 具#省電A長壽命#優勢’因此與發光二極體相關之技術不斷 extraction efficiency) > 改善散熱效率及延長使用壽命等。上述改良除了與發光二極體 晶片本身的半導體材料有關之外,亦與發光二極體晶片的封裝 方式存在極大的相關性。 請參照第1、2及3圖所示,其揭示3種習用發光二極體晶 片的封裝構造。 如第1圖所示’ 一種習用發光二極體晶片的封裝構造包含 一基板11、一電路層12、一黏著層13、一光學晶片14、至少 導線15及一透光封裝材料16。該基板11之正面形成該電 路層12’該光學晶片14利用該黏著層13固定於該基板η上。 該光學晶片14之光學表面(亦即發光表面)朝上並具有焊墊(未 5 201017842 私厂、)其利用該導線ls電性連接至該電 該透光封裝材料16包覆保護該光學晶片 位,即可完成封裝製程。 電路層12。最後,利用 片14及導線15等部 7種習帛發光二極㈣>1的封裝構造包 第二引腳22、一黏著層23、一光學晶片 如第2圖所示,另一 含一第一引腳21、一笛一 H少二導線25、—透光封裝材料26及-勞光填充材料27。 '⑽21之頂面凹陷形成一杯狀凹部2Π,使該光學晶 利用該黏著層23定於該杯狀凹部211内。該杯狀凹部 2曰η之其餘空__贿光填充材料27純填滿。該光學 晶片24之光學表面(亦即發光表面)朝上並具有焊墊(未標示), 其利用該導線25電性連接至該第—引腳21及第二引腳22。 最後利用該透光封裝材料26 &覆保護該光學晶片24、導線 25及螢光填充材料27等部位,即可完成封裝製程。 如第3圖所示,再—種發光二極體晶片的封裝構造包 含一基板31、二導電端32、二凸塊33、一光學晶片%、二電 極35及一透光封裝材料36 ^該基板31之二侧端形成該等導 電端32,該光學晶片34之光學表面(亦即發光表面)朝下並具 有焊塾(未標示),其形成該電極35,並利用該凸塊33電性連 接至該等導電端32。最後,利用該透光封裝材料36包覆保護 該光學晶片34及凸塊33等部位,即可完成封裝製程。 然而,第1至3圖之發光二極體晶片的封裝構造在實際使 6 201017842 用上仍具有下述問題,例如:第!及2圖之光學晶片Μ、 是利用該導線15、25導人電源,但鱗線15、25的一部分位 於該光學晶;U4、24的二侧上方’會崎光線向外發射及影 響光取出效率。再者,第M2圖之光學晶片Μ、Μ係利用 ,黏著層13、23分別岐在該基板η或第—引腳儿上,但 疋該黏著層13、23之導熱效果較差,會影響該光學晶片14、 24將產生的熱能傳遞至該基板u或第一引腳21的散熱效率。 ❹ 當縣學晶片14、24產生的熱能無法有效驅散時,將會影響 k光學曰曰片14、24之光學表面的半導體材料之發光效率。因 此,考量散熱因素,第!及2圖之封裝構造通常僅適用在封装 功率在1瓦特(W)以下之發光二極體晶片。另一方面雖然第3 圖之覆晶式的光學晶片34沒有設置導線,且該光學晶片34產 生的熱能可通過該電極35及凸塊33傳遞至該等導電端幻及 基板3卜而具有相對較高之散熱效率。但是,由於該光學晶 ❹ 片34之光學表面朝下,故該光學晶片34之光學表面產生的光 線必需先投射至該電極35或基板31上,接著才能反射數次向 外射出;或者,光線必需向上穿透該光學晶片%,接著才能 反射數次向外射出,因此第3社覆晶式封麵造仍會造成該匕 光學晶片34之光取出效率相對低落。 以 故’有必要提供-種光學晶片之封裝構造及其製造方法, 以解決習知技術所存在的問題。 7 201017842 【發明内容】 製造本目的在於提供一種光學晶片之封軸嶋 製方法’其侧科電通孔雜連接光學表面及背面,以便 使電源線路佈雜於t 提升光取出鱗。 “響姑表_上發光,進而 本發:之次要目的在於提供一種光學晶片之封裝構造及其[Technical Field] The present invention relates to a package structure of a seed wire W and a method of manufacturing the same, and more particularly to a package structure of an optical wafer having a conductive via and a method of manufacturing the same. [Prior Art] With the improvement of the quality of life and the awareness of environmental protection, the development and use of green resources is becoming more and more extensive. The key project of these is the application of various light emitting diodes (LEDs) to lighting. Because the light-emitting diode has a #power-saving A long life # advantage', therefore, the technology related to the light-emitting diode is continuously extracting efficiency > improving heat dissipation efficiency and prolonging the service life. The above improvements are not only related to the semiconductor material of the light-emitting diode wafer itself, but also have a great correlation with the packaging method of the light-emitting diode wafer. Referring to Figures 1, 2 and 3, the package structure of three conventional light-emitting diode wafers is disclosed. The package structure of a conventional light-emitting diode wafer as shown in Fig. 1 comprises a substrate 11, a circuit layer 12, an adhesive layer 13, an optical wafer 14, at least a wire 15 and a light-transmissive encapsulating material 16. The circuit layer 12' is formed on the front surface of the substrate 11. The optical wafer 14 is fixed to the substrate η by the adhesive layer 13. The optical surface (ie, the light emitting surface) of the optical wafer 14 faces upward and has a solder pad (not used), and the wire ls is electrically connected to the conductive package 16 to protect the optical chip. Bit, you can complete the packaging process. Circuit layer 12. Finally, the second lead 22, an adhesive layer 23, and an optical wafer are shown in FIG. 2 by using a package structure of seven kinds of conventional light-emitting diodes (4) > One pin 21, one flute and one H second wire 25, a light transmissive encapsulating material 26 and a light-filling filler material 27. The top surface of the '10' 21 is recessed to form a cup-shaped recess 2, and the optical crystal is set in the cup-shaped recess 211 by the adhesive layer 23. The rest of the cup-shaped recess 2 曰 __ bribe filling material 27 is purely filled. The optical surface (i.e., the light emitting surface) of the optical wafer 24 faces upward and has a pad (not shown) electrically connected to the first pin 21 and the second pin 22 by the wire 25. Finally, the optical package 24, the wires 25, the fluorescent filler 27, and the like are protected by the transparent encapsulating material 26 & As shown in FIG. 3, the package structure of the light-emitting diode chip includes a substrate 31, two conductive ends 32, two bumps 33, an optical wafer %, two electrodes 35, and a light-transmissive encapsulating material 36. The two sides of the substrate 31 form the conductive ends 32. The optical surface (ie, the light emitting surface) of the optical wafer 34 faces downward and has a soldering ring (not labeled), which forms the electrode 35, and is electrically connected by the bump 33. Sexually connected to the conductive ends 32. Finally, the optical wafer 34, the bumps 33, and the like are covered by the light-transmissive encapsulating material 36 to complete the packaging process. However, the package structure of the light-emitting diode wafers of FIGS. 1 to 3 still has the following problems in practical use of 6 201017842, for example: And the optical wafer of FIG. 2, which uses the wires 15, 25 to guide the power source, but a part of the scales 15, 25 are located on the optical crystal; above the two sides of U4, 24, the light is emitted outward and affects the light extraction. effectiveness. Furthermore, in the optical wafer Μ and Μ of the M2, the adhesive layers 13 and 23 are respectively attached to the substrate η or the first pin, but the thermal conductivity of the adhesive layers 13 and 23 is poor, which may affect the The optical wafers 14, 24 transfer the generated thermal energy to the heat dissipation efficiency of the substrate u or the first lead 21. ❹ When the thermal energy generated by the county wafers 14, 24 cannot be effectively dissipated, the luminous efficiency of the semiconductor material on the optical surfaces of the k optical cymbals 14, 24 will be affected. Therefore, consider the heat dissipation factor, the first! The package structure of Figure 2 and Figure 2 is generally only applicable to light-emitting diode chips with a package power of less than 1 watt (W). On the other hand, although the flip-chip optical wafer 34 of FIG. 3 is not provided with a wire, the thermal energy generated by the optical chip 34 can be transmitted to the conductive terminals and the substrate 3 through the electrode 35 and the bump 33. Higher heat dissipation efficiency. However, since the optical surface of the optical wafer 34 faces downward, the light generated by the optical surface of the optical wafer 34 must be projected onto the electrode 35 or the substrate 31 before being reflected several times outward; or, light It is necessary to penetrate the optical wafer % upwards, and then to reflect the light out several times. Therefore, the flip-chip cover of the third embodiment still causes the light extraction efficiency of the germanium optical wafer 34 to be relatively low. Therefore, it is necessary to provide a package structure of an optical wafer and a method of manufacturing the same to solve the problems of the prior art. 7 201017842 SUMMARY OF THE INVENTION The object of the present invention is to provide a method for sealing a shaft of an optical wafer, wherein the side of the electrical wiring is connected to the optical surface and the back surface so that the power supply line is mixed with the light to extract the scale. "The sound of the gull _ illuminating, and then the second: the second objective is to provide an optical chip package structure and

製、方法轉電通孔電性連接光學表面及背面,以便 使背面朝下並經由導電金屬球將熱能迅速導出,進而提升散熱 效率,並延長使用壽命。 、、、 ▲ 本發明之另—目的在概供—種絲晶狀聰構造及其 製造方法,其係利用導電通孔電性連接光學表面及背面,並搭 ^吏用透贿板’使·體職觀的尺寸_傾晶圓_ 日日片尺寸封裝(wafer level chip scaie,u^csp),進而 有利於封裝構造之微型化(miniaturizati〇n)。 為達上述之目的,本發明提供一種光學晶片之封裝構造, 其包含一光學晶片及至少二導電金屬球。該光學晶片具有一光 學表面、一背面及至少二導電通孔,該光學表面朝上,而該背 面朝下。該等導電通孔貫穿該光學“,該科電通孔之一第 一端電性連接該光學表面,及其一第二端連接至該背面。該等 導電金屬球電性連接至該等導電通孔的第二端。 在本發明之一實施例中,該背面更包含一重佈線層 8 201017842 (re-distribution layer,RDL) ’該重佈線層電性連接該等導電通 孔的該第二端及該等導電金屬球。 在本發明之一實施例中,該光學晶片利用該等導電金屬球 結合於一基板上。該基板上具有一透光封裝材料,以包覆該光 學晶片及導電金屬球。 在本發明之一實施例中,該光學晶片之該光學表面上另設 有一螢光填充材料層。該榮光填充材料層上另設有一透明蓋 © 板。該透明蓋板選自玻璃蓋板。 在本發明之一實施例中’該光學晶片之該光學表面上另設 有一具有一凹陷部之透明蓋板,且該凹陷部内填入一螢光填充 材料。該透明蓋板選自玻璃蓋板。 在本發明之一實施例中,該等導電金屬球選自錫凸塊 (solder-containing brnnp)、金凸塊(gold-containing bump)或錫球 (solder ball)。該光學晶片係發光二極體晶片。 另一方面,本發明提供一種光學晶片之封裝構造之製造方 法,其包含步驟:提供一光學晶圓,包含數個光學晶片,其中 該等光學晶片具有-光學表面及一背面;在該光學晶圓之該等 光學晶片上分別形成至少二導電通孔,其中該等導電通孔貫穿 該等光學晶;i,該等導電通孔包含—電性連接該絲表面之第 一端,及—連接至該背面之第二端;在該鱗之各該等光 學晶片的該背φ分卿成至少二導電金屬球,該等導電金屬球 9 201017842 分別電性連接至該等導電通孔的第 以分離該等光學晶片。 二端;及切割該光學晶圓 , 在本發明之一實施例中,在形 在該光學晶圓之料光“ H 4導屬球之前,另 •字日曰圓之該等先學晶片的該背面形成一 (re-distribution layer,RDL),且誃曹佑始 Μ " μ重佈線層係電性連接該等導 電通孔的該第二獻該料電金屬球。 在本發明之一實施例中,在分離該等光學晶片之後,利用 該等導電金觀將鱗絲晶相設於 等基板具有-透絲裝材料,以包覆鱗絲晶片及導電金屬 球。 在本發明之一實施例中,在形成該等導電金屬球之前,另 在該等光學晶片之該光學表面上依序設置—螢光填充材料層 及一透明蓋板。該透明蓋板選自玻璃蓋板。The method and method are electrically connected to the optical surface and the back surface so that the back side faces downward and the heat energy is quickly led out through the conductive metal ball, thereby improving the heat dissipation efficiency and prolonging the service life. , ▲, ▲ Another object of the present invention is to provide a silk crystal structure and a manufacturing method thereof, which are electrically connected to an optical surface and a back surface by using a conductive through hole, and are used to make a bridle plate. The size of the body view _ wading wafer wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa wa To achieve the above object, the present invention provides an optical wafer package structure comprising an optical wafer and at least two conductive metal balls. The optical wafer has an optical surface, a back surface, and at least two conductive vias with the optical surface facing upward and the back side facing downward. The conductive vias are electrically connected to the optical surface, and a first end of the electrical via is electrically connected to the optical surface, and a second end thereof is connected to the back surface. The conductive metal balls are electrically connected to the conductive The second end of the hole. In an embodiment of the present invention, the back surface further includes a redistribution layer 8 201017842 (re-distribution layer (RDL) '. the redistribution layer is electrically connected to the second end of the conductive via And the conductive metal ball. In an embodiment of the invention, the optical wafer is bonded to a substrate by using the conductive metal balls. The substrate has a light-transmissive encapsulating material for coating the optical wafer and the conductive metal. In one embodiment of the present invention, the optical surface of the optical wafer is further provided with a layer of fluorescent filler material. The glare filling material layer is further provided with a transparent cover plate. The transparent cover is selected from the group consisting of a glass cover. In one embodiment of the present invention, the optical surface of the optical wafer is further provided with a transparent cover having a recessed portion, and the recessed portion is filled with a fluorescent filler material. The transparent cover is selected from the group consisting of glass. cover In an embodiment of the invention, the conductive metal balls are selected from the group consisting of a solder-containing brnnp, a gold-containing bump or a solder ball. In one aspect, the present invention provides a method of fabricating an optical wafer package structure, comprising the steps of: providing an optical wafer comprising a plurality of optical wafers, wherein the optical wafers have an optical surface and a back surface; Forming at least two conductive vias on the optical wafers of the optical wafer, wherein the conductive vias penetrate the optical crystals; i, the conductive vias include - electrically connecting the first ends of the surface of the filaments And connected to the second end of the back surface; the back surface of each of the optical wafers of the scale is divided into at least two conductive metal balls, and the conductive metal balls 9 201017842 are electrically connected to the conductive lines respectively The first of the holes separates the optical wafers. The two ends; and the optical wafer is cut. In an embodiment of the invention, before the light of the optical wafer is formed, the word is changed. Such a day Studies of the back surface of the wafer forming a (re-distribution layer, RDL), and Chi Cao Yu start Μ " μ redistribution layer of the second electrically-based material offering the electrically conductive metal balls are connected such vias. In one embodiment of the present invention, after separating the optical wafers, the spheroidal crystals are disposed on the substrate with the conductive gold material to have a fiber-optic material to coat the spheroidal wafer and the conductive metal ball. In one embodiment of the invention, a phosphor fill material layer and a transparent cover are disposed on the optical surface of the optical wafers prior to forming the conductive metal balls. The transparent cover is selected from the group consisting of glass covers.

在本發明之-實施例中,在形成該等導電金屬球之前另 在該等光學晶片之該光學表面上設置一具有一凹陷部之透明 蓋板,其中該凹陷部内填入一螢光填充材料^該透明蓋板選自 玻璃蓋板。 在本發明之一實施例中,該等導電金屬球選自錫凸塊、金 凸塊或錫球。該等光學晶片係發光二極體晶片。 【實施方式】 為了讓本發明之上述及其他目的、特徵、優點能更明顯易 201017842 廑下文將特舉本發明較佳實施例,並配合所附圖式作詳細 說明如下。 睛參照第4八、犯、4C、仍、犯、4F及4G圖所示,本發 實施例之光學晶片之封裝構造之製造方法主要包含下 列步驟:提供-光學晶圓4,其包含數個光學晶片4〇,其中該 等光學晶片40具有一光學表面μ及一背面幻;在該光學晶 圓4之該等絲晶片40分娜成至少二導電通孔43,其中該 β 等導電通孔43貫穿該等光學晶片4〇,該等導電通孔43之- 第-端電性連接該光學表面4卜及其一第二端連接至該背面 42,在該光學晶圓4之各該等光學晶片4〇的背面42分別形成 至J 一導電金屬球44,該等導電金屬球44分別電性連接至該 等導電通孔43的第二端;及切割該光學晶圓4,以分離該等 光學晶片40。 請參照第4Α圖所示,本發明第一實施例之光學晶片之封 & 裝構造之製造方法第一步驟係:提供一光學晶圓4,其包含數 個光學晶片40,其中該等光學晶片4〇分別具有一光學表面41 及一背面42。在本步驟中,該光學晶圓4所包含之光學晶片 40較佳係選自發光二極晶片也中)、有機發光二極晶片 (OLED chip)或高分子發光二極晶片(pLED chip)等光學晶片。 依實際需求,該光學晶圓4之基材可選自矽(¾)、氮化鎵(日必) 或其他半導體基材。該等光學晶片40之光學表面41係指具有 201017842 光學半導體材料並可產生光學反應絲面,其可選自單層或多 層之光學表面’並可依電致發光(electro_luminescent)或光致發 光(ph〇to-Iuminescent)原理產生至少一種色光。在本發明中,並 不限疋該光學晶圓4之基材種類或該光學表面41之層數及其 產生色光的顏色。再者,該背面42係指該等光學晶片4〇不具 光學半導體材料的另-表面,該背面42通常裸露該光學晶圓 4之基材。 睛參照第4B及4C圖所示,本發明第一實施例之光學晶片 之封裝構造之製造方法第二步娜:在該光學晶圓4之各該等 光學晶片4〇分卿成至少二導電通孔#,其中該等導電通孔 43貫穿該等光學晶片4〇,該等導電通孔43具有一電性連接該 光學表面41之第一端,及一連接至該背面42之第二端。在本 步驟中’本發明係選擇以晶圓通孔(wafertj^〇ugh 技術(亦稱為貫穿矽晶通孔技術,thr〇ugh silic〇n via,Tsv)處理 該光學晶圓4之各光學晶片4G。上述晶II通孔技術可選擇利 用雷射鑽孔、機械鑽孔或者光阻搭配侧等方式先形成貫穿該 光學表面41及背面42之通孔,接著再利用電鍍 (eleCtr〇plathg)、無電電鍍咖滅ss plating)或印刷(printing) 等方式將銅或其他導電金屬填入該通孔中,#此形成該等導電 通孔43(through via)。該等導電通孔43之第一端電性連接該光 學表面4i ’及其第二端連接至該背面42,並裸露於該背面42。 201017842 如第4C圖所示,在本步驟之後及第三步驟之前,本發明 較佳選擇在該光學晶圓4之光學晶片40的背面42預先形成一 重佈線層 420(re-distribution layer,RDL),該重佈線層 420 包 含至少二焊墊,並可選擇形成一絕緣層421。該重佈線層42〇 之焊墊對應結合於該等導電通孔43之第二端,該絕緣層421 則覆蓋該焊墊的周緣及該焊墊421以外的其他區域。 請參照第4D圖所示,本發明第一實施例之光學晶片之封 裝構造之製造方法第三步驟係;在該光學晶圓4之各該等光學 曰曰片40的背面42分別形成至少二導電金屬球44,該等導電 金屬球44分別電性連接至該等導電通孔43的第二端。在本步 驟中,該等導電金屬球44可選擇通過該重佈線層42〇的焊墊 而間接電性連接至該等導電通孔43的第二端;或者,若未設 置該重佈線層420 ’該等導電金屬球μ則可直接電性連接至 該等導電通孔43的第二端。再者,在本步射,該等導電金 屬球可選自含有錫材料或錫合金之錫凸塊⑽to_e()ntaining bump)、錫球(s〇lder ball)或含有金材料或金合金之金凸塊 (g〇ld_c〇ntaining bump)。本發明係可利用現有之電鍍或印刷製 程搭配回焊(reflow)製程,而直接在該光學晶圓4之各光學晶 片40的背面42形成該等導電金屬球44(亦即錫凸塊);或者, 利用金線打線(wirebonding)及扯斷的方式,直接在該光學晶圓 4之各光學晶片40的背面42形成該等導電金屬球44(亦即含 13 201017842In the embodiment of the present invention, a transparent cover having a recessed portion is formed on the optical surface of the optical wafer before forming the conductive metal ball, wherein the recessed portion is filled with a fluorescent filler material. ^ The transparent cover is selected from a glass cover. In one embodiment of the invention, the electrically conductive metal balls are selected from the group consisting of tin bumps, gold bumps, or solder balls. The optical wafers are light emitting diode wafers. The above and other objects, features, and advantages of the present invention will become more apparent. The manufacturing method of the package structure of the optical wafer of the present embodiment mainly includes the following steps: providing - an optical wafer 4, which includes several, as shown in the drawings of the fourth, the criminal, the fourth, the fourth, the fourth, the fourth, and the fourth. The optical wafer 40 has an optical surface μ and a back surface illusion; the silk wafer 40 of the optical wafer 4 is divided into at least two conductive vias 43, wherein the conductive vias such as β 43 through the optical wafers 4, the first ends of the conductive vias 43 are electrically connected to the optical surface 4 and a second end thereof is connected to the back surface 42 for each of the optical wafers 4 The back surfaces 42 of the optical wafers 4 are respectively formed to J-conductive metal balls 44, and the conductive metal balls 44 are electrically connected to the second ends of the conductive vias 43 respectively; and the optical wafer 4 is cut to separate the The optical wafer 40 is equal. Referring to FIG. 4, a first step of the manufacturing method of the optical wafer sealing & mounting structure according to the first embodiment of the present invention is to provide an optical wafer 4 including a plurality of optical wafers 40, wherein the opticals The wafers 4 have an optical surface 41 and a back surface 42, respectively. In this step, the optical wafer 40 included in the optical wafer 4 is preferably selected from the group consisting of a light-emitting diode chip, an organic light-emitting diode chip (OLED chip) or a polymer light-emitting diode chip (pLED chip). Optical wafer. The substrate of the optical wafer 4 may be selected from the group consisting of ruthenium (3⁄4), gallium nitride (Japan) or other semiconductor substrates. The optical surface 41 of the optical wafer 40 is meant to have an optical semiconductor material of 201017842 and can produce an optical reaction surface which can be selected from a single or multiple layers of optical surfaces and can be electroluminescent or photoluminescent ( The ph〇to-Iuminescent) principle produces at least one shade of light. In the present invention, the type of the substrate of the optical wafer 4 or the number of layers of the optical surface 41 and the color of the colored light are not limited. Moreover, the back side 42 refers to the other surface of the optical wafer 4 that does not have an optical semiconductor material, and the back side 42 typically exposes the substrate of the optical wafer 4. Referring to FIGS. 4B and 4C, the manufacturing method of the package structure for an optical wafer according to the first embodiment of the present invention is the second step: at least two of the optical wafers of the optical wafer 4 are divided into at least two conductive layers. a through hole, wherein the conductive vias 43 extend through the optical wafers 4, the conductive vias 43 have a first end electrically connected to the optical surface 41, and a second end connected to the back surface 42 . In this step, the present invention selects the optical wafers of the optical wafer 4 by wafer vias (also known as through-silicon via technology, thr〇ugh silic〇 via, Tsv). 4G. The above-mentioned crystal II through-hole technology can select a through hole through the optical surface 41 and the back surface 42 by means of laser drilling, mechanical drilling or photoresist matching side, and then using electroplating (eleCtr〇plathg), Copper or other conductive metal is filled into the via hole by way of ss plating or printing, which forms the through vias 43. The first ends of the conductive vias 43 are electrically connected to the optical surface 4i' and the second end thereof is connected to the back surface 42 and exposed to the back surface 42. 201017842, as shown in FIG. 4C, after the present step and before the third step, the present invention preferably pre-forms a re-distribution layer (RDL) on the back surface 42 of the optical wafer 40 of the optical wafer 4. The redistribution layer 420 includes at least two pads and optionally forms an insulating layer 421. The soldering pads of the redistribution layer 42 are correspondingly coupled to the second ends of the conductive vias 43. The insulating layer 421 covers the periphery of the pads and other regions than the pads 421. Referring to FIG. 4D, a third step of the manufacturing method of the package structure for an optical wafer according to the first embodiment of the present invention is formed; at least two of the back surfaces 42 of the optical dies 40 of the optical wafer 4 are respectively formed. The conductive metal balls 44 are electrically connected to the second ends of the conductive vias 43 respectively. In this step, the conductive metal balls 44 may be indirectly electrically connected to the second ends of the conductive vias 43 through the pads of the redistribution layer 42A; or, if the redistribution layer 420 is not provided The conductive metal balls μ can be directly electrically connected to the second ends of the conductive vias 43. Furthermore, in this step, the conductive metal balls may be selected from tin bumps (10) to_e () ntaining bumps containing tin materials or tin alloys, s〇lder balls or gold containing gold materials or gold alloys. Bump (g〇ld_c〇ntaining bump). The present invention can utilize existing plating or printing processes in conjunction with a reflow process, and directly form the conductive metal balls 44 (ie, tin bumps) directly on the back surface 42 of each optical wafer 40 of the optical wafer 4. Alternatively, the conductive metal balls 44 are formed directly on the back surface 42 of each of the optical wafers 40 of the optical wafer 4 by means of wire bonding and tearing (ie, including 13 201017842).

金凸塊);或者,亦可先預製該等導電金屬球44 ,再將其焊接 至該光學晶圓4之各光學晶片40的背面42(亦即錫球)。當該 等導電金屬球44選自錫凸塊時,通常需要預先形成至少一球 底金屬層(未繪示)於該重佈線層420的焊墊上或該等導電通孔 43的第二端上,以增加結合強度。在本實施例中,亦可能另 外存在某些導電金屬球44未與該等導電通孔4S的第二端電性 連接,此時該些導電金屬球44仍可用以支標該等光學晶片4〇 或導出該等光學晶片40之熱能。 請參照第4E及4F圖所示,本發日月第一實施例之光學晶片 之封裝構造之製造方法第四步驟係:切割該光學晶圓4,以分 離該等光學晶片4〇。在本步射,本侧射選擇利用機械 切割、雷射切割或水刀切割等方式切割該光學晶圓4,以分離 (—g)該等光學晶# 4〇。在切割之後,各該等光學晶片 4〇皆具有該光學表面4卜背面42及至少二導電通孔43,該 光學表面4i朝上’ _背面a朝下。料導電财43貫穿 該等光學W 4〇,料導輸U3之第_魏性連接該光學 =面4卜及其第二端連接至該背面们。該等導電金屬球私電 性連接至該科魏孔43 _二端。如此,該科電金屬球 44可將一外部電源經由該等導電通孔奶而導引至各光學晶片 的光學表面41,喊生絲反應⑽域生特定色光卜 請參照第4G圖所示’在分離該等光學晶片4〇之後,本發 201017842 明第一實施例可選擇進一步利用該等導電金屬球44將該等光 學晶片40分別固設於複數個對應基板45上。該基板45係一 封裝用印刷電路板’且較佳選自一杯狀基板,但並不限於此。 萬該基板45選自杯狀基板時’該基板45填滿一透光封裝材料 46 ’以包覆保護該光學晶片40及導電金屬球44。必要時,該 透光封裝材料46可選擇混摻螢光粉,以改變該光學晶片4〇產 生之色光的顏色。如此,即完成本實施例之光學晶片4〇的封 裝製程。當該基板45及導電金屬球44導入一外部電源時,外 部電源可經由該等導電通孔43而導引至該光學晶片4〇的光學 表面41,以產生光學反應(例如產生特定色光)。同時,在產生 光學反應期間造成的熱能,則可經由該等導電金屬球44(及導 電通孔43)導出至該基板45。 請參照第5A、5B、5C ' 5D、5E、5F及5G圖所示,本發 明第二實施例之光學晶片之封裝構造及其製造方法係相似於 本發明第一實施例’但該第二實施例之光學晶片之封裝構造之 製造方法係包含下列步驟:提供一光學晶圓5,其包含數個光 學晶片50,其中該等光學晶片5〇具有一光學表面51及一背 面52;在該光學晶圓5之各該等光學晶片5〇分別形成至少二 導電通孔53 ’其中該等導電通孔53貫穿該等光學晶片%,該 等導電通孔53具有一電性連接該光學表面51之第一端,及一 連接至該背面52之第二端;在該等光學晶片50之光學表面 15 201017842 ^ ^依序設置—螢光填充材料層54及-透明蓋板55;在該光 子b曰圓5之各該等絲晶片5()的背面52分卿成至少二導電 金屬球56 ’該等導電金屬球%分別電性連接至該等導電通孔 53的第二端;及切割該光學晶圓5,以分離該等光學晶片50。 再者’如第5C圖所示,在第二步驟之後及第三步驟之前,本 發明較佳麵在該光學晶圓5之光學晶# s()的背面52預先形 成重佈線層520,其同樣包含至少二焊墊,並可選擇形成一 絕緣層521。如第5D圖所示,該螢光填充材料層54係由螢光 粕及勘著劑混合而成’本發明並不限定其混合比例。該螢光填 充材料層54用以改變該等光學晶片50產生之色光的顏色。如 第5E圖所示,該透明蓋板55較佳選自玻璃蓋板。 請參照第5G圖所示,在分離該等光學晶片5〇之後,各光 學晶片50之光學表面51上皆具有該螢光填充材料層54及透 明蓋板55,該透明蓋板55具有保護作用’因此可取代透光封 褒材料。此時,已完成本實施例之光學晶片5〇的封裝製程。 再者’如第5H圖所示,在組裝時,本發明第二實施例可直接 利用該等導電金屬球56將該等光學晶片50固設於數個對應電 路板57上。當該電路板57及導電金屬球56導入一外部電源 時’外部電源可經由該等導電通孔53而導引至該光學晶片50 的光學表面51,以產生光學反應(例如產生特定色光)。同時, 在產生光學反應期間造成的熱能,則可經由該等導電金屬球 16 201017842 56(及導電通孔53)導出至該電路板57。 請參照第6人、紐、叱、61)、6£、6?及6(}騎示,本發 明第三實施例之光學晶片之封裝構造及其製造方法係相似於 本發明第-及二實_’但該第三實施例之光學晶片之封裝構 造之製造方法聽含下列步驟··提供—光學晶圓6,其包含數 個光學晶片6G,其中該等光學晶片⑼具有—光學表面61及 -背面62;在該絲_6之各料絲⑼⑼分卿成至 少二導電通孔63 ’其中該料電通孔Μ貫穿該等光學晶片 6〇,該等導電通孔63具有一電性連接該光學表® 61之第-端’及-連接至該背面62之第二端;在該等光學晶片6〇之光 學表面61上設置一透明蓋板64 ’其具有一凹陷部⑷,該凹 陷部641内具有—螢光填充材料65 ;在該光學晶圓6之各該 等光學晶片60的背面62分別形成至少二導電金屬球的,該 等導電金;| ^ 66分別雜連接至轉導電通孔63的第二端; 及切割該光學晶圓6,以分離該等光學晶片6〇。再者,如第 6C圖所示’在第二步驟之後及第三步驟之前,本發明較佳選 擇在該光學晶圓6之光學晶片6〇的背面02預先形成一重佈線 層620 ’其同樣包含至少二焊墊,並可選擇形成一絕緣層⑵。 如第奶圖所*,該透明蓋板64較佳選自玻璃蓋板,且該透 明蓋板64較佳係利用一黏著層(未繪示)結合在該光學表面61 上該凹陷部641係可形成各種形成,例如矩形、圓形、弧形 17 201017842 或其他幾何形狀。該螢光填充材料65係由螢光粉及黏著劑混 合而成’本發明並不限定其混合比例。該螢光填充材料層65 用以改變該等光學晶片60產生之色光的顏色。Gold bumps; or alternatively, the conductive metal balls 44 may be pre-formed and soldered to the back side 42 (i.e., solder balls) of each of the optical wafers 40 of the optical wafer 4. When the conductive metal balls 44 are selected from tin bumps, it is generally required to form at least one ball bottom metal layer (not shown) on the pads of the redistribution layer 420 or the second ends of the conductive vias 43 in advance. To increase the bonding strength. In this embodiment, it is also possible that some conductive metal balls 44 are not electrically connected to the second ends of the conductive vias 4S, and the conductive metal balls 44 can still be used to support the optical wafers 4 . The thermal energy of the optical wafers 40 is extracted or derived. Referring to Figures 4E and 4F, the fourth step of the manufacturing method of the package structure for an optical wafer according to the first embodiment of the present invention is to cut the optical wafer 4 to separate the optical wafers. In this step, the side shot selects the optical wafer 4 by mechanical cutting, laser cutting or water jet cutting to separate (-g) the optical crystals. After the dicing, each of the optical wafers 4 has the optical surface 4 and the at least two conductive vias 43, the optical surface 4i facing downwards _ the back a facing downward. The conductive material 43 runs through the optical W 4 , and the first derivative of the material transfer U3 is connected to the optical surface 4 and its second end is connected to the back surface. The conductive metal balls are electrically connected to the Weiwei 43 _ two ends. In this way, the electric metal ball 44 can guide an external power source to the optical surface 41 of each optical wafer via the conductive via milk, and the shark reaction (10) generates a specific color light. Please refer to FIG. 4G. After the optical wafers 4 are separated, the first embodiment of the present invention can optionally further secure the optical wafers 40 to the plurality of corresponding substrates 45 by using the conductive metal balls 44, respectively. The substrate 45 is a printed circuit board for packaging ' and is preferably selected from a cup-shaped substrate, but is not limited thereto. When the substrate 45 is selected from a cup-shaped substrate, the substrate 45 is filled with a light-transmissive encapsulating material 46' to cover and protect the optical wafer 40 and the conductive metal ball 44. If desired, the light-transmissive encapsulating material 46 may optionally be blended with phosphor to change the color of the color light produced by the optical wafer. Thus, the encapsulation process of the optical wafer 4 of the present embodiment is completed. When the substrate 45 and the conductive metal ball 44 are introduced into an external power source, the external power source can be guided to the optical surface 41 of the optical wafer 4 through the conductive vias 43 to generate an optical reaction (e.g., to generate a specific color light). At the same time, thermal energy generated during the optical reaction can be conducted to the substrate 45 via the conductive metal balls 44 (and the conductive vias 43). 5A, 5B, 5C', 5D, 5E, 5F, and 5G, the package structure of the optical wafer and the method of manufacturing the same according to the second embodiment of the present invention are similar to the first embodiment of the present invention, but the second The manufacturing method of the package structure of the optical wafer of the embodiment comprises the following steps: providing an optical wafer 5 comprising a plurality of optical wafers 50, wherein the optical wafers 5 have an optical surface 51 and a back surface 52; Each of the optical wafers 5 of the optical wafer 5 is formed with at least two conductive vias 53 ′, wherein the conductive vias 53 extend through the optical wafers, and the conductive vias 53 have an electrical connection to the optical surface 51 . a first end, and a second end connected to the back surface 52; on the optical surface 15 of the optical wafer 50, 201017842 ^ ^ sequentially arranged - a phosphor filling material layer 54 and a transparent cover 55; in the photon The back surface 52 of each of the filament wafers 5 () is divided into at least two conductive metal balls 56'. The conductive metal balls are electrically connected to the second ends of the conductive vias 53, respectively; and cutting The optical wafer 5 is used to separate the optical wafers 50. Further, as shown in FIG. 5C, after the second step and before the third step, the present invention preferably forms a redistribution layer 520 on the back surface 52 of the optical crystal #s() of the optical wafer 5, which It also includes at least two pads and optionally forms an insulating layer 521. As shown in Fig. 5D, the fluorescent filler layer 54 is a mixture of a fluorescent ray and a sizing agent. The present invention is not limited to the mixing ratio. The phosphor fill material layer 54 is used to change the color of the colored light produced by the optical wafers 50. As shown in Fig. 5E, the transparent cover 55 is preferably selected from the group consisting of a glass cover. Referring to FIG. 5G, after separating the optical wafers 5, the optical surface 51 of each optical wafer 50 has the fluorescent filling material layer 54 and the transparent cover 55, and the transparent cover 55 has a protective effect. 'Therefore, it can replace the light-transmissive sealing material. At this time, the packaging process of the optical wafer 5 of the present embodiment has been completed. Further, as shown in Fig. 5H, in the assembly, the second embodiment of the present invention can directly fix the optical wafers 50 to the plurality of corresponding circuit boards 57 by the conductive metal balls 56. When the circuit board 57 and the conductive metal ball 56 are introduced into an external power source, an external power source can be guided to the optical surface 51 of the optical wafer 50 via the conductive vias 53 to generate an optical reaction (e.g., to produce a specific color light). At the same time, the thermal energy generated during the optical reaction can be led to the circuit board 57 via the conductive metal balls 16 201017842 56 (and the conductive vias 53). Please refer to the sixth person, New York, 叱, 61), 6£, 6?, and 6 (} riding, the optical chip packaging structure and the manufacturing method thereof according to the third embodiment of the present invention are similar to the first and second inventions. However, the manufacturing method of the package structure of the optical wafer of the third embodiment is accompanied by the following steps: providing an optical wafer 6 comprising a plurality of optical wafers 6G, wherein the optical wafers (9) have an optical surface 61 And the back surface 62; each of the wires (9) and (9) of the wire 6 is divided into at least two conductive vias 63', wherein the electrical vias extend through the optical wafers 6, and the conductive vias 63 have an electrical connection The first end of the optical meter® 61 is connected to the second end of the back surface 62; a transparent cover 64' is disposed on the optical surface 61 of the optical wafer 6', which has a recess (4), the recess The portion 641 has a fluorescent filling material 65; at least two conductive metal balls are respectively formed on the back surface 62 of each of the optical wafers 60 of the optical wafer 6, and the conductive gold; | ^ 66 are respectively connected to the transducing a second end of the electrical via 63; and dicing the optical wafer 6 to separate the optical wafers 6. As shown in FIG. 6C, after the second step and before the third step, the present invention preferably pre-forms a redistribution layer 620 on the back surface 02 of the optical wafer 6 of the optical wafer 6 which also includes at least a solder pad, and optionally forming an insulating layer (2). The transparent cover 64 is preferably selected from a glass cover, and the transparent cover 64 preferably utilizes an adhesive layer (not shown). The recessed portion 641 can be formed on the optical surface 61 to form various shapes, such as a rectangle, a circle, an arc 17 201017842 or other geometric shapes. The phosphor filling material 65 is a mixture of phosphor powder and an adhesive. The present invention is not limited to the mixing ratio. The phosphor filling material layer 65 is used to change the color of the color light generated by the optical wafers 60.

請參照第6F圖所示’在分離該等光學晶片6〇之後,各光 學晶片60之光學表面61上皆具有該螢光填充材料65及透明 蓋板64,該透明蓋板64具有保護作用,因此可取代透光封裝 材料。此時,已完成本實施例之光學晶片6〇的封裝製程。再 者’如第6G圖所示’在組裝時,本發明第三實施例可直接利 用該等導電金屬球66將該等光學晶片60固設於數個對應電路 板67上。當該電路板67及導電金屬球66導入一外部電源時, 外部電源可經由該等導電通孔63而導引至該光學晶片6〇的光 學表面61,以產生光學反應(例如產生特定色光)。同時,在產 生光學反應期間造成的熱能,則可經由該等導電金屬球的(及 導電通孔63)導出至該電路板67。 如上所述,相較於習用發光二極體晶片的封裝構造常因設 置導線或以覆晶方式封裝而影響光取出效率,或者因設置黏著 層而影響散熱效轉缺點,第4至6圖之本發明_該等導電 通孔43、53、63電性連接該光學表面41、51、61及背面42、 、52、62而有效 ’故有利於提升 、60之背面42、 52、62 ’以便使電源線路佈局位於該背面42 的避免影響該光學表面41、51、61朝上發先 光取出效率。再者,由於該光學晶片4〇、5〇 18 201017842 52、62朝下’因此可方便利用該等導電金屬球44、56、66將 熱能迅速導出,故有利於提升散熱效率,並能延長使用壽命。 由於本發明具有較高之散熱效率,因此不但適用在封裝功率在 1瓦特(W)以下之發光二極體晶片,且亦適用在封裝功率在工 瓦特(w)以上之發光二極體晶片。另外,當該光學晶片4〇、%、 60搭配使用該透明蓋板55、64時,該透明蓋板%、糾可取 代透光封裝材料’因此使得整體職構造的尺寸_小到晶圓 級的晶片尺寸封裝(wafer level chip scale paekage,, 進而有利於封裴構造之微型化(miniaturizati(m)。 雖然本發明已峨佳實施_露,然其並_職制本發 明’任何熟習此項技藝之人士,在不脫離本發日月之精神和範圍 内田可作各種更動與修飾,因此本發明之保護範圍當視後附 之申請專利範圍所界定者為準。 ❹ 【圖式簡單說明】 第1圖··習用發光二極體晶片的封裝構造之示意圖。 第圖$ S用發光一極體晶片的封裝構造之示意圖。 圖再%用發光一極體晶片的封裝構造之示意圖。 第4B 4C、4D、4E、4F及4G圖··本發明第一實施名 之光學晶片之封裝構造之製造方法之示意圖。 7、诏、冗、51)、5£、5卜沁及紐圖:本發明第二賓 施例之光學W之封储造之魏方法之示意圖。 19 201017842 第6A、6B、6C、6D、6E、6F及6G圖:本發明第三實施例 之光學晶片之封裝構造之製造方法之示意圖。Referring to FIG. 6F, after the optical wafers 6 are separated, the optical surface 61 of each optical wafer 60 has the fluorescent filling material 65 and the transparent cover 64. The transparent cover 64 has a protective effect. Therefore, it can replace the light-transmitting packaging material. At this time, the packaging process of the optical wafer 6A of this embodiment has been completed. Further, as shown in Fig. 6G, in the assembly, the third embodiment of the present invention can directly use the conductive metal balls 66 to fix the optical wafers 60 on a plurality of corresponding circuit boards 67. When the circuit board 67 and the conductive metal ball 66 are introduced into an external power source, an external power source can be guided to the optical surface 61 of the optical wafer 6 through the conductive vias 63 to generate an optical reaction (eg, to generate a specific color light). . At the same time, the thermal energy generated during the optical reaction can be derived to the circuit board 67 via the conductive metal balls (and the conductive vias 63). As described above, the package structure of the conventional light-emitting diode chip is often affected by the provision of a wire or a flip chip, which affects the light extraction efficiency, or the heat dissipation effect is affected by the provision of the adhesive layer, and FIGS. 4 to 6 The conductive vias 43, 53 and 63 are electrically connected to the optical surfaces 41, 51, 61 and the back faces 42, 52, 62 to be effective, so that the rear faces 42, 52, 62' of the 60 are facilitated. Having the power line layout on the back side 42 avoids affecting the efficiency of the optical surface 41, 51, 61 upwards. Moreover, since the optical wafers 4〇, 5〇18 201017842 52, 62 face down, it is convenient to use the conductive metal balls 44, 56, 66 to quickly derive thermal energy, thereby improving heat dissipation efficiency and extending use. life. Since the invention has high heat dissipation efficiency, it is applicable not only to a light-emitting diode wafer having a package power of less than 1 watt (W), but also to a light-emitting diode wafer having a package power of at least watts (w). In addition, when the transparent wafers 55, 64 are used in conjunction with the optical wafers 4, 60, and 64, the transparent cover can replace the light-transmissive packaging material, thus making the overall structure size small to the wafer level. Wafer level chip scale paekage, which in turn facilitates the miniaturization of the sealing structure (miniaturizati (m). Although the present invention has been implemented well-exposed, it is also a skill in the invention] The scope of protection of the present invention is subject to the definition of the scope of the appended claims. ❹ [Simple description of the drawings] 1 is a schematic view showing a package structure of a conventional light-emitting diode wafer. Fig. 3 is a schematic view showing a package structure of a light-emitting monopole wafer. Fig. 4B 4C is a schematic view showing a package structure of a light-emitting monopole wafer. 4D, 4E, 4F, and 4G drawings. A schematic diagram of a method of manufacturing an optical wafer package structure according to the first embodiment of the present invention. 7. 诏, verb, 51), 5 £, 5 沁 and 纽图: The present invention The second part of the light Fig. 6A, 6B, 6C, 6D, 6E, 6F and 6G are diagrams showing a method of manufacturing an optical chip package structure according to a third embodiment of the present invention.

【主要元件符號說明】 11 基板 12 電路層 13 黏著層 14 光學晶片 15 導線 16 透光封裝材料 21 第一引腳 211杯狀凹部 22 第二引腳 23 黏著層 24 光學晶片 25 導線 26 透光封裝材料 27 螢光填充材料 31 基板 32 導電端 33 凸塊 34 光學晶片 35 電極 36 透光封裝材料 4 光學晶圓 40 光學晶片 41 光學表面 42 背面 420重佈線層 421 絕緣層 43 導電通孔 44 導電金屬球 45 基板 46 透光封裝材料 5 光學晶圓 50 光學晶片 51 光學表面 52 背面 520重佈線層 521 絕緣層 201017842 53 導電通孔 54 螢光填充材料層 55 透明蓋板 56 導電金屬球 57 電路板 6 光學晶圓 60 光學晶片 61 光學表面 62 背面 620重佈線層 621絕緣層 63 導電通孔 64 透明蓋板 641 凹陷部 65 螢光填充材料 66 導電金屬球 67 電路板[Main component symbol description] 11 substrate 12 circuit layer 13 adhesive layer 14 optical wafer 15 wire 16 transparent packaging material 21 first pin 211 cup-shaped recess 22 second pin 23 adhesive layer 24 optical wafer 25 wire 26 light-transmissive package Material 27 Fluorescent Filling Material 31 Substrate 32 Conductive End 33 Bump 34 Optical Wafer 35 Electrode 36 Light Transmissive Encapsulating Material 4 Optical Wafer 40 Optical Wafer 41 Optical Surface 42 Back Side 420 Redistribution Layer 421 Insulation Layer 43 Conductive Through Hole 44 Conductive Metal Ball 45 Substrate 46 Light-transmissive encapsulating material 5 Optical wafer 50 Optical wafer 51 Optical surface 52 Back surface 520 Redistribution layer 521 Insulation layer 201017842 53 Conductive via 54 Fluorescent filling material layer 55 Transparent cover 56 Conductive metal ball 57 Circuit board 6 Optical wafer 60 optical wafer 61 optical surface 62 back surface 620 redistribution layer 621 insulating layer 63 conductive via 64 transparent cover 641 recess 65 fluorescent fill material 66 conductive metal ball 67 circuit board

21twenty one

Claims (1)

201017842 十、申請專利範圍: 1. 一種光學晶片之封裝構造,其包含: 一光學晶片,具有―光學表面、—背面及至少二導電通孔, 其中該等導電通孔貫穿該光學晶4,且鱗導電通孔之一第 一端電性連接該光學表面;及 至少二導電金屬球,電性連接至該等導電通孔的一第二端。 2. 如申請專利範圍第i項所述之光學晶片之封裝構造其中該 ❹ 背面更包含—重佈線層’且該重佈線層躲連接該等導電通 孔的該第二端及該等導電金屬球。 3. 如申請專利範圍第1項所述之光學晶片之封裝構造,其中該 光學晶片係利用該等導電金屬球結合於一基板上。 4. 如申請專利範圍第3項所述之光學晶片之封裝構造,其中該 基板上具有一透光封裝材料’以包覆該光學晶片及該等導電 金屬球。 © 5·如申請專利範圍第丨項所述之光學晶片之封裝構造,其中該 光學晶片之該光學表面上另設有一螢光填充材料層。 6·如申請專利範圍第5項所述之光學晶片之封裝構造,其中該 螢光填充材料層上另設有一透明蓋板。 7. 如申請專利範圍第1項所述之光學晶片之封裝構造,其中該 光學晶片之該光學表面上另設有一具有一凹陷部之透明蓋 板,且該凹陷部内填入一螢光填充材料。 8. 如申請專利範圍第1項所述之光學晶片之封裝構造,其中該 22 201017842 等導電金屬球係為踢凸塊、金凸塊或錫球。 9. 如申請專利範圍第1項所述之光學晶片之封裝構造,其中談 光學晶片係發光二極體晶片。 10. -種光學晶片之封裝構造之製造方法,其包含·· 提供一光學晶®’包含數個光學晶片,其巾該等光學晶片具 有一光學表面及一背面; 在該光學晶圓之該等光學晶片上分卿成至少二導電通 孔’其中該科電通孔貫穿該等光學晶4 ’且鱗導電通孔 包3電性連接該絲表面之第—端,及_連接至該背面之 第二端; 在該光學晶圓之各該等光學晶片的該背面分卿成至少二 導電金屬球’該等導電金屬球分別電性連接至該等導電通孔 的該第二端;及 切割該光學晶圓,以分離該等光學晶片。 11.如申睛專利範圍第10項所述之光學晶片之封裝構造之製造 :法其中在形成該等導電金屬球之前,另在該光學晶圓之 該等光學晶片的該背面形成一重佈線層,且該重佈線層係電 性連接該等導電通孔的該第二端及該等導電金屬球。 2.如申明專利範圍帛1〇項所述之光學晶片之封裝構造之製造 方法’其中在分離該等光學晶片之後,利職等導電金屬球 將該等光學⑼目辦絲鑛應基板上。 23 201017842 13.如申請專利範圍第12項所述之光學晶片之封 、 方法,其尹該等基板具有一透光封裝材科 &之製造 片及導電金屬球。 匕覆該光學晶 K如申請補細第〗〇撕述之絲W之封 方法’射在形成該等導電金屬球之前二造 之該光學表面上設置-螢光填充材料層。科予曰曰片 15.如申請專利範圍第14項所述之光學晶片之封 方法,其令該螢光填充材料層上另設置一透明蓋^之製造 利第H)項所述之光學晶片之_構造之_ 方法’其中在形成該等導電金屬球之前,另在 之該光學表面上設置H賴部之㈣蓋板,其中^凹 陷部内填入一螢光填充材料。 17. 如申請專利範圍第10項所述之光學晶片之封装構造之製造 方法’其中該等導電金屬球係為錫凸塊、金凸塊或錫球。 18. 如申請專利範圍第10項所述之光學晶片之封裝構造之製造 方法’其中該等光學晶片係發光二極體晶片。 24201017842 X. Patent Application Range: 1. An optical wafer package structure comprising: an optical wafer having an "optical surface", a back surface, and at least two conductive vias, wherein the conductive vias extend through the optical crystal 4, and One of the first ends of the conductive vias is electrically connected to the optical surface; and at least two conductive metal balls are electrically connected to a second end of the conductive vias. 2. The package structure of the optical wafer of claim 1, wherein the back surface further comprises a redistribution layer and the redistribution layer occludes the second end of the conductive vias and the conductive metal ball. 3. The package structure of an optical wafer according to claim 1, wherein the optical wafer is bonded to a substrate by using the conductive metal balls. 4. The package structure of an optical wafer according to claim 3, wherein the substrate has a light transmissive encapsulating material to coat the optical wafer and the conductive metal balls. The package structure of the optical wafer according to the above aspect of the invention, wherein the optical surface of the optical wafer is further provided with a layer of fluorescent filler material. The package structure of the optical wafer of claim 5, wherein the fluorescent filler layer is further provided with a transparent cover. 7. The package structure of the optical wafer of claim 1, wherein the optical surface of the optical wafer is further provided with a transparent cover having a recessed portion, and the recessed portion is filled with a fluorescent filler material. . 8. The package structure of an optical wafer according to claim 1, wherein the conductive metal ball such as 22 201017842 is a kick bump, a gold bump or a solder ball. 9. The package structure of an optical wafer according to claim 1, wherein the optical wafer is a light-emitting diode wafer. 10. A method of fabricating an optical wafer package structure, comprising: providing an optical crystal® comprising a plurality of optical wafers, the optical wafer having an optical surface and a back surface; The optical wafer is divided into at least two conductive vias, wherein the electrical vias extend through the optical crystals 4' and the scale conductive vias 3 are electrically connected to the first end of the surface of the filament, and _ is connected to the back surface a second end; the back surface of each of the optical wafers of the optical wafer is divided into at least two conductive metal balls respectively; the conductive metal balls are electrically connected to the second ends of the conductive vias, respectively; and cutting The optical wafer is used to separate the optical wafers. 11. The manufacture of an optical wafer package structure according to claim 10, wherein a redistribution layer is formed on the back side of the optical wafers of the optical wafer before forming the conductive metal balls. And the redistribution layer is electrically connected to the second end of the conductive vias and the conductive metal balls. 2. The manufacturing method of the package structure of an optical wafer according to the scope of the invention, wherein after the separation of the optical wafers, the conductive metal balls of the service or the like are placed on the substrate. The method of claim 12, wherein the substrate has a light-transmissive packaging material & a fabricated metal sheet and a conductive metal ball. The optical crystal K is coated as described in the application. The method of sealing the wire W is applied to the optical surface of the second conductive layer to form a phosphor filling material layer. The method for sealing an optical wafer according to claim 14, wherein the fluorescent filler material layer is further provided with a transparent cover, the optical wafer described in the manufacture of the item H) In the method of forming the conductive metal balls, a (four) cover plate of the upper portion is disposed on the optical surface, wherein the concave portion is filled with a fluorescent filler material. 17. The method of fabricating an optical wafer package structure according to claim 10, wherein the conductive metal balls are tin bumps, gold bumps or solder balls. 18. The method of fabricating an optical wafer package structure according to claim 10, wherein the optical wafers are light-emitting diode chips. twenty four
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