J295twf.doc/n 201015701 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種半導體記憶體之電容器結構 及其製造方法，且特別是有關於一種具有穩定構件的半 導體記憶體之電容器結構及其製造方法。 【先前技術】 ❹ 動態隨機存取記憶體之記憶胞係由一金屬氧化物場效 電曰日體(metal oxide semiconductor field effect transistor， MOSFET)與-電容器構成，其中該電晶體之源極係電性連 接於該電容器之下電極。電容器可分為堆疊式和深溝渠式 一種型1、堆資式電谷器係直接在矽基板表面形成電容器 而床溝知:式電谷器則是在發基板内部形成電容器。 動態隨機存取記憶體之集積度隨著半導體製程技術之 不斷創新而快速地增加，而為了達成高集積度之目的，電 容器之橫向尺寸必須予以縮小，其導致電容器之表面 低(即電容值降低）。' 持電容器之電容值(正比於其電極板表面積）， 值，研究人員係藉由增加電容器之 ^縮小板向尺寸以增加電容器的表面積，亦即藉由辦 rat㈣因應達成高集積度心 成尚集積度之目的面臨了-個製程上的難題， 5 201015701, ^〇295twf.doc/n 因無足夠的機械強度支撐而易於 二斤以相鄰的電容器可能跟其他的相連在 起奴此:電極的倒塌就是所謂的二位元錯誤 ： 位兀錯减±在轉敎奸件巾時 ; 能無法準柄操作。 传件可 為了避免前述機械支擇力不足的缺點，DHKim等人 於2004年揭不-種機械強化之儲存節點的製備方法(來考 ❹ • A mechamcally enhanced storage „〇de for virtually unhmlted height (MESH) capacitor aiming at sub 70nm draw ’ m卿4，p㈣）。DHKi轉人揭示之製備方 法係藉由氮切構奴崎結構以增 機械支樓力。 對㈣谷盗之 【發明内容】 ㈣’本發明提供—種電容器結構的製造方法， ❹此衣作出具有高機械強度的電容器結構。 本發明另提供一種電容器結構，可防止下電極倒塌。 本發明又提供-種，能避免二位元錯誤的情況發生。 本發明提出一種電容器結構的製造方法包括下列步 :首先，於基底上形成第一介電層。接著，於第一介電 曰中形成沿排列方向進行排列料個第—開口，且第一開 =在排列方向上互相連接。然後，於各個第—開口的侧壁 t形成穩定構件。接下來，於第—開口下方的第—介電層 形成暴露出部分基底的多個第二開σ。之後，於各個穩 201015701 '—--ΐί295twf. d〇c/n 各個第二心的表面上形成下電極。繼 形的ί電Γ介電層。隨後’於第二介電層上形成共 明提出一種電容器結構包括基底、多個下電極、 :，「介電層及上電極。下電極設置於基底 ❹ =極的整個上部，穩定構件在排列方向上互相連接= 件，方向上的剖面呈杯狀。第-介電層 電層5、穩疋構件及基底上。上電極設置於第-介 基底上，…、第電層及上電極。下電極設置於 住下電極排列方向進行排列。穩定構件分別圍 日^的整個上部，敎構件在排列方向上互相連接， 電穩定構件於排列方向上的剖面呈矩形。第-介 電極、敎構似基底上。上電極設置於第 方冰ί於ί述可知’在本發明所提出之電容器結構的製造 出且L = 2以穩定下電極的穩定構件，因此能製作 強度的電容器結構。此外，本發明所提出之 〃有穩定構件，由於穩定構件圍住下電極的整 相鄰:狀或矩形’所以能防止下電極倒塌而與 ㈤的下電極相連的情況，因此可以避免二位元錯誤的情 ^295twf.doc/n 201015701 況發生。 為讓本發明之上述和其他目的、特徵和優點能更明顯 易懂，下文特舉實施例，並配合所附圖式，作詳細說明如 下。 【實施方式】 圖1A至圖1F所繪示為本發明第一實施例之電容器結 構的製造流程上視圖。圖2A至圖2F所繪示為沿著圖lA 罾 至圖1?中A-A，剖面線及B-B，剖面線的剖面圖。 首先，請參照圖1A及圖2A，於基底1〇〇上形成介電 層102。基底100例如是矽基底，而在矽基底上經由進行 複數個製程步驟而包含具有複數個接觸插塞(未繪示）的介 電層結構(未繪示），其中接觸插塞用以和電晶體(未繪示） 之源極作電性連接。介電層102的材料例如是氧化矽，而 其形成方法例如是化學氣相沈積法。 接著，於介電層102上形成圖案化罩幕層1〇4，圖案 ❹ 化罩幕層1G4包括沿排巧方向1〇6進行排列的開口圖案 108 ’且開口圖案108互不接觸。圖案化罩幕層1〇4的材料 例如是多晶石夕’其形成方法例如是進行微影製程及餘刻製 然後’以圖案化罩幕層顺為罩幕移除部 ⑽。部份介電層搬的移除方法例如是乾式餘刻法。^ 然’在用以形成圖案化罩幕層i 〇 4的圖案化光組層田 尚未移除之前’可利關案化光組層及圖案化^幕層 201015701 …“8295twf.d〇c/n 作為罩幕，以移除部份介電層102，之後再將圖案化光組 層移除。 接下來，請參照圖1B及圖2B，對介電層1〇2進行一 個内縮(pull back)製程’其方法例如是具有高選擇比的等向 性餘刻製程，在侧製程中對介電層1〇2進行⑽作用而 對圖案化罩幕層1〇4不具餘刻作用。以於介電層1〇2中形 成沿排列方向106進行排列的開口 11〇。開口 11〇在排列 方向1〇6上互相連接’且開口 110在相對於該排列方向1〇6 的斜角方向112上互不連接。在此實施例中，開口 11〇是 利用如上述之方法所形成，但並不用以限制本發明。 之後，於圖案化罩幕層1〇4及開口 11〇的表面上形成 共形的穩定構件材料層114。由於開口 110在排列方向1〇6 上互相連接’因此在排列方向1〇6上位於圖案化罩幕層 兩側的穩定構件材料層114會填入圖案化罩幕層1〇4下方 並互相連接(請參照圖213的A-A，剖面圖）。穩定構件材料 層114的材料例如是氮化矽，而其形成方法例如是化學氣 相沈積法9 再者，請參照圖1C及圖2C，對穩定構件材料層114 進行一個回蝕刻製程，以於開口 11()的侧壁上形成穩定構 件116。相鄰兩個穩定構件116於排列方向1〇6上的剖面 例如是呈杯狀(請參照圖1(：的A_A，剖面圖）。其中，對穩 定構件材料層114進行該回蝕刻製程所使用的方法例如是 乾式钮刻法。在此實施例中，穩定構件n6是利用如上述 之方法所形成，但並不用以限制本發明。 -3295twf.doc/n 201015701 l之’於開口 lio下方的介電層102中形成暴露出部 分基底100的開口 118。開口 118的形成方法例如是以圖 案化罩幕層104及穩定構件116為罩幕利用乾式蝕刻法 ，除部份介電層102而形成之。隨後，更可利用濕式蝕刻 法對；I電層102進行一個内縮製程，以增加開口 118的寬 度，及降低接觸插塞的接觸阻值並加大電容的面積。此— 内縮製程為增大電容的面積但並不是必要製程。 % 隨後，請參照圖1D及圖2D，於穩定構件116的側壁 及開口 118的表面上形成下電極12〇。 ,下電極120的形成方法例如是包括下列步驟。首先， ^成覆蓋穩定構件116、開σ 118的表面的下電極材料層 首曰示）。下電極材料層的材料例如是金屬或換雜多晶石夕 ，體材料’其形成方法例如是物理氣相沈積法、化學氣 ，沈積法或原子層沈積法。接著，於開口⑽及開口⑴ ^填滿開π 11G及開口 118的填充層122。填充層a 的，，是氧切。填充層m的形成方法例如是利用 ^予氧相沈積法或旋轉塗佈法形成填滿開Π 1H)及開口 的填充材料層（未'♦式），再湘回⑽法或化學麵研 移除位於開口 110及開口 118以外的填充 利Γ〗Γ刻法或化學機械研磨法移除位於開 120。 p W外的下電蹄料層，㈣成下電極 接著’請參照圖1Ε及圖2Ε’移除 圖案化罩幕層104的移除方法例如是濕絲刻法 295twf.doc/n 201015701 然後’移除介電層搬。介電層1G 是濕式則法。此外，可在移除介t 2除方法例如 充層122。 θ 2的同時移除填 此外，由圖1Ε可清楚地看到 方向⑽上互相連接，且穩定構件 向106的斜角方㈣2上互不連接=對於該排列方 形成網狀的結構。 传穩定構件116 ❹ Ο 電；請成參共::^^^ 化、氮切、三氧化二銘(Al2〇3)、 (Hf〇2)、二氧化鈦（Ti〇2)、二氧化錘 軋化铪 (歸〇3)、鈦酸離Ti〇3)、鈦酸蝴祕心戈1= =組合，其職方法例如是化學氣相沈積法或原子層沈 之後’於介電層124上形成共形的上電極126。上 極126的材料例如是金屬或摻雜多晶料導體材料，其形 成方法例如是物理氣相沈積法、化學氣相沈積法或原子^ 沈積法。 繼之，更可於上電極126上形成介電層128。介電層 128的材料例如是氧化矽，其形成方法例如是化學氣相二 積法或旋轉塗佈法。 由上述第一實施例可知，在電容器結構的製造方法 中，會形成用以穩定下電極120的穩定構件116，因此所 製作出的電容器結構可具有高機械強度。 11 201015701 ------8295twf.d〇c/n 的電由圖1E及圖2F來說明本發明之第一實施例 定』t圖1E及圖2F ’電容器結構包括基底100、穩 =構^U6、下電極12〇、介電層124及上電極μ。下電 進行排ϋΐ基底1〇0上’且下電極120沿排列方向106 的尊個^◎照^ 1Ε)。穩定構件116分別圍住下電極120 、，上4。穩定構件116在該排列方向1〇6上互相連接， 且穩定構件116在相對於該排列方向1Q6的斜角方向112 上互不連接(請參照圖1Ε)。相鄰兩個穩定構件116於排列. 上的剖面呈杯狀。介電層124設置於下電極㈣、 穩疋構件116及基底2〇〇上。上電極126設置於介電層124 上。此外，電容器結構更可選擇性包括介電層128，曰其設 置於基底100上且覆蓋上電極126。由於電容器結構中各 構件的功效、㈣及形成方法已於前文巾進行詳盡地說 明’因此於此不再贅述。 由上述可知，由於電容器結構具有穩定構件116，且 ❹ 穩定構件116圍住下電極120的整個上部且剖面呈杯狀， 所以能防止下電極12〇倒塌而與相鄰的下電極12〇相連的 情況，因此可以避免二位元錯誤的情況發生。 圖3A至圖3F所繪示為本發明第二實施例之電容器結 構的製造流程上視圖。圖4A至圖4F所繪示為沿著圖3A 至圖3F中C-C，剖面線及D-D’剖面線的剖面圖。圖5 所繪示為本發明第三實施例之圖案化罩幕層的上視圖。圖 6所繪示為本發明第三實施例之穩定構件及上電極的上視 12 -J295twf.doc/n 201015701 圖。 首先’請參照圖3A及圖4A ’於基底200上形成介電 層202。基底200例如是矽基底，而在矽基底上經由進行 複數個製程步驟而包含具有複數個接觸插塞(未繪示）的介 電層結構(未繪示），其中接觸插塞用以和電晶體(未緣示) 之源極作電性連接。介電層202的材料例如是氧化矽"，而 其形成方法例如是化學氣相沈積法。 ❹ ❹ 接著’於介電層202上形成圖案化罩幕層2〇4，圖案 化罩幕層204包括沿排列方向206進行排列的開口圖^ 208 ’且開口圖案2〇8在排列方向2〇6上互相連接。圖案化 罩幕層204的材料例如是多晶矽，其形成方法例如是進行 微影製程及钱刻製程而形成之。 3在本實施例中，圖案化罩幕層204中的開口圖案2〇8 是以圓形為例作為說明，但並不用以限制本發明。請夹照 圖5’第三實施例中的圖案化罩幕層綱，中的開口 2〇8可為矩形。 口示 ，後’請繼續參照3A及圖4A，以圖案化罩幕層綱 為罩幕移除部份介電層搬，以於介電層搬 進行排列的開口210。開口210在排列方= 接’且開口 210在相對於該排列方向2〇6的斜角 乾互=連接。部份介電層搬的移除方法例如是 然’在用以形成圖案化罩幕層204的圖荦 圖未移除之前，可利用圖案化光組層及 s案化罩幕層綱作為罩幕，以移除部份介電層 201015701 7/UJO 么〇'295twf；doc/n 後再將圖案化光組層移除。在此實施例中，開口 21〇是利 用如上述之方法所形成，但並不用以限制本發明^ /接下來，請參照圖3Β及圖4β，於開口 21〇的側壁上 形成穩定構件214。相鄰兩個穩定構件214於排列方向2〇6 上的剖面例如是呈矩形(請參照圖3]8的（：_(：：，剖面圖）。穩 賴件214的形成方法例如是包括下列步驟，首先，於圖“ 案化罩幕層2〇4及開口训的表面上形成共形的穩定構件 ㈣層(未繪示）。穩定構件材料層的材料例如是氮化石夕， 而其形成方法例如是化學氣相沈積法。接著，對穩定構件 材料層進行一個回蝕刻製程，而形成穩定構件214。其中， 對穩定構件材料層進行該回兹刻製程所使用的方法例如是 乾式制法。在此實施例中，穩定構件214是利用如上述 之方法所形成，但並不用以限制本發明。 此外’由圖3Β可清楚地看到穩定構件214在該排列 方向206上互相連接，且穩定構件214在相對於該排列方 向2〇6的斜角方向212上互不連接，而使得穩定構件214 ❹ 形成網狀的結構。 之後，請參照圖3C及圖4C，於開口 210下方的介電 層202中形成暴露出部分基底200的開口 216。開口 216 的形成方法例如是以圖案化罩幕層綱及穩定構件2 罩幕，利用乾式钱刻法移除部份介電層2〇2而形成之。隨 後’更可利用濕式钱刻法對介電層2〇2進行—個 Μ度’及降低接觸插塞的接觸阻值 並加大電谷的面積。此一内縮製程為增大電容的面積但並 14 8295twf.doc/n 201015701 不是一必要製程。 隨後，睛參照圖3D及圖4D，於穩定構件214的側壁 及開口 216的表面上形成下電極Mg。 下電極218的形成方法例如是包括下列步驟。首先， 形成覆蓋穩賴件214、開口 216的表面的下電極材料層 (未繪示）。下電極材料層的材料例如是金屬或摻雜多晶石夕 等導體材料，其形成方法例如是物理氣相沈積法、化學氣 相沈積法或原子層沈積法。接著，於開口 210及開口 216 中形成填滿開口 210及開口 216的填充層220。填充層220 的材料例如是氧化石夕。填充層22〇的形成方法例如是利用 化學氣相沈積法或旋轉塗佈法形成填滿開口 21〇及開口 216的填充材料層（未繪式）’再利用回蝕刻法或化學機械研 磨法移除位於開口 210及開口 216以外的填充材料層而形 成之。然後，利用回蝕刻法或化學機械研磨法移除位於開 口 210及開口 216以外的下電極材料層，而形成下電極 218。 © 在本實施例中’單一.個穩定構件214及下電極218的 形狀疋以圓形為例作為說明，但並不用以限制本發明。請 參照圖6,在採用第三實施例中的圖案化罩幕層2〇4，作為 罩幕的情況下’單一個穩定構件214’及下電極218，的形 狀大略成矩形。此外，第三實施例中之穩定構件214，及 下電極218’的形成方法與第二實施例中之穩定構件214 及下電極218大致相同，故於此不再贅述。 接著’請參照圖3E及圖4E，移除圖案化罩幕層204。 15 J295twf.d〇〇/nJ295twf.doc/n 201015701 IX. Description of the Invention: [Technical Field] The present invention relates to a capacitor structure of a semiconductor memory and a method of fabricating the same, and more particularly to a capacitor for a semiconductor memory device having a stabilizing member Structure and its manufacturing method. [Prior Art] 记忆 The memory cell of the dynamic random access memory is composed of a metal oxide semiconductor field effect transistor (MOSFET) and a capacitor, wherein the source of the transistor is electrically It is connected to the lower electrode of the capacitor. Capacitors can be divided into stacked and deep trenches. One type 1. The stacked-type electric troughs form capacitors directly on the surface of the crucible substrate. The bed gutters: the electric troughs form capacitors inside the substrate. The degree of accumulation of dynamic random access memory increases rapidly with the continuous innovation of semiconductor process technology, and the horizontal size of the capacitor must be reduced for the purpose of achieving high accumulation, which results in a low surface of the capacitor (ie, a decrease in capacitance). ). ' Capacitor value of the capacitor (proportional to its electrode plate surface area), the value, the researchers increase the surface area of the capacitor by increasing the size of the capacitor to reduce the surface area of the capacitor, that is, by doing a rat (four) in response to a high concentration of the heart The purpose of the degree of accumulation is faced with a problem in the process, 5 201015701, ^ 〇 295twf.doc / n because there is not enough mechanical strength support and easy to two pounds, adjacent capacitors may be connected with others in the slave: electrode The collapse is the so-called two-bit error: the error is reduced by ± when the transfer of the wipes; can not be operated. In order to avoid the shortcomings of the above-mentioned mechanical support, DHKim et al. in 2004 unveiled a method for preparing mechanically-reinforced storage nodes (for a mechamcally enhanced storage „〇de for virtually unhmlted height (MESH) ) capacitor aiming at sub 70nm draw ' mqing 4, p (4)). DHKi transferred to reveal the method of preparation by adding nitrogen to the structure of the slaves to increase the mechanical support. (4) Gu Pizhi [invention content] (four) 'this The invention provides a capacitor structure manufacturing method, and the capacitor is made of a capacitor structure having high mechanical strength. The invention further provides a capacitor structure which can prevent the lower electrode from collapsing. The invention further provides a type which can avoid two-bit error. The present invention provides a method for fabricating a capacitor structure comprising the steps of: first, forming a first dielectric layer on a substrate; and then forming a first opening in the first dielectric buffer in the alignment direction, and The first openings are connected to each other in the arrangement direction. Then, the stabilizing members are formed on the side walls t of the respective first openings. Next, at the first opening The first dielectric layer of the square forms a plurality of second openings σ exposing a portion of the substrate. Thereafter, a lower electrode is formed on the surface of each of the second cores of each of the stable 201015701 '---ΐί295twf.d〇c/n. A dielectric layer is subsequently formed on the second dielectric layer. A capacitor structure includes a substrate, a plurality of lower electrodes, a dielectric layer and an upper electrode. The lower electrode is disposed on the substrate. The entire upper part, the stabilizing members are connected to each other in the direction of arrangement, and the cross section in the direction is cup-shaped. The first dielectric layer 5, the stabilizing member and the substrate. The upper electrode is disposed on the first substrate, ... The electric layer and the upper electrode are arranged. The lower electrodes are arranged in the direction in which the lower electrodes are arranged. The stabilizing members respectively surround the entire upper portion of the day, the 敎 members are connected to each other in the arrangement direction, and the cross section of the electric stabilizing members in the arrangement direction is rectangular. The first-electrode is formed on the substrate, and the upper electrode is disposed on the first side of the ice. The capacitor structure of the present invention is manufactured and L = 2 to stabilize the stable member of the lower electrode. Making strength electricity In addition, the present invention proposes a stabilizing member which can prevent the lower electrode from collapsing and is connected to the lower electrode of (5) because the stabilizing member surrounds the entire adjacent shape of the lower electrode: The above-mentioned and other objects, features and advantages of the present invention will become more apparent and understood from the <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; [Embodiment] FIG. 1A to FIG. 1F are views showing a manufacturing process of a capacitor structure according to a first embodiment of the present invention. 2A to 2F are cross-sectional views taken along line A-A, section line, and B-B of FIG. 1A to FIG. First, referring to Fig. 1A and Fig. 2A, a dielectric layer 102 is formed on a substrate 1A. The substrate 100 is, for example, a germanium substrate, and comprises a dielectric layer structure (not shown) having a plurality of contact plugs (not shown) on the germanium substrate through a plurality of process steps, wherein the contact plugs are used for electricity The source of the crystal (not shown) is electrically connected. The material of the dielectric layer 102 is, for example, ruthenium oxide, and the formation method thereof is, for example, a chemical vapor deposition method. Next, a patterned mask layer 1 〇 4 is formed on the dielectric layer 102. The pattern etch mask layer 1G4 includes opening patterns 108 ′ arranged in the alignment direction 1 〇 6 and the opening patterns 108 are not in contact with each other. The material of the patterned mask layer 1〇4 is, for example, a polycrystalline stone, which is formed by, for example, performing a lithography process and a reticle process. Then, the patterned mask layer is used as a mask removing portion (10). The method of removing part of the dielectric layer is, for example, a dry remnant method. ^ However, before the patterned photonic layer used to form the patterned mask layer i 〇 4 has not been removed, the profitable light layer and the patterned mask layer 201015701 ... "8295twf.d〇c/ n as a mask to remove part of the dielectric layer 102, and then remove the patterned photo group layer. Next, please refer to FIG. 1B and FIG. 2B to perform a retraction of the dielectric layer 1〇2 (pull) The process of 'back' is, for example, an isotropic rework process with a high selectivity ratio, in which the dielectric layer 1〇2 is subjected to (10) action and does not have a residual effect on the patterned mask layer 1〇4. Openings 11〇 arranged in the alignment direction 106 are formed in the dielectric layer 1〇2. The openings 11〇 are connected to each other in the arrangement direction 1〇6 and the opening 110 is in the oblique direction 112 with respect to the arrangement direction 1〇6. In this embodiment, the opening 11 is formed by the method as described above, but is not intended to limit the present invention. Thereafter, it is formed on the surface of the patterned mask layer 1〇4 and the opening 11〇. a conformal stabilizing member material layer 114. Since the openings 110 are interconnected in the alignment direction 1〇6, The stabilizing member material layer 114 on both sides of the patterned mask layer in the column direction 1〇6 is filled under the patterned mask layer 1〇4 and connected to each other (refer to AA of FIG. 213, cross-sectional view). Stabilizing member material The material of the layer 114 is, for example, tantalum nitride, and the forming method thereof is, for example, a chemical vapor deposition method. Further, referring to FIG. 1C and FIG. 2C, the stabilizing member material layer 114 is subjected to an etch back process for opening 11 ( The stabilizing member 116 is formed on the side wall. The cross section of the two adjacent stabilizing members 116 in the arrangement direction 1〇6 is, for example, cup-shaped (refer to FIG. 1 (A_A, cross-sectional view). The method used for the etch-back process of the material layer 114 is, for example, a dry button knurling method. In this embodiment, the stabilizing member n6 is formed by the method as described above, but is not intended to limit the present invention. -3295twf.doc/ An opening 118 exposing a portion of the substrate 100 is formed in the dielectric layer 102 under the opening lio. The opening 118 is formed by, for example, patterning the mask layer 104 and the stabilizing member 116 as a mask using dry etching. Except for some dielectric The layer 102 is formed. Subsequently, the wet etching method can be used; the I electrical layer 102 is subjected to a shrinking process to increase the width of the opening 118, and to reduce the contact resistance of the contact plug and increase the area of the capacitor. This - the shrinking process is to increase the area of the capacitor but is not necessary. % Subsequently, referring to FIG. 1D and FIG. 2D, a lower electrode 12A is formed on the sidewall of the stabilizing member 116 and the surface of the opening 118. The lower electrode 120 The forming method includes, for example, the following steps: First, the lower electrode material layer covering the surface of the stabilizing member 116 and the opening σ 118 is shown. The material of the lower electrode material layer is, for example, a metal or a mixed polycrystalline stone, and the bulk material is formed by, for example, physical vapor deposition, chemical gas, deposition or atomic layer deposition. Next, the filling layer 122 of the opening π 11G and the opening 118 is filled in the opening (10) and the opening (1). Filled with layer a, is oxygen cut. The method for forming the filling layer m is, for example, forming a filling material layer (not in the "type") filled with the opening 1H) and the opening by means of a pre-oxygen phase deposition method or a spin coating method, and then the Xianghua (10) method or the chemical surface research. In addition to the opening 110 and the opening 118, the filling is removed or the chemical mechanical polishing is removed. The lower electric shoe layer outside p W, (4) the lower electrode and then 'please refer to FIG. 1 and FIG. 2Ε'. The removal method of removing the patterned mask layer 104 is, for example, wet silk carving method 295twf.doc/n 201015701 and then ' Remove the dielectric layer. The dielectric layer 1G is a wet method. Further, a dielectric removal method such as filling layer 122 may be removed. Simultaneous removal of θ 2 In addition, it can be clearly seen from Fig. 1 that the directions (10) are connected to each other, and the stabilizing members of the stabilizing members 106 are not connected to each other at the oblique angles (4) 2 to form a mesh structure for the array. Transmission stability member 116 ❹ Ο electricity; please become a total:: ^ ^ ^ chemical, nitrogen cutting, three oxidation two (Al2 〇 3), (Hf 〇 2), titanium dioxide (Ti 〇 2), dioxide hammering铪(〇〇3), titanate from Ti〇3), titanic acid 心心戈1== combination, its method is, for example, chemical vapor deposition or atomic layer deposition, forming a total on dielectric layer 124 Shaped upper electrode 126. The material of the upper electrode 126 is, for example, a metal or doped polycrystalline conductor material, and is formed by, for example, physical vapor deposition, chemical vapor deposition, or atomic deposition. Next, a dielectric layer 128 can be formed on the upper electrode 126. The material of the dielectric layer 128 is, for example, ruthenium oxide, and the formation method thereof is, for example, a chemical vapor deposition method or a spin coating method. As is apparent from the above-described first embodiment, in the manufacturing method of the capacitor structure, the stabilizing member 116 for stabilizing the lower electrode 120 is formed, and thus the fabricated capacitor structure can have high mechanical strength. 11 201015701 ------8295twf.d〇c/n The first embodiment of the present invention is illustrated by FIG. 1E and FIG. 2F. FIG. 1E and FIG. 2F 'The capacitor structure includes the substrate 100 and the stable structure. ^U6, lower electrode 12", dielectric layer 124, and upper electrode μ. The power is discharged to perform the top surface of the draining substrate 1〇0 and the lower electrode 120 is arranged along the alignment direction 106. The stabilizing members 116 surround the lower electrode 120 and the upper portion 4, respectively. The stabilizing members 116 are connected to each other in the arrangement direction 1〇6, and the stabilizing members 116 are not connected to each other in the oblique direction 112 with respect to the arrangement direction 1Q6 (please refer to FIG. 1A). The cross section of the two adjacent stabilizing members 116 on the array is cup-shaped. The dielectric layer 124 is disposed on the lower electrode (4), the stabilizing member 116, and the substrate 2A. The upper electrode 126 is disposed on the dielectric layer 124. In addition, the capacitor structure may optionally include a dielectric layer 128 disposed on the substrate 100 and covering the upper electrode 126. Since the effects of the various components in the capacitor structure, (4), and the method of formation have been described in detail in the preceding paragraphs, the details are not described herein. As can be seen from the above, since the capacitor structure has the stabilizing member 116, and the 稳定 stabilizing member 116 surrounds the entire upper portion of the lower electrode 120 and has a cup shape in cross section, it is possible to prevent the lower electrode 12 from collapsing and being connected to the adjacent lower electrode 12A. The situation, therefore, can avoid the situation of two-bit error. 3A to 3F are top views showing a manufacturing process of a capacitor structure according to a second embodiment of the present invention. 4A to 4F are cross-sectional views along line C-C, hatching and D-D' hatching in Figs. 3A to 3F. Figure 5 is a top plan view of a patterned mask layer in accordance with a third embodiment of the present invention. Fig. 6 is a top view of a stabilizing member and an upper electrode according to a third embodiment of the present invention. Figure 12 - J295twf.doc/n 201015701. First, a dielectric layer 202 is formed on the substrate 200 with reference to Figs. 3A and 4A'. The substrate 200 is, for example, a germanium substrate, and includes a dielectric layer structure (not shown) having a plurality of contact plugs (not shown) on the germanium substrate through a plurality of process steps, wherein the contact plugs are used for electricity and electricity. The source of the crystal (not shown) is electrically connected. The material of the dielectric layer 202 is, for example, ruthenium oxide, and the formation method thereof is, for example, a chemical vapor deposition method. ❹ ❹ Next, a patterned mask layer 2〇4 is formed on the dielectric layer 202, and the patterned mask layer 204 includes an opening pattern 208' arranged in the arrangement direction 206 and the opening pattern 2〇8 is arranged in the direction 2〇 6 connected to each other. The material of the patterned mask layer 204 is, for example, a polysilicon, and the formation method thereof is formed, for example, by performing a lithography process and a process of etching. 3 In the present embodiment, the opening pattern 2〇8 in the patterned mask layer 204 is exemplified by a circle, but is not intended to limit the present invention. Please refer to the patterned mask layer in the third embodiment of Fig. 5', in which the opening 2〇8 can be rectangular. After the mouth is displayed, please continue to refer to 3A and FIG. 4A, and remove the portion of the dielectric layer by using the patterned mask layer as a mask to move the openings 210 in the dielectric layer. The opening 210 is at the arrangement side = junction and the opening 210 is connected to each other at an oblique angle of 2 〇 6 with respect to the arrangement direction. The method of removing part of the dielectric layer is, for example, that the patterned light group layer and the smudge mask layer can be used as a mask before the pattern used to form the patterned mask layer 204 is removed. Screen to remove part of the dielectric layer 201015701 7/UJO 〇 '295twf; doc / n and then remove the patterned light group layer. In this embodiment, the opening 21 is formed by the method as described above, but is not intended to limit the present invention. Next, referring to Fig. 3A and Fig. 4, a stabilizing member 214 is formed on the side wall of the opening 21A. The cross section of the two adjacent stabilizing members 214 in the arrangement direction 2〇6 is, for example, a rectangle (refer to FIG. 3) 8 (: _ (::, cross-sectional view). The method of forming the stabilizer 214 includes, for example, the following Step, firstly, a conformal stabilizing member (four) layer (not shown) is formed on the surface of the mask layer 2〇4 and the opening training. The material of the material layer of the stabilizing member is, for example, nitride rock, and the formation thereof The method is, for example, a chemical vapor deposition method. Next, an etch-back process is performed on the material layer of the stabilizing member to form a stabilizing member 214. The method used for performing the etching process on the material layer of the stabilizing member is, for example, a dry method. In this embodiment, the stabilizing member 214 is formed by the method as described above, but is not intended to limit the present invention. Further, it can be clearly seen from FIG. 3 that the stabilizing members 214 are connected to each other in the arrangement direction 206, and The stabilizing members 214 are not connected to each other in the oblique direction 212 with respect to the arrangement direction 2〇6, so that the stabilizing members 214 形成 form a mesh structure. Thereafter, referring to FIG. 3C and FIG. 4C, the openings below the openings 210 are referred to. An opening 216 exposing a portion of the substrate 200 is formed in the layer 202. The opening 216 is formed by, for example, patterning the mask layer and the stabilizing member 2 mask, and removing a portion of the dielectric layer 2〇2 by dry etching. Formed. Then 'we can use the wet money engraving method to carry out the dielectric layer 2 〇 2 - and reduce the contact resistance of the contact plug and increase the area of the electric valley. This shrinkage process is increased The area of the large capacitance, but 14 8295 twf.doc/n 201015701, is not a necessary process. Subsequently, referring to FIGS. 3D and 4D, the lower electrode Mg is formed on the sidewall of the stabilizing member 214 and the surface of the opening 216. Formation of the lower electrode 218 The method includes, for example, the following steps: First, a lower electrode material layer (not shown) covering the surface of the stabilization member 214 and the opening 216 is formed. The material of the lower electrode material layer is, for example, a metal or a doped polysilicon conductor material. The forming method is, for example, physical vapor deposition, chemical vapor deposition, or atomic layer deposition. Next, a filling layer 220 filling the opening 210 and the opening 216 is formed in the opening 210 and the opening 216. The material of the filling layer 220 E.g The method of forming the filling layer 22〇 is, for example, forming a filling material layer (not drawn) filling the opening 21〇 and the opening 216 by chemical vapor deposition or spin coating to reuse etchback or The chemical mechanical polishing method is formed by removing the filling material layer outside the opening 210 and the opening 216. Then, the lower electrode material layer outside the opening 210 and the opening 216 is removed by an etch back method or a chemical mechanical polishing method to form a lower layer. The electrode 218. In the present embodiment, the shape of the 'single stabilizing member 214 and the lower electrode 218 is exemplified by a circular shape, but is not intended to limit the present invention. Referring to Fig. 6, in the case of using the patterned mask layer 2〇4 in the third embodiment, the shape of the single-stabilizing member 214' and the lower electrode 218 as a mask is roughly rectangular. In addition, the forming method of the stabilizing member 214 and the lower electrode 218' in the third embodiment is substantially the same as that of the stabilizing member 214 and the lower electrode 218 in the second embodiment, and thus will not be described herein. Next, please refer to FIGS. 3E and 4E to remove the patterned mask layer 204. 15 J295twf.d〇〇/n
201015701 圖案=幕層綱的移除方法例如 然後’移除介電層2〇2。介電# =去。 是濕式蝕刻法。此外，^ 多除方法例如 充層220。 了在移除介電層撕的同時移除填 接下來，請參照圖3F及圖佔 電極⑽上形成共形的介電層222。介= =下 如是氧w _、三輸：㉟、例 峨鈦酸_或上述材料的組合， ά成方法例如疋化學氣減積法或原子層沈積法。 之後，於介電層222上形成共形的上電極224。 極224的材料例如是金屬或摻❹ =例如是物理氣相沈積法、化學氣相沈=原;： 况槓法。 繼之，更可於基底200上形成介電層226，且介電芦 挪覆蓋上電極224。介電層226的材料例如是氧化石夕，^ 形成方法例如是化學氣相沈積法或旋轉塗佈法。 由上述第二實施例可知，電容器結構的製造方法會使 下電極218的整個上部形成網狀的穩定構件214，因此可 提升電容器結構的機械強度。 以下，藉由圖3Ε及圖4F來說明本發明之第一實施例 的電容器結構。 ^請參照圖3Ε及圖4F，電容器結構包括基底200、穩 疋構件214、下電極218、介電層222及上電極224。下電 極218設置於基底200上，且下電極218沿排列方向2〇6 16 201015701 y f ^ 〇295twf.doc/n 進行排列(請參照圖3E)。穩定構件214分別圍住下電極218 的整個上部。穩定構件214在該排列方向206上互相連接， 且穩疋構件214在相對於該排列方向2〇6的斜角方向212 上互不連接(請參照圖3E)。相鄰兩個穩定構件214於排列 方向206上的剖面呈矩形。介電層222設置於下電極218、 穩定構件214及基底200上。上電極224設置於介電層222 上。此外’電容器結構更可選擇性包括介電層226，其設 置於基底細上且覆蓋上電極224。由於電容器結構中各 構件的功效、材料及形成方法已於前文中進行詳盡地說 明’因此於此不再贅述。 由上述可知，由於電容器結構具有穩定構件214，且 穩定構件214圍住下電極218的整個上部且剖面呈矩形， 因此可防止下電極218倒塌，進而能避免二位元錯誤的 況發生。 綜上所述，上述實施例至少具有下列優點： 1. 藉由上述實施例中所提出之電容器結構的製造方法 ❹ 可以製作出具有高機械強度的電容器結構。 2. 上述實施例中所提出之電容器結構可防止下電極倒 塌，而能避免二位元錯誤的情況發生。 雖然本發明已以實施例揭露如上，然其並非用以限定 本發明’任何熟習此技藝者’在不脫離本發明之精神和範 圍内，當可作些許之更動與潤飾，因此本發明之保護 當視後附之申請專利範圍所界定者為準。 17 ;295twf.doc/n 201015701 【圖式簡單說明】 圖1A至圖IF所繪示為本發明第一實施例之電容器結 構的製造流程上視圖。 圖2A至圖2F所繪示為沿著圖ία至圖1F中A-A’ 剖面線及B-B’剖面線的剖面圖。 圖3A至圖3F所繪示為本發明第二實施例之電容器結 構的製造流程上視圖。 圖4A至圖4F所繪示為沿著圖3A至圖3F*C-C’剖 面線及D-D剖面線的剖面圖。 圖5所繪示為本發明第三實施例之圖案化罩幕層的上 視圖。 圖6所繪示為本發明第三實施例之穩定構件及上電極 的上視圖。 【主要元件符號說明】 100 ' 200 :基底 102、124、128、202、222、226 :介電層 104、204、204’ ：圖案化罩幕層 β 106、206:排列方向 108、208、208’ ：開 口圖案 110、118、210、216 :開口 112、212 :斜角方向 114:穩定構件材料層 · 116、214 :穩定構件 120、218 :下電極 122、220 :填充層 126、224 :上電極 18201015701 Pattern = removal method of the curtain layer, for example, then 'removal of the dielectric layer 2〇2. Dielectric # = go. It is a wet etching method. Further, the multi-division method is, for example, the filling layer 220. The removal is removed while removing the dielectric layer. Next, a conformal dielectric layer 222 is formed on the electrode (10) as shown in FIG. 3F and FIG. =========================================================================================== Thereafter, a conformal upper electrode 224 is formed on the dielectric layer 222. The material of the pole 224 is, for example, metal or erbium-doped = for example, physical vapor deposition, chemical vapor deposition = original; Further, a dielectric layer 226 is formed on the substrate 200, and the dielectric reed covers the upper electrode 224. The material of the dielectric layer 226 is, for example, an oxidized stone, and the formation method is, for example, a chemical vapor deposition method or a spin coating method. As is apparent from the second embodiment described above, the manufacturing method of the capacitor structure causes the entire upper portion of the lower electrode 218 to form the mesh-like stabilizing member 214, so that the mechanical strength of the capacitor structure can be improved. Hereinafter, a capacitor structure of a first embodiment of the present invention will be described with reference to Figs. 3A and 4F. Referring to FIG. 3A and FIG. 4F, the capacitor structure includes a substrate 200, a stabilizing member 214, a lower electrode 218, a dielectric layer 222, and an upper electrode 224. The lower electrode 218 is disposed on the substrate 200, and the lower electrodes 218 are arranged in the arrangement direction 2〇6 16 201015701 y f ^ 〇 295twf.doc/n (please refer to FIG. 3E). The stabilizing members 214 surround the entire upper portion of the lower electrode 218, respectively. The stabilizing members 214 are connected to each other in the arrangement direction 206, and the stabilizing members 214 are not connected to each other in the oblique direction direction 212 with respect to the arrangement direction 2〇6 (please refer to FIG. 3E). The cross section of the adjacent two stabilizing members 214 in the direction of alignment 206 is rectangular. The dielectric layer 222 is disposed on the lower electrode 218, the stabilizing member 214, and the substrate 200. The upper electrode 224 is disposed on the dielectric layer 222. Further, the capacitor structure may more optionally include a dielectric layer 226 disposed on the substrate and covering the upper electrode 224. Since the functions, materials, and forming methods of the various components in the capacitor structure have been described in detail in the foregoing, the details are not described herein. As apparent from the above, since the capacitor structure has the stabilizing member 214, and the stabilizing member 214 surrounds the entire upper portion of the lower electrode 218 and has a rectangular cross section, the lower electrode 218 can be prevented from collapsing, and the occurrence of a two-bit error can be prevented. In summary, the above embodiment has at least the following advantages: 1. A capacitor structure having high mechanical strength can be fabricated by the manufacturing method of the capacitor structure proposed in the above embodiment. 2. The capacitor structure proposed in the above embodiment can prevent the lower electrode from collapsing, and can avoid the occurrence of two-bit error. The present invention has been disclosed in the above embodiments, and is not intended to limit the present invention. Any of the skilled in the art can be modified and retouched without departing from the spirit and scope of the present invention. This is subject to the definition of the scope of the patent application. 17; 295 twf.doc/n 201015701 [Simplified Schematic Description] Fig. 1A to Fig. IF are views showing a manufacturing process of a capacitor structure according to a first embodiment of the present invention. 2A to 2F are cross-sectional views taken along the line A-A' and the line B-B' in Fig. 1A to Fig. 1F. 3A to 3F are top views showing a manufacturing process of a capacitor structure according to a second embodiment of the present invention. 4A to 4F are cross-sectional views taken along line C-C and cross-section taken along line D-D of Figs. 3A to 3F. Figure 5 is a top plan view of a patterned mask layer in accordance with a third embodiment of the present invention. Fig. 6 is a top plan view showing a stabilizing member and an upper electrode according to a third embodiment of the present invention. [Main component symbol description] 100 '200: substrate 102, 124, 128, 202, 222, 226: dielectric layer 104, 204, 204': patterned mask layer β 106, 206: alignment direction 108, 208, 208 ' : opening pattern 110, 118, 210, 216: opening 112, 212: oblique direction 114: stabilizing member material layer · 116, 214: stabilizing member 120, 218: lower electrode 122, 220: filling layer 126, 224: upper Electrode 18