TW201007922A - Structure of stacked LED chip and manufacturing method thereof - Google Patents

Structure of stacked LED chip and manufacturing method thereof Download PDF

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Publication number
TW201007922A
TW201007922A TW097131036A TW97131036A TW201007922A TW 201007922 A TW201007922 A TW 201007922A TW 097131036 A TW097131036 A TW 097131036A TW 97131036 A TW97131036 A TW 97131036A TW 201007922 A TW201007922 A TW 201007922A
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Taiwan
Prior art keywords
light
emitting diode
chip
semiconductor
layer
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TW097131036A
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Chinese (zh)
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TWI371098B (en
Inventor
guo-qin Huang
Hui-Qing Feng
xi-ming Pan
hong-li Pan
yin-cheng Zhu
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Formosa Epitaxy Inc
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors

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Abstract

The present invention relates to a structure of stacked LED chip and the manufacturing method thereof, which places an LED chip of flip-chip type between two semiconductor epitaxial layers that share the same substrate, wherein the electrode of the LED chip of flip-chip type directly and electrically connects to the electrode of the two semiconductor epitaxial layers, so as to increase the light emitting area.

Description

201007922 九、發明說明: 【發明所屬之技術領域】 本發明係有關於-種發光二極體之裝置及其製造方法,尤指將堆疊二 正面發光式與-覆晶式之晶片組之發光二極體之裝置及其製造方法。 【先前技術】 按發光一極體(Light Emitting Diode;LED)是由半導體材料所製 成之發光το件,το件具有兩個電極端子,在端子間施加電壓,通入極小的 〇 冑抓’經由電子電洞之結合可將剩餘能量以光的形式激發釋出,此即發光 -極體之基本發光原理。發^^極體不肖於—般自舰泡,發光二極體係 屬冷發光’具有耗電量低、元件壽命長'無須暖燈時間及反應速度快等優 點再加上其體積小、耐震動、適合量產,容易配合應用上的需求製成極 小或陣列式的元 件’ ^刚發光二極體已普遍使用於資訊、通訊及消費性電子產品的指示器 與顯不裝置上,成為日常生活中不可或缺的重要元件。 關於發光-極體於諸多的前揭技術中多有揭露,例如中華民國專利公 告第408497號「發光二極體照明裝置」、中華民國專利公告細挪號「密 ❹封式發光二極舰«置」以及巾觀國專利公告第512548號「發光二極 體照明器」均有所揭露,揭各公告案中所揭示的技術,係多注重於以多 顆發光二極體的發光,作為照明用的發光光源,其主要的進步性技術仍著 重在如何以多顆發光二極體以最合適的佈局,方可達到較好的發光效率以 及提昇亮度,然而前揭技術传揭示的技術中,於實際生產製造時,則會 面臨到大《輯衍生的_,因為錄的前揭技術是蝴_顆的單 -發光二極體佈成矩形陣列或圓型陣列的方式,方可使發光面積加大;如 何增加單位面積之發光面積,實為—重大課題。 再者’以發光的轉而言’發光二極騎能承受的辨高低佔重要的 因素,當發先-極體能承受高功率的應用時,可使單顆發光二解的亮度 5 201007922 在上提昇’進-步而言,可有效的增加發光二極體的應用細,尤其應用 於照明;故’如何提高發光二極體的亮度為—想當重要的課題。而功率的 提升’首先要克服_題即在於發光二極體於電鱗猶,其所產生的工 作溫度提升該如何排除或降低?綜觀前揭技射所揭露的龍可以發現, 多數的發光二極體其有關散熱之設計多於進行封裝時完成,亦即於進行封 裝作業時外接具有散熱功能的散鮮,例如中華民國專利公報公 參 Φ 號「液冷式發光二極體及其封裝方法」中即有相關的技術财,以 及中華民國專利公報公告第麵3號「直冷式發光二極體」亦有相關技術 =露’此_賴設計旨在_外加柄散熱料,例如外加氣密罩以 f充液體或禮等方式’使發光二極電鱗鶴產生的卫作溫度得以 藉由此散_丨而絲,躺使工作财科辦,紐光二滅能承受 :功率的應用而不會產生絲減的現象,以確保其應用性,然而,外加的 设计雖可達職熱的目的’但也增加了其封鰣的加卫程序,且外加式的 散熱設計於封裝時能否有效結合,則勢必成為品質檢測過程的另—種負擔。 又奋請參閱第-圖’其係為習知技術之正面型發光二極承載板之 ::不意圖,如圖所示,一般於承載板上為其發光二極體之基板設置於該 懸望之t、,且一個發光二極體晶片具有一定的距離,造成承載板之面積 於^_,造細祕降低’上述之例子為正面型發光,請參閱 =、絲1知技術之覆晶式發光二極體於承載板之結構示意圖;如 同上述醜—樣,承載板之面積並料於發光面積。 =鑑於上述問題,f知技術以增加單—晶片之發光效率為目的,因為 直無法解決,增加效率後光衰減無法解決,然、,提高發光面積 2目前^需解決問題之―,本發明係提供—種發光二極體晶片組之 方式,不以提尚單顆晶粒之發光效率為目的。 【發明内容】 -極體晶片之結構及其 本發明之主要目的’係在於提供—種堆疊發光 201007922 製造方法,制混合正面發光式與覆晶式晶粒之方式,以提高@)定面積下 之發光面積。 為=達到上述之目的,本發明係提供一種堆叠發光二極體晶片之結構 ,其製造=法’利用二正面發光式發光二極體晶片與一覆晶式發光二極體 日日片以相豎方式’藉此以提高設置於一基板之利用面積可提高該基板整 體之發光面積。 【實施方式】 © 茲為使貴審查委員對本發明之結構特徵及所達成之功效有更進一步 之瞭解與認識,謹佐啸佳之獅例及配合雜之綱,說明如後: 習知技術係將發光二極體晶片以正面式或覆晶式以固晶於一承載板 上,必須兩兩相隔,使該承載板之面積並非等於發光面積,造成單位面積 之發光亮度較低,故,本發明係為解決上之問題,以提供一提高發光面積。 請參閱第三圖,係本發明之一較佳實施例之結構示意圖。如圖所示, 本發明係為一種發光二極體之裝置,係包含一基板10、正面發光式之二半 導體磊晶層20、30與一覆晶式發光二極體晶片4〇;其中該二半導體磊晶層 20、30係設置於該基板1〇之上,且分隔設置,具有一相隔距離D,該覆晶 ® 式發光二極體晶片40之電極係與該二半導體磊晶層20之電極做電性相 接’且該覆晶式發光二極體晶片40並無與該基板1〇相接觸。 本實細•例之第一半導體蟲晶層20與第二半導體蟲晶層30,其結構由下 而上係包含一第一半導體層211、311、一第一發光層212、312及一第二半 導體層213、313,其結構依序堆疊於該基板1〇之上,本發明更進一步包含 一第一電極214、314與一第二電極215、315 ’該第一電極214、314係設 置於該第一半導體層211、311之上,該第二電極215、315係設置於該第 一半導體層213、313之上。 再者’該覆晶式發光二極體晶片40係由下而上係包含有一第三半導體 層41、一第二發光層42與一第四半導體層43,本發明更進一.步包含一第 201007922 三電極45與一第四電極46,該第三電極45係設置於該第四半導體層犯之 下,該第四電極46係設置於該第三半導體層41之下;其中該第一半導體 . 磊晶層20之第一電極214與該覆晶式發光二極體晶片40之第四電極46以 -第-凸塊50作一電性相接,該第二半導體蟲晶層3〇之第二電極315係 與該覆晶式發光二極體晶片40之第三電極45以一第二凸塊6〇作一電相 接。 又’該二半導體蟲晶層2〇、3〇與覆晶式發光二極體晶片4〇具有相同單— 色光或者具有至少二種以上之色光,例如:該二半導體兹晶層2Q、與覆 晶式發光二極體晶片4()同為白光,或者該二半導體屋晶層2G、30與覆曰 式發光二極體晶片40分別為三原色光或者藍光及黃光,且該二半導體^ 層20、30之發光波長小於該覆晶式發光二極體晶片4〇之發光波長。日日 又》月參閱第四A圖至第四c圖,其係為本發明之一較佳實施例之製 絲程® ;如騎示’本侧縣—舰合@晶式之發光二鋪之製造方 法’其步驟係包含有’如細A騎示,提供__基板1();如第四B圖所示, 分隔蟲晶形成二半導體遙晶層2〇、3〇於該基板1〇上;如第四c圖所示, 设置-覆晶式發光二極體晶片4〇以一第一凸塊5〇與一第二凸塊6〇與該二 半導體蟲晶層2G、3G相接,且三者電性相接;如第四D圖所示,去除覆: ❹ 光二極體晶片40之一透明基板44。又,該覆晶式發光二極體晶片4〇 之第四半導體層43之出光面係具有_粗化結構。 其中’該一半導體蟲晶層2〇、3〇以及覆晶式發光二極體晶片4〇之為 晶方式’從該基板、第一半導體層、發光層、第二半導體層、第-電極與 該第二電極2為習知技術’非本發明之技麟徵不再資述。 另外若不執行如帛四D騎示之步驟,則本發明之混合目晶式之發 光-極體更包3透明基板44,如第五圖所示,其為本發明之另一較佳實施 例之混合固晶式之發光二極體。 又’當複數個半導體磊晶層2〇、30與複數個覆晶式發光二極體晶片40 以電)·生連接時半導體兹晶層2〇、3〇與覆晶式發光二極體晶片4〇之間可 201007922 依串聯電性連接形成-橋式整流結構或者依並聯電性連接形成—橋式整流 結構或者料《紐連接賴—賦紐結贼魏_較連接形成 一橋式讀發《置或域錢發絲践者依連娜成—橋式 全波交流發光裝置或者依串並聯電性連接形成—橋式二 發光裝置或全波交流發光裝置。 最後’請參閱第六圖,其係為本發明之另一較佳實施例之結構示意圖; ^圖所示’本發明與上述之結構不同在於串並聯之差異該第—半^體遙 b曰層20之第一電極214與該覆晶式發光二極體晶片4〇之第三電極奶以一 第-凸塊50作-電性相接,該第二料體蟲晶層3〇之第二_ 315係與 該覆晶式發光二極體晶片40之第四電極46以-第二凸塊6〇作一電性相接。 綜上所述,本發明係實為一具有新穎性、進步性及可供產業利用者, 應符合我國專舰所規定之專利巾請要件無疑,爰依法提崎明專利申 請,祈鈞局早曰賜准利,至感為禱❶ 淮以上所述者’僅為本發明之一較佳實施例而已並非用來限定本發 明實施之細’軌依本發卿料利細舰之雜、觀、特徵及精 神所為之均等變化與修飾’均應包括於本發明之_請專繼圍内。 脅 【圖式簡單說明】 第—圖:其係為習知技術之正面型發光二極體於承載板之結構示意圖; 第二圓:其係為習知技術之覆晶式發光二極體於承載板之結構示意圖; 第三圖:係本發明之一較佳實施例之結構示意圖 第四A圖.其係為本發明之一較佳實施例之製造流程圖; 第四B圖.其係為本發明之一較佳實施例之製造流程圖; 第四C圖·其係為本發明之一較佳實施例之製造流程圖; 第四D圖:其係為本發明之一較佳實施例之製造流程圖; 第五圖:其係為本發明之另一較佳實施例之結構示意圖;及 第六圖··其係為本發明之另一較佳實施例之結構示意圖。 201007922 【主要元件符號說明】 10 基板 20 第一半導體磊晶層 211第一半導體層 212第一發光層 213第二半導體層 214第一電極 215第二電極 30 第二半導體磊晶層 311第一半導體層 312第一發光層 313第二半導體層 314第一電極 315第二電極 40 覆晶式發光二極體晶片 41 第三半導體層 42 第二發光層 43 第四半導體層 44 透明基板 45 第三電極 46 第四電極 50 第一凸塊 60 第二凸塊 D 分隔距離201007922 IX. Description of the Invention: [Technical Field] The present invention relates to a device for manufacturing a light-emitting diode and a method for fabricating the same, and more particularly to a light-emitting diode of a stack of two front-illuminated and flip-chip wafers A polar body device and a method of manufacturing the same. [Prior Art] A Light Emitting Diode (LED) is a light-emitting material made of a semiconductor material. The το member has two electrode terminals, and a voltage is applied between the terminals to pass a very small scratch. The remaining energy can be excited and emitted in the form of light through the combination of electron holes, which is the basic principle of light emission. The hair is not in the same way as the bubble, and the light-emitting diode system is cold-lighting. It has the advantages of low power consumption, long component life, no need for warming time and fast response, plus its small size and vibration resistance. Suitable for mass production, easy to meet the needs of the application to make very small or array of components ' ^ just LEDs have been widely used in information, communication and consumer electronics indicators and display devices, become everyday life An important component that is indispensable. There are many disclosures on the illuminating-polar body in many pre-existing technologies, such as the Republic of China Patent Notice No. 408497 "Light Emitting Diode Lighting Device", and the Republic of China Patent Announcement No. "Small Sealed Illuminated Dipole Ship « "The light-emitting diode illuminator" is disclosed in the patrol of the National Patent Publication No. 512548. The technology disclosed in the various announcements focuses on the illumination of multiple light-emitting diodes as illumination. The main progressive technology of the illuminating light source is still focused on how to use multiple light-emitting diodes in the most suitable layout to achieve better luminous efficiency and brightness. However, in the technique disclosed in the prior art, In actual production and manufacturing, it will face the big "derivatives", because the pre-existing technology of the recording is a single-light-emitting diode arranged in a rectangular array or a circular array to enable the light-emitting area. Increase; how to increase the luminous area per unit area is really a major issue. In addition, in terms of the illuminating turn, the illuminating two-pole riding can withstand the high and low factors, and when the first-polar body can withstand high-power applications, the brightness of the single illuminating solution can be made 5 201007922 To improve the 'in step-step, it can effectively increase the application of the light-emitting diode, especially for lighting; so how to improve the brightness of the light-emitting diode is an important issue. The improvement of power, the first thing to overcome, is that the light-emitting diode is in the electric scale, how can the work temperature increase caused by it be eliminated or reduced? Looking at the dragons revealed by the previous technology shooters, it can be found that most of the light-emitting diodes have more heat-dissipation design than when they are packaged, that is, when they are packaged, they have external heat dissipation functions, such as the Republic of China Patent Gazette. The public ginseng Φ "liquid-cooled light-emitting diode and its packaging method" has relevant technical assets, as well as the Republic of China Patent Gazette Notice No. 3 "Direct Cooling Light Emitting Diode" also has related technology = dew 'This _ _ design is designed to _ external handle heat sink, such as the addition of a gas-tight cover to fill the liquid or courtesy, etc. 'The temperature of the illuminating dipole electric scale crane can be used to scatter the silk To make the work of the Office of Finance and Economics, the new light can not withstand the application of power without the phenomenon of silk reduction to ensure its applicability. However, the added design can achieve the purpose of hot work, but it also increases its seal. The addition of the program, and the additional heat dissipation design can be effectively combined in the packaging, it is bound to become another burden of the quality inspection process. Please also refer to the first figure, which is a front-mounted light-emitting diode carrier board of the prior art:: It is not intended, as shown in the figure, a substrate for its light-emitting diode is generally disposed on the carrier board. t, and a light-emitting diode wafer has a certain distance, causing the area of the carrier plate to be reduced by __, and the fineness of the manufacturing is reduced. The above example is a front-type illuminating, please refer to the tiling type of the technology. A schematic diagram of the structure of the light-emitting diode on the carrier plate; as in the above-mentioned ugly, the area of the carrier plate is combined with the light-emitting area. In view of the above problems, the technology of F is to increase the luminous efficiency of the single-wafer, because it cannot be solved, and the light attenuation cannot be solved after the efficiency is increased. However, the improvement of the light-emitting area 2 currently requires solving the problem. The method of providing a light-emitting diode chip set is not intended to improve the luminous efficiency of a single crystal grain. SUMMARY OF THE INVENTION - The structure of a polar body wafer and its main purpose of the present invention is to provide a method for manufacturing a stacked light-emitting device 201007922, which is a method for mixing front-illuminated and flip-chip crystal grains to improve the area under @) The area of the light. In order to achieve the above object, the present invention provides a structure for stacking a light-emitting diode wafer, which is manufactured by using two front-emitting light-emitting diode chips and a flip-chip light-emitting diode Japanese film. In the vertical mode, the light-emitting area of the entire substrate can be improved by increasing the utilization area of the substrate. [Embodiment] © In order to enable your review committee to have a better understanding and understanding of the structural features and effects achieved by the reviewer, I would like to read the lion example and the miscellaneous program of the singer, as explained below: The light-emitting diode chip is solid-crystallized on a carrier plate in a front-side or flip-chip type, and must be separated by two or two, so that the area of the carrier plate is not equal to the light-emitting area, and the light-emitting brightness per unit area is low, so the present invention To solve the above problem, to provide an improved light-emitting area. Please refer to the third drawing, which is a schematic structural view of a preferred embodiment of the present invention. As shown in the figure, the present invention is a light emitting diode device comprising a substrate 10, a front side light emitting diode epitaxial layer 20, 30 and a flip chip type LED chip 4; The two semiconductor epitaxial layers 20 and 30 are disposed on the substrate 1 , and are disposed apart from each other with a distance D. The electrode system of the flip chip OLED wafer 40 and the two semiconductor epitaxial layers 20 . The electrodes are electrically connected to each other and the flip-chip LED wafer 40 is not in contact with the substrate 1A. The first semiconductor crystal layer 20 and the second semiconductor crystal layer 30 of the embodiment include a first semiconductor layer 211, 311, a first light-emitting layer 212, 312, and a first The second semiconductor layers 213 and 313 are sequentially stacked on the substrate 1 , and the present invention further includes a first electrode 214 , 314 and a second electrode 215 , 315 ′ On the first semiconductor layers 211 and 311, the second electrodes 215 and 315 are disposed on the first semiconductor layers 213 and 313. Furthermore, the flip-chip LED chip 40 includes a third semiconductor layer 41, a second luminescent layer 42 and a fourth semiconductor layer 43 from bottom to top. The present invention further includes a first step. a third electrode 45 and a fourth electrode 46 disposed under the fourth semiconductor layer, the fourth electrode 46 being disposed under the third semiconductor layer 41; wherein the first semiconductor The first electrode 214 of the epitaxial layer 20 and the fourth electrode 46 of the flip-chip diode 40 are electrically connected by the -th bump 50, and the second semiconductor crystal layer 3 The second electrode 315 is electrically connected to the third electrode 45 of the flip-chip diode 40 by a second bump 6 . Further, the two semiconductor crystal layers 2〇, 3〇 and the flip-chip light-emitting diode wafer 4 have the same single-color light or have at least two kinds of color light, for example, the two semiconductor crystal layers 2Q, and the cover The crystal light emitting diode chip 4 () is white light, or the two semiconductor house layers 2G, 30 and the cover light emitting diode chip 40 are respectively three primary colors or blue light and yellow light, and the two semiconductor layers The light-emitting wavelength of 20 and 30 is smaller than the light-emitting wavelength of the flip-chip light-emitting diode chip. Referring to the fourth to fourth c-drawings, it is a silk-making process® according to a preferred embodiment of the present invention; such as the riding of the 'Benyi County-Yinghe@晶式光光二铺The manufacturing method 'the steps thereof includes 'such as a fine A riding, providing __ substrate 1 (); as shown in the fourth B, separating the crystal crystals to form two semiconductor crystal layers 2 〇, 3 〇 on the substrate 1 As shown in FIG. 4C, the flip-chip LED chip 4 is provided with a first bump 5〇 and a second bump 6〇 and the second semiconductor crystal layer 2G, 3G. And the three are electrically connected; as shown in FIG. 4D, the transparent substrate 44 of the photodiode wafer 40 is removed. Further, the light-emitting surface of the fourth semiconductor layer 43 of the flip-chip light-emitting diode wafer 4 has a thickened structure. Wherein the semiconductor crystal layer 2〇, 3〇 and the flip-chip light-emitting diode wafer are in a crystalline manner from the substrate, the first semiconductor layer, the light-emitting layer, the second semiconductor layer, the first electrode and The second electrode 2 is a prior art technique that is not a technical invention. In addition, if the step of riding as shown in FIG. 4D is not performed, the hybrid-polar body of the present invention further comprises a transparent substrate 44, as shown in FIG. 5, which is another preferred embodiment of the present invention. For example, a mixed solid crystal type light emitting diode. And 'when a plurality of semiconductor epitaxial layers 2, 30 and a plurality of flip-chip light-emitting diodes 40 are electrically connected to each other, the semiconductor germanium layer 2 〇, 3 〇 and the flip-chip light-emitting diode wafer Between 4〇, 201007922 can be formed by series-connected electrical connection-bridge-type rectification structure or formed by parallel electrical connection--bridge rectification structure or material "New connection Lai--------------------------------------------------- The bridge or the full-wave AC illuminator is formed by the bridge-type full-wave AC illuminating device or the series-parallel electrical connection. Finally, please refer to the sixth figure, which is a schematic structural view of another preferred embodiment of the present invention; ^The figure shows that the present invention differs from the above structure in that the difference between the series and the parallel is the first-half body remote b曰The first electrode 214 of the layer 20 and the third electrode milk of the flip-chip LED chip 4 are electrically connected by a first bump 50, and the second material layer 3 The second 315 is electrically connected to the fourth electrode 46 of the flip-chip LED chip 40 by the second bump 6 . In summary, the present invention is a novelty, progressive and available for industrial use, and should meet the requirements of the patented towel specified by the special ship of China, and undoubtedly raise the patent application according to law, and pray for the early曰 准 准 , , , 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮 淮Equivalent changes and modifications of the features, spirits and spirits should be included in the invention.胁 [Simple description of the diagram] The first figure: it is a schematic diagram of the structure of the front-facing light-emitting diode of the prior art on the carrier plate; the second circle: it is a flip-chip light-emitting diode of the prior art FIG. 4 is a schematic structural view of a preferred embodiment of the present invention. FIG. 4 is a manufacturing flowchart of a preferred embodiment of the present invention; A manufacturing flow chart of a preferred embodiment of the present invention; a fourth C drawing, which is a manufacturing flow chart of a preferred embodiment of the present invention; and a fourth D drawing, which is a preferred embodiment of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 5 is a schematic structural view of another preferred embodiment of the present invention; and FIG. 6 is a schematic structural view of another preferred embodiment of the present invention. 201007922 [Description of main component symbols] 10 substrate 20 first semiconductor epitaxial layer 211 first semiconductor layer 212 first light emitting layer 213 second semiconductor layer 214 first electrode 215 second electrode 30 second semiconductor epitaxial layer 311 first semiconductor Layer 312 first light-emitting layer 313 second semiconductor layer 314 first electrode 315 second electrode 40 flip-chip light-emitting diode wafer 41 third semiconductor layer 42 second light-emitting layer 43 fourth semiconductor layer 44 transparent substrate 45 third electrode 46 fourth electrode 50 first bump 60 second bump D separation distance

Claims (1)

201007922 十、申請專利範圍: ι_ 一種堆疊發光二極體晶片之結構,係包含: 一基板,其係分隔設置二半導體磊晶層於該基板之上,具有一相隔距 離;及 ^ -覆晶式發光二極體晶片,其係設置於該二半導體蟲晶層之間,且與 該二半導體磊晶層以電性相接。 ^ 2·如申請專利範圍第1項所述之堆疊發光二極體晶片之結構,其中該二 半導體遙晶層係包含·第-半導體遙晶層與—第二半導晶層,其 分別由下而上係包含: S 一第一半導體層,係設置於該基板之上; 一第一發光層,係設置於該第一半導體層之上;及 一第二半導體層,係設置於該第一發光層之上; 射’更進-步包含-第-電極與—第二電極,該第—電極係設置於 該第-半導體層之上’該第二電極係設於該第二半導體層之上。 3. 如申凊專利範圍第i項所述之堆疊發光二極體晶片之結構,其中該覆 晶式發光二極體晶片係由下而上包含: 一第三半導體層; β 一第二發光層,係設置於該第三半導體層之上;以及 一第四半導體層’係設置於該第二發光層之上; 其中’更進—步包含一第三電極與-第四電極,該第三電極係設置於 該第四半導體層之τ,鶴四電極係設置於該第三半導體層之下。 4. ^申二專利細第2項或第3項所述之堆疊發光二極體晶片之結構, 亥第-半導體蟲晶層之第—電極係與該覆晶式發光二極體晶片之 二電極相連接,該第二半導體遙晶層之第二電極係與該覆晶式發光 二極體晶#之第四電極相連接。 5. =申明專利範圍第2項或第3項所述之堆叠發光二極體晶片之結構, 八中該第—半導體蟲晶層之第一電極係與該覆晶式發光二極體晶片之 11 201007922 帛四電極相連接,該第二半導體蠢晶層之第二電極係與該覆晶式發光 二極體晶片之第三電極相連接。 6. 如申請專利範圍第2項或第3項所述之堆疊發光二極體晶片之結構, 其中該二半導齡晶層與覆晶式發光二極體晶片具有相同單—色光。 7. 如申請專利範圍第2項或第3項所述之堆疊發光二極體晶片之結構, 其中該二半導體i晶層與覆晶式發光二極體晶片具有至少二種以上之 色光。 8. 如申請專利範圍第2項或第3項所述之堆疊發光二極體晶片之結構, 蠹 纟中該二半導體蟲晶層之發光波長小於該覆晶式發光二極體晶片之發 光波長。 9. 如申請專利範圍第3項所述之堆疊發光二極體晶片之結構其中該覆 晶式發光二極體晶片更可包含一透明基板,位於該第四半導體層之1。 10. 如f請專利範圍第3項所述之堆疊發光二極體晶片之結構,其中該第 四半導體層之出光面係為一粗糙面。 11 如申明專利範圍第1項所述之堆疊發光二極體晶片之結構,更可含複 數半導體磊晶層與複數覆晶式發光二極體晶片以電性連接。201007922 X. Patent application scope: ι_ A structure of a stacked light-emitting diode wafer, comprising: a substrate separated by two semiconductor epitaxial layers on the substrate, having a distance; and ^ - flip-chip A light emitting diode chip is disposed between the two semiconductor crystal layers and electrically connected to the two semiconductor epitaxial layers. The structure of the stacked light-emitting diode wafer according to claim 1, wherein the two semiconductor remote crystal layers comprise a first-semiconductor crystal layer and a second semi-crystal layer, respectively The bottom layer includes: a first semiconductor layer disposed on the substrate; a first light emitting layer disposed on the first semiconductor layer; and a second semiconductor layer disposed on the first Above the luminescent layer; the radiant further comprises: a first electrode and a second electrode, the first electrode is disposed on the first semiconductor layer, and the second electrode is disposed on the second semiconductor layer Above. 3. The structure of the stacked light-emitting diode wafer according to claim i, wherein the flip-chip light-emitting diode chip comprises: a third semiconductor layer; a second light-emitting layer; a layer is disposed on the third semiconductor layer; and a fourth semiconductor layer is disposed on the second light-emitting layer; wherein the step further comprises a third electrode and a fourth electrode, the first The three-electrode system is disposed at the τ of the fourth semiconductor layer, and the four-electrode system is disposed under the third semiconductor layer. 4. The structure of the stacked light-emitting diode wafer described in the second or the third item of the second patent, the first electrode of the Hidd-semiconductor layer and the chip of the flip-chip diode The electrodes are connected, and the second electrode of the second semiconductor crystal layer is connected to the fourth electrode of the flip-chip light-emitting diode #. 5. The structure of the stacked light-emitting diode wafer according to item 2 or 3 of the patent scope, the first electrode system of the first-semiconductor crystal layer and the flip-chip light-emitting diode chip 11 201007922 The four electrodes are connected, and the second electrode of the second semiconductor doped layer is connected to the third electrode of the flip-chip diode chip. 6. The structure of a stacked light-emitting diode wafer according to claim 2, wherein the two-semiconductor crystal layer and the flip-chip light-emitting diode wafer have the same single-color light. 7. The structure of a stacked light-emitting diode wafer according to claim 2, wherein the two semiconductor i-crystal layers and the flip-chip light-emitting diode chip have at least two or more kinds of chromatic light. 8. The structure of the stacked light-emitting diode wafer according to claim 2 or 3, wherein the light-emitting wavelength of the two semiconductor crystal layers is smaller than the light-emitting wavelength of the flip-chip light-emitting diode chip . 9. The structure of the stacked light-emitting diode wafer according to claim 3, wherein the crystalline light-emitting diode chip further comprises a transparent substrate located at 1 of the fourth semiconductor layer. 10. The structure of the stacked light-emitting diode wafer according to claim 3, wherein the light-emitting surface of the fourth semiconductor layer is a rough surface. The structure of the stacked light-emitting diode wafer according to the first aspect of the invention is further characterized in that the plurality of semiconductor epitaxial layers and the plurality of flip-chip light-emitting diode chips are electrically connected. 12.如申請專利範圍帛u項所述之堆疊發光二極體晶片之結構,其中該複 數半導體蟲晶層與該複數覆晶式發光二極體晶片依串聯電性連接形成 一橋式整流結構。 13. 如申請專利範圍第u項所述之堆疊發光二極體晶片之結構,其中該複 數半導體蟲晶層與該i數覆晶式發光二極體晶片依並聯電性連接^成 一橋式整流結構。 14. 如申請專利範圍第u項所述之堆疊發光二極體晶片之結構,其中該複 數半導體遙a曰曰層與該複數覆晶式發光二極體晶片依串並聯電性連接形 成一橋式整流結構。 15. 如申請專利範圍第η項所述之堆疊發光二極體晶片之結構,其中詨複 12 201007922 數半導體磊晶層與該複數覆晶式發光二極體晶片依串聯電性連接形成 一橋式交流發光裝置或全波交流發光裝置。 16·如申請專利範圍第11項所述之堆疊發光二極體晶片之結構,其中該複 數半導體磊晶層與該複數覆晶式發光二極體晶片依並聯電性連接形成 一橋式交流發光裝置或全波交流發光裝置。 17. 如申請專利範圍第11項所述之堆疊發光二極體晶片之結構,其中該複 數半導體磊晶層與該複數覆晶式發光二極體晶片依串並聯電性連接形 成一橋式交流發光裝置或全波交流發光裝置。12. The structure of a stacked light-emitting diode wafer according to the scope of the patent application, wherein the plurality of semiconductor crystal layers and the plurality of flip-chip light-emitting diode chips are electrically connected in series to form a bridge rectifier structure. 13. The structure of the stacked light-emitting diode wafer according to claim 5, wherein the plurality of semiconductor crystal layers and the i-number of flip-chip light-emitting diodes are electrically connected in parallel to form a bridge rectifier structure. 14. The structure of the stacked light-emitting diode wafer according to claim 5, wherein the plurality of semiconductor remote a-layers and the plurality of flip-chip light-emitting diodes are electrically connected in series and in parallel to form a bridge. Rectification structure. 15. The structure of the stacked light-emitting diode wafer according to claim n, wherein the plurality of semiconductor epitaxial layers and the plurality of flip-chip light-emitting diode chips are electrically connected in series to form a bridge. An AC illuminator or a full wave AC illuminator. The structure of the stacked light-emitting diode wafer according to claim 11, wherein the plurality of semiconductor epitaxial layers and the plurality of flip-chip light-emitting diode chips are electrically connected in parallel to form a bridge type AC light-emitting device. Or full-wave AC lighting device. 17. The structure of the stacked light-emitting diode wafer according to claim 11, wherein the plurality of semiconductor epitaxial layers and the plurality of flip-chip light-emitting diode chips are electrically connected in series and in parallel to form a bridge type AC light-emitting device. Device or full wave AC illuminator. 18. —種堆疊發光二極體晶片結構之製造方法,其步驟係包含: 提供一基板; 分隔磊晶二半導體磊晶層於該基板上;及 設置-覆晶式發光二極體晶片於該二半導體蟲晶層之上,且三者電性相 接。 19. 如申請專利範圍第18項所述之堆叠發光二極體晶片結構之製造方法, 其中於;7隔蟲晶一半導體遙晶層於該基板上之步驟中,該二半導體悬 晶層係包含-第-半導㈣晶層與—第二半導縣晶層,其製造步驟 分別包含: 形成一第一半導體層於該基板之上; 形成一第一發光層於該第一半導體層之上;及 形成一第二半導體層於該第一發光層之上; 其中’更進—步形成—第—電極與__第二電極,該第—電極係設置於 該第一半導體層之上,該第二電極係設於該第二半導體層之上。 20. 如申凊專利範圍第18項所述之堆疊發光二極體晶片結構之製造方法, 其中於設置-覆晶式發光二鋪晶狀步猶,係包含該覆晶式發光 二極體晶片之製造步驟: 形成一第三半導體層; 形成一第二發光層於該第三半導體層之上; 13 201007922 形成-第四半導體層於該第二發光層之上;以及 21. 22. 鑛 23· 24. 其^更進步化成第二電極與一第四電極’該第三電極係設置於 該第四半導體層之下,該第四電極係設置於該第三半導體層之下。 如申明專利範圍第19項或第2〇項所述之堆叠發光二極體晶片結構之 製造方法’其中於該設置—覆晶式發光二極體晶片於該二正面形發光 二極體晶狀三者電性相接之步射,係包含有: 連接該第-半導聽晶層之第—電極與該覆晶式發光二極體晶片之 第三電極,·及 連接該第二半導·晶層之第二雜與職晶式發光二極體晶片之 第四電極。 如申請專利範圍第19項或第2〇項所述之堆疊發光二極體晶片結構之 裝ia方法,、中於覆晶式發光二極體晶片於該二正面开譜光 二極體晶片之三者電性相接之步驟中,係包含有: 連接該第-半導體盏晶層之第—電極與該覆晶式發光二極體晶片之 第四電極;及 連接該第二半導體遙晶層之第二電極與該覆晶式發光二極體晶片之 第三電極。 如申請專職_ 2〇彻叙堆光二極體晶諸構之製造方法, 更包含一步驟: 形成一透明基板於該第四半導體層上。 如申請專繼圍帛2G撕述之堆麵光二減晶諸構之製造方法, 更包含一粗化步驟: 粗化該第四半導體層之出光面。 1418. A method of fabricating a stacked light emitting diode structure, the method comprising: providing a substrate; separating an epitaxial two semiconductor epitaxial layer on the substrate; and providing a flip chip light emitting diode chip Two semiconductor crystal layers above, and the three are electrically connected. 19. The method of fabricating a stacked light-emitting diode structure according to claim 18, wherein in the step of: 7 spacer semiconductor-semiconductor crystal layer on the substrate, the two semiconductor suspension layer The method includes the steps of: forming a first semiconductor layer on the substrate; forming a first light-emitting layer on the first semiconductor layer, respectively, comprising: a first-light-emitting layer and a second-half layer And forming a second semiconductor layer on the first light-emitting layer; wherein 'more step-forming-first electrode and __ second electrode, the first electrode is disposed on the first semiconductor layer The second electrode is disposed on the second semiconductor layer. 20. The method of fabricating a stacked light-emitting diode structure according to claim 18, wherein the flip-chip light-emitting diode chip comprises the flip-chip light-emitting diode chip. a manufacturing step of: forming a third semiconductor layer; forming a second luminescent layer over the third semiconductor layer; 13 201007922 forming a fourth semiconductor layer over the second luminescent layer; and 21. 22. 24. The second electrode is disposed under the fourth semiconductor layer, and the fourth electrode is disposed under the third semiconductor layer. The method for fabricating a stacked light-emitting diode structure as described in claim 19 or 2, wherein in the arrangement, the flip-chip light-emitting diode chip is in the form of the two front-shaped light-emitting diode crystals The electrical connection step includes: a first electrode connecting the first semi-conductive crystal layer and a third electrode of the flip-chip diode chip, and connecting the second semiconductor The fourth electrode of the second hetero-crystal light-emitting diode chip of the crystal layer. The IA method for stacking a light-emitting diode structure as described in claim 19 or 2, wherein the flip-chip light-emitting diode chip is on the second front open photodiode chip The step of electrically connecting includes: a first electrode connecting the first-semiconductor twin layer and a fourth electrode of the flip-chip diode chip; and connecting the second semiconductor crystal layer a second electrode and a third electrode of the flip-chip light emitting diode chip. For example, the method for manufacturing the full-time _ 叙 堆 堆 堆 堆 堆 堆 堆 堆 堆 堆 堆 堆 堆 堆 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 For example, the manufacturing method of the stacking photodiode structure of the 2G tear-off is applied, and further includes a roughening step: roughening the light-emitting surface of the fourth semiconductor layer. 14
TW097131036A 2008-08-14 2008-08-14 Structure of stacked LED chip and manufacturing method thereof TW201007922A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102956805A (en) * 2011-08-30 2013-03-06 晶元光电股份有限公司 Light emitting element
TWI493751B (en) * 2012-03-30 2015-07-21 華夏光股份有限公司 Stacked bonded light emitting diode
TWI735347B (en) * 2020-10-08 2021-08-01 聚積科技股份有限公司 Light-mixing light-emitting diode device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102956805A (en) * 2011-08-30 2013-03-06 晶元光电股份有限公司 Light emitting element
CN102956805B (en) * 2011-08-30 2017-03-22 晶元光电股份有限公司 Light emitting element
TWI493751B (en) * 2012-03-30 2015-07-21 華夏光股份有限公司 Stacked bonded light emitting diode
TWI735347B (en) * 2020-10-08 2021-08-01 聚積科技股份有限公司 Light-mixing light-emitting diode device

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