TW200950292A - Power supply system and power supply - Google Patents

Power supply system and power supply Download PDF

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TW200950292A
TW200950292A TW97118969A TW97118969A TW200950292A TW 200950292 A TW200950292 A TW 200950292A TW 97118969 A TW97118969 A TW 97118969A TW 97118969 A TW97118969 A TW 97118969A TW 200950292 A TW200950292 A TW 200950292A
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power supply
output
signal
power
circuit
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TW97118969A
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Chinese (zh)
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TWI377775B (en
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Ta-Yung Yang
Jenn-Yu Lin
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System General Corp
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Abstract

This invention discloses a power supply including a power converter to supply a power source to an electronic circuit through an output cable of the power supply. A communication unit is coupled to the output cable of the power supply to develop a communication channel between the power converter and the electronic circuit in order to report the status of the power converter to the electronic circuit.

Description

200950292 …f23twf.doc/n 九、發明說明: 【發明所屬之技術領域】 本發明是有關於一種電源供應器,特別是有關於一種 電源供應器的通信電路。 【先前技術】 電源供應器(power supply)用於向電子電路(例如電 ❹ 月包.豕用零器等)k供穩定電源(regulated power source )。 電源供應器還用於保護用戶使其不會觸電。電源供應器因 此成為需要得到安全要求證明的重要單元。此外,電源供 應器將在功率轉換期間產生熱能。因此,多種產品經開發 以使用外部電源供應器或功率適配器來簡化產品設計,例 如攜I式電腦(Portable Computer)和行動電話充電器等。 ^而,使用外部電源供應器的缺點在於缺乏電源供應器的 資訊,例如輸出電壓、輸出電流和工作溫度等,這使得功 率官理和保護變得困難。 警 【發明内容】 本發明提供一種電源供應系統,其中可將功率轉換器 (power converter )的狀態報告給外部電子電路以用於功^ 管理和保護。 本發明的電源供應系統包含功率轉換器以通過輸出電 纜將電源供應到電子電路。通信單元(c〇mmunicati〇n unit) 輕合到輸出電纜,以在功率轉換器與電子電路之間形成通 /23twf.doc/n 200950292 信通道(communication channel )。電感裝置(inductive 如vice)進一步耦合到輸出電纜,以在功率轉換器與通信 單元之間提供阻抗。通信單元通過輸出電纜傳輪通信資 料,以便將功率轉換器的狀態報告給電子電路。通信資料 被調製為頻移鍵控(frequency-shift-key,FSK)俨號以進― 傳輸。 ”灯200950292 ...f23twf.doc/n IX. Description of the Invention: [Technical Field] The present invention relates to a power supply, and more particularly to a communication circuit for a power supply. [Prior Art] A power supply is used to supply a regulated power source to an electronic circuit (e.g., a battery pack, etc.). The power supply is also used to protect the user from electric shock. The power supply is therefore an important unit for proof of safety requirements. In addition, the power supply will generate thermal energy during power conversion. As a result, a variety of products have been developed to simplify product design using external power supplies or power adapters, such as portable computers and mobile phone chargers. However, the disadvantage of using an external power supply is the lack of information on the power supply, such as output voltage, output current, and operating temperature, which makes power management and protection difficult. SUMMARY OF THE INVENTION The present invention provides a power supply system in which the status of a power converter can be reported to an external electronic circuit for power management and protection. The power supply system of the present invention includes a power converter to supply power to an electronic circuit through an output cable. The communication unit (c〇mmunicati〇n unit) is lightly coupled to the output cable to form a communication channel between the power converter and the electronic circuit. An inductive device, such as avice, is further coupled to the output cable to provide an impedance between the power converter and the communication unit. The communication unit carries the communication information through the output cable to report the status of the power converter to the electronic circuit. The communication data is modulated into a frequency-shift-key (FSK) nickname for transmission. "light

其中可將功率轉換器(p〇Wer c〇nverter)的狀熊報土 給外部電子電路以用於功率管理和保護。 Μ σ 為讓本發明之上述特徵和優點能更明顯易懂,下文特 舉較佳實施例,並配合所附圖式,作詳細說明如下。 【實施方式】 。本發明設法通過電源供應器的輸出電纜而在電源供應 器與電子電路之間提供通信通道。因此,根據本發明實施 例而提供的通信通道’如圖1和圖2所示。電源供應哭 包含功率轉換器11 ,以用於通過輪出電纜30向電路 © 20供應電源Ve。電源Ve包含兩個端子£+和ε“通信單 元1〇〇搞合到輸出電鏡30,以在功率轉換器^與電^電 路20之間形成通信通道。輸出電纜3〇具有四個端子wa、 WB、WM和WN。端子WA和WB連接到電源供應器. 端子WM和WN連接到電子電路2()。電源 阻抗。電感裝置輕合到電源Ve的端子科和 出電纜30的軒徽和,電感裝置15向功率轉換^ η和通信單元1〇〇提供阻抗。由電感裝置15所建立的阻 6 200950292 j i z-i /23twf.doc/n 抗在輸出電纜30上形成通信路徑以進行資料傳輸。 通信單元100通過輪出電纜30傳輪通信資料,以便將 功率轉換器11的狀態報告給電子電路2〇。通信單元 和電感裝置15位於電源供應器10中。通信單元1〇〇經耦 合從功率轉換器11處獲得狀態資料Sn。狀態資料 sN…s〇包含功率轉換器u的資料,例如輸入電壓‘;;輪出 電壓和溫度等。 ❹ 另一通信單元200和另一電感裝置25裝配在電子電路 20中。電感裝置25連接到輸出電纜3〇的端子WM* _ 以及電子電路20的負載的兩個端子v+和v。通信單元2⑻ 接收到的輸入資料DN...DG將被傳遞到電子電路2〇的控制 單元(control unit)(例如CPU)以用於功率管理和保&。 通信單元100和200實現電源供應器10與電子電路2〇之 間的通信。 電感裝置15和25是共模扼流圈(c〇mm〇n m〇de choke )’其為電源γΕ提供低阻抗路徑以將功率輸送 ®電路L,共模扼流圈為共模信號(comnTn mode signal)提供尚阻抗,這使通信單元1〇〇和2〇〇的通彳古俨號 與電源vE隔離。 圖3中繪示本發明另一優選實施例,其中單端電感器 (single-end inductor) 16用於在通信單元1〇〇與電源ν:之 間提供高阻抗。此外,單端電感器26用於在通信單元2〇〇 與電子電路20的負載之間提供高阻抗。雖然電感器神 26不能為電源Ve到電子電路2〇提供低阻抗路徑,但電感 7 200950292 1 ζ,χ /23twf.doc/n 器16和26的成本低於圖2所示的電感裝置15和25。 圖4A繪示根據本發明實施例的通信單元1〇〇。通信單 元1〇〇包含輪出資料緩衝器300和介面電路400。 圖4B繪示根據本發明實施例的另一通信單元2〇〇的 實施例。通信單元200包含輸入資料缓衝器500和介面電 路400。通信單元2〇〇的介面電路400與通信單元1〇〇的 介面電路相同。通信單元100的通信資料被調製為頻移鍵 ❹ 控(frequency-shift-key,FSK)信號,頻移鍵控信號耦合到 電源供應器10的輸出電纜3〇。通信單元1〇〇包含振盡電 路(oscillation circuit, OSC) 150,以回應於通信單元 1〇〇 的輸出資料(DATA)而產生頻移鍵控信號。通過端子χι 和X2’輸出電路410耦合到電源供應器10的輸出電纜3〇, 以輸出FSK信號。 運算放大器110、電阻器111和電晶體112、114、115、 116、118和119形成通信單元1〇〇的介面電路4〇〇的輪出 電路410。振盪電路150的輪出信號乂〇5(:是根據通信單元 ® 10〇的輸出資料(DATA)而產生的FSK信號。輸出信號The power converter (p〇Wer c〇nverter) can be reported to external electronic circuits for power management and protection. Μ σ In order to make the above features and advantages of the present invention more comprehensible, the following detailed description of the preferred embodiments and the accompanying drawings are set forth below. [Embodiment] The present invention seeks to provide a communication path between the power supply and the electronic circuit through the output cable of the power supply. Therefore, the communication channel' provided in accordance with an embodiment of the present invention is as shown in Figs. The power supply is crying. The power converter 11 is included for supplying the power supply Ve to the circuit © 20 through the turn-off cable 30. The power supply Ve includes two terminals £+ and ε "communication unit 1" is coupled to the output electron microscope 30 to form a communication channel between the power converter and the circuit 20. The output cable 3 has four terminals wa, WB, WM and WN. Terminals WA and WB are connected to the power supply. Terminals WM and WN are connected to electronic circuit 2 (). Power supply impedance. The inductive device is lightly coupled to the terminal section of the power supply Ve and the Xuanhui of the outgoing cable 30, The inductive device 15 supplies impedance to the power conversion unit η and the communication unit 1〇〇. The resistor 6 200950292 ji zi /23twf.doc/n established by the inductive device 15 forms a communication path on the output cable 30 for data transmission. The unit 100 transmits the communication data by rotating the cable 30 to report the status of the power converter 11 to the electronic circuit 2. The communication unit and the inductive device 15 are located in the power supply 10. The communication unit 1 is coupled to the power conversion. The status data Sn is obtained at the device 11. The status data sN...s〇 contains data of the power converter u, such as the input voltage ';; the voltage and temperature of the turn-off. ❹ Another communication unit 200 and another inductive device 25 are mounted on the electronics Circuit 20. The inductive device 25 is connected to the terminal WM*_ of the output cable 3〇 and the two terminals v+ and v of the load of the electronic circuit 20. The input data DN...DG received by the communication unit 2(8) is transmitted to the electronic circuit A control unit (for example, a CPU) for power management and security. The communication units 100 and 200 implement communication between the power supply 10 and the electronic circuit 2A. The inductive devices 15 and 25 are common. The mode choke (c〇mm〇nm〇de choke )' provides a low impedance path for the power supply γΕ to power the power supply circuit L, which provides a common impedance for the comnTn mode signal. The communication elements 1 and 2 are isolated from the power supply vE. Another preferred embodiment of the invention is illustrated in Figure 3, in which a single-end inductor 16 is used for communication. A high impedance is provided between cell 1 〇〇 and power supply ν: In addition, single-ended inductor 26 is used to provide high impedance between communication unit 2 〇〇 and the load of electronic circuit 20. Although inductor 26 cannot be a power supply Ve Provide a low impedance path to the electronic circuit 2〇, but the inductor 7 200950292 1 ζ, χ /23twf.doc/n The cost of the devices 16 and 26 is lower than the inductive devices 15 and 25 shown in Fig. 2. Fig. 4A illustrates a communication unit 1 according to an embodiment of the present invention. The wheeled data buffer 300 and the interface circuit 400 are included. Figure 4B illustrates an embodiment of another communication unit 2B in accordance with an embodiment of the present invention. The communication unit 200 includes an input data buffer 500 and an interface circuit 400. The interface circuit 400 of the communication unit 2 is the same as the interface circuit of the communication unit 1A. The communication data of the communication unit 100 is modulated into a frequency-shift-key (FSK) signal, and the frequency shift key signal is coupled to the output cable 3 of the power supply 10. The communication unit 1 includes an oscillation circuit (OSC) 150 for generating a frequency shift keying signal in response to the output data (DATA) of the communication unit 1〇〇. The output circuit 410 is coupled to the output cable 3 of the power supply 10 via terminals χι and X2' to output an FSK signal. The operational amplifier 110, the resistor 111, and the transistors 112, 114, 115, 116, 118, and 119 form the wheel-out circuit 410 of the interface circuit 4A of the communication unit 1A. The wheeling signal 乂〇5 of the oscillating circuit 150 (: is an FSK signal generated based on the output data (DATA) of the communication unit 〇 10 。. The output signal

Vosc連接到運算放大器no。運算放大器u〇、電阻器 和電晶體112形成電壓-電流轉換器,以回應於振盪電路 150的輸出信號Vosc而在電晶體112處產生電流信號 電晶體114、115和116形成電流鏡,以分別在電晶徵= 和116處產生電流信號im和電流信號込。電流信逯I 連接到電晶體114。因此,響應於電流信號而產生電= 信號Im和電流信號I2。電流信號Ili5耦合到電晶體丨i 8了 8 200950292 v^i ji ^i /23twf.doc/n 電晶體118和119形成另„電流鏡,以回 〇 fskV^;^: 信號…而形成。FSK信號通過端子心== 到輸出電纜30。 不入2而柄合 和^以int輕合到輸出電鏡3〇的端子 和WB ’以接收FSK信號。電容器則、22〇Vosc is connected to the operational amplifier no. The operational amplifier u, the resistor and the transistor 112 form a voltage-current converter to generate a current mirror at the transistor 112 in response to the output signal Vosc of the oscillating circuit 150 to form a current mirror to respectively A current signal im and a current signal 产生 are generated at the electrogranular sign = and 116. The current signal I is connected to the transistor 114. Therefore, the electric = signal Im and the current signal I2 are generated in response to the current signal. The current signal Ili5 is coupled to the transistor 丨i 8 8 200950292 v^i ji ^i /23twf.doc/n The transistors 118 and 119 form another current mirror, which is formed by returning the fskV^;^: signal... FSK The signal passes through the terminal core == to the output cable 30. Without the 2, the handle is closed and the int is lightly coupled to the terminal of the output electron microscope 3〇 and WB 'to receive the FSK signal. Capacitor, 22〇

路。遽波電路250搞合到輸入電路,以響應於舰信號而 產生資料信號SH和心。 I 、圖5緣示通過輸出電縵3。的通信通道的等效電路。與 電感裝置15相關聯的電流信號越過輸出電纜%的 端子WA和WB而產生信號vw。road. The chopper circuit 250 engages the input circuit to generate the data signal SH and the heart in response to the ship signal. I, Figure 5 shows the output through the output 3. The equivalent circuit of the communication channel. The current signal associated with the inductive device 15 produces a signal vw across the terminals WA and WB of the output cable %.

Vw = 2πχ f xLxAI....................... ⑴ 其中/是FSK信號的頻率;L是電感裝置的等效電感; △I疋電流彳§號Ιι和12的差電流(difference current)。 圖6繪示振盪電路150的實施例。當輸出資料(DATA) 為低邏輯(logic-low)時,輸出信號vosc是低頻信號。一旦 振盪電路150接收到輸出資料(DATA )為高邏輯 (logic-high)時,輸出信號V〇sc就是高頻信號。電流源151 通過開關161對電容器170進行充電。電流源152通過開 關162對電容器170進行放電》電流源153與開關163串 聯提供。電流源153和開關163與電流源151並聯連接。 電流源154與開關164串聯連接。電流源154和開關164 與電流源152並聯連接。開關163和164由輸出資料 (DATA)控制。具有跳變點電壓(trip-point voltage) VH 的比較器181連接到電容器170。具有跳變點電壓Vl的比 200950292 ^ljl 723twf.doc/n 較器182連接到電容器170。與非(NAND)閘183和i84 形成閂鎖電路。與非閘183連接到比較器181的輪出。與 非閘184連接到比較器182的輸出。與非閘ι83的輪出經 連接以控制開關162。 fVw = 2πχ f xLxAI....................... (1) where / is the frequency of the FSK signal; L is the equivalent inductance of the inductive device; ΔI疋 current彳§ No. ι and 12 difference current (difference current). FIG. 6 illustrates an embodiment of an oscillating circuit 150. When the output data (DATA) is logic-low, the output signal vosc is a low frequency signal. Once the oscillating circuit 150 receives the output data (DATA) as logic-high, the output signal V 〇 sc is a high frequency signal. Current source 151 charges capacitor 170 through switch 161. Current source 152 discharges capacitor 170 through switch 162. Current source 153 is provided in series with switch 163. The current source 153 and the switch 163 are connected in parallel with the current source 151. Current source 154 is coupled in series with switch 164. Current source 154 and switch 164 are connected in parallel with current source 152. Switches 163 and 164 are controlled by the output data (DATA). A comparator 181 having a trip-point voltage VH is connected to the capacitor 170. The ratio of the trip point voltage V1 is 200950292 ^ljl 723twf.doc/n The comparator 182 is connected to the capacitor 170. The NAND gates 183 and i84 form a latch circuit. The non-gate 183 is connected to the wheel of the comparator 181. The non-gate 184 is coupled to the output of the comparator 182. The wheel and the output of the non-shutter ι83 are connected to control the switch 162. f

O ❹ 通過反相器185,與非閘183的輸出控制開關161的 接通或斷開。因此在電容器17〇處產生振盪信號,以產生 輸出信號Vosc。輸出信號vosc通過開關190而連接到電 容器170。經由啟用信號ENB來啟用或禁用開關19〇。此 外,接地的開關195用於禁用輸出信號v〇sc。通過由反相 器187反相的啟用信號ENB來控制開關195。針對低頻 F〇sc_l和高頻F0SC H的輸出信號v〇sc的頻移可表達為: (Vh~Vl)xCi70 Il51 +Il53 (Vh-Vl)xCi7〇O ❹ is turned on or off with the output of the non-gate 183 via the inverter 185. Therefore, an oscillating signal is generated at the capacitor 17A to generate an output signal Vosc. The output signal vosc is connected to the capacitor 170 through the switch 190. The switch 19 is enabled or disabled via the enable signal ENB. In addition, a grounded switch 195 is used to disable the output signal v〇sc. The switch 195 is controlled by an enable signal ENB that is inverted by the inverter 187. The frequency shift of the output signal v〇sc for the low frequency F〇sc_l and the high frequency F0SC H can be expressed as: (Vh~Vl)xCi70 Il51 +Il53 (Vh-Vl)xCi7〇

Fosc_l =kx-——~— ....... .................-.........(2) (3)Fosc_l =kx-——~— .................................(2) (3)

Fosc_h =k 其中无是由充電電流與放電電流的比率來確定的常 數;Im是電流源151的電流;丨⑸是電流源153的電流; Cno疋電谷器170的電容值;vH是跳雙點電壓乂^^的電壓; vl是跳變點電壓VL的電壓。 _因此,輸出信號ν〇π包含三個狀態。高頻fosch表示 馬邏輯狀態。侧F〇s(^絲低邏輯狀態。輸Λ信號V⑽ 的禁用代表資料為空白狀態’其由啟聽號ENB控制。 圖7繪不通信單兀100的輸出資料緩衝器3〇〇的實施 例。多個觸發器(flip-flop) 319、-..、311和31〇串聯連 接丄並儲存功率轉換n u的狀態資料Sn. .Sq。此外,觸 發器319…310被配置為移位寄存器(shift register)以用於 200950292 ι …^i/23twf.doc/n 資料輸出。觸發器319的輸出連接到與(AND)閘325。 與閘325的另一輸入連接到啟用信號ENB。與閘325的輸 出產生輸出資料(DATA)。觸發器319、...、311和310 的時鐘輸入通過反相器320而連接到啟用信號ENB。因 此’輸出資料(DATA)根據啟用信號ENB的計時速率 (clocking rate)而連續輸出。 圖8繪示圖4所示的通信單元10〇的介面電路4〇〇的 ❹ 濾波電路250的實施例。差分放大器26〇具有負輸、INM 和正輸入INP,其分別連接到電容器21〇和22〇。濾波器 270和濾波器280連接到差分放大器26〇的輸出端。濾波 器270經開發以提供fosc h的帶通頻率(band_pass frequency) ’以產生高邏輯資料信號Sh。濾波器28〇用於 解碼Fosc l的帶通頻率’以便產生低邏輯資料信號心。 資料信號SH和資料信號Sl進一步連接到輸入資料缓 衝器500 ’以產生輸入資料dn...〇0,如圖9所示。多個觸 發器351、352、…和359經連接以作為移位寄存器,以用 β 於根據連續輸入資料信號知和SL而產生資料Dn...Dq。觸 發器351的D輸入是移位寄存器的輸入。資料信號、和 SL連接到或(OR)閘362。或閘362的輸出連接到單觸發 電路(one-shot circuit) 370 ’以產生脈衝信號(pulse以轵以) PLS。脈衝信號PLS連接到觸發器351、352、…和359的 時鐘輸入。資料信號sH進一步連接到與閘36〇。資料信號 SL通過反相器361而連接到與閘36〇的另一輸入。與閘36〇 的輸出連接到移位寄存器的輸入。 ~ 11 200950292 \^υι δ. l /23twf.doc/n 圖10繪示如圖9所示的單觸發電路370的實施例。單 觸發電路370的輸入信號IN連接到反相器373的輸入和 與非閘380的輸入。反相器373的輸出控制電晶體374。 電流源371經連接以對電容器375進行充電。電流源372 用於通過電晶體374而對電容器375進行放電。電容器375 進一步連接到與非閘380的另一輸入。與非閘380的輸出 連接到或非(NOR)閘390的輸入。與非閘380的輸出進 $ —步用於控制電晶體384。電流源381經連接以對電容器 385進行充電。電晶體384用於對電容器385進行放電。 電容器385連接到或非閘390的另一輸入’以在或非閘390 的輸出處產生脈衝信號PLS。圖11繪示單觸發電路 (one-shot circuit)370的輸入信號IN和脈衝信號pls的波 形’其中電流源371的電流和電容器375的電容量確定延 遲時間TD。電流源381的電流和電容器385的電容量確定 脈衝信號PLS的脈衝寬度Tw。 雖然本發明已以較佳實施例揭露如上,然其並非用以 ❹ 限定本發明,任何所屬技術領域中具有通常知識者,在不 脫離本發明之精神和範圍内,當可作些許之更動與潤飾, 因此本發明之保護範圍當視後附之申請專利範圍^界去 為準。 μ丨疋有 圖式簡單說明】 圖1示 思性地繪示電腦通過電源供應器的輪繼 與電源供應器對話。 印職而 12 200950292 l ^23twf.doc/n 圖2是根據本發明的具有通信通道的電路簡圖越過電 源供應盗的輸出電缓的實施例。 圖3是根據本發明的具有通信通道的電路簡圖越過電 源供應器的輸出電瘦的另一實施例。 圖4A繪示根據本發明實施例的通信單元。 圖4B繪示根據本發明實施例的另一通信單元。 圖5續'示根據本發明實施例的通信通道的等效電路。 ❹ 圖6是根據本發明實施例的通信單元的振盪電路。 圖7緣示根據本發明實施例的通信單元的輪出資料緩 衝器。 圖8疋根據本發明實施例的通信單元的渡波電路。 圖9緣不根據本發明實施例的通信單元的輸入資料缓 衝器。 、 圖10綠不根據本發明實施例的用於產生脈衝信號的 單觸發電路。 圖11繪示根據本發明實施例的輪入信號和脈衝信 _ 的波形。 【主要元件符號說明】 1〇 :電源供應器 11 :功率轉換器 15 :電感襞置 20 :電子電路 25 :電感裝置 13 723twf.doc/n 200950292 Α Λφ i· 30 :輸出電纜 WA ' WB ' WM ' WN :端子Fosc_h = k where none is a constant determined by the ratio of the charging current to the discharging current; Im is the current of the current source 151; 丨 (5) is the current of the current source 153; Cno is the capacitance of the electric grid 170; vH is the double The voltage of the point voltage 乂^^; vl is the voltage of the trip point voltage VL. _ Therefore, the output signal ν 〇 π contains three states. The high frequency fosch represents the horse logic state. Side F〇s (^ low logic state. The disable of the input signal V(10) represents the blank state 'which is controlled by the start number ENB. Figure 7 shows an embodiment of the output data buffer 3〇〇 of the non-communication unit 100 A plurality of flip-flops 319, -.., 311, and 31 are connected in series and store state data Sn. .Sq of power conversion nu. Further, flip-flops 319...310 are configured as shift registers ( Shift register) is used for 200950292 ι ...^i/23twf.doc/n data output. The output of flip flop 319 is connected to AND gate 325. The other input of gate 325 is connected to enable signal ENB. The output produces an output data (DATA). The clock inputs of the flip-flops 319, ..., 311, and 310 are connected to the enable signal ENB through the inverter 320. Therefore, the output data (DATA) is based on the timing rate of the enable signal ENB ( Figure 8 illustrates an embodiment of a 滤波 filter circuit 250 of the interface circuit 4〇〇 of the communication unit 10A shown in Figure 4. The differential amplifier 26A has a negative input, an INM, and a positive input INP, respectively. Connected to capacitors 21〇 and 22〇. Filter 270 and Filter 2 80 is coupled to the output of differential amplifier 26A. Filter 270 is developed to provide fos h's band_pass frequency ' to generate a high logic data signal Sh. Filter 28 is used to decode the bandpass frequency of Fosc l 'To generate a low logic data signal heart. The data signal SH and the data signal S1 are further connected to the input data buffer 500' to generate input data dn...〇0, as shown in Figure 9. Multiple flip-flops 351, 352 , ... and 359 are connected as a shift register to generate data Dn...Dq by β from the continuous input data signal. The D input of the flip-flop 351 is the input of the shift register. The SL is connected to an OR gate 362. The output of the gate 362 is coupled to a one-shot circuit 370' to generate a pulse signal (pulse) to the PLS. The pulse signal PLS is coupled to the flip-flops 351, 352. The clock input of the ..., and 359. The data signal sH is further connected to the AND gate 36. The data signal SL is connected to the other input of the gate 36〇 through the inverter 361. The output of the gate 36〇 is connected to the shift register Input. ~ 11 200950292 \^υι δ. l /23twf.doc/n Figure 10 illustrates an embodiment of a one-shot circuit 370 as shown in Figure 9. The input signal IN of the one-shot circuit 370 is coupled to the input and to the inverter 373. Non-gate 380 input. The output of inverter 373 controls transistor 374. Current source 371 is coupled to charge capacitor 375. Current source 372 is used to discharge capacitor 375 through transistor 374. Capacitor 375 is further coupled to another input of NAND gate 380. The output of the non-gate 380 is connected to the input of the NOR gate 390. The output of the non-gate 380 is used to control the transistor 384. Current source 381 is coupled to charge capacitor 385. A transistor 384 is used to discharge capacitor 385. Capacitor 385 is coupled to another input of or non-gate 390 to generate a pulse signal PLS at the output of OR gate 390. Figure 11 illustrates the waveform of the input signal IN and the pulse signal pls of the one-shot circuit 370 where the current of the current source 371 and the capacitance of the capacitor 375 determine the delay time TD. The current of the current source 381 and the capacitance of the capacitor 385 determine the pulse width Tw of the pulse signal PLS. While the invention has been described above in terms of a preferred embodiment, it is not intended to limit the invention, and it is to be understood by those skilled in the art without departing from the spirit and scope of the invention. The scope of protection of the present invention is therefore subject to the scope of the appended claims. μ丨疋 has a simple description of the diagram] Figure 1 shows the computer through the power supply's cycle and the power supply dialogue.印职而12 200950292 l ^23twf.doc/n Figure 2 is an embodiment of a circuit diagram with a communication channel in accordance with the present invention over the output of the power supply. Figure 3 is another embodiment of a circuit schematic with a communication channel in accordance with the present invention for output thinning across the power supply. 4A illustrates a communication unit in accordance with an embodiment of the present invention. 4B illustrates another communication unit in accordance with an embodiment of the present invention. Figure 5 continued to illustrate an equivalent circuit of a communication channel in accordance with an embodiment of the present invention. Figure 6 is an oscillating circuit of a communication unit in accordance with an embodiment of the present invention. Figure 7 illustrates a wheeled data buffer of a communication unit in accordance with an embodiment of the present invention. Figure 8 is a diagram showing a wave circuit of a communication unit in accordance with an embodiment of the present invention. Figure 9 is an input data buffer of a communication unit not according to an embodiment of the present invention. Figure 10 is a single trigger circuit for generating a pulse signal in accordance with an embodiment of the present invention. Figure 11 is a diagram showing the waveform of a wheeling signal and a pulse signal _ according to an embodiment of the present invention. [Main component symbol description] 1〇: Power supply 11: Power converter 15: Inductor device 20: Electronic circuit 25: Inductor device 13 723twf.doc/n 200950292 Α Λφ i· 30 : Output cable WA ' WB ' WM ' WN : terminal

Ve :電源 E+、E-:端子 100 :通信單元 sN...sG:狀態資料 200 :通信單元 ©V+、V- ··端子Ve : Power supply E+, E-: Terminal 100 : Communication unit sN...sG: Status data 200 : Communication unit ©V+, V- ·· Terminal

Dn…D〇 :輸入貢料 16、26 :單端電感器 300 :輸出資料缓衝器 400 :介面電路 500 :輸入資料緩衝器 150 :振盪電路 XI、X2 :端子 110 :運算放大器 G m :電阻器 112、114、115、116、118、119 :電晶體 410 :輸出電路 V〇sc :輸出信號 II、I2、Ill2、Ill5 .電流信號 250 :濾波電路 SH、SL :資料信號 151、152、153、154 :電流源 14 200950292“ / ____ 一 723twf.doc/n 161、162、163、164 :開關 170 :電容器 181、182 :比較器 183、184 :與非(NAND)閘 185、187 :反相器 ENB :啟用信號 190、195 :開關 VH、VL :跳變點電壓 319〜310:觸發器 320 :反相器 325 :與閘 210、220 :電容器 260 :差分放大器 INM :負輸入 INP :正輸入 270、280 :濾波器 ❹ SH:高邏輯資料信零Dn...D〇: Input tribute 16, 26: Single-ended inductor 300: Output data buffer 400: Interface circuit 500: Input data buffer 150: Oscillation circuit XI, X2: Terminal 110: Operational amplifier G m : Resistor 112, 114, 115, 116, 118, 119: transistor 410: output circuit V〇sc: output signals II, I2, Ill2, Ill5. Current signal 250: filter circuit SH, SL: data signal 151, 152, 153 , 154: current source 14 200950292 " / ____ a 723twf.doc / n 161, 162, 163, 164: switch 170: capacitor 181, 182: comparator 183, 184: NAND (NAND) gate 185, 187: reverse ENB: Enable signal 190, 195: Switch VH, VL: Trip point voltage 319~310: Trigger 320: Inverter 325: AND gate 210, 220: Capacitor 260: Differential amplifier INM: Negative input INP: Positive input 270, 280: Filter ❹ SH: High logic data letter zero

Sl :低邏輯資料信號 351〜359 :觸發器 360 :與閘 361 :反相器 362 :或閘 PLS :脈衝信號 370 :單觸發電路 15 /23twf.doc/n 200950292 37卜372 :電流源 373 :反相器 374、 384 :電晶體 375、 385 :電容器 380 :與非閘 390 :或非(NOR)閘 TD :延遲時間 脈衝寬度 IN :輸入信號Sl: low logic data signal 351~359: flip-flop 360: AND gate 361: inverter 362: or gate PLS: pulse signal 370: one-shot circuit 15 / 23twf.doc / n 200950292 37 372: current source 373: Inverter 374, 384: transistor 375, 385: capacitor 380: NAND gate 390: or NOT (NOR) gate TD: delay time pulse width IN: input signal

1616

Claims (1)

200950292— 十、申請專利範困: 1、 一種電源供應系統,包括: 一輪出電纜; 功率轉難,其通顧述輪&㈣向電子電路 電源; 。通彳σ單元,其耦合到所述輸出電瘦,並在所述功率 轉換器與所述電子電路之間形成通信通道 :以及 „電感裝置,其耦合到所述輪出電纜,並在所述功率. 轉換器與所述通信單元之間提供阻抗,其中所述通信單元 通過所述輸出電蜆傳輸通信資料,並將所述功率轉換器的 狀態報告給所述電子電路。 2、 如申請專利範圍第1項所述的電源供應系統,其中 所述電感裴置是共模扼流圈。 3、 如申睛專利範圍第1項所述的電源供應系統其中 所述通信資料被調製為頻移鍵控信號,所述頻移鍵控信號 耦合到所述電源供應器的所述輸出電纜。 ^① ❹ 4、如申請專利範圍第3項所述的電源供應系統,其中 所述頻移鍵控信號是電流信號。 " 5、如申請專利範圍第3項所述的電源供應系統,复中 所述通信單元包括: ^ 一輸出資料緩衝器,其回應於所述功率轉換器的狀態 而產生輸出資料; 一振盈電路,其響應於所述輸出資料產生所述 控信號; 17 200950292姻。c/n 了輸出電路,其耦合到所述電源供應器的所述輪出 纜,並輸出所述頻移鍵控信號; 了輸入電路,其耦合到所述電源供應器的所述輪出電 纜’並接收所述頻移鍵控信號;以及 一濾波電路,其耦合到所述輸入電路,並響應於 頻移鍵控信號而產生輸入資料。 , 6、 如申請專利範圍第1項所述的電源供應系統,其中 所述功率轉換器的狀態包含所述功率轉換器的輸入電 輸出電壓和溫度。 7、 一種電源供應器,包括: 力率轉換器,其通過所述電源供應器的輸出電镜 一電子電路供應電源;以及 ’ 了通信單兀,其耦合到所述電源供應器的所述輸出電 鏡’並在所述功率轉換器與所述電子電路之間形成通信通 道, 、其中所述通信單元通過所述輸出電纜傳輸通信資料, © 並將所述功率轉換㈣狀態報告給所述電子電路。、 一 8、如中請專利範圍第7項所述的電源供應器,更包括 二電感裝置,所述電感裝_合_述電源供應器的所述 輸出電纜,以使所述通信資料與所述電源分離。 9、 如申請專利範圍第8項所述的電源供應器,其中所 述電感裝置是共模扼流圈。 10、 如申請專利範圍第7項所述的電源供應器,其中 所述通k資料被調製為頻移鍵控信號,所述頻移鍵控信號 200950292」twfdoc/n 耦合到所述電源供應器的所述輸出電纜。 11、 如申請專利範圍第10項所述的電源供應器,其中 所述頻移鍵控信號是電流信號。 12、 如申請專利範圍第7項所述的電源供應器,其中 所述通信單元包括: 一輸出資料緩衝器,其回應於所述功率轉換器的狀態 產生輸出資料; "" 一振盪電路,其響應於所述輸出資料產生所述頻移鍵 . 控信號, 一輸出電路,其耦合到所述電源供應器的所述輪出電 纜,並輸出所述頻移鍵控信號; 一輸入電路,其耦合到所述電源供應器的所述輪出 纜,並接收所述頻移鍵控信號;以及 一濾波電路’其耦合到所述輪入電路,並響應於所 頻移鍵控信號產生輸入資料。 19200950292—10. Applying for patents and difficulties: 1. A power supply system, including: one round of cable; power transfer is difficult, and it refers to the wheel & (four) to the electronic circuit power; a 彳 σ unit coupled to the output to be thin and form a communication channel between the power converter and the electronic circuit: and an inductive device coupled to the wheeled cable and Providing an impedance between the converter and the communication unit, wherein the communication unit transmits communication data through the output power and reports the status of the power converter to the electronic circuit. The power supply system of claim 1, wherein the inductive device is a common mode choke coil. 3. The power supply system of claim 1, wherein the communication data is modulated into a frequency shift. a keying signal, the frequency shift keying signal being coupled to the output cable of the power supply. The power supply system of claim 3, wherein the frequency shift keying The signal is a current signal. 5. The power supply system of claim 3, wherein the communication unit comprises: an output data buffer responsive to the power converter Stately generating an output data; a vibrating circuit responsive to said output data to generate said control signal; 17/50/n having an output circuit coupled to said wheeled cable of said power supply, And outputting the frequency shift keying signal; an input circuit coupled to the wheeling cable of the power supply and receiving the frequency shift keying signal; and a filter circuit coupled to the input The power supply system of claim 1, wherein the state of the power converter includes an input electrical output of the power converter, wherein the power supply system is responsive to the frequency shift keying signal. Voltage and temperature. 7. A power supply, comprising: a force rate converter that supplies power through an output electron microscope-electronic circuit of the power supply; and a communication unit coupled to the power supply The output electron microscope 'and forming a communication channel between the power converter and the electronic circuit, wherein the communication unit transmits through the output cable The communication data, © and the power conversion (four) status is reported to the electronic circuit. The power supply according to the seventh aspect of the invention, further comprising two inductive devices, the inductive device The output cable of the power supply to separate the communication data from the power supply. 9. The power supply of claim 8, wherein the inductive device is a common mode choke 10. The power supply of claim 7, wherein the pass data is modulated into a frequency shift keying signal, and the frequency shift keying signal 200950292"twfdoc/n is coupled to the power supply. The output cable of the device. 11. The power supply of claim 10, wherein the frequency shift keying signal is a current signal. 12. The power supply of claim 7, wherein the communication unit comprises: an output data buffer that generates an output data in response to a state of the power converter; "" an oscillating circuit Generating, in response to the output data, the frequency shift key control signal, an output circuit coupled to the wheeling cable of the power supply, and outputting the frequency shift keying signal; an input circuit Connected to the round-trip cable of the power supply and receive the frequency shift keying signal; and a filter circuit 'coupled to the wheel-in circuit and generated in response to the frequency-shifted keying signal Enter the data. 19
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US20140239882A1 (en) * 2013-02-26 2014-08-28 System General Corporation Apparatus for charging battery through programmable power adapter
TWI533553B (en) 2014-10-21 2016-05-11 國立清華大學 Power management method and controller thereof

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