TW200950021A - Image sensor chip package and camera module using same - Google Patents

Image sensor chip package and camera module using same Download PDF

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Publication number
TW200950021A
TW200950021A TW097120160A TW97120160A TW200950021A TW 200950021 A TW200950021 A TW 200950021A TW 097120160 A TW097120160 A TW 097120160A TW 97120160 A TW97120160 A TW 97120160A TW 200950021 A TW200950021 A TW 200950021A
Authority
TW
Taiwan
Prior art keywords
image sensing
conductive
wafer
sensing chip
chip package
Prior art date
Application number
TW097120160A
Other languages
Chinese (zh)
Other versions
TWI360868B (en
Inventor
Ying-Cheng Wu
Te-Chun Chou
Original Assignee
Hon Hai Prec Ind Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hon Hai Prec Ind Co Ltd filed Critical Hon Hai Prec Ind Co Ltd
Priority to TW097120160A priority Critical patent/TWI360868B/en
Publication of TW200950021A publication Critical patent/TW200950021A/en
Application granted granted Critical
Publication of TWI360868B publication Critical patent/TWI360868B/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15151Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections

Landscapes

  • Solid State Image Pick-Up Elements (AREA)

Abstract

The present invention relates to an image sensor chip package. The image sensor chip package includes a chip, a transparent board, a wall, a number of conductors, a number of solder balls and adhesive. The chip includes a sensitive surface. An image sensitive area and a number of chip pads are fixed on the sensitive surface. The chip pads rounds the sensitive surface. The wall is made of an opaque insulative material. The wall is fixed on the sensitive surface and around the sensitive area. The wall includes a number of through holes corresponding to the chip pads. The conductors are received in the through holes and connect the chip pads to the solder balls. The transparent board is adhered to the wall via the adhesive to package the sensitive area. The transparent board includes a number of connecting holes corresponding to the through holes. The solder balls are connected to the conductors by through the connecting holes.

Description

200950021 .九、發明說明: ’【發明所屬之技術領域】 * 本發明涉及一種影像感測晶片封裝結構及方法,以及應 用該封裝結構的相機模組。 【先前技術】 請參閱圖1,一種先前影像感測晶片封裝結構1,其包 括一個玻璃片2、一個影像感測晶片3及基板4。所述影像 感測晶片3具有一個影像感測區3A及複數個晶片焊墊 ❿3B,所述複數個晶片焊墊3B環繞所述影像感測區3A設 置。所述基板4具有頂面4a及形成於所述基板4邊緣之凸 緣4c,所述頂面4a與所述影像感測晶片3遠離所述影像感 測區3A之表面相粘接,在所述基板4之頂面4a設置有與 所述晶片焊墊3B相對應數量之基板焊墊4D,利用導線5 將所述晶片焊墊3B與所述基板焊墊4D電性連接。所述玻 璃片2粘接於所述基板4凸緣4c,並覆蓋所述影像感測區 3A。 ® 然而,此種影像感測晶片封裝結構1係通過將影像感 測晶片3固定於基板4後再進行封裝,由於基板4本身具 有一定厚度,並留有與晶片焊墊3B對應之基板焊墊4D, 所以無形中增加了封裝之高度及面積,使封裝尺寸較大。 【發明内容】 有鑒於此,有必要提供一種小尺寸之影像感測晶片封 裝結構。 一種影像感測晶片封裝結構,其包括一個晶片及一個 7 200950021 •透明基材,所述晶片具有一感光面,所述感光面上設置有 -一影像感測區及複數個晶片烊墊,所述複數個晶片焊墊圍 繞所述影像感測區設置,其中,所述影像感測晶片封裝結 構包括一個踏體、導電體、焊件及黏著物,所述牆體由不 透光且絕緣之材料製成,所述牆體設置於所述感光面上, 並環繞所述影像感測區設置,所述牆體對應所述複數個晶 片焊墊開有複數個導通通孔,所述導電體通過所述複數個 導通通孔與所述複數個晶片焊墊連接,所述透明基材通過 ❹所述黏著物連接於所述牆體上並封閉所述影像感測區,所 述透明基材對應所述複數個導通通孔開有複數個連接通 孔’所述焊件通過所述複數個連接通孔與所述複數個導電 體連接。 一種相機模組’其包括鏡座、至少一個鏡片、電路板 及影像感測晶片封裝結構,所述鏡座呈中空狀,其包括鏡 筒及底座,所述鏡片固設於所述鏡筒内,所述電路板有第 ❹一連接面、第二連接面及一通光孔,所述通光孔貫穿所述 第一連接面及所述第二連接面,與所述鏡筒同軸設置,所 述第一連接面與所述底座邊緣連接,其中,所述影像感測 晶片封裝結構包括一個晶片、一個牆體、導電體、焊件、 黏著物及透明基材,所述晶片具有一感光面,所述感光面 上設置有一影像感測區及複數個晶片焊墊,所述複數個晶 片焊墊圍繞所述影像感測區設置,所述牆體由不透光且絕 緣之材料製成,所述牆體環繞所述影像感測區設置,所述 牆體對應所述複數個晶片焊墊開有複數個導通通孔,所述 8 200950021 •導電體通過所述複數個導通通孔與所述複數個晶片焊墊連 接,所述透明基材通過所述黏著物連接於所述牆體上並封 閉所述影像感測區,所述透明基材對應所述複數個導通通 孔開有複數個連接通孔,所述焊件通過所述複數個連接通 孔與所述複數個導電體連接,所述焊件與所述電路板電連 接,所述影像感測晶片封裝結構之影像感測區與所述通光 孔相對應,所述景&gt; 像感測晶片封裝結構粘接於所述電路板 之第二表面上。 ❹ 一種景&gt; 像感測晶片封裝方法,其包括以下步驟:提供 一個晶圓,該晶圓具有一個第一表面,該第一表面上具有 複數個影像感測區及電連接於所述影像感測區之複數個晶 片焊墊;在所述第一表面上形成一個絕緣層;去除所述影 像感測區及所述晶片焊墊上之絕緣層,使得於所述絕緣層 上對應於所述晶片焊墊之位置形成貫通所述絕緣層之導通 開孔於所述絕緣層上對應於所述影像感測區之位置形成 ❹貫通所述絕緣層之凹槽;於所述絕緣層上粘結一個透光 層;於所述透光層上對應於所述導通開孔之位置形成貫穿 透光層之連接開孔;於所述導通開孔及所述連接開孔内填 充=電材料,形成導電柱;於所述導電柱上進行植球,形 成複數個導電連接部;對所述晶圓及透光層進行切割,得 到複數個影像感測晶片封裝結構。 由於本發明所提供之影像感測晶片封裴結構係直接於 曰曰片本體上進行封裝,所以該影像感測晶片封叢結構尺寸 更小,厚度更薄。 9 200950021 -【實施方式】 ' 下面將結合附圖對本發明實施方式作進一步之詳細描 述。 請參閱圖2,本發明提供之一種影像感測晶片封裝結構 100。影像感測晶片封裝結構100包括一個晶片10、一個牆 體20、導電體30、焊件40、黏著物50及透明基材60。 所述晶片10具有一感光面11,所述感光面11上設置 有一影像感測區11A及複數個晶片焊墊11B,所述複數個 ❹晶片焊墊11B圍繞所述影像感測區11A設置。所述牆體20 由絕緣之不透光之光阻劑製成,所述牆體20環繞所述影像 感測區11A設置,所述牆體20對應所述複數個晶片焊墊 11B開有複數個導通通孔21。所述牆體20可以係預先製成 之具有複數個孔結構之部件,也可以係直接在所述晶片感 光面11上形成之,例如塗層或印刷。本實施方式中,採用 將光阻劑塗於所述晶片感光面11上,再通過曝光顯影之方 式在所述牆體20上形成孔結構,露出影像感測區11A及形 ❹ 成導通通孔21。 所述導電體30通過所述複數個導通通孔21與所述複 數個晶片焊墊11B連接。所述導電體30可以係先做成與導 通通孔21相配合之形狀,再插入所述複數個導通通孔21, 也可以係用導電材料填充於所述導通通孔21形成。本實施 方式中,所述導電體30係通過導電材料填充於所述導通通 孔21形成。所述透明基材60通過所述黏著物50連接於所 述牆體21上並封閉所述影像感測區11A,所述透明基材60 200950021 •對應所述複數個導通通孔21開有複數個連接通孔6i。本實 •施方式巾:所述透明基材60採用玻璃製成。 所述焊件40通過所述複數個連接通孔61與所述複數 個導電體3G連接。可以理解,所述連接通孔61中可以係 所述焊件40填充,也可以係由導電體3〇填充。本實施方 式中’所述焊件4G為錫球,所述連接通孔61内由導電體 3〇填充。 明參閱圖3,為本發明第一實施方式提供之利用所述影 0像感測晶片封裝結構1〇〇之一種相機模組2〇〇,其包括鏡座 110、至少一個鏡片12〇、電路板13〇及所述影像感測晶片 封裝結構100,所述鏡座110呈中空狀,其包括鏡筒ll〇a 及底座110b °本實施方式中,所述鏡片120固設於所述鏡 筒110a内。所述電路板130有第一連接面130a、第二連接 面130b及一通光孔130c,所述通光孔13〇c貫穿第一連接 面130a及第二連接面130b,所述通光孔130c與鏡筒11〇a 同軸設置,所述第一連接面130a與所述底座110b邊緣相 ®速接。本實施方式中,採用粘接方式。所述第一連接面130a 上設置有導電觸片133。導電觸片133用於與外部插槽(圖 中未標示)相連接。所述影像感測晶片封裝結構100之影像 感測區11A與所述通光孔130c同軸設置,所述影像感測晶 片封裝結構100粘接於所述電路板130之第二表面130b 上。所述影像感測晶片封裝結構100之焊件40與所述電路 板130電連接,本實施方式中,所述電路板130於第二連 接面130b對應影像感測晶片封裝結構100之焊件40設置 11 200950021 •有複數個電路板焊塾131,所述焊件40焊接於所述電路板 焊墊131上。所述電路板130可以採用硬板或軟板。本實 施方式中,所述電路板13〇採用柔性電路板,利用密封膠 190沿影像感測晶片封裝結構1〇〇周邊進行密封’並將所述 影像感測晶片封裝結構1〇〇粘接於所述電路板130之第二 表面130b上。本實施方式中所提供之相機模組200用於相 機模組之插槽式組裝。 請參閱圖4,為本發明第二實施方式提供之利用影像感 ®測晶片封裝結構1〇〇之一種相機模組300,其包括鏡座 210、至少一個鏡片22〇、電路板230及該影像感測晶片封 裝結構100。所述鏡座210包括鏡筒210a及底座210b。該 相機模組300與第一實施方式提供之相機模組200基本相 同。其不同之處在於,電路板230具有第一表面230a、第 二表面230b、通光孔230c及錫球233 ’該電路板230之尺 寸與所述鏡座210之外徑相當。第一表面230a周邊與所述 ◎鏡座210之底座21〇b邊緣相連接。本實施方式中,採用粘 接。錫球233設置於所述電路板230之第二表面230b上。 該錫球233用於回焊時與外部元件(圖中未標示)相連接。 請參閱圖5 ’為本發明第三實施方式提供之利用影像感 測晶片封裝結構1〇〇之一種相機模組400,其包括鏡座 310、至少一個鏡片32〇、電路板33〇及該影像感測晶片封 裝結構100。所述鏡座31〇包括鏡筒310a及底座310b。該 相機模組400與與第一實施方式提供之相機模組200基本 相同。其不同之處在於,電路板330具有第一表面330a、 12 200950021 .第二表面330b、通光孔33〇c及導電觸片333,電路板330 之第一表面330b具有凸緣33〇d,導電觸片333設置於所述 凸緣330d外周或端部。本實施方式中所述導電觸片333設 置於所述凸緣330d端部。第一表面33〇a周邊與所述底座 110b邊緣相粘接。 本發明所提供之影像感測晶片封裝結構100之封裝方 法。 (a)請參閱圖6及圖7,首先提供一晶圓500,該晶 ❹圓500上具有一個第一表面5〇1及一個第二表面5〇2,該第 一表面501上具有複數個影像感測區5〇3及電連接於所述 影像感測區503之複數個晶片焊墊5〇4。該晶片焊墊5〇4 用於為所述影像感測區503提供輸入輸出信號。 (b )請參閱圖8,在所述第一表面5〇1上形成一層絕 緣層510。該絕緣層510可以係防焊膜或者光阻層,該絕緣 層510可以通過塗布或者印刷之方式形成。 ❹ (C )明參閱圖9 ’去除所述影像感測區503及晶片焊 墊504上之絕緣層510’以使所述影像感測區5〇3及晶片 塾504露出。在所述絕緣層510上形成貫通絕緣層51〇之 複數個導通開孔511,所述導通開孔511之間不連通。所述 絕緣層510繞所述影像感測區503形成貫通所述絕緣層51〇 之凹槽512。其中,當所述絕緣層51〇係光阻層時,則該導 通開孔511及凹槽512需通過曝光顯影之方式形成;當所 述絕緣層510係不透明之防焊膜時,則該導通開孔5ΐι及 凹槽512可通過蝕刻方式形成。 13 200950021 - (d )請參閱圖10,在所述晶圓500上貼合一個與晶圓 '500形狀相似之透光層520,所述透光層520利用膠590粘 •合在絕緣層510上。所述透光層520可防止雜質進入所述 影像感測區503,對所述影像感測區503起保護作用。所述 透光層520可以係玻璃片。 (e) 請參閱圖11,減薄所述透光層520,使之具有預 定厚度。可通過蝕刻之方式進行該減薄過程。該減薄過程 之目之在於便於後續制程處理,並可降低影像感測晶片之 ©封裝高度。 (f) 請參閱圖12,於所述透光層520上對應於所述絕 緣層510上之導通開孔511之位置形成貫穿透光層520之 連接開孔521,使所述晶片焊墊504露出。 (g) 請參閱圖13,於所述導通開孔511及所述連接開 孔521内填充導電材料,使導電材料填滿所述導通開孔511 及所述連接開孔521,形成導電柱530。該導電材料包括但 不限於錫及鉛之至少一種,可通過電鍍或網印之方式進行 ❹ 填充。可以理解,對所述導通開孔511及所述連接開孔521 中導電材料之填充,可以於所述透光層520粘合在絕緣層 510前後分兩次填充到所述導通開孔511及所述連接開孔 521 ° (h) 請參閱圖14,於所述導電柱530上進行植球,形 成複數個導電連接部540。所述導電連接部540通過導電柱 530與所述晶片焊墊504形成電性連接。所述導電連接部 540可以係金屬球或金屬凸塊,優選地,該導電連接部540 14 200950021 -為錫球。所述導電連接部540用於對所述影像感測區503 * 與外部電路進行電性連接。 • ( i )請參閱圖15及圖16,一併切割所述晶圓500及 覆蓋於其上之透光層520,得到複數個影像感測晶片封裝結 構 100。 由於本發明所提供之影像感測晶片封裝結構係直接於 晶片本體上進行封裝,所以該影像感測晶片封裝結構尺寸 更小,厚度更薄。 ❹ 綜上所述,本發明確已符合發明專利之要件,遂依法 提出專利申請。惟,以上所述者僅為本發明之較佳實施方 式,自不能以此限制本案之申請專利範圍。舉凡熟悉本案 技藝之人士援依本發明之精神所作之等效修飾或變化,皆 應涵蓋於以下申請專利範圍内。 【圖式簡單說明】 圖1係先前技術提供之一種影像感測晶片封裝結構示 意圖, ❿ 圖2係本發明提供之一種影像感測晶片封裝結構示意 圖, 圖3係本發明第一實施方式提供之相機模組之示意圖; 圖4係本發明第二實施方式提供之相機模組之示意圖; 圖5係本發明第三實施方式提供之相機模組之示意圖; 圖6至圖16係本發明之影像感測晶片封裝方法流程之 示意圖。 【主要元件符號說明】 15 200950021200950021. IX. Invention Description: </ RTI> The invention relates to an image sensing chip package structure and method, and a camera module using the package structure. [Prior Art] Referring to FIG. 1, a prior image sensing chip package structure 1 includes a glass sheet 2, an image sensing wafer 3, and a substrate 4. The image sensing wafer 3 has an image sensing area 3A and a plurality of wafer pads 3B, and the plurality of wafer pads 3B are disposed around the image sensing area 3A. The substrate 4 has a top surface 4a and a flange 4c formed on an edge of the substrate 4. The top surface 4a is bonded to the surface of the image sensing wafer 3 away from the image sensing area 3A. The top surface 4a of the substrate 4 is provided with a number of substrate pads 4D corresponding to the wafer pads 3B, and the wafer pads 3B are electrically connected to the substrate pads 4D by wires 5. The glass sheet 2 is bonded to the flange 4c of the substrate 4 and covers the image sensing region 3A. ® However, the image sensing chip package structure 1 is packaged by fixing the image sensing wafer 3 to the substrate 4, since the substrate 4 itself has a certain thickness, and the substrate pad corresponding to the wafer pad 3B is left. 4D, so the height and area of the package are increased invisibly, making the package size larger. SUMMARY OF THE INVENTION In view of the above, it is necessary to provide a small-sized image sensing wafer package structure. An image sensing chip package structure comprising a wafer and a 7 200950021 • transparent substrate, the wafer has a photosensitive surface, and the photosensitive surface is provided with an image sensing area and a plurality of wafer pads. The plurality of wafer pads are disposed around the image sensing area, wherein the image sensing chip package structure comprises a step body, an electrical conductor, a weldment and an adhesive, the wall being opaque and insulating. The wall is disposed on the photosensitive surface and disposed around the image sensing area, and the wall has a plurality of conductive through holes corresponding to the plurality of wafer pads, and the electrical conductor Connecting to the plurality of wafer pads through the plurality of via holes, the transparent substrate is connected to the wall by the adhesive, and the image sensing region is closed, the transparent substrate Corresponding to the plurality of through vias, a plurality of connection vias are formed. The soldering member is connected to the plurality of electrical conductors through the plurality of connection vias. A camera module includes a lens holder, at least one lens, a circuit board, and an image sensing chip package structure. The lens holder is hollow, and includes a lens barrel and a base. The lens is fixed in the lens barrel. The circuit board has a first connecting surface, a second connecting surface, and a light passing hole, wherein the light passing hole penetrates the first connecting surface and the second connecting surface, and is coaxially disposed with the lens barrel. The first connection surface is connected to the edge of the base, wherein the image sensing chip package structure comprises a wafer, a wall, an electrical conductor, a weldment, an adhesive, and a transparent substrate, wherein the wafer has a photosensitive surface An image sensing area and a plurality of wafer pads are disposed on the photosensitive surface, and the plurality of wafer pads are disposed around the image sensing area, and the wall is made of an opaque and insulating material. The wall is disposed around the image sensing area, and the wall has a plurality of conductive through holes corresponding to the plurality of die pads, and the 8 200950021 • the electrical conductor passes through the plurality of conductive through holes and the ground Multiple wafer pads The transparent substrate is connected to the wall through the adhesive and closes the image sensing area, and the transparent substrate has a plurality of connecting through holes corresponding to the plurality of conductive through holes. The soldering member is connected to the plurality of electrical conductors through the plurality of connecting through holes, the soldering member is electrically connected to the circuit board, and the image sensing area of the image sensing chip package structure and the light passing through Corresponding to the aperture, the image sensing chip package structure is bonded to the second surface of the circuit board. An image sensing method, comprising the steps of: providing a wafer having a first surface having a plurality of image sensing regions and electrically connected to the image a plurality of wafer pads of the sensing region; forming an insulating layer on the first surface; removing the image sensing region and the insulating layer on the wafer pad such that the insulating layer corresponds to the a position of the wafer pad is formed through the opening of the insulating layer, and a groove corresponding to the image sensing region is formed on the insulating layer to form a groove extending through the insulating layer; bonding on the insulating layer a light transmissive layer; a connection opening penetrating the light transmissive layer is formed on the light transmissive layer corresponding to the position of the conductive opening; and the electrically conductive material is filled in the conductive opening and the connecting opening Conducting column; performing ball implantation on the conductive column to form a plurality of conductive connecting portions; and cutting the wafer and the light transmitting layer to obtain a plurality of image sensing chip package structures. Since the image sensing chip package structure provided by the present invention is directly packaged on the die body, the image sensing chip package structure is smaller in size and thinner in thickness. 9 200950021 - [Embodiment] The embodiments of the present invention will be further described in detail below with reference to the accompanying drawings. Referring to FIG. 2, an image sensing chip package structure 100 is provided by the present invention. The image sensing wafer package structure 100 includes a wafer 10, a wall 20, an electrical conductor 30, a weldment 40, an adhesive 50, and a transparent substrate 60. The wafer 10 has a photosensitive surface 11 on which an image sensing area 11A and a plurality of wafer pads 11B are disposed. The plurality of germanium wafer pads 11B are disposed around the image sensing area 11A. The wall body 20 is made of an insulating opaque photoresist, and the wall 20 is disposed around the image sensing area 11A. The wall 20 has a plurality of wafer pads 11B corresponding to the plurality of wafer pads 11B. One through hole 21 is turned on. The wall 20 may be a pre-formed component having a plurality of aperture structures or may be formed directly on the wafer photosensitive surface 11, such as a coating or printing. In this embodiment, a photoresist is applied to the photosensitive surface 11 of the wafer, and a hole structure is formed on the wall 20 by exposure and development to expose the image sensing region 11A and the through-hole. twenty one. The conductor 30 is connected to the plurality of wafer pads 11B through the plurality of vias 21. The conductor 30 may be formed in a shape matching the through via 21, and then inserted into the plurality of vias 21, or may be formed by filling a conductive via 21 with a conductive material. In the present embodiment, the conductor 30 is formed by filling a conductive via 21 with a conductive material. The transparent substrate 60 is connected to the wall 21 by the adhesive 50 and encloses the image sensing area 11A. The transparent substrate 60 200950021 • corresponds to the plurality of conductive through holes 21 Connect the through holes 6i. The present embodiment has a transparent substrate 60 made of glass. The weldment 40 is connected to the plurality of electrical conductors 3G through the plurality of connection through holes 61. It can be understood that the connecting through hole 61 may be filled with the weldment 40 or may be filled with the electric conductor 3〇. In the present embodiment, the weldment 4G is a solder ball, and the connection through hole 61 is filled with a conductor 3〇. Referring to FIG. 3, a camera module 2A according to a first embodiment of the present invention, which utilizes the image sensing device package structure, includes a lens holder 110, at least one lens 12, and a circuit. And the image sensing chip package structure 100, the lens holder 110 is hollow, and includes a lens barrel 11a and a base 110b. In the embodiment, the lens 120 is fixed to the lens barrel. Within 110a. The circuit board 130 has a first connecting surface 130a, a second connecting surface 130b, and a light passing hole 130c. The light passing hole 13〇c penetrates through the first connecting surface 130a and the second connecting surface 130b, and the light passing hole 130c Coaxially disposed with the lens barrel 11A, the first connecting surface 130a is fast-connected to the edge of the base 110b. In the present embodiment, a bonding method is employed. A conductive contact piece 133 is disposed on the first connection surface 130a. The conductive contact 133 is for connection to an external slot (not shown). The image sensing area 11A of the image sensing chip package structure 100 is disposed coaxially with the light passing hole 130c, and the image sensing wafer package structure 100 is bonded to the second surface 130b of the circuit board 130. The soldering member 40 of the image sensing chip package structure 100 is electrically connected to the circuit board 130. In the embodiment, the circuit board 130 corresponds to the image sensing chip package structure 100 of the soldering member 40 on the second connecting surface 130b. Setting 11 200950021 • There are a plurality of circuit board pads 131 that are soldered to the board pads 131. The circuit board 130 can be a hard board or a soft board. In this embodiment, the circuit board 13 is a flexible circuit board, and is sealed by the sealant 190 along the periphery of the image sensing chip package structure 1 and bonding the image sensing chip package structure 1 The second surface 130b of the circuit board 130. The camera module 200 provided in the present embodiment is used for slot assembly of a camera module. Please refer to FIG. 4 , which illustrates a camera module 300 using an image sensing package according to a second embodiment of the present invention. The camera module 300 includes a lens holder 210 , at least one lens 22 , a circuit board 230 , and the image . The wafer package structure 100 is sensed. The lens holder 210 includes a lens barrel 210a and a base 210b. The camera module 300 is substantially the same as the camera module 200 provided in the first embodiment. The difference is that the circuit board 230 has a first surface 230a, a second surface 230b, a light-passing hole 230c, and a solder ball 233'. The size of the circuit board 230 is equivalent to the outer diameter of the lens holder 210. The periphery of the first surface 230a is connected to the edge of the base 21b of the lens holder 210. In the present embodiment, bonding is employed. The solder ball 233 is disposed on the second surface 230b of the circuit board 230. The solder ball 233 is used for reflow soldering to external components (not shown). 5 is a camera module 400 using an image sensing chip package structure according to a third embodiment of the present invention, which includes a lens holder 310, at least one lens 32, a circuit board 33, and the image. The wafer package structure 100 is sensed. The lens holder 31 includes a lens barrel 310a and a base 310b. The camera module 400 is substantially identical to the camera module 200 provided by the first embodiment. The difference is that the circuit board 330 has a first surface 330a, 12 200950021, a second surface 330b, a light-passing hole 33〇c and a conductive contact 333, and the first surface 330b of the circuit board 330 has a flange 33〇d, The conductive contact 333 is disposed at an outer circumference or an end of the flange 330d. In the embodiment, the conductive contact piece 333 is disposed at an end of the flange 330d. The periphery of the first surface 33〇a is bonded to the edge of the base 110b. The image sensing chip package structure 100 provided by the present invention is packaged. (a) Referring to FIG. 6 and FIG. 7, first, a wafer 500 having a first surface 5〇1 and a second surface 5〇2 having a plurality of first surfaces 501 is provided. The image sensing area 5〇3 and a plurality of wafer pads 5〇4 electrically connected to the image sensing area 503. The wafer pad 5〇4 is used to provide an input and output signal to the image sensing area 503. (b) Referring to Figure 8, an insulating layer 510 is formed on the first surface 5?1. The insulating layer 510 may be a solder resist film or a photoresist layer, and the insulating layer 510 may be formed by coating or printing. ❹ (C) Referring to FIG. 9', the image sensing region 503 and the insulating layer 510' on the wafer pad 504 are removed to expose the image sensing region 5〇3 and the wafer stack 504. A plurality of conductive vias 511 penetrating through the insulating layer 51 are formed on the insulating layer 510, and the conductive vias 511 are not in communication with each other. The insulating layer 510 forms a recess 512 extending through the insulating layer 51 around the image sensing region 503. Wherein, when the insulating layer 51 is a photoresist layer, the conductive via 511 and the recess 512 are formed by exposure and development; when the insulating layer 510 is an opaque solder resist film, the conductive is turned on. The opening 5 ΐ and the groove 512 can be formed by etching. 13 200950021 - (d) Please refer to FIG. 10, a light transmissive layer 520 similar in shape to the wafer '500 is attached to the wafer 500, and the transparent layer 520 is bonded to the insulating layer 510 by using a glue 590. on. The light transmissive layer 520 prevents impurities from entering the image sensing area 503 and protects the image sensing area 503. The light transmissive layer 520 may be a glass sheet. (e) Referring to Figure 11, the light transmissive layer 520 is thinned to have a predetermined thickness. This thinning process can be performed by etching. The purpose of the thinning process is to facilitate subsequent processing and to reduce the © package height of the image sensing wafer. (f) Referring to FIG. 12, a connection opening 521 is formed through the transparent layer 520 at a position corresponding to the conductive opening 511 of the insulating layer 510 on the transparent layer 520, so that the wafer pad 504 is formed. Exposed. (g) Referring to FIG. 13, the conductive opening 511 and the connecting opening 521 are filled with a conductive material, and the conductive material fills the conductive opening 511 and the connecting opening 521 to form a conductive post 530. . The conductive material includes, but is not limited to, at least one of tin and lead, which can be filled by ruthenium plating or screen printing. It can be understood that the filling of the conductive material in the conductive opening 511 and the connecting opening 521 can be filled into the conductive opening 511 twice before and after the transparent layer 520 is adhered to the insulating layer 510. The connection opening 521 ° (h) Referring to FIG. 14 , the ball is implanted on the conductive post 530 to form a plurality of conductive connecting portions 540 . The conductive connection portion 540 is electrically connected to the wafer pad 504 through the conductive post 530. The conductive connecting portion 540 may be a metal ball or a metal bump. Preferably, the conductive connecting portion 540 14 200950021 - is a solder ball. The conductive connection portion 540 is configured to electrically connect the image sensing region 503* with an external circuit. • (i) Referring to Figures 15 and 16, the wafer 500 and the light transmissive layer 520 overlying it are diced to obtain a plurality of image sensing wafer package structures 100. Since the image sensing chip package structure provided by the present invention is packaged directly on the wafer body, the image sensing chip package structure is smaller in size and thinner in thickness.综 In summary, the present invention has indeed met the requirements of the invention patent, and has filed a patent application in accordance with the law. However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art in light of the present invention are intended to be included within the scope of the following claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram of an image sensing chip package structure provided by the prior art, FIG. 2 is a schematic diagram of an image sensing chip package structure provided by the present invention, and FIG. 3 is a first embodiment of the present invention. FIG. 4 is a schematic diagram of a camera module according to a second embodiment of the present invention; FIG. 5 is a schematic diagram of a camera module according to a third embodiment of the present invention; and FIGS. 6 to 16 are images of the present invention. A schematic diagram of a process for sensing a wafer package method. [Main component symbol description] 15 200950021

影像感測晶片 1、100 玻璃片 2 封裝結構 影像感測晶片 3 影像感測區 3A、 晶片焊墊 3B、11B 基板 4 頂面 4a 凸緣 4c 基板焊墊 4D 導線 5 晶片 10 感光面 11 牆體 20 導通通孔 21 導電體 30 焊件 40 黏著物 50 透明基材 60 連接通孔 61 相機模組 200、 鏡座 110、210、310 JhiL. Ajir 鏡闾 110a 310a 底座 110b、210b、 鏡片 120、 310b 電路板 130、230、330 第一連接面 130a 330a 第二連接面 130b、230b、 通光孔 130c 330b 330c 電路板焊墊 131 導電觸片 133、 密封膠 190 锡球 233 凸緣 330d 晶圓 500 第一表面 501 第二表面 502 影像感測區 503 晶片焊墊 504 11A 300、400 、210a、 220、320 、230a、 、230c ' 333 16 200950021 絕緣層 510 導通開孔 511 凹槽 512 透光層 520 連接開孔 521 導電柱 530 導電連接部 540 膠 590Image sensing wafer 1, 100 glass sheet 2 package structure image sensing wafer 3 image sensing area 3A, wafer pad 3B, 11B substrate 4 top surface 4a flange 4c substrate pad 4D wire 5 wafer 10 photosensitive surface 11 wall 20 through hole 21 conductor 30 weldment 40 adhesive 50 transparent substrate 60 connection through hole 61 camera module 200, lens holder 110, 210, 310 JhiL. Ajir mirror 110a 310a base 110b, 210b, lens 120, 310b Circuit board 130, 230, 330 first connection surface 130a 330a second connection surface 130b, 230b, light transmission hole 130c 330b 330c circuit board pad 131 conductive contact 133, sealant 190 solder ball 233 flange 330d wafer 500 a surface 501 second surface 502 image sensing area 503 wafer pad 504 11A 300, 400, 210a, 220, 320, 230a, 230c ' 333 16 200950021 insulating layer 510 conduction opening 511 groove 512 light transmission layer 520 connection Opening 521 conductive post 530 conductive connection 540 glue 590

1717

Claims (1)

200950021 .十、申請專利範圍: • i. 一種影像感測晶片封裝結構,其包括一個晶片及一個透 明基材’所述晶片具有一感光面,所述感光面上設置有一 影像感測區及複數個晶片焊墊,所述複數個晶片焊墊圍繞 所述影像感測區設置’其中,所述影像感測晶片封裝結構 包括一個牆體、導電體、焊件及黏著物,所述牆體由不透 光且絕緣之材料製成,所述牆體設置於所述感光面上,並 環繞所述影像感測區設置,所述牆體對應所述複數個晶片 〇焊墊開有複數個導通通孔,所述導電體通過所述複數個導 通通孔與所述複數個晶片焊墊連接,所述透明基材通過所 述黏著物連接於所述牆體上並封閉所述影像感測區,所述 透明基材對應所述複數個導通通孔開有複數個連接通孔, 所述焊件通過所述複數個連接通孔與所述複數個導電體連 接。 2.如申请專利範圍第1項所述之影像感測晶片封裝結構, ❹其中’所述牆體為塗層結構。 3·如申請專利範圍第1項所述之影像感測晶片封裝結構, 其中,所述焊件為錫球。 4.如申請專利範圍第1項所述之影像感測晶片封裝結構, 其中’所述透明基材為玻璃。 5·如申請專利範圍第i項所述之影像感測晶片封裝結構, 其中’所述導電體為圓柱體。 種相機模組,其包括鏡座、至少一個鏡片、電路板及 衫像感測晶片封裝結構,所述鏡座呈中空狀,其包括鏡筒 18 200950021 .及底座,所述鏡片固設於所述鏡筒内,所述電路板有第一 ' 連接面、第二連接面及一通光孔,所述通光孔貫穿所述第 • 一連接面及所述第二連接面,與所述鏡筒同軸設置,所述 第一連接面與所述底座邊緣連接,其中,所述影像感測晶 片封裝結構包括一個晶片、一個牆體、導電體、焊件、黏 者物及透明基材,所述晶片具有一感光面,所述感光面上 設置有一影像感測區及複數個晶片焊墊,所述複數個晶片 焊墊圍繞所述影像感測區設置,所述牆體由不透光且絕緣 ❹材料製成,所述牆體環繞所述影像感測區設置,所述牆體 對應所述複數個晶片焊墊開有複數個導通通孔,所述導電 體通過所述複數個導通通孔與所述複數個晶片焊墊連接, 所述透明基材通過所述黏著物連接於所述牆體上並封閉所 述影像感測區,所述透明基材對應所述複數個導通通孔開 有複數個連接通孔,所述焊件通過所述複數個連接通孔與 所述複數個導電體連接,所述焊件與所述電路板電連接, ❿所述影像感測晶片封裝結構之影像感測區與所述通光孔相 對應,所述影像感測晶片封裝結構粘接於所述電路板之第 二表面上。 7•如申請專利範圍第6項所述之相機模組,其中,所述電 路板之第一連接面設置有金屬觸片。 8. 如申請專利範圍第6項所述之相機模組,其中,所述電 路板之第二連接面設置有錫球。 9. 如申請專利範圍第6項所述之相機模組,其中,所述電 路板之第二連接面邊緣形成凸緣,所述凸緣端部設置有金 19 200950021 •屬觸片。 ίο. —種影像感測晶片封裝方法,其包括以下步驟· &quot;提供一個晶圓,該晶圓具有一個第一表面,該第一表面上 具有複數個影像感測區及電連接於所述影像感測區之複數 個晶片焊墊; 在所述第一表面上形成一個絕緣層; 去除所述影像感測區及所述晶片焊墊上之絕緣層,使得於 所述絕緣層上對應於所述晶片焊墊之位置形成貫通所述絕 緣層之導通開孔,於所述絕緣層上對應於所述影像感測區 之位置形成貫通所述絕緣層之凹槽; 於所述絕緣層上枯結一個透光層; 於所述透光層上對應於所述導通開孔之位置形成貫穿透光 層之連接開孔; 於所述導通開孔及所述連接開孔内填充導電材料,形成 電柱; ❿於所述導電柱上進行植球,形成複數個導電連接部; 對所述晶圓及透光層進行切割,得到複數個影像感測 封裝結構。 π·如申請專利範圍第10項所述之影像感測晶片封裝方 法,其令,於所述導通開孔及所述連接開孔内填充導電材 料、’形成導電柱之步驟中,所述導電材料在透光層粘結到 所述絕緣層前後分兩次填充到所述導通開孔及所述連 孔内。 12·如申請專利範圍第1〇項所述之影像感測晶片封裝方 200950021 •法’其中,所述絕緣層係不透明之防焊膜;於所述絕緣層 上形成所述導通開孔及去除影像感測區上之絕緣層係通過 蚀刻之方式實現。 13. 如申請專利範圍第1〇項所述之影像感測晶片封裝方 法,其中,所述絕緣層係光阻層;於所述絕緣層上形成所 述導通開孔及去除影像感測區上之絕緣層係通過曝光顯影 方式實現。 14. 如申請專利範圍第1〇項所述之影像感測晶片封裝方 ❹法’其中’於所述導通開孔及所述透光層之所述連接開孔 内填充導電材料係通過電鑛或者網印之方式實現之。 15. 如申請專利範圍第1〇項所述之影像感測晶片封裝方 法,其中,於所述透光層上形成所述連接開孔係通過蝕刻 或者雷射切割之方式實現之。 16. 如申請專利範圍第10項所述之影像感測晶片封裝方 法’其中,所述透光層材料係玻璃。200950021. X. Patent Application Range: • i. An image sensing chip package structure comprising a wafer and a transparent substrate. The wafer has a photosensitive surface, and the image sensing surface is provided with an image sensing area and a plurality of a wafer pad, the plurality of wafer pads are disposed around the image sensing region, wherein the image sensing chip package structure comprises a wall, an electrical conductor, a weldment and an adhesive, the wall being composed of The opaque and insulating material is disposed on the photosensitive surface and disposed around the image sensing area, wherein the wall has a plurality of conductive openings corresponding to the plurality of wafer solder pads a via hole, wherein the conductive body is connected to the plurality of wafer pads through the plurality of via holes, the transparent substrate is connected to the wall through the adhesive and closes the image sensing region The transparent substrate has a plurality of connection vias corresponding to the plurality of through vias, and the soldering member is connected to the plurality of electrical conductors through the plurality of connection vias. 2. The image sensing chip package structure of claim 1, wherein the wall is a coating structure. 3. The image sensing chip package structure of claim 1, wherein the soldering member is a solder ball. 4. The image sensing chip package structure of claim 1, wherein the transparent substrate is glass. 5. The image sensing chip package structure of claim i, wherein the conductor is a cylinder. a camera module comprising a lens holder, at least one lens, a circuit board and a shirt image sensing chip package structure, the lens holder being hollow, comprising a lens barrel 18 200950021 and a base, the lens being fixed in the In the lens barrel, the circuit board has a first 'connection surface, a second connection surface, and a light-passing hole, and the light-passing hole extends through the first connection surface and the second connection surface, and the mirror The first connection surface is connected to the edge of the base, wherein the image sensing chip package structure comprises a wafer, a wall, an electrical conductor, a weldment, an adhesive, and a transparent substrate. The wafer has a photosensitive surface, and an image sensing area and a plurality of wafer pads are disposed on the photosensitive surface, and the plurality of wafer pads are disposed around the image sensing area, and the wall is opaque and The insulating body is made of an insulating material, and the wall is disposed around the image sensing area, wherein the wall has a plurality of conductive through holes corresponding to the plurality of die pads, and the conductive body passes through the plurality of conductive through holes Hole and the plurality of crystals The transparent substrate is connected to the wall through the adhesive and closes the image sensing area, and the transparent substrate has a plurality of connecting through holes corresponding to the plurality of conductive through holes. The soldering member is connected to the plurality of electrical conductors through the plurality of connecting through holes, and the soldering member is electrically connected to the circuit board, and the image sensing region and the image sensing chip packaging structure are Corresponding to the light passing holes, the image sensing chip package structure is bonded to the second surface of the circuit board. The camera module of claim 6, wherein the first connection surface of the circuit board is provided with a metal contact. 8. The camera module of claim 6, wherein the second connection surface of the circuit board is provided with a solder ball. 9. The camera module of claim 6, wherein the second connecting surface edge of the circuit board forms a flange, and the flange end is provided with a gold 19 200950021 • a contact piece. An image sensing chip packaging method, comprising the steps of: &quot; providing a wafer having a first surface having a plurality of image sensing regions and electrically connected thereto a plurality of wafer pads of the image sensing region; forming an insulating layer on the first surface; removing the image sensing region and the insulating layer on the wafer pad such that the insulating layer corresponds to a conductive via is formed at a position of the solder pad, and a recess penetrating the insulating layer is formed on the insulating layer corresponding to a position of the image sensing region; Forming a light transmissive layer; forming a connection opening penetrating the light transmissive layer at a position corresponding to the conductive opening on the light transmissive layer; filling the conductive opening material in the conductive opening and the connecting opening to form a conductive material a plurality of conductive connecting portions are formed on the conductive pillars to form a plurality of conductive connecting portions; and the plurality of image sensing package structures are obtained by cutting the wafer and the light transmitting layer. The image sensing chip packaging method of claim 10, wherein the conductive opening is filled in the conductive opening and the conductive opening is formed in the connecting opening, and the conducting The material is filled into the conductive opening and the connecting hole twice before and after the light transmitting layer is bonded to the insulating layer. 12. The image sensing chip package according to claim 1, wherein the insulating layer is an opaque solder resist film; the conductive opening is formed and removed on the insulating layer. The insulating layer on the image sensing area is realized by etching. 13. The image sensing chip packaging method of claim 1, wherein the insulating layer is a photoresist layer; the conductive opening is formed on the insulating layer and the image sensing region is removed. The insulating layer is realized by exposure development. 14. The image sensing chip package method according to claim 1, wherein the conductive opening is filled in the connecting opening of the conductive opening and the transparent layer through the electric ore Or by means of screen printing. 15. The image sensing chip packaging method of claim 1, wherein the forming the opening on the light transmissive layer is achieved by etching or laser cutting. 16. The image sensing chip packaging method of claim 10, wherein the light transmissive layer material is glass. 21twenty one
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI453923B (en) * 2012-06-22 2014-09-21 Txc Corp Light sensing chip package structure

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI453923B (en) * 2012-06-22 2014-09-21 Txc Corp Light sensing chip package structure

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