200937025 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種週期判斷電路，具有判斷輸入信號 為高頻或低頻的檢知功能。 【先前技術】 一般需要穩定電源的電子裝置在對應連接供應民生用 電或工業用電或變頻器輸出時’往往因製造規格的差異， φ 使其所對應要求輸入的電源頻率不一，倘若在使用不當下 而連接頻率不正確的電源或是電源頻率不夠穩定，均會造 成電子電機裝置的損壞。是以’如何於電源信號輸入前， 先行檢知該電源信號頻率高低’以降低使用不當或供電不 穩造成電子裝置的損害，實有進一步改進之必要。 【發明内容】 有鑑於此’本發明之主要目的係提供一種週期判斷電 ® 路’具有判斷輸入信號為高頻或低頻的檢知功能。 欲達上述目的係令該週期判斷電路包含： 一整形電路’係供接收一輸入信號； 一單穩態振盪器’係具有一輸出端及一輸入端，該輸 入端連接該整形電路； 正反器’係連接該單穩態振盡器之輸出端並具有一 時脈控制端連接至該整形電路。 當一輸入信號經該整形電路整形為方波後，遂輸入至 4 200937025 =單穩態振盪器，該方波信號隨即以觸發該單穩態振盡器 生一參考脈衝方波至該正反器，該參考脈衝方波古 準位的時間為較值，而前述方波信號亦同時輸入至^ 器的時脈控制端，該正反器在比較過該參考脈衝方波及整 形的輸入信號之後’即輸出高電位或低電位作為判斷輸入 信號為高頻或低頻的結果，以供後段的控制電路或 路之用。 〇 【實施方式】 明參考第-圖所不’係本發明一較佳實施例之電路示 意圖，係包含： 一光耦合器（10)，係接收一輸入信號，本實施例中， 係連接一變壓單元（11)，該變壓單元（11)可連接一電源而 輸出電源仏號至该光麵合器（10)，該光轉合器（1〇)遂對 該電源信號整形以產生一輸入方波信號； ⑩ 一單穩態振盪器（20)，係一輸入端（-TR)連接該光耦 合器（10)以接收前述輸入方波信號，可根據該輸入方波信 號的負緣而觸發產生一參考脈衝方波信號，而由一輸出端 (Q)輸出； 正反器（30)，本實施例中係為一 d型正反器，係一 輸入端（D)連接該單穩態振盪器（1〇)之輸出端（Q)，並具有 時脈控制端（CK)連接至該光耦合器（1〇)而接收前述輸入 方波信號； 兩發光二極體（LED1，LED2) ’其陽極彼此連接，而陰 200937025 極分別連接至該正反器（30)的正相輸出端（Q)及反相輸出 端⑻。 上述電路動作如下述·· 請參考第二圖所示，當一輸入信號經一光耦合器（10) 整形為一輸入方波信號（CK)後，遂輸入至該單穩態振盪器 (10) ’該輸入方波信號（CK)隨即以負緣觸發該單穩態振盪 器（20)產生一參考脈衝方波信號（D)至該正反器（3〇)，該 參考脈衝方波（D)維持高準位的時間為一設定值td，而該 Ο輸入方波信號（CK)自負緣及正緣之間維持低準位的時間為 tl，本實施例中，tl>td ;前述輸入方波信號（CK)亦同時 輸入至正反器（30)的時脈控制端（CK)，該正反器（3〇) 一開 始的輸出（Q)係為隨機值，但在比較出該輸入方波信號（CK) 的週期較參考脈衝方波（D)的週期為長之後（因tl>td)，該 正反器（30)之正相輸出端（q)即輸出低電位、反相輸出端（〇 輸出高電位，而使連接正反器（3〇)正相輸出端（Q)的發光 二—極體（LED1)得以驅動發亮’連接正反器（3〇)正相輸出端 » (Q)的發光二極體⑽2)熄、滅，作為判斷輸入信號之週期 較設定值長，為低頻的結果。 同理，如第三圖所示，如所輸入一輸入信號自負緣開 始維持低準位的時間為t2，而t2<td，則正反器（3〇)之正 相輸出端⑻即輸出高電位、反相輸出端㈤輸出低電位， 而使連接正反器（30)正相輪出端（q)的發光二極體（LED1) l滅，連接正反器（30)反相輸出端（…的發光二極體 得以驅動發亮，作為判斷輸入信號之週期較設定值短，為 200937025 南頻的結果。 前述實施例如以一般商用電源頻率5〇Hz與60Hz為 例，分別作為的第二圖與第三圖的輸入信號，則可設計單200937025 IX. Description of the Invention: [Technical Field] The present invention relates to a period judging circuit having a detecting function for judging whether an input signal is a high frequency or a low frequency. [Prior Art] Generally, an electronic device that needs to stabilize the power supply often has a different power supply frequency depending on the manufacturing specifications when the corresponding connection is supplied for electricity or industrial power or inverter output. Improper connection of the power supply with incorrect frequency or insufficient power supply frequency will cause damage to the electronic motor unit. Therefore, it is necessary to further detect the damage of the electronic device caused by improper use or unstable power supply before the power signal is input. SUMMARY OF THE INVENTION In view of the above, the main object of the present invention is to provide a detection function for determining whether an input signal is a high frequency or a low frequency. To achieve the above purpose, the cycle determining circuit comprises: a shaping circuit for receiving an input signal; a monostable oscillator having an output and an input, the input being connected to the shaping circuit; The device is connected to the output of the monostable vibrator and has a clock control terminal connected to the shaping circuit. When an input signal is shaped into a square wave by the shaping circuit, 遂 is input to 4 200937025 = monostable oscillator, and the square wave signal then triggers the monostable oscillator to generate a reference pulse square wave to the positive and negative The time of the square wave of the reference pulse is a comparison value, and the square wave signal is also input to the clock control end of the device, and the flip-flop compares the reference pulse square wave and the shaped input signal. 'The output of high or low potential is used as a result of judging whether the input signal is high frequency or low frequency for use in the control circuit or circuit of the latter stage. BRIEF DESCRIPTION OF THE DRAWINGS A schematic diagram of a circuit according to a preferred embodiment of the present invention includes: an optical coupler (10) for receiving an input signal, in this embodiment, a connection a transformer unit (11), which can be connected to a power source and output a power source nickname to the optical surface combiner (10), and the light coupler (1〇) 整形 shapes the power signal to generate An input square wave signal; 10 a monostable oscillator (20), an input (-TR) connected to the optical coupler (10) to receive the aforementioned input square wave signal, according to the negative of the input square wave signal The edge triggers a reference pulse square wave signal and is output by an output terminal (Q); the flip-flop device (30) is a d-type flip-flop device in this embodiment, and is connected to an input terminal (D). An output terminal (Q) of the monostable oscillator (1〇), and having a clock control terminal (CK) connected to the photocoupler (1〇) to receive the aforementioned input square wave signal; two light emitting diodes (LED1) , LED2) 'The anodes are connected to each other, and the cathode 200937025 is connected to the positive phase output (Q) of the flip-flop (30), respectively. Inverting output ⑻. The above circuit operation is as follows. Please refer to the second figure. When an input signal is shaped into an input square wave signal (CK) via an optical coupler (10), 遂 is input to the monostable oscillator (10). The input square wave signal (CK) then triggers the monostable oscillator (20) with a negative edge to generate a reference pulse square wave signal (D) to the flip-flop (3〇), the reference pulse square wave ( D) the time for maintaining the high level is a set value td, and the time for the Ο input square wave signal (CK) to maintain the low level between the negative edge and the positive edge is t1, in the present embodiment, tl >td; The input square wave signal (CK) is also input to the clock control terminal (CK) of the flip-flop (30). The output (Q) of the flip-flop (3〇) is a random value, but is compared. After the period of the input square wave signal (CK) is longer than the period of the reference pulse square wave (D) (dtl>td), the positive phase output terminal (q) of the flip-flop (30) outputs a low potential, Inverting output (〇 output high potential, so that the light-emitting diode (LED1) connected to the positive-phase (3) positive-phase output (Q) can be driven to brighten Device (3〇) normal-phase output terminal »(Q) of the light emitting diode ⑽2) quenching, off, the input signal is determined as the set value than the period length, as a result of a low frequency. Similarly, as shown in the third figure, if the input input signal maintains the low level from the negative edge for t2, and t2 <td, the positive phase output (8) of the flip-flop (3〇) outputs high. The potential and the inverting output terminal (5) output a low potential, and the light emitting diode (LED1) connected to the positive phase wheel terminal (q) of the flip-flop (30) is turned off, and the inverted output terminal of the flip-flop (30) is connected ( The light-emitting diode of the ... can be driven to illuminate, as a result of judging that the period of the input signal is shorter than the set value, which is the result of the south frequency of 200937025. The foregoing embodiment is exemplified by a general commercial power frequency of 5 Hz and 60 Hz, respectively. Figure and the input signal of the third figure, you can design a single
穩態振盪器（20)所產生的參考脈衝方波週期為介於1/(2X 60)~1/(2χ50)秒之間，例如1/(2x55) = 9ms做為基準，判 斷商用電源頻率為高於55Hz的6〇Hz或低於55Hz的5〇Hz(> 此週期判斷電路除了檢知電源頻率外，本發明可應用 於相位控制或脈衝寬調變（PWM)之導通時間判斷、變頻器 © 之问低頻限制保護；亦可應用於車速判斷上，係將車輪轉 動速度經磁或光耦合器根據低速或高速而轉換成不同週期 頻率的速度輸入信號，經本發明可提出超速警告或做速率 限制。The steady-state oscillator (20) generates a reference pulse square wave period between 1/(2X 60)~1/(2χ50) seconds, for example 1/(2x55) = 9ms as a reference to determine the commercial power frequency. 5 Hz or higher than 55 Hz or 5 Hz lower than 55 Hz (> This period determination circuit can detect the on-time judgment of phase control or pulse width modulation (PWM) in addition to detecting the power supply frequency, Inverter © asks for low frequency limit protection; it can also be applied to vehicle speed judgment. It converts the wheel rotation speed into a speed input signal of different cycle frequency according to low speed or high speed through magnetic or optical coupler. Do rate limiting.
綜上所述，本發明之週期判斷電路係主要包含一單穩 態振盪器、一連接該單穩態振盪器的正反器及一分別連接 單穩態振盪器及正反器的整形電路（光耦合器），當一輸入 信號經該整形電路（光麵合器）整形輸人單穩態振盡器時， 該單穩態振1器係產生—參考脈衝方波與該輸入信號比 較’如輸入信號週期較參考脈衝方波週期為長，則正反器 之正相輸出端(Q)輸出低電位’反之則輸出高電位；是以， 本發明可提供電源高低頻率的檢知，相位控制或脈衝寬調 變⑽）之導通時間錢，變頻器之高低頻限制㈣，或 可應用於轉速超過、不足的檢知之功能。 本發明雖已於前述實施例中所揭露，但並不僅限於前 述實施例中所提及之内纟，在不脫離本發明之精神和範圍 200937025 内所作之任何變化與修改，均屬於本發明之保護範圍。 ’不上所述，本發明已具備顯著功效增進，並符合發明 專利要件’爰依法提起申請。 【圖式簡單說明】 第一圖：係本發明之電路圖。 第·一圖：係本發明之參者酿1 + 麥哼脈衝方波與一50Hz輸入信 號的週期比較示意圖。 第三圖：係本發明之參考脈栴士、A & 3脈衡方波與一 60Hz輸入信 號的週期比較示意圖。 【主要元件符號說明】 (ίο)光耗合器 （η)變墨單元 (20)單穩態振盪器 （30)1^3 (LED1、LED2)發光二極體In summary, the period judging circuit of the present invention mainly comprises a monostable oscillator, a flip-flop connected to the monostable oscillator, and a shaping circuit respectively connected to the monostable oscillator and the flip-flop ( An optocoupler), when an input signal is shaped by the shaping circuit (optical combiner) to input a monostable oscillator, the monostable oscillator 1 generates a reference pulse square wave compared with the input signal. If the input signal period is longer than the reference pulse square wave period, the positive phase output terminal (Q) of the flip-flop outputs a low potential. Otherwise, the high potential is output. Therefore, the present invention can provide detection of the high and low frequency of the power supply, and the phase Control or pulse width modulation (10)) conduction time, the high and low frequency limit of the inverter (4), or can be applied to the detection of the speed exceeding and insufficient. The present invention has been disclosed in the foregoing embodiments, but is not limited to the shackles mentioned in the foregoing embodiments, and any changes and modifications made without departing from the spirit and scope of the invention. protected range. In spite of the above, the present invention has been significantly enhanced in effectiveness and is in compliance with the invention patent requirements. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a circuit diagram of the present invention. Fig. 1 is a schematic diagram showing the comparison of the period of the 1 + Maimai pulse square wave and a 50 Hz input signal of the ginseng of the present invention. Fig. 3 is a schematic diagram showing the comparison of the period of the reference pulse gentleman, A & 3 pulse balance square wave and a 60 Hz input signal of the present invention. [Main component symbol description] (ίο) Light consuming device (η) Ink unit (20) Monostable oscillator (30) 1^3 (LED1, LED2) LED