200935461 九、發明說明： 【發明所屬之技術領域】 本發明係關於諸如PTC熱阻器、ptc加熱器、PTC開關、 溫度檢測器等所使用之具有正電阻溫度的半導體瓷器組 成物。 . 【先前技術】 驾知中’作為顯示PTCR特性（正比電阻溫度係 ❽數：Positive Temperature Coefficient 〇f Resistivity) 的材料’係提案有在BaTi〇3中添加各種半導體化元素的組 成物《該等組成物的居里溫度在12(rc左右。另外，該等 組成物必需配合用途而使居里溫度偏移（shif 。 例如提案有藉由在BaTi〇3中添加SrTi〇3,而使居里溫度 偏移，但此情況，居里溫度僅朝負方向偏移，在正方向上 並無偏移。目月,』，使居里溫度朝正方向偏移的添加元素係 已知有如PbTi〇3。但是，因為PbTi〇3含有導致環境污染的 0凡素，因而近年來期望有不使用pbTi03的材料。 旧於BaTi〇3系半導體瓷器，在防止因Pb取代而造成電阻 溫f係數降低，以及降低電壓依存性情形而提升生產性與 J靠度等目的下，提案有不使用pbTi03，而將BaTi03中的 部分ja利用Bi-Na進行取代的Bai 2x(BiNa乂Ti〇3構造，在 將X叹為〇 < x $ 0. i 5範圍内的組成物中添加仙、h或稀 、，素中之任-種或—種以上，並在氮中施行燒結後， ，於氧化性環境中施行熱處理的BaTi〇3系半導體瓷器 製造方法（專利文獻1)。 97104573 200935461 r ί利文獻1:日本專利特開昭56-1693G1號公報 【發明内容】 (發明所欲解決之問題） 各料的較大特徵係PTC材料的比電阻值在居里點將 二士,：(跳躍特性=電阻溫度係數㈠，此現象被認為係 婵/ ΙΜ曰」所形成的電阻（因蕭特基能障所造成的電阻） ^特性$高°。作為PTC材料的特性係要求該比電阻值的跳 的中實施例有揭示經添加作為半導體化元素 的 Nd2〇3(〇. 1 苴 1〇/、尔 批制昧旲耳…之組成物，但當進行組成物的原子價 Ϊ導體化^ f 3價陽離子當作半導體化元素進行添加時， ==果將因H"a離子的存在而降低。因而， 將有至，皿下的比電阻提高之問題。 ❹ 跳ί瞿專利文獻1所揭示之未含有Pb的ptc材料中’ 異點係室溫比電阻較高，而跳躍特性差的部分 係至/皿比電阻有過度降低的傾向，將有無法兼顧藉」I 溫比電阻與優異 ”、、 W疋至 部分係當在該材斜的問喊。此外’跳躍特性較差的 度變動將變大，且有電二時’將有在居里點附近的溫 項捭4 / 的變動，以輕易地進行材料設計，必 兼/躍特性’此時可考慮稍微提升 叫，生的維持、與室溫比電阻的上升 用範圍的情況。％於至比電阻過度提升而超過使 97104573 6 200935461 B二者Τ'〇專气文獻1中’實施例揭示有將起始原料的 BaC〇3、T1〇2、Bi2〇3、·〇3、pb〇等構成組成物的所 在煅燒刚便進行混合，並施行煅燒、成形、燒結、熱、 :將㈣池的部分Ba,xBi_Na進行取代的組成物，若將 構成組成物的所有元素於烺燒前便進行混合 中，μ將揮散而導致.如組成發生偏差， ::的生成’室溫下的電阻率上升、引發居里溫:::: ❹ ❹ 為了抑制Bi的揮散，雖考慮有依較低溫度施行锻 但、、Bi :揮散雖被抑制，可是卻有無法形成 完全固溶體， 無法獲得所需特性的問題。 方之目的在於提供未含有Pb’可使居里溫度朝正 :向偏移’且可在將室溫比電阻的上升抑制為最小極限之 障况下’獲得較高跳躍特性的半導體究器組成物。 、=者’本發明之目的在於提供半導體究器組成物和其製 f係將BaTi〇3的部分Ba以Bi—Na進行取代的半導 :器組成物’其抑制煅燒步驟中的Bi揮散情形，防止 卜Na的組成偏差而抑制異相的生成，並可使室溫中的電 阻率更加降低，且能抑制居里溫度變動。 (解決問題之手段） 發明者等人A τ 4查士、 現，當製造將BaTi〇 ::的’經深入鑽研的結果發 _ . 的#分Ba以Bi-Na進行取代的半導 R 組成物時藉由分別準備（BaR)Ti〇3锻燒粉或 & 1⑴锻燒粉（以下將該等煅燒粉稱「BT锻燒粉」）、 97104573 7 200935461 與（BiNa)Ti〇3锻燒粉（以下稱「刪烺燒粉」），並將該打 锻:^私與ΜΤ锻燒粉分別依各自對應的適當溫度施行炮 燒’便可抑制ΜΤ锻燒粉的Bi揮散情形，防止Bi_Na的 組成偏差而抑制異相的生成，並藉由將該等煅燒粉進行混 -合並施行成形、燒結，可獲得室溫中的電阻率較低、且抑 .制了居里溫度變動的半導體瓷器組成物。 再者，發明者等人發現，在準備上述BT煅燒粉之際， 依煅燒粉中殘留部分的BaC〇3與Ti〇2之方式進行調製將 ©該BT锻燒粉與BNT緞燒粉進行混合後再施行燒結，將增 加蕭特基能障的形成量，隨著蕭特基能障形成量的增加， 可在將室溫比電阻上升抑制為最小極限之下，提升跳躍特 性’遂完成本發明。 本發明的半導體瓷器組成物，係將由在烺燒粉中殘留部 分 BaC〇3 與 Ti〇2 而成的（BaR)Ti〇3 或 Ba(TiM)〇3(R 與 Μ係半 導體化兀素）所形成之ΒΤ烺燒粉、以及由（BiNa)Ti〇3煅燒 ❹粉所形成之BNT煅燒粉的混合煅燒粉進行燒結而成，將 BaTiOs的部分Ba以Bi-Na進行取代。 本發明係於上述構成的半導體瓷器組成物中，提案有： BT煅燒粉中的BaC〇3與Ti〇2含有量，係當將（BaR)Ti{^ 或Ba(TiM)〇3與BaCCh及Ti〇2的合計設為1〇〇莫耳％時， BaC〇3為3〇莫耳％以下’ TiCb為30莫耳％以下； 半導體化元素R係稀土族元素中之至少一種，使用 (BaR)Ti〇3煅燒粉作為BT煅燒粉時，將半導體瓷器組成物 的組成式依[(BiNaMBahRyUTiOa表示，而x、y係〇 97104573 8 200935461 <χ=°· 3 ' 0<y^〇. 〇2 ； 半導體化元素Μ係仙、Sh中夕5 ,丨、^ —_燒粉時，二 依[(BiNa)xBah] [Ti, μ 矣-品 式 〇<说005。 部表不，而Χ、Ζ係0<Χ如、 再者’本發明的半導體咨n纟日占私α 卞等體免器組成物之製造方法，係將200935461 IX. Description of the Invention: TECHNICAL FIELD The present invention relates to a semiconductor ceramic composition having a positive resistance temperature used in, for example, a PTC thermistor, a ptc heater, a PTC switch, a temperature detector, and the like. [Prior Art] In the driving, 'a material that exhibits PTCR characteristics (Positive Temperature Coefficient 〇f Resistivity) is proposed to have various semiconductor elements added to BaTi〇3. The Curie temperature of the composition is about 12 (rc). In addition, these compositions must be used to offset the Curie temperature (shif. For example, it is proposed to add SrTi〇3 to BaTi〇3 to make Curie. The temperature is offset, but in this case, the Curie temperature is only shifted in the negative direction, and there is no offset in the positive direction. The target element, which is such that the Curie temperature is shifted in the positive direction, is known as PbTi〇3. However, since PbTi〇3 contains a substance that causes environmental pollution, it has been desired in recent years to use a material that does not use pbTi03. The BaTi〇3 series semiconductor porcelain is used to prevent a decrease in the resistance temperature f coefficient due to Pb substitution, and For the purpose of reducing the voltage dependence and improving the productivity and the reliability of the J, it is proposed to use the Bai 2x (BiNa乂Ti〇3 structure in which the part ja in the BaTi03 is replaced by Bi-Na, and the X is not used. sigh组成< x $ 0. The composition in the range of i 5 is added with sin, h or dilute, any one or more of the genus, and after sintering in nitrogen, heat treatment is performed in an oxidizing environment. A method for producing a BaTi〇3 semiconductor ceramics (Patent Document 1). 97104573 200935461 r ίli Literature 1: Japanese Patent Laid-Open Publication No. SHO 56-1693G1 SUMMARY OF INVENTION [Problems to be Solved by the Invention] The specific resistance value of the characteristic PTC material is two ohms at the Curie point: (jump characteristic = resistance temperature coefficient (1), this phenomenon is considered to be the resistance formed by 婵 / ΙΜ曰 (resistance due to Schottky barrier) ^ Characteristic $高°. As a characteristic of the PTC material, the embodiment of the jump of the specific resistance value is disclosed as Nd2〇3 (〇. 1 苴1〇/, batch system) added as a semiconductor element. The composition of the ear, but when the atomic valence of the composition is carried out, and the trivalent cation is added as a semiconductor element, the == fruit will decrease due to the presence of the H"a ion. Therefore, there will be , the problem of higher specific resistance under the dish. ❹ 跳 瞿 瞿 patent In the ptc material which does not contain Pb disclosed in 1st, the difference in room temperature specific resistance is higher, and the part with poor jumping characteristics tends to decrease excessively to the ratio of the resistance of the dish, and there is a possibility that the temperature ratio can not be taken into consideration. Resistance and excellent", W疋 to the part when the material is skewed. In addition, 'the change in the degree of poor jumping characteristics will become larger, and there will be a temperature near the Curie point when there is electricity 2 捭 4 / The change of the material is easy to carry out the design of the material, and the hopping/jumping characteristic is considered. In this case, it is possible to consider a slight increase in the range of the growth and the room temperature-to-resistance range. The % to the specific resistance is excessively increased and exceeds that of 97104573 6 200935461 B Τ '〇 专 专 1 ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' The composition of the composition such as pb〇 is just calcined and mixed, and calcination, forming, sintering, and heat are carried out: a composition in which a part of Ba in the (4) pool is substituted with xBi_Na, and all the elements constituting the composition are calcined. When mixing is performed before, μ will be volatilized and caused. If the composition is deviated, the generation of :: 'the resistivity at room temperature rises, and the Curie temperature is induced:::: ❹ ❹ In order to suppress the scattering of Bi, Although the lower temperature is applied to the forging, but Bi: the volatilization is suppressed, there is a problem that the complete solid solution cannot be formed and the desired characteristics cannot be obtained. The purpose of the method is to provide a semiconductor device that does not contain Pb', which can make the Curie temperature positive: offset, and can obtain higher jump characteristics under the obstacle of suppressing the rise of room temperature to resistance to the minimum limit. Things. The object of the present invention is to provide a semi-conductor composition in which a semiconductor device composition and a system thereof are substituted with a portion Ba of BaTi〇3, which is substituted with Bi-Na, which suppresses Bi-dispersion in the calcination step. It prevents the compositional variation of the Na and suppresses the generation of the heterophase, and further reduces the resistivity at room temperature and suppresses the Curie temperature fluctuation. (Means for Solving the Problem) The inventor et al. A τ 4 Charles, now, when making the result of the intensive study of BaTi〇::, the semi-conductive R composed of Bi-Na substituted by #分Ba The material is prepared by separately preparing (BaR) Ti〇3 calcined powder or & 1(1) calcined powder (hereinafter, the calcined powder is referred to as "BT calcined powder"), 97104573 7 200935461 and (BiNa) Ti〇3 calcined. Powder (hereinafter referred to as "deleting simmered powder"), and the forging: ^ private and ΜΤ 烧 烧 分别 施 施 施 施 施 施 施 施 施 施 施 ' ' 便可 便可 便可 便可 便可 便可 便可 便可 便可 便可 便可 便可 便可 便可 便可 便可 便可 便可 便可 便可 便可 便可The composition of the composition is suppressed to suppress the formation of the heterogeneous phase, and the calcined powder is mixed and combined for forming and sintering, thereby obtaining a semiconductor ceramic composition having a low resistivity at room temperature and suppressing Curie temperature fluctuation. Things. Furthermore, the inventors found that when preparing the BT calcined powder, it is prepared by mixing BaC〇3 and Ti〇2 in the calcined powder, and the BT calcined powder is mixed with the BNT satin powder. After sintering, the amount of Schottky barrier can be increased. With the increase in the amount of Schottky barriers, the jump characteristics can be improved by suppressing the room temperature specific resistance rise to the minimum limit. invention. The semiconductor porcelain composition of the present invention is a (BaR)Ti〇3 or Ba(TiM)〇3 (R and a lanthanide semiconductor bismuth) which is obtained by leaving a part of BaC〇3 and Ti〇2 in the sinter-burning powder. The formed calcined powder and the mixed calcined powder of the BNT calcined powder formed of the (BiNa)Ti〇3 calcined niobium powder were sintered, and a part of Ba of BaTiOs was substituted with Bi-Na. The present invention is directed to the semiconductor ceramic composition having the above structure, and is proposed to contain BaC〇3 and Ti〇2 in the BT calcined powder, and to use (BaR)Ti{^ or Ba(TiM)〇3 and BaCCh and When the total of Ti 〇 2 is 1 〇〇 mol %, BaC 〇 3 is 3 〇 mol % or less ' TiCb is 30 mol % or less; at least one of the semiconductor element R-based rare earth elements is used (BaR When the Ti〇3 calcined powder is used as the BT calcined powder, the composition formula of the semiconductor porcelain composition is expressed by [(BiNaMBahRyUTiOa, and x, y system 〇97104573 8 200935461 < χ=°· 3 ' 0<y^〇. 〇 2; semiconductor element Μ system Xian, Sh Zhong Xi 5, 丨, ^ — _ burning powder, two by [(BiNa)xBah] [Ti, μ 矣 - 〇 〇 lt; say 005. Χ, Ζ 0& 0 Χ Χ Χ Χ Χ 再 再 再 再 再 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本
BaTi〇3的部分Ba以Bi—心土隹奸跑你& &、兹A 1 Na進订取代的半導體瓷器組成物 之製造方法，包括有：Part of BaTi〇3 Ba is a manufacturing method of semiconductor ceramic composition replaced by Bi-heart and earth, and A 1 Na, which includes:
準備由在锻燒粉中殘留部分BaCG3與Ti〇2_aR)Ti〇3 或Ba(TiM)〇3(R與Μ係半導體化元素）所構成之BT煅燒粉 的步驟； 準備由（BiNa)Ti〇3煅燒粉所構成的BNT煅燒粉之步驟； 將上述BT煅燒粉與BNT煅燒粉進行混合，而準備混合 煅燒粉的步驟；以及 將上述混合鍛燒粉施行成形、燒結的步驟。 ❹ 本發明係於上述構成的半導體瓷器組成物之製造方法 中，提案有： 在準備BT煅燒粉的步驟中’煅燒溫度係9〇〇〇c以下； 在準備BNT煅燒粉的步驟中，煅燒溫度係7〇(Tc〜95(TC ; 在BT烺燒粉中的BaC〇3與Ti〇2含有量係當將（BaR)Ti〇3 或Ba(TiM)〇3、BaC〇3及Ti〇2的合計設為1〇〇莫耳％時，BaC〇3 為30莫耳％以下，Ti(h為30莫耳％以下； 在準備BT煅燒粉的步驟或準備BNT燉燒粉的步驟、或 者二項步驟中，於煅燒前，添加Si氧化物3.0莫耳％以下、 97104573 9 200935461 以及Ca叙酸鹽或Ca氧化物4, 〇莫耳％以下； 在將BT鍛燒粉與BNT煅燒粉混合而準備混合煅燒粉的 步驟中，添加Si氧化物3. 〇莫耳％以下、以及Ca碳酸鹽 或Ca氧化物4. 0莫耳％以下； - 半導體化元素R係稀土族元素中至少一種，使用 (BaR)Tl03煅燒粉作為BT緞燒粉時，將半導體瓷器組成物 的組成式依[(BiNaMBanRyUTiOa表示，X、y係0<x ^0.3' 0 < y ^ 0. 02 ; ❹半導體化兀素M係Nb、Sb中之至少一種，使用Ba(TiM)〇3 煅燒粉作為BT煅燒粉時，將半導體瓷器組成物的組成式 依[(BiNa)xBai-x] [Tii—zMz]〇3 表示，X、z 係 〇 < 〇· 3、〇 < 0. 005。 (發明效果） 根據本發明，將可提供未含有Pb，可使居里溫度朝正 方向偏移，且可在將室溫比電阻的上升抑制為最小極限之 ❹下’獲得較高跳躍特性的半導體瓷器組成物。 再者，根據本發明，將可提供抑制烺燒步驟中的Bi揮 散情形，防止Bi-Na的組成偏差以抑制含有Na的異相生 成，並可使室溫中的電阻率更加降低，且能抑制居里溫度 變動的半導體瓷器組成物。 又 【實施方式】 殘 與Preparing a step of preparing a BT calcined powder composed of a part of BaCG3 and Ti〇2_aR) Ti〇3 or Ba(TiM)〇3 (R and a lanthanide-based semiconductor element) in the calcined powder; preparing (BiNa)Ti〇 a step of calcining the BNT calcined powder; and mixing the BT calcined powder with the BNT calcined powder to prepare a step of mixing the calcined powder; and subjecting the mixed calcined powder to forming and sintering. ❹ In the method for producing a semiconductor ceramic composition having the above configuration, it is proposed that: in the step of preparing the BT calcined powder, the calcination temperature is 9 〇〇〇 c or less; in the step of preparing the BNT calcined powder, the calcination temperature 7〇(Tc~95(TC; BaC〇3 and Ti〇2 in BT烺 粉 powder is when BaR)Ti〇3 or Ba(TiM)〇3, BaC〇3 and Ti〇2 When the total is 1% mol%, BaC〇3 is 30 mol% or less, Ti (h is 30 mol% or less; the step of preparing BT calcined powder or the step of preparing BNT stewed powder, or two In the step of adding, before the calcination, adding 1.0 mol% of Si oxide, 97104573 9 200935461, and Ca citrate or Ca oxide 4, 〇 mol% or less; mixing BT calcined powder with BNT calcined powder In the step of preparing the mixed calcined powder, at least one of the Si oxide and the Ca carbonate or the Ca oxide is 4.0% or less; and at least one of the semiconductor element R-based rare earth elements is used. (BaR)Tl03 calcined powder as the BT satin powder, the composition of the semiconductor porcelain composition is based on [(BiNaMBanRyUTiOa, X, Y series 0 < x ^0.3' 0 < y ^ 0. 02 ; at least one of semiconductor-based halogenated M-based Nb, Sb, when Ba(TiM)〇3 calcined powder is used as BT calcined powder, semiconductor porcelain is used The composition formula of the composition is represented by [(BiNa)xBai-x] [Tii—zMz]〇3, X, z is 〇< 〇·3, 〇< 0. 005. (Effect of the invention) According to the present invention, It is possible to provide a semiconductor porcelain composition which does not contain Pb, can shift the Curie temperature in the positive direction, and can obtain a higher jumping characteristic under the condition that the room temperature is suppressed to the minimum limit of resistance. According to the present invention, it is possible to provide a situation in which Bi volatilization in the calcination step is suppressed, a composition variation of Bi-Na is prevented to suppress generation of a hetero phase containing Na, and a resistivity at room temperature can be further lowered, and a Curie temperature fluctuation can be suppressed. Semiconductor porcelain composition. [Embodiment] Residual
本發明半導體瓷器組成物的特徵在於：將由在煅燒粉中 留部分 BaC〇3 與 Ti〇2 構成的(^31〇14〇3或 Ba(TiM)〇3(R Μ係半導體化元素）所形成之Βτ緞燒粉，以及由 97104573 10 200935461 (BiNa)Ti〇3锻燒粉所形成之BNT煅燒粉的混合般燒粉進行 燒結而成。 ❹ 本發明的半導體瓷器組成物若為含有將BaTi〇3的部分 Ba以Bi-Na進行取代，可採用任意組成，藉由作成為^ 組成式依[(B i Na )x( Bai-yRy )i-x]Ti〇3表示（其中，r係稀土旌 元素中之至少一種），X、y係滿足（KxSO S KySO Q2 的組成’或者將組成式依[(BiNaXBahHTh-zMjO3表示·(其 中，Μ係Nb、Sb中之至少一種），x、z係滿足〇<χ$〇3'、 〇<ζ$ 0.005的組成，便可在未使用Pb的情況下使居 里溫度上升，並在將室溫比電阻的上升抑制為最小極限的 情況下’獲得較高的跳躍特性。 上述[(BiNaXCBawRA-dTiOa 組成物中，χ 係指（BiN 的成分範圍’ 0<x以.3係較佳範圍。若乂為〇,則無法 將居里溫度朝高溫側偏移，反之，若超過〇 3，則室 ❹ 接近m，較難適用於PTC加熱器等，：而 :者’ r係稀土族元素中之至少一種，最好為La。缸成 y:〇y:riR^_’°<yn〇2__。* 則室成：將無法半導體化’反之，若超過。.02， 而進行々子严因而最好避免。雖使該y值變化 系絲φ Γ 於將部分^以進行取代的 當作半導;的原子價控制時，若將3價陽離子The semiconductor porcelain composition of the present invention is characterized in that it is formed of (^31〇14〇3 or Ba(TiM)〇3 (R lanthanide semiconductor element) which is composed of BaC〇3 and Ti〇2 in the calcined powder. The 缎 缎 satin burning powder and the mixed calcined powder of BNT calcined powder formed by the calcined powder of 97104573 10 200935461 (BiNa) Ti〇3 are sintered. ❹ The semiconductor porcelain composition of the present invention contains BaTi〇 Part of Ba is substituted with Bi-Na, and any composition can be used, which is represented by the composition of [(B i Na )x( Bai-yRy )ix]Ti〇3 (where r is a rare earth element) In at least one of the formulas, X and y satisfy (the composition of KxSO S KySO Q2' or the composition formula [(BiNaXBahHTh-zMjO3 represents (wherein at least one of the lanthanides Nb, Sb), x, z system satisfies 〇<χ$〇3', 〇<ζ$ 0.005, the Curie temperature can be raised without using Pb, and the room temperature can be suppressed to the minimum limit. High jump characteristics are obtained. [(BiNaXCBawRA-dTiOa composition, χ refers to the composition range of BiN '0<x .3 is a preferred range. If 乂 is 〇, the Curie temperature cannot be shifted toward the high temperature side. Conversely, if it exceeds 〇3, the chamber 接近 is close to m, which is difficult to apply to PTC heaters, etc. At least one of the 'r-based rare earth elements, preferably La. The cylinder is y: 〇y: riR^_'°<yn〇2__.* The chamber is: it cannot be semiconductorized', and vice versa. 02, and it is best to avoid the scorpion rigor. Although the y value is changed by the φ Γ 将 将 部分 部分 部分 当作 当作 当作 当作 当作 当作 当作 当作 当作 当作 当作
Na離子的存在、與發生心：導體化的效果將因1價 揮散，因而效果將降低，有室 97104573 200935461 溫下的電阻率提高之問題。所以’更佳的範圍係〇·〇_ 00.02。另夕卜，0·002〇^·〇2若依莫耳％表示便為〇 2 莫耳％〜2.0莫耳％。即，前述專利文獻！中，雖添加作為 半導體元素的Nd2〇3(0. 1莫耳％)，但是判斷此情形於叹 .用途方面並無法實現充分的半導體化。 .[(BiNahBahnTihMz；^ 組成物中，χ 係指（BiNa)的成 分範圍，0<xg 0.3係較佳範圍。若x為〇，則無法將居 里溫度朝高溫侧偏移，反之，若超過〇. 3，則室溫的電阻 ❹率將接近104Ω cm，較難適用於PTC加熱器等，因而最好 避免。 再者’ Μ係Nb、Sb中之至少一種，其中，最好為肋。 組成式中，z係指Μ的成分範圍，〇 < z $ 〇. 〇 〇 5係較佳範 圍。若z為0 ’便無法進行原子價控制，组成物將無法半 導體化，反之，若超過〇. 〇〇5，則室溫的電阻率將超過1〇3 Ω cm’因而最好避免。另外，上述〇<ζ$〇.〇〇5若依莫耳 ❹％表示便為0〜0. 5莫耳％(未含〇)。 上述[(BiNaLBa^nTihlMCh組成物的情況，為了執行 原子價控制’將T i以Μ元素進行取代，此時，μ元素的 添加（添加量0 < zS 0. 005)係以4價元素的Ti位之原子 ' 價控制為目的，因而具有可依較將R使用作為半導體化元 素的[(BiNa)x(Bai-yRy)i-x]Ti〇3組成物中R元素較佳添加量 (0.002$y$0.02)更少的量進行原子價控制，並可減輕本 發明半導體瓷器組成物的内部應變等優點。 上述[(BiNa)x(BawRy)卜x]Ti〇3、與[(BiNa)xBa卜x][Th-zMz]〇3 等 97104573 12 200935461 二組成物中’基本上係將Bi與Na的比設為1:1。組成式 可依[(BioL.sMBawROdTiOs、[(Βίο.—ο.Ο^-χΗΤ^Μζ^ 表示。將Bi與Na的比基本上設為1 ·丨的理由，係例如在 锻燒步驟等之中’ Bi將揮散而有導致Bi與Na的比發生 偏差的緣故所致。即’調配時雖為1:2，但於燒結體中則 -不為1:1之情況等，亦涵蓋於本發明。 以下，針對為了獲得本發明半導體瓷器組成物的製造方 法之一例進行說明。 ❹ 本發明中，在製造將BaTi〇3的部分Ba以Bi_Na進行取 代之半導體竟器組成物時，係採取分別準備由（BaR)Ti〇3 煅燒粉或Ba(TiM)〇3煅燒粉所構成的BT緞燒粉、與由 (BiNa)Ti〇3煅燒粉所構成的BNT煅燒粉，並將該BT緞燒 粉與MT烺燒粉分別依各自對應的適當溫度施行烺燒之 方法（以下稱「分段锻燒法」）。 五藉由使用上述分段煅燒法，將抑制BNT煅燒粉的Bi揮 ❹散情形m Bi-Na組成偏差而可抑制異相的生成，藉由 將該等锻燒粉施行混合，並施行成形、燒結，可獲得室溫 中的電阻率較低、抑制了居里溫度變動的半導體竟器組成 物。 上述分段煅燒法中，於準備町煅燒粉時，係將BaC〇3、 Τ1 〇2、與半導體化元素原料粉末（例b La2〇3、Nb晶）進行混 ^而2成混合原料粉末，再施行煅燒，但目前為止，為了 二成疋王的單相，係依煅燒溫度為9〇〇。匸〜13〇〇它範圍實 施。本發明中，係藉由將該煅燒溫度設為較低於迄今溫度 97104573 13 200935461 之900 °C以下而實施，便可不完全形成（BaR)Ti〇3或 Ba(TiM)(h，而於鍛燒粉中殘留部分的^(：〇3與Ti〇2。 上述方法中，若鍛燒溫度超過9〇〇 t，將過度形成 (BaR)Ti〇3 或 Ba(TiM)〇3，而無法殘留 BaC〇3 與 Ti〇2，因而 -最好避免。煅燒時間最好設為〇·5小時〜1()小時，尤以2〜6 小時為佳。 本發明中，如上述，當使用分段煅燒法，準備上述耵 煅燒粉時，重要的是於煅燒粉中殘留部分的BaC〇3與 Ti〇y其理由係藉此，最終所獲得之將BaTi〇3的部分肋 以Bi-Na進行取代的半導體瓷器組成物，其蕭特基能障形 成量增加，且隨著蕭特基能障形成量的增加，可在將室溫 比電阻的上升抑制為最小極限之下，提升跳躍特性。 將依上述所獲得的由在煅燒粉中殘留部分BaC03與以⑴ 的（BaR)Ti〇3或Ba(TiM)〇3所構成之BT煅燒粉，以及另外 準備的由（BiNa)Ti〇3缎燒粉所構成之BNT煅燒粉進行混 ❹口，並將該混合锻燒粉施行成形、燒結，依此可獲得本發 明之將BaTi〇3的部分Ba以Bi-Na進行取代的半導體瓷3| 組成物。 ° 上述BT煅燒粉中的BaC〇3與Ti〇2含有量，係當將 (BaR)Ti〇3 或 Ba(TiM)〇3、BaC〇3 及 Ti〇2 的合計設為 1〇〇 莫 耳％時，最好BaC〇3含有30莫耳％以下，Ti〇2含有3〇莫耳％ 以下。藉由使該含有量產生變化，可調整室溫比電阻與跳 躍特性。 在使BT煅燒粉中的BaC〇3與Ti〇2含有量產生變化時， 97104573 14 200935461 若為在準備BT鍛燒粉的步驟中，藉由使烺燒溫度在9〇〇 °c以下進行變化、或改變烺燒時間、或者改變BT煅燒粉 的調配組成便可。此外，在上述Βτ緞燒粉或MT煅燒粉 或該等混合锻燒粉中，添加例如依超過9 〇 〇 的溫度進行 煅燒而形成完全單相的BT煅燒粉、或添加BaC〇3粉與Ti〇2 . 粉’亦可改變BT锻燒粉中的BaC〇3與Ti〇2含有量。 將BaC〇3含有量設在30莫耳％以下的理由，係若超過3〇 莫耳％，將產生除了 BaC〇3以外的異相，導致室溫比電阻上 ❾升的緣故。且，在燒結步驟中將產生c〇2氣體，導致燒結 體出現龜裂’因而最好避免。將Ti〇2含有量設定在3〇莫 耳％以下的理由，係若超過30莫耳％，將產生除了 BaC〇3 以外的異相，導致室溫比電阻上升。The presence and occurrence of Na ions: The effect of conductorization will be degraded by the monovalent value, so the effect will be reduced, and the resistivity at room temperature of 97104573 200935461 will increase. So the 'better range' is 〇·〇_ 00.02. In addition, 0·002〇^·〇2 is expressed as % 依 2 莫 % % 2.0 2.0%. That is, the aforementioned patent document! In addition, although Nd2〇3 (0.1 mol%) which is a semiconductor element is added, it is judged that this situation is sighed, and sufficient semiconductorization cannot be achieved in terms of use. [(BiNahBahnTihMz; ^ composition, χ refers to the composition range of BiNa), 0 < xg 0.3 is a preferred range. If x is 〇, the Curie temperature cannot be shifted toward the high temperature side, and if it exceeds 〇. 3, the room temperature resistance ❹ rate will be close to 104 Ω cm, which is difficult to apply to PTC heaters, etc., and therefore it is best to avoid. Further, at least one of Nb and Sb, of which ribs are preferred. In the composition formula, z is the range of the composition of Μ, 〇< z $ 〇. 〇〇5 is the preferred range. If z is 0', the valence control cannot be performed, and the composition cannot be semiconductorized. 〇. 〇〇5, the room temperature resistivity will exceed 1〇3 Ω cm' and thus it is best to avoid. In addition, the above 〇<ζ$〇.〇〇5 is 0~0 if it is expressed in terms of Momo% 5 mol% (excluding 〇). [(In the case of BiNaLBa^nTihlMCh composition, in order to perform valence control], T i is replaced with Μ element, at this time, addition of μ element (addition amount 0 < zS 0. 005) is based on the atomic 'valence control of the Ti position of the tetravalent element, and thus has the ability to use R as a semiconductor element. [(BiNa)x(Bai-yRy)ix] The amount of R element in the Ti〇3 composition is preferably added in an amount smaller than (0.002$y$0.02) to control the valence, and the interior of the semiconductor porcelain composition of the present invention can be alleviated. Advantages such as strain. The above [(BiNa)x(BawRy)bx]Ti〇3, and [(BiNa)xBabx][Th-zMz]〇3, etc. 97104573 12 200935461 Two compositions 'Basically Bi The ratio to Na is set to 1:1. The composition formula can be expressed according to [(BioL.sMBawROdTiOs, [(Βίο. - ο. Ο^-χΗΤ^Μζ^. The ratio of Bi to Na is basically set to 1 · 丨The reason is that, for example, in the calcination step or the like, 'Bi is volatilized and the ratio of Bi to Na is deviated. That is, '1:2 in the case of blending, but not in the sintered body. The present invention is also described below. In the following, an example of a method for producing a semiconductor ceramic composition of the present invention will be described. ❹ In the present invention, a portion Ba of BaTi〇3 is substituted with Bi_Na. In the case of a semiconductor composition, BT satin powder composed of (BaR)Ti〇3 calcined powder or Ba(TiM)〇3 calcined powder, and calcined powder from (BiNa)Ti〇3 are prepared separately. The BNT calcined powder is formed, and the BT satin powder and the MT calcined powder are respectively subjected to calcination according to respective appropriate temperatures (hereinafter referred to as "segment calcination method"). In the method, the Bi Bi-Na composition variation of the BNT calcined powder is suppressed, and the formation of the hetero phase can be suppressed, and the calcined powder is mixed and formed and sintered to obtain a resistance at room temperature. A semiconductor device composition having a low rate and suppressing Curie temperature fluctuations. In the above-described segmental calcination method, BaC〇3, Τ1 〇2, and a semiconductor element raw material powder (for example, b La2〇3, Nb crystal) are mixed and mixed into a raw material powder. Calcination is carried out again, but so far, the calcination temperature is 9 为了 for the single phase of the bismuth.匸~13〇〇 It is implemented in scope. In the present invention, by setting the calcination temperature to be lower than the temperature below 900 ° C of the current temperature of 97104573 13 200935461, (BaR)Ti〇3 or Ba(TiM)(h may be incompletely formed, and forging ^(:〇3 and Ti〇2 in the residual part of the calcined powder. In the above method, if the calcination temperature exceeds 9〇〇t, (BaR)Ti〇3 or Ba(TiM)〇3 will be excessively formed, and it will not remain. BaC〇3 and Ti〇2, therefore, are preferably avoided. The calcination time is preferably set to 〇·5 hours to 1 () hours, especially 2 to 6 hours. In the present invention, as described above, when segmentation is used Calcination method, when preparing the above calcined calcined powder, it is important that BaC〇3 and Ti〇y remain in the calcined powder, and the reason is that the partial rib of BaTi〇3 is finally substituted by Bi-Na. The semiconductor porcelain composition has an increased amount of Schottky barrier formation, and as the amount of Schottky barrier formation increases, the jump characteristics can be improved by suppressing the increase in room temperature specific resistance to a minimum limit. According to the above, the BT composed of the residual BaC03 in the calcined powder and the (BaR) Ti〇3 or Ba(TiM)〇3 in (1) The powdered powder and the separately prepared BNT calcined powder composed of (BiNa)Ti〇3 satin powder are kneaded, and the mixed calcined powder is shaped and sintered, whereby BaTi〇 of the present invention can be obtained. A semiconductor porcelain 3|substrate in which Ba is substituted with Bi-Na. The content of BaC〇3 and Ti〇2 in the above BT calcined powder is (BaR)Ti〇3 or Ba(TiM)〇 3. When the total of BaC〇3 and Ti〇2 is 1% mol%, it is preferable that BaC〇3 contains 30 mol% or less, and Ti〇2 contains 3 mol% or less. By making the content When the change occurs, the room temperature specific resistance and the jumping characteristic can be adjusted. When the BaC〇3 and Ti〇2 contents in the BT calcined powder are changed, 97104573 14 200935461, in the step of preparing the BT calcined powder, The calcination temperature may be changed below 9 ° C, or the calcination time may be changed, or the blending composition of the BT calcined powder may be changed. Further, in the above-mentioned 缎τ satin powder or MT calcined powder or the mixed calcined powder Adding, for example, calcination at a temperature exceeding 9 〇〇 to form a completely single-phase BT calcined powder, or adding BaC〇3 It is also possible to change the content of BaC〇3 and Ti〇2 in the BT calcined powder with Ti〇2. Powder'. The reason why the content of BaC〇3 is set to 30 mol% or less is more than 3 mol%. Will result in a heterogeneous phase other than BaC〇3, resulting in a room temperature increase in resistance over the resistance. Moreover, c〇2 gas will be generated in the sintering step, resulting in cracking of the sintered body' and thus it is best avoided. When the content of 2 is less than or equal to 3 mol%, if it exceeds 30 mol%, a phase other than BaC〇3 is generated, and the room temperature specific resistance increases.
BaC〇3與Ti〇2含有量的上限係BaC〇330莫耳％、Ti〇230莫 耳％的合計60莫耳％，而下限為超過〇的量，當BaC〇3超過 20莫耳％時，Ti〇2將未滿1〇莫耳％而產生除了 BaC〇3以外 ❹的異相而導致室溫比電阻上升，因而最好避免。Ti〇2超過 20莫耳％、BaCCb未滿10莫耳％的情況亦同樣地最好避免。 所以，在BaC〇3或Ti〇2其中一者超過20莫耳％的情況，最 好依另一者達10莫耳％以上的方式，調整烺燒溫度、緞燒 時間、調配組成等。 準備與上述殘留部分BaC〇3與Ti〇2之BT锻燒粉進行混 合的由（BiNa)Ti〇3煅燒粉所構成的BNT煅燒粉步驟，首先 係將原料粉木的Na2C〇3、B i 2〇3、T i 〇2進行混合而製作混合 原料粉末。此時，若過剩地添加Bi2〇3(例如超過5莫耳％)， 97104573 15 200935461 锻燒時便將生成異相’導致室溫比電阻提高，因而最好避 免。 其次’將上述混合原料粉末施行煅燒。煅燒溫度最好設 為700°C〜950。(：範圍。煅燒時間最好設為〇. 5小時〜1〇小 時’尤以2小時〜6小時為佳。若煅燒溫度未滿7〇〇充、或 .者煅燒時間未滿0.5小時，則未反應的Na2C〇3或其分解而 生成之NaO ’將與環境中的水分進行反應，或在施行濕式 ❹混合時將與溶劑產生反應，導致發生組成偏差、特性變動 情況’因而最好避免。此外’若煅燒溫度超過95〇。〇、或 煅燒時間超過1 〇小時，則將促進Bi揮散，導致發生組成 偏差，而促進異相生成，因而最好避免。 藉由依照分段煅燒法分別準備BT烺燒粉與BNT缎燒 叔，可提供能將BNT緞燒粉依較低溫施行烺燒，抑制Bi 的揮散，防止發生Bi_Na組成偏差，抑制含有Na的異相 生成，可更加降低室溫中的電阻帛，且抑制了居里溫度變 ❹動的半導體瓷器組成物。 準備上述各種煅燒粉的步驟中，在將原料粉末進行混合 之際，亦可配合原料粉末的粒度施行粉碎。此外，混合、 粉碎係可採取使用純水、乙醇等的濕式混合•粉碎，或口乾 式混合•粉碎等任何方式，最好施行乾式混合•粉碎，將 Z更加防止組成偏差。另外’上述中，作為原料粉末係例 舉了 BaC〇3、Na2C〇3、τi 〇2等為例子，但亦可使用其他的 Ba化合物、Na化合物等。 如上述’分別準備殘留部分BaC〇3、τi 〇2的βτ锻燒粉與 97104573 16 200935461 BNT煅燒粉，並將烺燒粉調配既定量之後施行混合。混合 係可採取使用純水、乙醇等的濕式混合，或乾式混合等任 何方式，最好施行乾式混合，將可更加防止組成偏差。此 外，亦可配合锻燒粉的粒度，經混合後再施行後粉碎，或 者同時施打混合與粉碎。混合、粉碎後的混合煅燒粉平均 粒度最好0.5//m〜2.5/zm。The upper limit of the content of BaC〇3 and Ti〇2 is a total of 60% by mole of BaC〇330 mol% and Ti〇230 mol%, and the lower limit is the amount exceeding 〇, when BaC〇3 exceeds 20 mol% Ti〇2 will have a molar ratio of less than 1% of Mo, which causes a heterogeneous phase other than BaC〇3, resulting in a rise in room temperature specific resistance, and thus is preferably avoided. The case where Ti 〇 2 exceeds 20 mol % and BaCCb is less than 10 mol % is also preferably avoided. Therefore, in the case where one of BaC〇3 or Ti〇2 exceeds 20 mol%, it is preferable to adjust the calcination temperature, the satin burning time, the blending composition, etc., in such a manner that the other is up to 10 mol% or more. Preparing a BNT calcined powder composed of (BiNa)Ti〇3 calcined powder mixed with the above-mentioned residual portion of BaC3 and Ti〇2 BT calcined powder, firstly, Na2C〇3, B i of the raw material powder wood 2〇3 and T i 〇2 were mixed to prepare a mixed raw material powder. At this time, if Bi2〇3 is excessively added (for example, more than 5 mol%), 97104573 15 200935461 will generate a hetero phase when calcined, resulting in an increase in the room temperature specific resistance, and thus it is preferable to avoid it. Next, the above mixed raw material powder is subjected to calcination. The calcination temperature is preferably set to 700 ° C to 950. (: range. The calcination time is preferably set to 〇. 5 hours to 1 〇 hour, especially 2 hours to 6 hours. If the calcination temperature is less than 7 〇〇, or the calcination time is less than 0.5 hours, then Unreacted Na2C〇3 or NaO' formed by its decomposition will react with moisture in the environment, or will react with the solvent when it is mixed with wet hydrazine, resulting in composition variation and characteristic variation. In addition, 'If the calcination temperature exceeds 95 〇. 〇, or calcination time exceeds 1 〇 hours, it will promote Bi volatilization, resulting in compositional deviation, and promote heterogeneous formation, so it is best to avoid. Prepared separately according to the staged calcination method. BT 烺 烺 与 与 与 与 , , , , 可 可 可 可 可 可 可 可 可 可 可 B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B B The composition of the semiconductor porcelain in which the Curie temperature is turbulent is suppressed, and in the step of preparing the above-mentioned various calcined powders, when the raw material powder is mixed, the particle size of the raw material powder may be blended. In addition, the mixing and pulverizing system may be carried out by any combination of wet mixing, pulverization using pure water, ethanol, or the like, or dry mixing or pulverization, and it is preferable to perform dry mixing and pulverization to further prevent composition deviation. In the above, BaC〇3, Na2C〇3, τi〇2, and the like are exemplified as the raw material powder, but other Ba compounds, Na compounds, and the like may be used. As described above, the residual portion BaC〇3 is prepared separately. Βi 〇2 of βτ calcined powder and 97104573 16 200935461 BNT calcined powder, and the smoldering powder is blended and quantified and then mixed. The mixing system may adopt any method such as wet mixing using pure water, ethanol or the like, or dry mixing. It is better to carry out dry mixing, which can further prevent the composition deviation. In addition, it can also be combined with the particle size of the calcined powder, and then mixed and then pulverized, or simultaneously mixed and pulverized. The average particle size of the mixed calcined powder after mixing and pulverization It is preferably 0.5//m to 2.5/zm.
G 上述準備BT煅燒粉的步驟及/或準備BNT煅燒粉的步 驟、或將各煅燒粉進行混合的步驟中，若添加：Si氧化物 3· \莫耳％以下、Ca氧化物或Ca碳酸鹽4.0莫耳％以下， Si氧化物將抑制結晶粒的異常成長，且可輕易地進行電 阻率控制，且Ca氧化物或Ca碳酸鹽可提升在低溫下的燒 結^並可控制還原性，故較佳。隸—者添加超過上述 限定量，則組成物將無法顯示半導體化，因而最好避免。 添加最好在各步驟進行混合前實施。 藉由將BT锻燒粉與謝锻燒粉進行混合的步驟而獲得 f混合緞燒粉’係利用所需的成形手段進行成形。在成形 刖’視需要村將粉碎粉利造㈣置 後的成形體密度最好為2.5〜3 5g/cm3。 ，左成心 氣=免:=氣中或還原環境中、或者低氧濃度之.携性 3==特別以在氧濃度未請氣或氮環境 扣、°溫度最好設為1250。〇1350。(；。燒》時 設為i小時，小時，尤以2小時 低，因而最好避免。 將上升，跳躍特性將降 97104573 17 200935461 其他的燒結步驟係在溫度1290°C〜1350°C、氧濃度未滿 1%的環境中’（1)依未滿4小時的燒結時間實施，或者（2) 依滿足式：△ T2 25t(t=燒結時間（hr)、A T=燒結後的冷卻 速度（°C/hr))之燒結時間實施，接著，依滿足上式的冷卻 - 速度施行燒結後的冷卻，藉此可獲得將室溫比電阻保持較 • 低狀態下’於高溫區域（居里溫度以上）下提升電阻溫度係 數的半導體瓷器組成物。 [實施例] ❹[實施例1] 準備BaC(h、Ti〇2、LaW的原料粉末，並依成為 (Ba〇.mLa〇.m)Ti〇3的方式進行調配，以純水進行混合。將 所獲得之混合原料粉末依5〇〇〇c~13〇(rc在大氣中施行4 小時煅燒，而準備（BaLa)Ti〇3緞燒粉。將所獲得之 (BaLa)Ti〇3煅燒粉中，在5〇〇t：~12〇(rc中的每個烺燒溫度 之X射線繞射圖案示於如圖i。另外，圖中最下層的X射 ❾線繞射圖案並無標記溫度，而是指5〇〇。〇的情況。 準備ICO3、Bh〇3、Ti〇2的原料粉末，並依成為 • (Bi^Nao.OTiO3的方式進行調配，在乙醇中施行混合。將 所獲得的混合原料粉末在8〇(rc下於大氣中施行2小時煅 燒’而準備（BiNa)Ti〇3炮燒粉。 將所準備的（BaLa)Ti〇3煅燒粉與（BiNa)Ti〇3煅燒粉，依 成為莫耳比73:7的方式進行調配，以純水作為介質且利 用球磨機施行混合、粉碎，直到混合緞燒粉的中心粒徑成 為1.0 〜2. 0ym為止，然後施行乾燥。在該混合煅燒粉 97104573 18 200935461 的粉碎粉中添加PVA並予以混合後，再利用造粒裝置施行 造粒。將所獲得的造粒粉利用單轴壓製裝置施行成形，然 後將上述成形體依7 0 0 °C施行脫黏結劑後，於太氣中，依 燒結溫度129(TC、132(TC、135(TC施行4小時燒結，庐 、得燒結體。 & 將所獲得的燒結體加工成1 〇mmxl 〇mmxl臟的板狀，而製 成試驗片，經形成歐姆電極後，將各試驗片利用電阻測定 器依室溫起至270°c範圍内進行比電阻值的溫度變化測 ©定。測定結果如表1所示。表！中，試料編號旁的「*」 記號係指比較例。試料No. 28的煅燒時間係1小時，試料 No.29的煅燒時間係2小時，試料N〇 3〇的緞燒時間係6 小時。另外，所有實施例中，電阻溫度係數係依照下式求 取。其中，1係最大比電阻， Rc係Te下的比電阻，Tl係表示Ri的溫度，Tc係居里溫度。 由圖1中明顯得知’依50(rc 〜90(rc施行煅燒的 ❹（BaLa)Ti〇3烺燒粉，並未完成形成（BaLa)Ti〇3 ,而殘留著 BaC〇3與Τι〇2。另一方面，得知依^⑽它〜^⑽它施行煅燒 過的（BaLa)Ti〇3煅燒粉，並無BaC〇3、Ti〇2的殘留，而是 形成（BaLa)Ti〇3的完全單相。 再者’由们的測定結果中得知，使用將锻燒溫度設為 500°C〜90(TC、並在緞燒粉中殘留部分BaC〇3與Ti〇2的 (BaLUTiO3鍛燒粉所製得的本發明之半導體瓷器組成 物，係相較於使用將煅燒溫度設定為1〇〇〇乞〜13〇〇它、且 形成（BaLa)Ti〇3完全單相的煅燒粉所製得之半導體瓷器 97104573 200935461 組成物之下，前者將可獲得較 溫比電阻的。㈣躍雜，且亦抑制室 [實施例2] 二將實施例1所準備的（BaU)Ti〇3锻燒粉與 =燒粉，依成為莫耳比73:?的方式進行調配 改為如表2所示添加量的Si〇2與CaC〇3之外，其 =實施例丨的試料編號13之相同方法進行，而獲得燒 …體°針對所獲得的燒結體依如同實施例1相同的方法， 測定比電阻的溫度變化。収結果係如表2所示。由表2 ^得知’藉由在步驟中添加Si氧化物、ea碳酸鹽或k 氧化物’可如同實施例！般獲得較高的跳躍特性，且亦抑 制室溫比電阻的上升。 [實施例3] 準備作為主原料的BaC〇3、Ti〇z、及作為半導體化元素 的Nb2〇5之原料粉末，依成為Ba(Th "ah肩oh的方式進 ❹行調配，並以純水進行混合。將所獲得的混合原料粉末依 700 C〜900 °C在大氣中施行4小時的煅燒，而準備 3&(14仙）〇3烺燒粉。所獲得的33(1^仙）〇3煅燒粉並未完全 形成Ba(TiNb)〇3，而殘留著BaC〇3與Ti〇2。 準備Na2C〇3、Bi2〇3、Ti〇2的原料粉末，並依成為 (Bio.sNao.OTiO3的方式進行調配，於乙醇中進行混合。將 所獲得的混合原料粉末’在80〇°C中於大氣中施行2小時 的锻燒，而準備（BiNa)Ti〇3鍛燒粉。 將所準備的Ba(TiNb)〇3煅燒粉與（BiNa)Ti〇3煅燒粉，依 97104573 20 200935461 成為莫耳比73:7的方式進行調配，並依照如同實施例j 相同的方法進行而獲得燒結體。將所獲得的燒結體依照如 同實施例1相同的方法，測定比電阻值的溫度變化。測定 結果如表3所示。 由表3的測定結果中得知，使用緞燒溫度設為 900°C、且煅燒粉中殘留部分BaC〇3與^⑴的Ba(TiNb)〇3 煅燒粉所製得之本發明[(BiNa)xBai_x][Tii zMz]〇3半導體瓷 器組成物，將可如同實施例i 半導體兗器組成物’獲得較高的跳躍特性，且亦將抑制室 溫比電阻的上升。 97104573 21 200935461 [表l ]G. The step of preparing the BT calcined powder and/or the step of preparing the BNT calcined powder, or the step of mixing the calcined powder, if: adding: Si oxide 3··mol% or less, Ca oxide or Ca carbonate 4.0% or less, the Si oxide suppresses the abnormal growth of the crystal grains, and the resistivity control can be easily performed, and the Ca oxide or the Ca carbonate can improve the sintering at a low temperature and can control the reduction property, so good. If the addition exceeds the above-defined amount, the composition will not be able to show semiconductorization and is therefore preferably avoided. The addition is preferably carried out before the mixing in each step. The f-mixed satin powder obtained by the step of mixing the BT calcined powder with the forge-fired powder is formed by a molding means required. The density of the formed body after the pulverization of the pulverized powder (4) is preferably 2.5 to 35 g/cm3. , Zuo Cheng Xin Qi = Free: = in the gas or in the reducing environment, or the low oxygen concentration. Carrying 3 = = especially in the oxygen concentration is not required to gas or nitrogen environment, ° ° temperature is best set to 1250. 〇 1350. (;. Burning) is set to i hours, hours, especially 2 hours low, so it is best to avoid. Will rise, jump characteristics will fall 97104573 17 200935461 Other sintering steps are at temperature 1290 ° C ~ 1350 ° C, oxygen In an environment where the concentration is less than 1%, '(1) is performed according to a sintering time of less than 4 hours, or (2) is satisfied by: ΔT2 25t (t = sintering time (hr), AT = cooling rate after sintering ( The sintering time of °C/hr)) is carried out, and then the cooling after sintering is performed according to the cooling-speed of the above formula, whereby the room temperature specific resistance can be maintained at a low state in the high temperature region (Curie temperature) The above is a semiconductor ceramic composition in which the temperature coefficient of resistance is raised. [Examples] 实施 [Example 1] A raw material powder of BaC (h, Ti 〇 2, and LaW was prepared, and it was made into (Ba〇.mLa 〇.m) Ti. The method of 〇3 is formulated and mixed with pure water. The obtained mixed raw material powder is prepared by calcining at 5 〇〇〇c~13 〇 (rc in the atmosphere for 4 hours, and preparing (BaLa) Ti〇3 satin powder. The obtained (BaLa)Ti〇3 calcined powder, at 5〇〇t:~12〇(X of each calcination temperature in rc) The line diffraction pattern is shown in Fig. i. In addition, the lowermost X-ray diffraction pattern in the figure has no mark temperature, but refers to the case of 5 〇〇. 准备. Prepare ICO3, Bh〇3, Ti〇2 The raw material powder is blended in the form of (Bi^Nao.OTiO3) and mixed in ethanol. The obtained mixed raw material powder is prepared by performing calcination for 2 hours in the atmosphere at rc (BiNa). Ti〇3 gun-burning powder. The prepared (BaLa)Ti〇3 calcined powder and (BiNa)Ti〇3 calcined powder are blended in such a manner as to have a molar ratio of 73:7, using pure water as a medium and utilizing The ball mill is mixed and pulverized until the center particle diameter of the mixed satin powder is 1.0 to 2. 0 μm, and then dried. PVA is added to the pulverized powder of the mixed calcined powder 97104573 18 200935461, and then mixed, and then granulated. The device is subjected to granulation, and the obtained granulated powder is formed by a uniaxial pressing device, and then the formed body is subjected to a debonding agent at 70 ° C, and then in a gas atmosphere, according to a sintering temperature of 129 (TC, 132). (TC, 135 (TC is sintered for 4 hours, 庐, obtained sintered body. &a Mp; The obtained sintered body was processed into a dirty plate shape of 1 〇mmxl 〇mmxl to prepare a test piece. After forming an ohmic electrode, each test piece was subjected to a resistance measuring device at room temperature to a range of 270 ° C. The temperature change of the specific resistance value was measured. The measurement results are shown in Table 1. In the table, the "*" mark next to the sample number means a comparative example. The calcination time of sample No. 28 was 1 hour, and the sample No. The calcination time of 29 was 2 hours, and the satin burning time of the sample N〇3〇 was 6 hours. Further, in all of the examples, the temperature coefficient of resistance was obtained in accordance with the following formula. Among them, the 1 series maximum specific resistance, Rc is the specific resistance under Te, Tl is the temperature of Ri, and Tc is the Curie temperature. It is apparent from Fig. 1 that the formation of (BaLa) Ti〇3 is not completed by 50(rc~90(rc) calcined barium (BaLa) Ti〇3烺, while BaC〇3 and Τι〇 remain. 2. On the other hand, it is known that ^(10) it~^(10) it performs calcined (BaLa) Ti〇3 calcined powder, without BaC〇3, Ti〇2 residue, but forms (BaLa)Ti〇3 It is completely single-phase. In addition, it is known from the measurement results that the calcination temperature is set to 500 ° C to 90 (TC, and part of BaC 〇 3 and Ti 〇 2 in the satin powder (BaLUTiO3) The semiconductor porcelain composition of the present invention obtained by calcining powder is used as a calcined powder having a calcination temperature of 1 〇〇〇乞 13 13 and a complete single phase of (BaLa) Ti 〇 3 Under the composition of the fabricated semiconductor porcelain 97104573 200935461, the former will obtain a relatively low specific resistance. (4) Doping, and also inhibit the chamber [Example 2] 2 (BaU) Ti〇3 prepared in Example 1 The calcined powder and the calcined powder were changed to a molar ratio of 73:?, and were changed to Si〇2 and CaC〇3 as shown in Table 2, and the sample No. 13 of Example 丨phase The method was carried out to obtain a sintered body. The temperature change of the specific resistance was measured in the same manner as in Example 1 for the obtained sintered body. The results are shown in Table 2. It is known from Table 2 The addition of Si oxide, ea carbonate or k oxide in the step can achieve higher jumping characteristics as in the example! and also suppress the increase in room temperature specific resistance. [Example 3] Preparation of BaC as a main raw material 3. Ti〇z, and the raw material powder of Nb2〇5 as a semiconductor element, are blended in a manner of Ba (Th "ah shoulder oh, and mixed with pure water. The obtained mixed raw material powder The calcination was carried out in the atmosphere at 700 C to 900 ° C for 4 hours, and 3 & (14 sen) 〇 3 烺 calcined powder was prepared. The 33 (1 sen) 〇 3 calcined powder obtained did not completely form Ba (TiNb). 〇3, and BaC〇3 and Ti〇2 remain. Preparation of raw material powders of Na2C〇3, Bi2〇3, Ti〇2, and mixing according to the method of Bio.sNao.OTiO3, mixing in ethanol The obtained mixed raw material powder is subjected to calcination in the atmosphere at 80 ° C for 2 hours, and is prepared ( BiNa) Ti〇3 calcined powder. The prepared Ba(TiNb)〇3 calcined powder and (BiNa)Ti〇3 calcined powder are blended according to 97104573 20 200935461 to become a molar ratio of 73:7, and Example j A sintered body was obtained by the same method. The obtained sintered body was subjected to the same method as in Example 1 to measure the temperature change of the specific resistance value. The measurement results are shown in Table 3. From the measurement results of Table 3, the present invention [(BiNa) obtained by using Ba(TiNb)〇3 calcined powder having a satin burning temperature of 900 ° C and a portion of BaC〇3 and ^(1) remaining in the calcined powder was used. The xBai_x][Tii zMz]〇3 semiconductor porcelain composition will achieve higher jump characteristics as in the example i semiconductor device composition, and will also suppress the rise in room temperature specific resistance. 97104573 21 200935461 [Table l]
試料No. (BaLa)TiOs 煅燒溫度（°C ) 燒結溫度 (°C ) p 25 (Ω cm) Tc (°C ) 電阻溫度係數 (%/〇C ) 1 500 1290 944. 4 141. 8 18. 0 2 600 860. 8 145. 9 24. 5 3 700 822. 1 148. 6 19. 2 4 800 806. 5 158. 1 16. 6 5 900 232. 2 133. 7 25. 5 6木 1000 110. 4 104. 3 18. 6 7氺 1100 50. 1 138. 9 13. 0 8木 1200 38.1 201. 4 6· 6 9氺 1300 102. 5 144. 1 16. 8 10 500 1320 68. 6 167. 8 23. 5 11 600 65. 8 163. 0 20. 9 12 700 70. 2 163. 1 21. 4 13 800 83. 1 157. 9 25. 0 14 900 44. 5 167. 8 17. 6 15* 1000 38. 3 172. 7 10. 6 16* 1100 43. 7 172. 7 12. 7 17* 1200 45. 1 163. 3 11. 5 18* 1300 52. 8 153. 2 19. 2 19 500 1350 80. 2 159. 2 24. 7 20 600 77. 2 160. 5 25. 0 21 700 73. 2 157. 8 24. 0 22 800 101. 8 153. 4 24. 2 23 900 58. 7 153. 5 24. 5 24* 1000 54. 0 158. 6 15. 9 25* 1100 58. 9 148. 8 12. 4 26* 1200 55. 0 158. 8 10. 9 27* 1300 58. 8 154. 1 10. 6 28 800 1320 89. 8 221. 1 22. 8 29 800 88. 6 180. 9 23. 3 30 800 76. 5 130. 2 24. 0 81 400 1290 1323.3 130. 3 23. 8 32 400 1320 104. 2 155. 8 22. 1 33 400 1350 118. 3 160. 4 24. 0 97104573 22 200935461 [表2] 試料 No. (BaLa)Ti〇3 煅燒溫度 (°C ) Si〇2 添 加量 (莫耳％) CaC〇3添加量 (莫耳％) 燒結溫度 (°C ) p 30 (Ω cm) Tc (°C ) 電阻溫 度係數 (%/°C ) 34 8 4 88. 9 159. 6 18. 9 35 800 4 2 1320 90. 2 160. 6 20. 1 36 2 1 77. 9 T61. 1 19. 9 [表3] 試料No. (BaNb)Ti〇3 煅燒溫度（°C ) 燒結溫度 (°C ) p 25 (Ω cm) Tc (°C ) 電阻溫度係數 (%/°C ) 37 700 174. 2 151. 5 18. 3 38 800 1290 100. 5 155. 8 21. 9 39 900 122. 2 154. 9 19. 1 40 700 86.1 158. 7 16. 0 41 800 1320 82. 9 156. 3 22. 0 42 900 70. 9 152. 8 17. 6 43 700 70. 2 158. 1 14. 7 44 800 1350 68. 0 148. 8 17. 1 45 900 62. 4 149. 7 16.1 雖針對本發明參照詳細的特定實施例進行說明，惟在不 脫逸本發明精神與範疇之前提下，將可進行各種變更與修 正’此係熟習此技術者所明白者。 本申請案係以2006年10月27曰申請的日本專利申請 案（特願2006-293366)、2006年11月1日申請的日本專 利申請案（特願2006-298305)為基礎’將參照其内容並爰 引於本案中。 (產業上之可利用性） 依本發明所獲得的半導體瓷器組成物係適用作為諸如 ptc熱阻器、PTC加熱器、pTc開關、溫度檢測器等 料。 97104573 23 200935461 【圖式簡單說明】 圖1為本發明的（BaLa)Ti〇3煅燒粉之依每個烺燒溫度的 X射線繞射圖案的圖。Sample No. (BaLa) TiOs Calcination temperature (°C) Sintering temperature (°C) p 25 (Ω cm) Tc (°C) Temperature coefficient of resistance (%/〇C) 1 500 1290 944. 4 141. 8 18. 0 2 600 860. 8 145. 9 24. 5 3 700 822. 1 148. 6 19. 2 4 800 806. 5 158. 1 16. 6 5 900 232. 2 133. 7 25. 5 6 wood 1000 110. 4 104. 3 18. 6 7氺1100 50. 1 138. 9 13. 0 8 wood 1200 38.1 201. 4 6· 6 9氺1300 102. 5 144. 1 16. 8 10 500 1320 68. 6 167. 8 23. 5 11 600 65. 8 163. 0 20. 9 12 700 70. 2 163. 1 21. 4 13 800 83. 1 157. 9 25. 0 14 900 44. 5 167. 8 17. 6 15* 1000 38. 3 172. 7 10. 6 16* 1100 43. 7 172. 7 12. 7 17* 1200 45. 1 163. 3 11. 5 18* 1300 52. 8 153. 2 19. 2 19 500 1350 80. 2 159. 2 24. 7 20 600 77. 2 160. 5 25. 0 21 700 73. 2 157. 8 24. 0 22 800 101. 8 153. 4 24. 2 23 900 58. 7 153. 5 24. 5 24* 1000 54. 0 158. 6 15. 9 25* 1100 58. 9 148. 8 12. 4 26* 1200 55. 0 158. 8 10. 9 27* 1300 58. 8 154. 1 10. 6 28 800 1320 89. 8 221. 1 22. 8 29 800 88. 6 180. 9 23. 3 30 800 76. 5 130. 2 24. 0 81 400 1290 1323.3 130. 3 23. 8 32 400 1320 104. 2 155. 8 22. 1 33 400 1350 118. 3 160. 4 24. 0 97104573 22 200935461 [Table 2] Sample No. (BaLa) Ti〇3 Calcination temperature (°C) Si 〇2 Addition amount (mol%) CaC〇3 addition amount (mol%) Sintering temperature (°C) p 30 (Ω cm) Tc (°C) Temperature coefficient of resistance (%/°C) 34 8 4 88. 9 159. 6 18. 9 35 800 4 2 1320 90. 2 160. 6 20. 1 36 2 1 77. 9 T61. 1 19. 9 [Table 3] Sample No. (BaNb) Ti〇3 Calcination temperature (° C) Sintering temperature (°C) p 25 (Ω cm) Tc (°C) Temperature coefficient of resistance (%/°C) 37 700 174. 2 151. 5 18. 3 38 800 1290 100. 5 155. 8 21. 9 39 900 122. 2 154. 9 19. 1 40 700 86.1 158. 7 16. 0 41 800 1320 82. 9 156. 3 22. 0 42 900 70. 9 152. 8 17. 6 43 700 70. 2 158 1 14. 7 44 800 1350 68. 0 148. 8 17. 1 45 900 62. 4 149. 7 16.1 Although the invention has been described with reference to the specific embodiments, without departing from the spirit and scope of the invention Various changes and corrections will be made, as will be understood by those skilled in the art. This application is based on a Japanese patent application filed on October 27, 2006 (Japanese Patent Application No. 2006-293366) and Japanese Patent Application No. 2006-298305 filed on Nov. 1, 2006. The content is also cited in this case. (Industrial Applicability) The semiconductor porcelain composition obtained according to the present invention is suitable as a material such as a ptc heat resistor, a PTC heater, a pTc switch, a temperature detector or the like. 97104573 23 200935461 [Schematic Description of the Drawings] Fig. 1 is a view showing an X-ray diffraction pattern of each of the calcining temperatures of the (BaLa)Ti〇3 calcined powder of the present invention.
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