TWI406304B - Semiconductor porcelain composition and method of manufacturing the same - Google Patents
Semiconductor porcelain composition and method of manufacturing the same Download PDFInfo
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本發明係關於諸如PTC熱阻器、PTC加熱器、PTC開關、溫度檢測器等所使用之具有正電阻溫度的半導體瓷器組成物。The present invention relates to a semiconductor porcelain composition having a positive resistance temperature, such as a PTC thermistor, a PTC heater, a PTC switch, a temperature detector, and the like.
習知中,作為顯示PTCR特性(正比電阻溫度係數:Positive Temperature Coefficient of Resistivity)的材料,係提案有在BaTiO3 中添加各種半導體化元素的組成物。該等組成物的居里溫度在120℃左右。另外,該等組成物必需配合用途而使居里溫度偏移(shift)。Conventionally, as a material exhibiting PTCR characteristics (Positive Temperature Coefficient of Resistivity), a composition in which various semiconductor elements are added to BaTiO 3 has been proposed. The Curie temperature of the compositions is around 120 °C. In addition, the compositions must be shifted in accordance with the use of the Curie temperature.
例如提案有藉由在BaTiO3 中添加SrTiO3 ,而使居里溫度偏移,但此情況,居里溫度僅朝負方向偏移,在正方向上並無偏移。目前,使居里溫度朝正方向偏移的添加元素係已知有如PbTiO3 。但是,因為PbTiO3 含有導致環境污染的元素,因而近年來期望有不使用PbTiO3 的材料。For example, it is proposed to shift the Curie temperature by adding SrTiO 3 to BaTiO 3 , but in this case, the Curie temperature is only shifted in the negative direction and there is no offset in the positive direction. At present, an additive element which shifts the Curie temperature in the positive direction is known as PbTiO 3 . However, since PbTiO 3 contains an element which causes environmental pollution, a material which does not use PbTiO 3 is desired in recent years.
於BaTiO3 系半導體瓷器,在防止因Pb取代而造成電阻溫度係數降低,以及降低電壓依存性情形而提升生產性與可靠度等目的下,提案有不使用PbTiO3 ,而將BaTiO3 中的部分Ba利用Bi-Na進行取代的Ba1-2x (BiNa)x TiO3 構造,在將x設為0<x≦0.15範圍內的組成物中添加Nb、Ta或稀土族元素中之任一種或一種以上,並在氮中施行燒結後,再於氧化性環境中施行熱處理的BaTiO3 系半導體瓷器之製造方法(專利文獻1)。Based on BaTiO 3 semiconductor porcelain, preventing caused by Pb substitution decreased temperature coefficient of resistance, and a reduced voltage dependence of the circumstances to enhance the productivity and reliability of the object and the like, it has been proposed without the use of PbTiO 3, and the portion 3 BaTiO Ba is a Ba 1-2x (BiNa) x TiO 3 structure substituted with Bi-Na, and any one or a combination of Nb, Ta or rare earth elements is added to the composition in which x is set to 0<x≦0.15. In the above, a method of producing a BaTiO 3 -based semiconductor ceramic which is subjected to heat treatment in an oxidizing atmosphere after sintering in nitrogen (Patent Document 1).
專利文獻1:日本專利特開昭56-169301號公報Patent Document 1: Japanese Patent Laid-Open No. 56-169301
PTC材料的較大特徵係PTC材料的比電阻值在居里點將急遽提高(跳躍特性=電阻溫度係數α),此現象被認為係因結晶晶界所形成的電阻(因蕭特基能障所造成的電阻)增加所造成。作為PTC材料的特性係要求該比電阻值的跳躍特性較高。The larger characteristic of the PTC material is that the specific resistance of the PTC material will increase sharply at the Curie point (jump characteristic = resistance temperature coefficient α), which is considered to be due to the resistance formed by the grain boundary (due to the Schottky barrier) The resulting resistance) is caused by an increase. As a characteristic of the PTC material, the jump characteristic of the specific resistance value is required to be high.
專利文獻1中,實施例有揭示經添加作為半導體化元素的Nd2 O3 (0.1莫耳%)之組成物,但當進行組成物的原子價控制時,若將3價陽離子當作半導體化元素進行添加時,半導體化的效果將因1價Na離子的存在而降低。因而,將有室溫下的比電阻提高之問題。In Patent Document 1, the examples disclose a composition in which Nd 2 O 3 (0.1 mol%) is added as a semiconductor element, but when the valence control of the composition is performed, trivalent cations are used as a semiconductor. When an element is added, the effect of semiconductorization is lowered by the presence of monovalent Na ions. Therefore, there is a problem that the specific resistance at room temperature is increased.
如此,如專利文獻1所揭示之未含有Pb的PTC材料中,跳躍特性優異點係室溫比電阻較高,而跳躍特性差的部分係室溫比電阻有過度降低的傾向,將有無法兼顧穩定之室溫比電阻與優異跳躍特性的問題。此外,跳躍特性較差的部分係當在該材料中流通電流時,將有在居里點附近的溫度變動將變大,且有穩定溫度高於居里點之傾向等問題。As described above, in the PTC material which does not contain Pb disclosed in Patent Document 1, the jump characteristics are excellent, and the room temperature specific resistance is high, and the portion having poor jump characteristics tends to excessively decrease the room temperature specific resistance, and there is a possibility that both of them cannot be balanced. Stable room temperature specific resistance and excellent jumping characteristics. Further, in the portion where the jump characteristics are poor, when a current flows through the material, there is a problem that the temperature fluctuation in the vicinity of the Curie point becomes large, and there is a tendency that the stable temperature is higher than the Curie point.
為了抑制穩定溫度的變動,以輕易地進行材料設計,必須提升跳躍特性,此時可考慮稍微提升室溫比電阻,但就兼顧高跳躍特性的維持、與室溫比電阻的上升抑制方面,將屬非常困難,通常均陷於室溫比電阻過度提升而超過使用範圍的情況。In order to suppress the fluctuation of the stable temperature, it is necessary to improve the material design, and it is necessary to increase the jump characteristics. In this case, it is conceivable to slightly increase the room temperature specific resistance, but in consideration of the maintenance of the high jump characteristic and the suppression of the increase in the specific resistance at room temperature, It is very difficult, and it is usually trapped at room temperature than when the resistance is excessively increased and exceeds the range of use.
再者,專利文獻1中,實施例揭示有將起始原料的BaCO3 、TiO2 、Bi2 O3 、Na2 O3 、PbO等構成組成物的所有元素在煅燒前便進行混合,並施行煅燒、成形、燒結、熱處理,而將BaTiO3 的部分Ba以Bi-Na進行取代的組成物,若將構成組成物的所有元素於煅燒前便進行混合,於煅燒步驟中,Bi將揮散而導致Bi-Na組成發生偏差,因而將促進異相的生成,室溫下的電阻率上升、引發居里溫度變動等問題。Further, in Patent Document 1, the examples disclose that all elements constituting a composition such as BaCO 3 , TiO 2 , Bi 2 O 3 , Na 2 O 3 , and PbO of a starting material are mixed before calcination, and are carried out. Calcination, forming, sintering, heat treatment, and a composition in which a portion Ba of BaTiO 3 is substituted with Bi-Na, if all the elements constituting the composition are mixed before calcination, in the calcination step, Bi will be volatilized. The Bi-Na composition is deviated, which promotes the generation of heterogeneous phases, increases the resistivity at room temperature, and causes problems such as changes in the Curie temperature.
為了抑制Bi的揮散,雖考慮有依較低溫度施行煅燒,但Bi的揮散雖被抑制,可是卻有無法形成完全固溶體,無法獲得所需特性的問題。In order to suppress the volatilization of Bi, it is considered that calcination is performed at a relatively low temperature, but the volatilization of Bi is suppressed, but there is a problem that a complete solid solution cannot be formed and the desired characteristics cannot be obtained.
本發明之目的在於提供未含有Pb,可使居里溫度朝正方向偏移,且可在將室溫比電阻的上升抑制為最小極限之情況下,獲得較高跳躍特性的半導體瓷器組成物。An object of the present invention is to provide a semiconductor ceramic composition which does not contain Pb, can shift the Curie temperature in the positive direction, and can obtain a high jump characteristic when the room temperature ratio is increased to the minimum limit.
再者,本發明之目的在於提供半導體瓷器組成物和其製造方法,係將BaTiO3 的部分Ba以Bi-Na進行取代的半導體瓷器組成物,其抑制煅燒步驟中的Bi揮散情形,防止Bi-Na的組成偏差而抑制異相的生成,並可使室溫中的電阻率更加降低,且能抑制居里溫度變動。Further, an object of the present invention is to provide a semiconductor porcelain composition and a method for producing the same, which is a semiconductor ceramic composition in which a portion Ba of BaTiO 3 is substituted with Bi-Na, which suppresses Bi-dispersion in a calcination step and prevents Bi- The compositional variation of Na suppresses the generation of a heterogeneous phase, and the resistivity at room temperature can be further lowered, and the Curie temperature fluctuation can be suppressed.
發明者等人為了達成上述目的,經深入鑽研的結果發現,當製造將BaTiO3 的部分Ba以Bi-Na進行取代的半導體瓷器組成物時,藉由分別準備(BaR)TiO3 煅燒粉或Ba(TiM)O3 煅燒粉(以下將該等煅燒粉稱「BT煅燒粉」)、 與(BiNa)TiO3 煅燒粉(以下稱「BNT煅燒粉」),並將該BT煅燒粉與BNT煅燒粉分別依各自對應的適當溫度施行煅燒,便可抑制BNT煅燒粉的Bi揮散情形,防止Bi-Na的組成偏差而抑制異相的生成,並藉由將該等煅燒粉進行混合並施行成形、燒結,可獲得室溫中的電阻率較低、且抑制了居里溫度變動的半導體瓷器組成物。In order to achieve the above object, the inventors have found through intensive studies that when a semiconductor ceramic composition in which a portion Ba of BaTiO 3 is substituted with Bi-Na is produced, (BaR)TiO 3 calcined powder or Ba is separately prepared. (TiM)O 3 calcined powder (hereinafter referred to as "BT calcined powder"), and (BiNa)TiO 3 calcined powder (hereinafter referred to as "BNT calcined powder"), and the BT calcined powder and BNT calcined powder By performing calcination at respective appropriate temperatures, it is possible to suppress Bi volatilization of the BNT calcined powder, prevent compositional variation of Bi-Na and suppress generation of heterogeneous phase, and mix and form and calcine the calcined powder. A semiconductor ceramic composition having a low electrical resistivity at room temperature and suppressing changes in the Curie temperature can be obtained.
再者,發明者等人發現,在準備上述BT煅燒粉之際,依煅燒粉中殘留部分的BaCO3 與TiO2 之方式進行調製,將該BT煅燒粉與BNT煅燒粉進行混合後再施行燒結,將增加蕭特基能障的形成量,隨著蕭特基能障形成量的增加,可在將室溫比電阻上升抑制為最小極限之下,提升跳躍特性,遂完成本發明。Furthermore, the inventors have found that, in preparation of the BT calcined powder, BaCO 3 and TiO 2 remaining in the calcined powder are prepared, and the BT calcined powder is mixed with the BNT calcined powder and then sintered. The amount of formation of the Schottky barrier can be increased. With the increase in the amount of Schottky barrier formation, the jump characteristics can be improved by suppressing the rise in the room temperature ratio resistance to the minimum limit, and the present invention has been completed.
本發明的半導體瓷器組成物,係將由在煅燒粉中殘留部分BaCO3 與TiO2 而成的(BaR)TiO3 或Ba(TiM)O3 (R與M係半導體化元素)所形成之BT煅燒粉、以及由(BiNa)TiO3 煅燒粉所形成之BNT煅燒粉的混合煅燒粉進行燒結而成,將BaTiO3 的部分Ba以Bi-Na進行取代。The semiconductor porcelain composition of the present invention is obtained by calcining BT formed of (BaR)TiO 3 or Ba(TiM)O 3 (R and M-based semiconductor elements) obtained by leaving a part of BaCO 3 and TiO 2 in the calcined powder. The powder and the mixed calcined powder of the BNT calcined powder formed of the (BiNa)TiO 3 calcined powder are sintered, and the part Ba of BaTiO 3 is substituted with Bi-Na.
本發明係於上述構成的半導體瓷器組成物中,提案有:BT煅燒粉中的BaCO3 與TiO2 含有量,係當將(BaR)TiO3 或Ba(TiM)O3 與BaCO3 及TiO2 的合計設為100莫耳%時,BaCO3 為30莫耳%以下,TiO2 為30莫耳%以下;半導體化元素R係稀土族元素中之至少一種,使用(BaR)TiO3 煅燒粉作為BT煅燒粉時,將半導體瓷器組成物的組成式依[(BiNa)x (Ba1-y Ry )1-x ]TiO3 表示,而x、y係0 <x≦0.3、0<y≦0.02;半導體化元素M係Nb、Sb中之至少一種,使用Ba(TiM)O3 煅燒粉作為BT煅燒粉時,將半導體瓷器組成物的組成式依[(BiNa)x Ba1-x ][Ti1-z Mz ]O3 表示,而x、z係0<x≦0.3、0<z≦0.005。The present invention is directed to the semiconductor ceramic composition of the above composition, and the BaCO 3 and TiO 2 content in the BT calcined powder is proposed to be (BaR)TiO 3 or Ba(TiM)O 3 with BaCO 3 and TiO 2 . When the total amount is 100 mol%, BaCO 3 is 30 mol% or less, TiO 2 is 30 mol% or less, and at least one of the semiconductor element R-based rare earth elements is used as (BaR)TiO 3 calcined powder. In the case of BT calcined powder, the composition formula of the semiconductor porcelain composition is expressed by [(BiNa) x (Ba 1-y R y ) 1-x ]TiO 3 , and x, y is 0 < x ≦ 0.3, 0 < y ≦ 0.02; at least one of the semiconductor element M is Nb or Sb, and when Ba(TiM)O 3 calcined powder is used as the BT calcined powder, the composition formula of the semiconductor porcelain composition depends on [(BiNa) x Ba 1-x ] [ Ti 1-z M z ]O 3 represents, and x and z are 0<x≦0.3, 0<z≦0.005.
再者,本發明的半導體瓷器組成物之製造方法,係將BaTiO3 的部分Ba以Bi-Na進行取代的半導體瓷器組成物之製造方法,包括有:準備由在煅燒粉中殘留部分BaCO3 與TiO2 的(BaR)TiO3 或Ba(TiM)O3 (R與M係半導體化元素)所構成之BT煅燒粉的步驟;準備由(BiNa)TiO3 煅燒粉所構成的BNT煅燒粉之步驟;將上述BT煅燒粉與BNT煅燒粉進行混合,而準備混合煅燒粉的步驟;以及將上述混合煅燒粉施行成形、燒結的步驟。Further, the method for producing a semiconductor ceramic composition of the present invention is a method for producing a semiconductor ceramic composition in which a portion Ba of BaTiO 3 is substituted with Bi-Na, and includes: preparing a portion of BaCO 3 remaining in the calcined powder and TiO 2 is (BaR) TiO 3 or Ba (TiM) O 3 (R and M based semiconductor elements) the step of BT calcined powder composed of; preparing step BNT calcined powder of the (BiNa) TiO 3 calcined powder consisting of a step of mixing the BT calcined powder with the BNT calcined powder to prepare a mixed calcined powder, and a step of forming and sintering the mixed calcined powder.
本發明係於上述構成的半導體瓷器組成物之製造方法中,提案有:在準備BT煅燒粉的步驟中,煅燒溫度係900℃以下;在準備BNT煅燒粉的步驟中,煅燒溫度係700℃~950℃;在BT煅燒粉中的BaCO3 與TiO2 含有量係當將(BaR)TiO3 或Ba(TiM)O3 、BaCO3 及TiO2 的合計設為100莫耳%時,BaCO3 為30莫耳%以下,TiO2 為30莫耳%以下;在準備BT煅燒粉的步驟或準備BNT煅燒粉的步驟、或者二項步驟中,於煅燒前,添加Si氧化物3.0莫耳%以下、 以及Ca碳酸鹽或Ca氧化物4.0莫耳%以下;在將BT煅燒粉與BNT煅燒粉混合而準備混合煅燒粉的步驟中,添加Si氧化物3.0莫耳%以下、以及Ca碳酸鹽或Ca氧化物4.0莫耳%以下;半導體化元素R係稀土族元素中至少一種,使用(BaR)TiO3 煅燒粉作為BT煅燒粉時,將半導體瓷器組成物的組成式依[(BiNa)x (Ba1-y Ry )1-x ]TiO3 表示,x、y係0<x≦0.3、0<y≦0.02;半導體化元素M係Nb、Sb中之至少一種,使用Ba(TiM)O3 煅燒粉作為BT煅燒粉時,將半導體瓷器組成物的組成式依[(BiNa)x Ba1-x ][Ti1-z Mz ]O3 表示,x、z係0<x≦0.3、0<z≦0.005。In the method for producing a semiconductor ceramic composition having the above-described configuration, it is proposed that in the step of preparing the BT calcined powder, the calcination temperature is 900 ° C or lower; in the step of preparing the BNT calcined powder, the calcination temperature is 700 ° C. 950 ° C; BaCO 3 and TiO 2 content in the BT calcined powder is when the total of (BaR)TiO 3 or Ba(TiM)O 3 , BaCO 3 and TiO 2 is set to 100 mol %, BaCO 3 is 30 mol% or less, TiO 2 is 30 mol% or less; in the step of preparing BT calcined powder or the step of preparing BNT calcined powder, or in two steps, before the calcination, Si oxide is 3.0 mol% or less, And a Ca carbonate or Ca oxide of 4.0 mol% or less; in the step of mixing the BT calcined powder with the BNT calcined powder to prepare a mixed calcined powder, adding Si oxide of 3.0 mol% or less, and Ca carbonate or Ca oxidation 4.0 mol% or less; at least one of the semiconductor element R-based rare earth element, when (BaR)TiO 3 calcined powder is used as the BT calcined powder, the composition formula of the semiconductor porcelain composition depends on [(BiNa) x (Ba 1 -y R y ) 1-x ]TiO 3 represents that x and y are 0<x≦0.3, 0<y≦0.02; the semiconductor element M is Nb, Sb In at least one of the following, when Ba(TiM)O 3 calcined powder is used as the BT calcined powder, the composition formula of the semiconductor porcelain composition is expressed by [(BiNa) x Ba 1-x ][Ti 1-z M z ]O 3 , x, z are 0 < x ≦ 0.3, 0 < z ≦ 0.005.
根據本發明,將可提供未含有Pb,可使居里溫度朝正方向偏移,且可在將室溫比電阻的上升抑制為最小極限之下,獲得較高跳躍特性的半導體瓷器組成物。According to the present invention, it is possible to provide a semiconductor-ceramic composition which does not contain Pb, can shift the Curie temperature in the positive direction, and can attain a higher jumping characteristic under the limit of suppressing the rise of the room temperature specific resistance.
再者,根據本發明,將可提供抑制煅燒步驟中的Bi揮散情形,防止Bi-Na的組成偏差以抑制含有Na的異相生成,並可使室溫中的電阻率更加降低,且能抑制居里溫度變動的半導體瓷器組成物。Further, according to the present invention, it is possible to provide a situation in which Bi volatilization in the calcination step is suppressed, a compositional deviation of Bi-Na is prevented to suppress generation of a hetero phase containing Na, and a resistivity at room temperature can be further lowered, and the residence can be suppressed. A semiconductor porcelain composition with a temperature change.
本發明半導體瓷器組成物的特徵在於:將由在煅燒粉中殘留部分BaCO3 與TiO2 構成的(BaR)TiO3 或Ba(TiM)O3 (R與M係半導體化元素)所形成之BT煅燒粉,以及由 (BiNa)TiO3 煅燒粉所形成之BNT煅燒粉的混合煅燒粉進行燒結而成。The semiconductor ceramic composition of the present invention is characterized in that BT is calcined by (BaR)TiO 3 or Ba(TiM)O 3 (R and M-based semiconductor elements) composed of a part of BaCO 3 and TiO 2 remaining in the calcined powder. The powder and the mixed calcined powder of the BNT calcined powder formed of the (BiNa)TiO 3 calcined powder are sintered.
本發明的半導體瓷器組成物若為含有將BaTiO3 的部分Ba以Bi-Na進行取代,可採用任意組成,藉由作成為將組成式依[(BiNa)x (Ba1-y Ry )1-x ]TiO3 表示(其中,R係稀土族元素中之至少一種),x、y係滿足0<x≦0.3、0<y≦0.02的組成,或者將組成式依[(BiNa)x Ba1-x ][Ti1-z Mz ]O3 表示(其中,M係Nb、Sb中之至少一種),x、z係滿足0<x≦0.3、0<z≦0.005的組成,便可在未使用Pb的情況下,使居里溫度上升,並在將室溫比電阻的上升抑制為最小極限的情況下,獲得較高的跳躍特性。When the semiconductor ceramic composition of the present invention contains a portion Ba of BaTiO 3 substituted with Bi-Na, any composition may be employed, and the composition formula is determined to be [(BiNa) x (Ba 1-y R y ) 1 -x ]TiO 3 represents (wherein at least one of R-based rare earth elements), x, y is a composition satisfying 0<x≦0.3, 0<y≦0.02, or the composition formula is [(BiNa) x Ba 1-x ][Ti 1-z M z ]O 3 represents (wherein M is at least one of Nb and Sb), and x and z satisfy the composition of 0<x≦0.3 and 0<z≦0.005. In the case where Pb is not used, the Curie temperature is raised, and when the rise in the room temperature specific resistance is suppressed to the minimum limit, high jump characteristics are obtained.
上述[(BiNa)x (Ba1-y Ry )1-x ]TiO3 組成物中,x係指(BiNa)的成分範圍,0<x≦0.3係較佳範圍。若x為0,則無法將居里溫度朝高溫側偏移,反之,若超過0.3,則室溫的電阻率將接近104 Ω cm,較難適用於PTC加熱器等,因而最好避免。In the above [(BiNa) x (Ba 1-y R y ) 1-x ]TiO 3 composition, x represents a component range of (BiNa), and 0 < x ≦ 0.3 is a preferred range. If x is 0, the Curie temperature cannot be shifted toward the high temperature side. On the other hand, if it exceeds 0.3, the room temperature resistivity will be close to 10 4 Ω cm, which is difficult to apply to a PTC heater or the like, and thus it is preferable to avoid it.
再者,R係稀土族元素中之至少一種,最好為La。組成式中,y係指R的成分範圍,0<y≦0.02係較佳範圍。若y為0,則組成物將無法半導體化,反之,若超過0.02,則室溫的電阻率將變大,因而最好避免。雖使該y值變化而進行原子價控制,但於將部分Ba以Bi-Na進行取代的系統中,當執行組成物的原子價控制時,若將3價陽離子當作半導體化元素並添加,則半導體化的效果將因1價Na離子的存在、與發生Bi揮散,因而效果將降低,有室 溫下的電阻率提高之問題。所以,更佳的範圍係0.002≦y≦0.02。另外,0.002≦y≦0.02若依莫耳%表示便為0.2莫耳%~2.0莫耳%。即,前述專利文獻1中,雖添加作為半導體元素的Nd2 O3 (0.1莫耳%),但是判斷此情形於PTC用途方面並無法實現充分的半導體化。Further, at least one of the R-based rare earth elements is preferably La. In the composition formula, y means a component range of R, and 0 < y 0.02 is a preferred range. If y is 0, the composition cannot be semiconductorized. On the other hand, if it exceeds 0.02, the room temperature resistivity will become large, and thus it is preferable to avoid it. When the y value is changed and the valence is controlled, in the system in which the partial Ba is substituted with Bi-Na, when the valence control of the composition is performed, when the trivalent cation is used as the semiconductor element, it is added. As a result of the semiconductorization, the effect of the monovalent Na ions and the occurrence of Bi volatilization are reduced, and the effect is lowered, and the resistivity at room temperature is increased. Therefore, the better range is 0.002 ≦ y ≦ 0.02. In addition, 0.002 ≦ y 0.02 is 0.2% by mole to 2.0% by mole, expressed as % by mole. In other words, in the above-mentioned Patent Document 1, Nd 2 O 3 (0.1 mol%) as a semiconductor element is added, but it is judged that this is not sufficient semiconductorization in terms of PTC use.
[(BiNa)x Ba1-x ][Ti1-z Mz ]O3 組成物中,x係指(BiNa)的成分範圍,0<x≦0.3係較佳範圍。若x為0,則無法將居里溫度朝高溫側偏移,反之,若超過0.3,則室溫的電阻率將接近104 Ω cm,較難適用於PTC加熱器等,因而最好避免。In the composition of [(BiNa) x Ba 1-x ][Ti 1-z M z ]O 3 , x represents a component range of (BiNa), and 0<x≦0.3 is a preferred range. If x is 0, the Curie temperature cannot be shifted toward the high temperature side. On the other hand, if it exceeds 0.3, the room temperature resistivity will be close to 10 4 Ω cm, which is difficult to apply to a PTC heater or the like, and thus it is preferable to avoid it.
再者,M係Nb、Sb中之至少一種,其中,最好為Nb。組成式中,z係指M的成分範圍,0<z≦0.005係較佳範圍。若z為0,便無法進行原子價控制,組成物將無法半導體化,反之,若超過0.005,則室溫的電阻率將超過103 Ω cm,因而最好避免。另外,上述0<z≦0.005若依莫耳%表示便為0~0.5莫耳%(未含0)。Further, M is at least one of Nb and Sb, and among them, Nb is preferable. In the composition formula, z means a component range of M, and 0 < z ≦ 0.005 is a preferred range. If z is 0, the valence control cannot be performed, and the composition cannot be semiconductorized. On the other hand, if it exceeds 0.005, the room temperature resistivity will exceed 10 3 Ω cm, and thus it is preferable to avoid it. Further, the above 0 < z ≦ 0.005 is 0 to 0.5 mol% (not including 0) if expressed in terms of % by mole.
上述[(BiNa)x Ba1-x ][Ti1-z Mz ]O3 組成物的情況,為了執行原子價控制,將Ti以M元素進行取代,此時,M元素的添加(添加量0<z≦0.005)係以4價元素的Ti位之原子價控制為目的,因而具有可依較將R使用作為半導體化元素的[(BiNa)x (Ba1-y Ry )1-x ]TiO3 組成物中R元素較佳添加量(0.002≦y≦0.02)更少的量進行原子價控制,並可減輕本發明半導體瓷器組成物的內部應變等優點。In the case of the above [(BiNa) x Ba 1-x ][Ti 1-z M z ]O 3 composition, in order to perform valence control, Ti is substituted with M element, and at this time, addition of M element (addition amount) 0<z≦0.005) is for the purpose of controlling the valence of the Ti site of the tetravalent element, and thus has [(BiNa) x (Ba 1-y R y ) 1-x which can be used as a semiconductor element in comparison with R. In the TiO 3 composition, the amount of R element (0.002 ≦ y 0.02) is preferably added in an amount to control the valence, and the internal strain of the semiconductor ceramic composition of the present invention can be alleviated.
上述[(BiNa)x (Ba1-y Ry )1-x ]TiO3 、與[(BiNa)x Ba1-x ][Ti1-z Mz ]O3 等 二組成物中,基本上係將Bi與Na的比設為1:1。組成式可依[(Bi0.5 Na0.5 )x (Ba1-y Ry )1-x ]TiO3 、[(Bi0.5 Na0.5 )x Ba1-x ][Ti1-z Mz ]O3 表示。將Bi與Na的比基本上設為1:1的理由,係例如在煅燒步驟等之中,Bi將揮散而有導致Bi與Na的比發生偏差的緣故所致。即,調配時雖為1:1,但於燒結體中則不為1:1之情況等,亦涵蓋於本發明。In the above two compositions of [(BiNa) x (Ba 1-y R y ) 1-x ]TiO 3 and [(BiNa) x Ba 1-x ][Ti 1-z M z ]O 3 , basically The ratio of Bi to Na was set to 1:1. The composition formula can be [[Bi 0.5 Na 0.5 ) x (Ba 1-y R y ) 1-x ]TiO 3 , [(Bi 0.5 Na 0.5 ) x Ba 1-x ][Ti 1-z M z ]O 3 Said. For the reason that the ratio of Bi to Na is substantially 1:1, for example, in the calcination step or the like, Bi is volatilized and the ratio of Bi to Na varies. In other words, the ratio is 1:1 in the case of blending, but it is not 1:1 in the sintered body, and is also included in the present invention.
以下,針對為了獲得本發明半導體瓷器組成物的製造方法之一例進行說明。Hereinafter, an example of a method for producing a semiconductor ceramic composition of the present invention will be described.
本發明中,在製造將BaTiO3 的部分Ba以Bi-Na進行取代之半導體瓷器組成物時,係採取分別準備由(BaR)TiO3 煅燒粉或Ba(TiM)O3 煅燒粉所構成的BT煅燒粉、與由(BiNa)TiO3 煅燒粉所構成的BNT煅燒粉,並將該BT煅燒粉與BNT煅燒粉分別依各自對應的適當溫度施行煅燒之方法(以下稱「分段煅燒法」)。In the present invention, in the case of fabricating a semiconductor-porcelain composition in which a portion Ba of BaTiO 3 is substituted with Bi-Na, BT composed of (BaR)TiO 3 calcined powder or Ba(TiM)O 3 calcined powder is prepared separately. a calcined powder, a BNT calcined powder composed of (BiNa)TiO 3 calcined powder, and a calcination method of the BT calcined powder and the BNT calcined powder at respective appropriate temperatures (hereinafter referred to as "segmented calcination method") .
藉由使用上述分段煅燒法,將抑制BNT煅燒粉的Bi揮散情形,防止Bi-Na組成偏差而可抑制異相的生成,藉由將該等煅燒粉施行混合,並施行成形、燒結,可獲得室溫中的電阻率較低、抑制了居里溫度變動的半導體瓷器組成物。By using the above-described segmental calcination method, the Bi volatilization of the BNT calcined powder can be suppressed, and the Bi-Na composition deviation can be prevented, and the generation of the heterophase can be suppressed, and the calcined powder can be mixed and formed and sintered. A semiconductor ceramic composition having a low resistivity at room temperature and suppressing Curie temperature fluctuation.
上述分段煅燒法中,於準備BT煅燒粉時,係將BaCO3 、TiO2 、與半導體化元素原料粉末(例如La2 O3 、Nb2 O5 )進行混合而製成混合原料粉末,再施行煅燒,但目前為止,為了形成完全的單相,係依煅燒溫度為900℃~1300℃範圍實施。本發明中,係藉由將該煅燒溫度設為較低於迄今溫度 之900℃以下而實施,便可不完全形成(BaR)TiO3 或Ba(TiM)O3 ,而於煅燒粉中殘留部分的BaCO3 與TiO2 。In the above-described segmental calcination method, when preparing the BT calcined powder, BaCO 3 , TiO 2 , and a semiconductor element raw material powder (for example, La 2 O 3 , Nb 2 O 5 ) are mixed to prepare a mixed raw material powder, and then Calcination is carried out, but so far, in order to form a complete single phase, the calcination temperature is carried out in the range of 900 ° C to 1300 ° C. In the present invention, by setting the calcination temperature to be lower than the temperature below 900 ° C, the (BaR)TiO 3 or Ba(TiM)O 3 may not be completely formed, and the residual portion in the calcined powder may be partially formed. BaCO 3 and TiO 2 .
上述方法中,若煅燒溫度超過900℃,將過度形成(BaR)TiO3 或Ba(TiM)O3 ,而無法殘留BaCO3 與TiO2 ,因而最好避免。煅燒時間最好設為0.5小時~10小時,尤以2~6小時為佳。In the above method, if the calcination temperature exceeds 900 ° C, (BaR)TiO 3 or Ba(TiM)O 3 is excessively formed, and BaCO 3 and TiO 2 cannot be left, so that it is preferably avoided. The calcination time is preferably set to 0.5 hours to 10 hours, preferably 2 to 6 hours.
本發明中,如上述,當使用分段煅燒法,準備上述BT煅燒粉時,重要的是於煅燒粉中殘留部分的BaCO3 與TiO2 。其理由係藉此,最終所獲得之將BaTiO3 的部分Ba以Bi-Na進行取代的半導體瓷器組成物,其蕭特基能障形成量增加,且隨著蕭特基能障形成量的增加,可在將室溫比電阻的上升抑制為最小極限之下,提升跳躍特性。In the present invention, as described above, when the above-mentioned BT calcined powder is prepared by the segmental calcination method, it is important that a part of BaCO 3 and TiO 2 remain in the calcined powder. The reason for this is that the semiconductor ceramic composition obtained by substituting the partial Ba of BaTiO 3 with Bi-Na finally increases the amount of Schottky barrier formation and increases with the amount of Schottky barrier formation. The jump characteristic can be improved by suppressing the rise of the room temperature specific resistance to the minimum limit.
將依上述所獲得的由在煅燒粉中殘留部分BaCO3 與TiO2 的(BaR)TiO3 或Ba(TiM)O3 所構成之BT煅燒粉,以及另外準備的由(BiNa)TiO3 煅燒粉所構成之BNT煅燒粉進行混合,並將該混合煅燒粉施行成形、燒結,依此可獲得本發明之將BaTiO3 的部分Ba以Bi-Na進行取代的半導體瓷器組成物。The BT calcined powder composed of (BaR)TiO 3 or Ba(TiM)O 3 which retains a part of BaCO 3 and TiO 2 in the calcined powder obtained as described above, and the additionally prepared (BiNa)TiO 3 calcined powder The BNT calcined powder thus formed is mixed, and the mixed calcined powder is subjected to molding and sintering, whereby a semiconductor porcelain composition in which a part Ba of BaTiO 3 is substituted with Bi-Na is obtained.
上述BT煅燒粉中的BaCO3 與TiO2 含有量,係當將(BaR)TiO3 或Ba(TiM)O3 、BaCO3 及TiO2 的合計設為100莫耳%時,最好BaCO3 含有30莫耳%以下,TiO2 含有30莫耳%以下。藉由使該含有量產生變化,可調整室溫比電阻與跳躍特性。The content of BaCO 3 and TiO 2 in the BT calcined powder is preferably BaCO 3 when the total of (BaR)TiO 3 or Ba(TiM)O 3 , BaCO 3 and TiO 2 is 100 mol%. 30 mol% or less, TiO 2 contains 30 mol% or less. The room temperature specific resistance and the jump characteristic can be adjusted by changing the content.
在使BT煅燒粉中的BaCO3 與TiO2 含有量產生變化時, 若為在準備BT煅燒粉的步驟中,藉由使煅燒溫度在900℃以下進行變化、或改變煅燒時間、或者改變BT煅燒粉的調配組成便可。此外,在上述BT煅燒粉或BNT煅燒粉或該等混合煅燒粉中,添加例如依超過900℃的溫度進行煅燒而形成完全單相的BT煅燒粉、或添加BaCO3 粉與TiO2 粉,亦可改變BT煅燒粉中的BaCO3 與TiO2 含有量。When the content of BaCO 3 and TiO 2 in the BT calcined powder is changed, in the step of preparing the BT calcined powder, the calcination temperature is changed below 900 ° C, or the calcination time is changed, or the BT calcination is changed. The composition of the powder can be made. Further, in the above BT calcined powder or BNT calcined powder or the mixed calcined powder, for example, calcination is carried out at a temperature exceeding 900 ° C to form a completely single-phase BT calcined powder, or BaCO 3 powder and TiO 2 powder are added, The BaCO 3 and TiO 2 content in the BT calcined powder can be changed.
將BaCO3 含有量設在30莫耳%以下的理由,係若超過30莫耳%,將產生除了BaCO3 以外的異相,導致室溫比電阻上升的緣故。且,在燒結步驟中將產生CO2 氣體,導致燒結體出現龜裂,因而最好避免。將TiO2 含有量設定在30莫耳%以下的理由,係若超過30莫耳%,將產生除了BaCO3 以外的異相,導致室溫比電阻上升。The reason why the BaCO 3 content is 30 mol% or less is more than 30 mol%, and a heterogeneous phase other than BaCO 3 is generated, resulting in an increase in room temperature specific resistance. Moreover, CO 2 gas will be generated in the sintering step, resulting in cracking of the sintered body, and thus it is preferably avoided. The reason why the content of TiO 2 is set to 30 mol% or less is more than 30 mol%, and a hetero phase other than BaCO 3 is generated, resulting in an increase in room temperature specific resistance.
BaCO3 與TiO2 含有量的上限係BaCO3 30莫耳%、TiO2 30莫耳%的合計60莫耳%,而下限為超過0的量,當BaCO3 超過20莫耳%時,TiO2 將未滿10莫耳%而產生除了BaCO3 以外的異相而導致室溫比電阻上升,因而最好避免。TiO2 超過20莫耳%、BaCO3 未滿10莫耳%的情況亦同樣地最好避免。所以,在BaCO3 或TiO2 其中一者超過20莫耳%的情況,最好依另一者達10莫耳%以上的方式,調整煅燒溫度、煅燒時間、調配組成等。The upper limit of the content of BaCO 3 and TiO 2 is a total of 60 mol% of BaCO 3 30 mol%, TiO 2 30 mol%, and the lower limit is an amount exceeding 0. When BaCO 3 exceeds 20 mol%, TiO 2 It is preferable to avoid a heterogeneous phase other than BaCO 3 which is less than 10 mol%, resulting in a rise in room temperature specific resistance. The case where TiO 2 exceeds 20 mol% and BaCO 3 does not exceed 10 mol% is also preferably avoided. Therefore, in the case where one of BaCO 3 or TiO 2 exceeds 20 mol%, it is preferred to adjust the calcination temperature, the calcination time, the blending composition, and the like in a manner in which the other is up to 10 mol% or more.
準備與上述殘留部分BaCO3 與TiO2 之BT煅燒粉進行混合的由(BiNa)TiO3 煅燒粉所構成的BNT煅燒粉步驟,首先係將原料粉末的Na2 CO3 、Bi2 O3 、TiO2 進行混合而製作混合原料粉末。此時,若過剩地添加Bi2 O3 (例如超過5莫耳%), 煅燒時便將生成異相,導致室溫比電阻提高,因而最好避免。Preparing a BNT calcined powder comprising (BiNa)TiO 3 calcined powder mixed with the above-mentioned residual BaCO 3 and TiO 2 BT calcined powder, firstly, the raw material powder of Na 2 CO 3 , Bi 2 O 3 , TiO 2 The mixture was mixed to prepare a mixed raw material powder. At this time, if Bi 2 O 3 is excessively added (for example, more than 5 mol%), a hetero phase is formed during calcination, and the room temperature specific resistance is improved, so that it is preferably avoided.
其次,將上述混合原料粉末施行煅燒。煅燒溫度最好設為700℃~950℃範圍。煅燒時間最好設為0.5小時~10小時,尤以2小時~6小時為佳。若煅燒溫度未滿700℃、或者煅燒時間未滿0.5小時,則未反應的Na2 CO3 或其分解而生成之NaO,將與環境中的水分進行反應,或在施行濕式混合時將與溶劑產生反應,導致發生組成偏差、特性變動情況,因而最好避免。此外,若煅燒溫度超過950℃、或煅燒時間超過10小時,則將促進Bi揮散,導致發生組成偏差,而促進異相生成,因而最好避免。Next, the above mixed raw material powder is subjected to calcination. The calcination temperature is preferably set in the range of from 700 ° C to 950 ° C. The calcination time is preferably set to 0.5 hours to 10 hours, preferably 2 hours to 6 hours. If the calcination temperature is less than 700 ° C or the calcination time is less than 0.5 hours, the unreacted Na 2 CO 3 or NaO formed by decomposition thereof will react with moisture in the environment or when wet mixing is performed. The solvent reacts, causing compositional variations and characteristic changes, and is therefore preferably avoided. Further, if the calcination temperature exceeds 950 ° C or the calcination time exceeds 10 hours, Bi is volatilized, resulting in compositional variation and promoting heterogeneous formation, and thus it is preferably avoided.
藉由依照分段煅燒法分別準備BT煅燒粉與BNT煅燒粉,可提供能將BNT煅燒粉依較低溫施行煅燒,抑制Bi的揮散,防止發生Bi-Na組成偏差,抑制含有Na的異相生成,可更加降低室溫中的電阻率,且抑制了居里溫度變動的半導體瓷器組成物。By preparing the BT calcined powder and the BNT calcined powder according to the segmental calcination method, it is possible to provide the BNT calcined powder to be calcined at a lower temperature, suppress the volatilization of Bi, prevent the Bi-Na composition deviation from occurring, and suppress the heterogeneous formation containing Na. The resistivity at room temperature can be further reduced, and the semiconductor porcelain composition having a Curie temperature variation can be suppressed.
準備上述各種煅燒粉的步驟中,在將原料粉末進行混合之際,亦可配合原料粉末的粒度施行粉碎。此外,混合、粉碎係可採取使用純水、乙醇等的濕式混合.粉碎,或乾式混合.粉碎等任何方式,最好施行乾式混合.粉碎,將可更加防止組成偏差。另外,上述中,作為原料粉末係例舉了BaCO3 、Na2 CO3 、TiO2 等為例子,但亦可使用其他的Ba化合物、Na化合物等。In the step of preparing the above-mentioned various calcined powders, when the raw material powders are mixed, the pulverization may be carried out in accordance with the particle size of the raw material powder. In addition, the mixing and pulverizing system can adopt wet mixing using pure water, ethanol, and the like. Crush, or dry mix. Any method of crushing, etc., it is best to perform dry mixing. Shredding will prevent compositional deviations. In the above, examples of the raw material powder include BaCO 3 , Na 2 CO 3 , TiO 2 and the like, but other Ba compounds, Na compounds, and the like may be used.
如上述,分別準備殘留部分BaCO3 、TiO2 的BT煅燒粉與 BNT煅燒粉,並將煅燒粉調配既定量之後施行混合。混合係可採取使用純水、乙醇等的濕式混合,或乾式混合等任何方式,最好施行乾式混合,將可更加防止組成偏差。此外,亦可配合煅燒粉的粒度,經混合後再施行後粉碎,或者同時施行混合與粉碎。混合、粉碎後的混合煅燒粉平均粒度最好0.5 μm~2.5 μm。As described above, the BT calcined powder of the residual portion of BaCO 3 and TiO 2 and the BNT calcined powder were separately prepared, and the calcined powder was blended and quantified. The mixing system may be any method such as wet mixing using pure water, ethanol or the like, or dry mixing, and it is preferable to carry out dry mixing to further prevent composition variation. In addition, the particle size of the calcined powder may be blended, and then mixed and then pulverized, or simultaneously mixed and pulverized. The average particle size of the mixed calcined powder after mixing and pulverization is preferably 0.5 μm to 2.5 μm.
上述準備BT煅燒粉的步驟及/或準備BNT煅燒粉的步驟、或將各煅燒粉進行混合的步驟中,若添加:Si氧化物3.0莫耳%以下、Ca氧化物或Ca碳酸鹽4.0莫耳%以下,Si氧化物將抑制結晶粒的異常成長,且可輕易地進行電阻率控制,且Ca氧化物或Ca碳酸鹽可提升在低溫下的燒結性,並可控制還原性,故較佳。若任一者添加超過上述限定量,則組成物將無法顯示半導體化,因而最好避免。添加最好在各步驟進行混合前實施。The step of preparing the BT calcined powder and/or the step of preparing the BNT calcined powder, or the step of mixing the calcined powder, if: adding: Mo oxide of 3.0 mol% or less, Ca oxide or Ca carbonate of 4.0 mol Below %, the Si oxide suppresses the abnormal growth of the crystal grains, and the resistivity control can be easily performed, and the Ca oxide or the Ca carbonate can improve the sinterability at a low temperature and can control the reducing property, which is preferable. If either of them exceeds the above-defined amount, the composition will not be able to exhibit semiconductorization, and thus it is preferable to avoid it. The addition is preferably carried out before the mixing in each step.
藉由將BT煅燒粉與BNT煅燒粉進行混合的步驟而獲得的混合煅燒粉,係利用所需的成形手段進行成形。在成形前,視需要亦可將粉碎粉利用造粒裝置施行造粒。經成形後的成形體密度最好為2.5~3.5g/cm3 。The mixed calcined powder obtained by the step of mixing the BT calcined powder and the BNT calcined powder is formed by a desired forming means. Before the forming, the pulverized powder may be granulated by a granulator as needed. The molded body after molding has a density of preferably 2.5 to 3.5 g/cm 3 .
燒結係可在大氣中或還原環境中、或者低氧濃度之惰性氣體環境中實施,特別以在氧濃度未滿1%的氮或氬環境中進行燒結。燒結溫度最好設為1250℃~1350℃。燒結時間最好設為1小時~10小時,尤以2小時~6小時為佳。若偏離任一較佳條件,室溫比電阻將上升,跳躍特性將降低,因而最好避免。The sintering system can be carried out in the atmosphere or in a reducing environment or in an inert gas atmosphere of low oxygen concentration, particularly in a nitrogen or argon atmosphere having an oxygen concentration of less than 1%. The sintering temperature is preferably set to 1250 ° C ~ 1350 ° C. The sintering time is preferably set to 1 hour to 10 hours, preferably 2 hours to 6 hours. If any of the better conditions are deviated, the room temperature specific resistance will rise and the jump characteristics will decrease, so it is best avoided.
其他的燒結步驟係在溫度1290℃~1350℃、氧濃度未滿1%的環境中,(1)依未滿4小時的燒結時間實施,或者(2)依滿足式:ΔT≧25t(t=燒結時間(hr)、ΔT=燒結後的冷卻速度(℃/hr))之燒結時間實施,接著,依滿足上式的冷卻速度施行燒結後的冷卻,藉此可獲得將室溫比電阻保持較低狀態下,於高溫區域(居里溫度以上)下提升電阻溫度係數的半導體瓷器組成物。The other sintering steps are carried out in an environment with a temperature of 1290 ° C to 1350 ° C and an oxygen concentration of less than 1%, (1) depending on the sintering time of less than 4 hours, or (2) by the satisfaction formula: ΔT ≧ 25t (t = Sintering time (hr), ΔT = cooling rate after sintering (°C/hr)) is performed, and then cooling after sintering is performed at a cooling rate satisfying the above formula, whereby the room temperature specific resistance can be maintained. A semiconductor ceramic composition that raises the temperature coefficient of resistance in a high temperature region (above the Curie temperature) in a low state.
準備BaCO3 、TiO2 、La2 O3 的原料粉末,並依成為(Ba0.994 La0.006 )TiO3 的方式進行調配,以純水進行混合。將所獲得之混合原料粉末依500℃~1300℃在大氣中施行4小時煅燒,而準備(BaLa)TiO3 煅燒粉。將所獲得之(BaLa)TiO3 煅燒粉中,在500℃~1200℃中的每個煅燒溫度之X射線繞射圖案示於如圖1。另外,圖中最下層的X射線繞射圖案並無標記溫度,而是指500℃的情況。Raw material powders of BaCO 3 , TiO 2 , and La 2 O 3 were prepared, and blended in a manner of (Ba 0.994 La 0.006 )TiO 3 , and mixed with pure water. The obtained mixed raw material powder was calcined in the air at 500 ° C to 1300 ° C for 4 hours to prepare (BaLa)TiO 3 calcined powder. The X-ray diffraction pattern of each calcination temperature in the obtained (BaLa)TiO 3 calcined powder at 500 ° C to 1200 ° C is shown in FIG. 1 . In addition, the lowermost X-ray diffraction pattern in the figure has no mark temperature, but refers to the case of 500 °C.
準備Na2 CO3 、Bi2 O3 、TiO2 的原料粉末,並依成為(Bi0.5 Na0.5 )TiO3 的方式進行調配,在乙醇中施行混合。將所獲得的混合原料粉末在800℃下於大氣中施行2小時煅燒,而準備(BiNa)TiO3 煅燒粉。A raw material powder of Na 2 CO 3 , Bi 2 O 3 , and TiO 2 was prepared, and blended so as to be (Bi 0.5 Na 0.5 )TiO 3 , and mixed in ethanol. The obtained mixed raw material powder was calcined at 800 ° C for 2 hours in the atmosphere to prepare (BiNa)TiO 3 calcined powder.
將所準備的(BaLa)TiO3 煅燒粉與(BiNa)TiO3 煅燒粉,依成為莫耳比73:7的方式進行調配,以純水作為介質且利用球磨機施行混合、粉碎,直到混合煅燒粉的中心粒徑成為1.0 μm~2.0 μm為止,然後施行乾燥。在該混合煅燒粉 的粉碎粉中添加PVA並予以混合後,再利用造粒裝置施行造粒。將所獲得的造粒粉利用單軸壓製裝置施行成形,然後將上述成形體依700℃施行脫黏結劑後,於大氣中,依燒結溫度1290℃、1320℃、1350℃施行4小時燒結,獲得燒結體。The prepared (BaLa)TiO 3 calcined powder and the (BiNa)TiO 3 calcined powder were blended in such a manner that the molar ratio was 73:7, and pure water was used as a medium and mixed and pulverized by a ball mill until the calcined powder was mixed. The center particle diameter is 1.0 μm to 2.0 μm, and then dried. PVA was added to the pulverized powder of the mixed calcined powder and mixed, and then granulated by a granulator. The obtained granulated powder was molded by a uniaxial pressing device, and then the formed body was subjected to a debonding agent at 700 ° C, and then sintered in the atmosphere at a sintering temperature of 1290 ° C, 1320 ° C, and 1350 ° C for 4 hours. Sintered body.
將所獲得的燒結體加工成10mm×10mm×1mm的板狀,而製成試驗片,經形成歐姆電極後,將各試驗片利用電阻測定器依室溫起至270℃範圍內進行比電阻值的溫度變化測定。測定結果如表1所示。表1中,試料編號旁的「*」記號係指比較例。試料No.28的煅燒時間係1小時,試料No.29的煅燒時間係2小時,試料No.30的煅燒時間係6小時。另外,所有實施例中,電阻溫度係數係依照下式求取。α=(InR1 -InRc )×100/(T1 -Tc ),其中,R1 係最大比電阻,Rc 係Tc 下的比電阻,T1 係表示R1 的溫度,Tc係居里溫度。The obtained sintered body was processed into a plate shape of 10 mm × 10 mm × 1 mm to prepare a test piece. After forming an ohmic electrode, each test piece was subjected to a specific resistance value from room temperature to 270 ° C using a resistance measuring device. The temperature change is measured. The measurement results are shown in Table 1. In Table 1, the "*" mark next to the sample number means a comparative example. The calcination time of sample No. 28 was 1 hour, the calcination time of sample No. 29 was 2 hours, and the calcination time of sample No. 30 was 6 hours. In addition, in all of the examples, the temperature coefficient of resistance was obtained according to the following formula. α = (InR 1 - InR c ) × 100 / (T 1 - T c ), where R 1 is the maximum specific resistance, R c is the specific resistance at T c , and T 1 is the temperature of R 1 , Tc is Curie temperature.
由圖1中明顯得知,依500℃~900℃施行煅燒的(BaLa)TiO3 煅燒粉,並未完成形成(BaLa)TiO3 ,而殘留著BaCO3 與TiO2 。另一方面,得知依1000℃~1200℃施行煅燒過的(BaLa)TiO3 煅燒粉,並無BaCO3 、TiO2 的殘留,而是形成(BaLa)TiO3 的完全單相。As is apparent from Fig. 1, the (BaLa)TiO 3 calcined powder calcined at 500 ° C to 900 ° C did not complete the formation of (BaLa)TiO 3 , but remained BaCO 3 and TiO 2 . On the other hand, it was found that the (BaLa)TiO 3 calcined powder which was calcined at 1000 ° C to 1200 ° C did not contain BaCO 3 or TiO 2 but formed a completely single phase of (BaLa)TiO 3 .
再者,由表1的測定結果中得知,使用將煅燒溫度設為500℃~900℃、並在煅燒粉中殘留部分BaCO3 與TiO2 的(BaLa)TiO3 煅燒粉所製得的本發明之半導體瓷器組成物,係相較於使用將煅燒溫度設定為1000℃~1300℃、且形成(BaLa)TiO3 完全單相的煅燒粉所製得之半導體瓷器 組成物之下,前者將可獲得較高的跳躍特性,且亦抑制室溫比電阻的上升。Further, from the measurement results of Table 1, it was found that the calcined temperature was set to 500 ° C to 900 ° C, and the BaBa TiO 3 calcined powder in which BaCO 3 and TiO 2 remained in the calcined powder was used. The semiconductor porcelain composition of the invention is lower than the semiconductor porcelain composition obtained by using the calcined powder having a calcination temperature of 1000 ° C to 1300 ° C and forming a completely single phase of (BaLa)TiO 3 . A higher jump characteristic is obtained, and the rise in room temperature specific resistance is also suppressed.
除了在將實施例1所準備的(BaLa)TiO3 煅燒粉與(BiNa)TiO3 煅燒粉,依成為莫耳比73:7的方式進行調配時,改為如表2所示添加量的SiO2 與CaCO3 之外,其餘均如同實施例1的試料編號13之相同方法進行,而獲得燒結體。針對所獲得的燒結體依如同實施例1相同的方法,測定比電阻的溫度變化。測定結果係如表2所示。由表2中得知,藉由在步驟中添加Si氧化物、Ca碳酸鹽或Ca氧化物,可如同實施例1般獲得較高的跳躍特性,且亦抑制室溫比電阻的上升。In addition to Example 1 to prepare the (BaLa) TiO 3 calcined powder and (BiNa) TiO 3 calcined powder, by mole ratio became 73: 7 when formulated embodiment, instead of the addition amount shown in Table 2 SiO 2 with the addition CaCO 3, the rest were the same method as in sample No. 1 of Example 13 for the embodiment, to obtain a sintered body. The temperature change of the specific resistance was measured in the same manner as in Example 1 with respect to the obtained sintered body. The measurement results are shown in Table 2. As is apparent from Table 2, by adding Si oxide, Ca carbonate or Ca oxide in the step, higher jumping characteristics can be obtained as in Example 1, and the increase in room temperature specific resistance is also suppressed.
準備作為主原料的BaCO3 、TiO2 、及作為半導體化元素的Nb2 O5 之原料粉末,依成為Ba(Ti0.998 Nb0.002 )O3 的方式進行調配,並以純水進行混合。將所獲得的混合原料粉末依700℃~900℃在大氣中施行4小時的煅燒,而準備Ba(TiNb)O3 煅燒粉。所獲得的Ba(TiNb)O3 煅燒粉並未完全形成Ba(TiNb)O3 ,而殘留著BaCO3 與TiO2 。The raw material powder of BaCO 3 , TiO 2 , and Nb 2 O 5 as a main raw material is prepared so as to be Ba(Ti 0.998 Nb 0.002 )O 3 and mixed with pure water. The obtained mixed raw material powder was calcined in the air at 700 ° C to 900 ° C for 4 hours to prepare Ba (TiNb) O 3 calcined powder. The obtained Ba(TiNb)O 3 calcined powder did not completely form Ba(TiNb)O 3 , but remained BaCO 3 and TiO 2 .
準備Na2 CO3 、Bi2 O3 、TiO2 的原料粉末,並依成為(Bi0.5 Na0.5 )TiO3 的方式進行調配,於乙醇中進行混合。將所獲得的混合原料粉末,在800℃中於大氣中施行2小時的煅燒,而準備(BiNa)TiO3 煅燒粉。A raw material powder of Na 2 CO 3 , Bi 2 O 3 , and TiO 2 was prepared and blended so as to be (Bi 0.5 Na 0.5 )TiO 3 , and mixed in ethanol. The obtained mixed raw material powder was calcined in the air at 800 ° C for 2 hours to prepare (BiNa)TiO 3 calcined powder.
將所準備的Ba(TiNb)O3 煅燒粉與(BiNa)TiO3 煅燒粉,依 成為莫耳比73:7的方式進行調配,並依照如同實施例1相同的方法進行而獲得燒結體。將所獲得的燒結體依照如同實施例1相同的方法,測定比電阻值的溫度變化。測定結果如表3所示。The preparation of Ba (TiNb) O 3 calcined powder and (BiNa) TiO 3 calcined powder, by mole ratio became 73: 7 for the deployment of the embodiment, and in accordance with the same manner as in Example 1 to obtain a sintered body. The obtained sintered body was subjected to the same method as in Example 1 to measure the temperature change of the specific resistance value. The measurement results are shown in Table 3.
由表3的測定結果中得知,使用煅燒溫度設為700℃~900℃、且煅燒粉中殘留部分BaCO3 與TiO2 的Ba(TiNb)O3 煅燒粉所製得之本發明[(BiNa)x Ba1-x ][Ti1-z Mz ]O3 半導體瓷器組成物,將可如同實施例1的[(BiNa)x (Ba1-y Ry )1-x ]TiO3 半導體瓷器組成物,獲得較高的跳躍特性,且亦將抑制室溫比電阻的上升。From the measurement results of Table 3, it is known that the present invention [(BiNa) is obtained by using Ba(TiNb)O 3 calcined powder having a calcination temperature of 700 ° C to 900 ° C and residual BaCO 3 and TiO 2 in the calcined powder. x Ba 1-x ][Ti 1-z M z ]O 3 semiconductor porcelain composition, which can be like [(BiNa) x (Ba 1-y R y ) 1-x ]TiO 3 semiconductor porcelain of Example 1 The composition obtains a high jump characteristic and also suppresses an increase in room temperature specific resistance.
雖針對本發明參照詳細的特定實施例進行說明,惟在不脫逸本發明精神與範疇之前提下,將可進行各種變更與修正,此係熟習此技術者所明白者。While the invention has been described with respect to the specific embodiments of the embodiments of the present invention, it will be understood by those skilled in the art.
本申請案係以2006年10月27日申請的日本專利申請案(特願2006-293366)、2006年11月1日申請的日本專利申請案(特願2006-298305)為基礎,將參照其內容並爰引於本案中。This application is based on a Japanese patent application filed on Oct. 27, 2006 (Japanese Patent Application No. 2006-293366), and Japanese Patent Application No. 2006-298305 filed on Nov. 1, 2006. The content is also cited in this case.
依本發明所獲得的半導體瓷器組成物係適用作為諸如PTC熱阻器、PTC加熱器、PTC開關、溫度檢測器等的材料。The semiconductor porcelain composition obtained according to the present invention is suitable as a material such as a PTC thermistor, a PTC heater, a PTC switch, a temperature detector or the like.
圖1為本發明的(BaLa)TiO3 煅燒粉之依每個煅燒溫度的X射線繞射圖案的圖。BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a view showing an X-ray diffraction pattern of each of calcination temperatures of a (BaLa)TiO 3 calcined powder of the present invention.
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