200931377 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種時序控制器及其顯示訊號處理控制 5 Ο 10 15 ❹ 20 方法，尤指一種適用於液晶顯示面板之時序控制器及其顯 示訊號處理控制方法。 【先前技術】 液晶顯示面板（LCD )的顯示原理係藉由控制面板驅 動電壓，以控制面板内液晶電容及儲存電容之間的電場大 小，使介於其中之液晶依電場大小翻轉而控制顯示光源的 輸出。若以常白型液晶顯示面板（N〇rinaiiy white Type LCD )為例，其在背光源開啟且不給予驅動電壓使液晶保 持不翻轉狀態時，係呈現白畫面，而當給予一預定的驅動 電壓時使液晶翻轉時，晝面即呈現明暗變化。 液晶顯不面板係透過液晶電容及儲存電容在接受驅動 1壓時儲存電荷’使在液晶顯示面板之間之液晶翻轉狀態 得以保持一段時間，以使晝面持續至下一個更新的晝面， 且此時’若突然將液晶顯示面板的電源關掉，因液晶電容 與儲存電容尚需一段時間後才可將其中之電荷完全釋放， 疋故’在此段時間液晶電容與儲存電容中依然殘留電荷， 而產生潮汐現象影響畫面。 為了降低潮沙現象發生，習知的液晶顯示面板需外加 顆重設晶片（Reset IC)，以控制閘極驅動晶片（GateIC) 於關機時係處於導通狀態，藉此加速面板内液晶電容與儲 5 200931377 200931377 5 ❹ 10 15 ❹ 20 存電容之殘留電荷放電速度，以縮短潮汐現象出現的時 間。然而，使用重設晶片面臨下列數點缺失：一、需慎選 重設晶片之動作電壓規格。若重設晶片之動作電壓太小，、 則無法供給閘極驅動晶片導通時所需的電壓，而若選擇動 作電壓接近液晶顯示面板輸入電壓（Vin )的重設晶片，其 當輸入電壓遭受雜訊影響時，亦可能使重設晶片判斷錯誤 而產生誤動作。二、必須使用具有使所有閘極驅動晶片曰同 時導通功能的重設晶片。三、使用重設晶片將增加成本。 【發明内容】 本發明提供一種時序控制器’其係接收複數個外部訊 號，並經由複數個資料驅動器傳送複數個畫面顯示資料至 一液晶顯示面板，此時序控制器包括一資料接收單元、— 資料：測單元、一資料輸出單元、一低驅動晝面顯示資料 產生早7L、一處理單元及一資料傳送單元。資料接收單元 接收外。Ρ Λ號，資料偵測單元電性連接資料接收單元，且 :接收並偵測外部訊號；資料輸出單元電性連接資料偵測 單7L ’且在資料彳貞測單元彳貞測到外部訊號時，根據外部訊 號產生晝面顯示資料；低驅動畫面顯示資料產生單元電性 連接資料㈣單元，且在資料❹1單元㈣外部訊號為指 不關機時’產生-低驅動晝面顯示資料；處理單元電性 接資料輸出單S及低驅動顯示資料產生單元，且其控制主 面顯示資料及低驅動晝面顯示資料之輸出；資料傳送單: 6 200931377 電性連接處理單元及資料驅動器， 及低驅動晝面顯示資料至資料顧動器 畫面顯示資料 係運^發明亦提供—種顯示訊號處理控制方法，豆 5 Ο 10 15 ❹ 傳送=1=制：，時序控制器接收-外部訊號，： J逆複數個畫面顯不資料至複數個資 括下列步驟：偵測外部訊號之訊心㈣:此方法包 終止時間大於或等於-預定時間時:、傳送:低 不資料至資料驅動器。 &驅動旦面顯 於-=?供:Γ示訊號處理控制方法，其係運用 數侗圭工0控制器接收一外部訊號，並傳送複 =個至面顯示資料至複數個資料驅動器，此方法包括 =驟]貞測外部訊號之電壓；以及當電壓小於或等於一預 疋電：時’傳送一低驅動畫面顯示資料至資料驅動器。 =本發明—較佳實施例當中’資料偵測單元制貞測外 ，電壓值’然而在另一較佳實施例當中，其係谓測 外部訊號之訊號終止時間。 、“、/、 繼而’本發明係則貞測到之電壓值小H等於一 止為一實施態樣，然其則貞測到之訊號終 ^間大於或#於一預定時間作為關機指示為其較佳實施 其次，在本發明中’上述低驅動晝面顯示資料可為— 白晝面顯示資料或黑晝面顯示資料，其係以本發明應用之 液晶顯不裝置在液晶低驅動狀態時所顯示之畫面顏色為 20 200931377 準，而低驅動畫面顯示資料係為使資料驅動器傳送低驅動 電壓至液晶顯示面板之液晶，以使液晶不翻轉。 5 ❹ 10 15 ❹ 是故透過上述手法，本發明係藉由時序控制器债測 入之外部訊號以判斷是否進行關機，俾在關機時先送出低 驅動畫面顯示資料至液晶顯示面板，以使液晶顯示面板之 液晶電容及儲存電容放電速度增加，並脑殘存電荷放電 時間’以降低潮汐現象之產生。 【實施方式】 首先’請參考圖！本發明一較佳實施例之時序控制器方 塊圖’時序控制器i健收複數個外部訊號，# :顺⑽ —Μ:)、V|n等’並控制複數個資料驅動&與複數個掃描 驅動器3之工作時脈，以經由資料驅動器2 送複數個畫面顯示㈣至—液晶顯示⑩未示/ 俾供液晶顯示面板顯示晝面。 极如Γ中所不，時序控制器1包括··資料接收單元1卜% =測早兀12、低驅動畫面顯示資料產生單元13、資料麯 早7014、處理單元15及資料傳送單元16。 出單Hi貞測單元12係電性連接㈣接收單元11，資料輸 與低驅動晝面顯示轉產生單切皆電性連接資 低驅= 處理單元15係電性連接諸輸出單元14及 接虚料產生單元13 ’而f料傳送單元16係電性連 王早元15、資料驅動器2及複數個掃描驅動器3。 20 200931377 • 另請一併參考圖2、圖3,圖2顯示本實施例之顯示訊號 處理控制流程圖，圖3顯示本實施例之控制時脈示意圖。當 時序控制器1正常操作（步驟240 )之後，資料偵測單元j 2 接收外部訊號之Vin電壓值，而資料接收單元n接收外部訊 5號之DE訊號，並將之傳送至資料偵測單元12 (步驟21〇)， 在一實施例中，資料接收單元u係為低電壓差動訊號（ Voltage Differential Signal，LVDS)介面，然於其他實施例 中’資料接收單元11可為低擺幅差動訊號（ReducedSwing ❹ Differential Signal，RSDS)介面。 10 繼而，資料偵測單元12偵測外部訊號是否存在（步驟 220 )，當資料偵測單元丨2偵測到外部訊號存在時，資料輸 出單元14係根據外部訊號產生STH ( s〇urce IC Stan pulse， 水平起始脈衝）、LP( Source IC Latch Pulse，源極問鎖脈200931377 IX. Description of the Invention: [Technical Field] The present invention relates to a timing controller and a display signal processing control thereof 5 Ο 10 15 ❹ 20 method, in particular to a timing controller suitable for a liquid crystal display panel and display thereof Signal processing control method. [Prior Art] The display principle of the liquid crystal display panel (LCD) is to control the display voltage by controlling the voltage of the panel to control the electric field between the liquid crystal capacitor and the storage capacitor in the panel, so that the liquid crystal in between is inverted according to the electric field size. Output. Taking a normally white liquid crystal display panel (N〇rinaiiy white Type LCD) as an example, when the backlight is turned on and the driving voltage is not given to keep the liquid crystal in a non-overlapping state, a white screen is presented, and when a predetermined driving voltage is given. When the liquid crystal is turned over, the face is bright and dark. The liquid crystal display panel is configured to store the charge when the drive 1 voltage is transmitted through the liquid crystal capacitor and the storage capacitor, so that the liquid crystal flip state between the liquid crystal display panels is maintained for a period of time, so that the kneading surface continues to the next updated kneading surface, and At this time, if the power of the liquid crystal display panel is suddenly turned off, it is necessary for the liquid crystal capacitor and the storage capacitor to be completely discharged after a certain period of time, so that the liquid crystal capacitor and the storage capacitor still have a residual charge during this period. And the tidal phenomenon affects the picture. In order to reduce the occurrence of tidal sand, the conventional liquid crystal display panel needs to be additionally provided with a reset chip to control the gate driving chip (GateIC) to be in a conducting state when the power is turned off, thereby accelerating the liquid crystal capacitance and storage in the panel. 5 200931377 200931377 5 ❹ 10 15 ❹ 20 The residual charge discharge speed of the capacitor is used to shorten the time when the tide appears. However, the use of reset chips faces the following missing points: 1. Care must be taken to reset the operating voltage specifications of the wafer. If the operating voltage of the reset wafer is too small, the voltage required for the gate driving wafer to be turned on cannot be supplied, and if the resetting wafer whose operating voltage is close to the input voltage (Vin) of the liquid crystal display panel is selected, the input voltage is subjected to miscellaneous When the signal is affected, it can also cause the reset chip to judge the error and cause a malfunction. Second, it is necessary to use a reset wafer having the same turn-on function for all gate-driven wafers. Third, the use of reset wafers will increase costs. SUMMARY OF THE INVENTION The present invention provides a timing controller that receives a plurality of external signals and transmits a plurality of picture display materials to a liquid crystal display panel via a plurality of data drivers. The timing controller includes a data receiving unit, and data. The measuring unit, the data output unit, the low-display side display data generation 7L, a processing unit and a data transmission unit. The data receiving unit receives the outside. Ρ Λ, the data detection unit is electrically connected to the data receiving unit, and: receives and detects the external signal; the data output unit is electrically connected to the data detection unit 7L′ and when the data detection unit detects the external signal The data is generated according to the external signal; the low-drive screen displays the data generation unit electrically connected to the data (4) unit, and the data is generated when the external signal of the data unit 1 (4) is not turned off; the processing unit is generated. The data output unit S and the low-drive display data generating unit are controlled, and the main display data and the output of the low-drive display data are controlled; the data transmission sheet: 6 200931377 electrical connection processing unit and data driver, and low drive 昼Surface display data to data driver screen display data system operation ^ invention also provides - display signal processing control method, bean 5 Ο 10 15 ❹ transmission = 1 = system:, timing controller receives - external signal,: J inverse complex The screen displays no data to the following steps: detecting the signal of the external signal (4): the method packet termination time is greater than or equal to - the predetermined time :, Transmission: lower, not data to the data drive. & drive surface is displayed in -=? for: signal processing control method, which uses a number of 侗 工 0 controller to receive an external signal, and send complex = face to display data to a plurality of data drives, this The method includes: detecting the voltage of the external signal; and transmitting a low-drive screen display data to the data driver when the voltage is less than or equal to a pre-charge: = The present invention - in the preferred embodiment - the data detecting unit makes the voltage value. However, in another preferred embodiment, it is the signal end time of the external signal. , ", /, and then 'the invention system 贞 measured voltage value is small H is equal to one is an implementation, but it is detected that the signal is greater than or # a predetermined time as a shutdown indicator for its comparison Preferably, in the present invention, the above-mentioned low-drive surface display data may be - white surface display data or black surface display data, which is displayed when the liquid crystal display device of the present invention is in a liquid crystal low driving state. The screen color is 20 200931377, and the low-drive screen display data is for the data driver to transmit a low driving voltage to the liquid crystal of the liquid crystal display panel so that the liquid crystal does not flip. 5 ❹ 10 15 ❹ Therefore, the present invention borrows the above method. The external signal measured by the timing controller is used to determine whether to shut down, and when the power is turned off, the low-drive screen display data is sent to the liquid crystal display panel to increase the discharge speed of the liquid crystal capacitor and the storage capacitor of the liquid crystal display panel, and the brain remains. The charge discharge time 'to reduce the occurrence of tidal phenomena. [Embodiment] First, please refer to the figure! The timing of a preferred embodiment of the present invention The controller block diagram 'the timing controller i is a plurality of external signals, #: 顺(10) - Μ:), V|n, etc. and controls a plurality of data drives & and a plurality of scan drivers 3 working clocks, Send a plurality of screen displays via the data driver 2 (4) to - the liquid crystal display 10 is not shown / 俾 for the liquid crystal display panel to display the surface. As in the case, the timing controller 1 includes the data receiving unit 1% = early detection兀12, low-drive screen display data generating unit 13, data track 7014, processing unit 15 and data transfer unit 16. The ordering unit 12 is electrically connected (4) receiving unit 11, data input and low-drive display The switch unit 15 is electrically connected to the output unit 14 and the dummy material generating unit 13', and the f material transfer unit 16 is electrically connected to the Wang early element 15, the data driver 2 and the plurality of Scan driver 3. 20 200931377 • Please refer to FIG. 2 and FIG. 3 together, FIG. 2 shows the display signal processing control flow chart of this embodiment, and FIG. 3 shows the control clock mode of the embodiment. When the timing controller 1 is normal Operation (step 240) After that, the data detecting unit j 2 receives the Vin voltage value of the external signal, and the data receiving unit n receives the external signal No. 5 DE signal and transmits it to the data detecting unit 12 (step 21〇), in an embodiment. The data receiving unit u is a low voltage differential signal (LVDS) interface. However, in other embodiments, the data receiving unit 11 can be a Reduced Swinging Differential Signal (RSDS) interface. 10, the data detecting unit 12 detects whether the external signal exists (step 220). When the data detecting unit 侦测2 detects the presence of the external signal, the data output unit 14 generates the STH according to the external signal (s〇urce IC). Stan pulse, horizontal start pulse), LP (Source IC Latch Pulse)
衝）、CPV (Gate IC Clock Signal，閘極時序信號）、〇E 15 ( Gate IC Output Enable，閘極輸出致能）等晝面顯示訊 號，俾供經由資料驅動器2輸出至液晶顯示面板顯示（步驟 _ 230 ) 〇 首先係產生CPV訊號及OE訊號以使掃描驅動器3驅動 液晶顯示面板之開關元件（圖中未示），接續地產生sth 20 訊號，以使資料驅動器2開始接收來自時序控制器丨輸出之 顯示資料，且在DE訊號為高電位時，判斷外部訊號係為有 效資料’資料驅動器2並將接收到的顯示資料儲存於其内之 暫存單元（圖中未示）中’以在LP訊號產生脈波時，將所 9 200931377 儲存之顯示資料轉換為類比電壓訊號以駆動液晶顯示面 板。 5 ❹ 10 15 ❹ -另-方面，資料偵測單元12亦判斷外部訊號是否為^ 不關機（步驟250 )，在本實施例中，其係以偵測到之/ 電壓值小於或等於-預定電壓^作為關機指示。 然而’當資料偵測單元12偵測到外部訊號為指示關機 時’低驅動畫面顯示資料產生單元13係產生一低驅動晝面 顯示資料（步驟26〇)，以使資料驅動器2傳送一低艇動電 壓至液晶顯示面板之液晶，#此控制液晶顯示面板之電場 降至最低、液晶驅動電壓最小、且液晶電容與保持電容儲 存電荷最低而使液晶不翻轉，以使液晶顯示面板關機後之 液晶放電速度加快而減少液晶放電所需時間，而避免關機 潮沙現象之產生。在本實施例中，低驅動畫面顯示資料係 為一白畫面顯示資料，然於其他實施例當中，低驅動晝面 顯示資料亦可為一黑畫面顯示資料。 處理單元15係接收來自資料輸出單元14之晝面顯示資 料及來自低驅動晝面顯示資料產生單元13之低驅動晝面顯 示資料，並且控制晝面顯示資料及低驅動畫面顯示資料對 資料傳送單元16之輸出（步驟270)，在本實施例申，當其 接收到低驅動畫面顯示資料時，其停止晝面顯示資料之輸 出，並切換輸出低驅動畫面顯示資料至資料傳送單元Μ。 資料傳送單元16係接收來自處理單元15之晝面顯示資 料及低驅動畫©顯示諸，並將之傳送至資料驅動器2。 20 200931377 5 ❹ 10 15 ❹ 20 α併參考圖卜圖4及圖5以瞭解本發明另一較佳實施 例，圖4係此實施例之顯示訊號處理控制流程圖，圖$顯示 圖4實施例之控制時脈示意圖。簡單地說，本實施例與上一 實施例主要差異係為其偵測外部訊號之訊號終止時間，並 以谓測到之訊號終止時間大於一預定時間作為關機指示。 一如圖中所示，當時序控制器1正常操作之後，資料接收 = 接收外部訊號之DE訊號（步驟41〇)，並將之傳送至 資料偵測單元12 ’以由資料偵測單元12判斷D E訊號之號線 止時間是否大於一預定時間（步驟42〇)，在本實施例中： ^貝定時間係為DE訊號週期之若干倍數，’然於其他實施例 定時間亦可為零，即，Μ訊號一終止輸入即判斷 马關機。 當判斷訊號終止時間小於預定時間時，資料輸出翠元 亚輸出晝面顯示資料’俾供經由資料驅動器2輸出至 於曰曰^不面板顯不（步驟43()) ’然而，當訊號終止時 於或4於預定時間時，低 產生-低驅動晝面顯示;:動牛畫二顯示資料產生單元_ 時產生潮沙現象。 〃驟物），以達到避免關機 厂、資斜^本實施例中，畲處理單元15接收到低驅動畫面顯:書二I:晝面顯示資料之輸出，並切換輸出低驅 動1面顯不資料至資料值 — 傳送單元⑽來自處==(步細)’以由資料 面顯示資料傳送至資c顯示資料及低媒動* 11 200931377 . 疋故，從上述可以得知，本發明係透過時序控制器债 測輸入之外部訊號以判斷是否關機，俾在關機時先送出低 驅動畫面顯示資料至液晶顯示面板，以使液晶顯示面板之 液晶電容及儲存電容放電速度增加，並縮短殘存電荷放電 5 時間’以降低潮汐現象之產生。 上述實施例僅係為了方便說明而舉例而已，本發明所 主張之權利範圍自應以申請專利範圍所述為準，而非僅限 於上述實施例。 ❹ 10 【圖式簡單說明】 圖1係本發明一較佳實施例之時序控制器方塊圖。 圖2係圖1實施例之一顯示訊號處理控制流程圖。 圖3係圖1實施例之一控制時脈示意圖。 圖4係本發明另一較佳實施例之顯示訊號處理控制流程圖。 15 圖5係圖4實施例之控制時脈示意圖。 〇 【主要元件符號說明】 時序控制器1 資料驅動器2 掃描驅動器3 資料接收單元11資料偵測單元12資料輸出單元14 處理單元15 資料傳送單元16 低驅動晝面顯示資料產生單元j 3 步驟 210,220,230,240,250,260,270,280 步驟 410,420,430,440,450,460 12冲), CPV (Gate IC Clock Signal), 〇E 15 (Gate Output Output), etc., for output to the LCD panel via data driver 2 ( Step _ 230) 〇 Firstly, a CPV signal and an OE signal are generated to cause the scan driver 3 to drive a switching element (not shown) of the liquid crystal display panel, and then generate a sth 20 signal to enable the data driver 2 to start receiving from the timing controller.丨 output display data, and when the DE signal is high, it is judged that the external signal is the valid data 'data drive 2 and the received display data is stored in the temporary storage unit (not shown) When the pulse signal is generated by the LP signal, the display data stored in the 9 200931377 is converted into an analog voltage signal to shake the liquid crystal display panel. 5 ❹ 10 15 ❹ - In addition, the data detecting unit 12 also determines whether the external signal is not turned off (step 250). In this embodiment, the detected/voltage value is less than or equal to - predetermined The voltage ^ is used as a shutdown indicator. However, when the data detecting unit 12 detects that the external signal is indicating shutdown, the low-drive screen display data generating unit 13 generates a low-drive display data (step 26〇) to cause the data driver 2 to transmit a low boat. Dynamic voltage to the liquid crystal of the liquid crystal display panel, # this control liquid crystal display panel, the electric field is minimized, the liquid crystal driving voltage is the smallest, and the liquid crystal capacitor and the holding capacitor store the lowest charge, so that the liquid crystal does not flip, so that the liquid crystal display panel is turned off after the liquid crystal The discharge speed is increased to reduce the time required for liquid crystal discharge, and the phenomenon of shutdown and tidal sand is avoided. In this embodiment, the low-drive screen display data is a white screen display data. However, in other embodiments, the low-drive display data may also display data on a black screen. The processing unit 15 receives the face display data from the data output unit 14 and the low drive face display data from the low drive face display data generating unit 13, and controls the face display data and the low drive screen display data pair data transfer unit. The output of 16 (step 270), in the embodiment, when it receives the low-drive screen display data, it stops the output of the display data, and switches the output of the low-drive screen display data to the data transfer unit. The data transfer unit 16 receives the display information from the processing unit 15 and the low drive picture © and transmits it to the data drive 2. 20 200931377 5 ❹ 10 15 ❹ 20 α and referring to FIG. 4 and FIG. 5 to understand another preferred embodiment of the present invention, FIG. 4 is a flowchart of control signal processing control of the embodiment, and FIG. The control clock diagram. Briefly, the main difference between the present embodiment and the previous embodiment is that it detects the signal termination time of the external signal, and uses the measured signal termination time to be greater than a predetermined time as the shutdown indication. As shown in the figure, after the timing controller 1 is normally operated, the data reception = receiving the DE signal of the external signal (step 41〇), and transmitting it to the data detecting unit 12' for judging by the data detecting unit 12 Whether the line stop time of the DE signal is greater than a predetermined time (step 42〇), in this embodiment: the beiding time is a multiple of the DE signal period, and the other embodiments may also be zero. That is, the signal is judged to be shut down as soon as the signal is terminated. When the judgment signal termination time is less than the predetermined time, the data output Cui Yuanya output side display data '俾 for output via the data driver 2 to the 曰曰^ no panel display (step 43 ()) ' However, when the signal is terminated Or 4 at a predetermined time, the low-production-low-drive kneading surface display; the tidal sand phenomenon occurs when the zebu painting 2 displays the data generating unit _. 〃 物 ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) ) Data to data value - the transmission unit (10) from the location == (steps)' to transmit data from the data surface to the information display and low media* 11 200931377 . Therefore, as can be seen from the above, the present invention is The timing controller inputs the external signal to determine whether to turn off the power. When the power is turned off, the low-drive screen display data is sent to the liquid crystal display panel to increase the discharge speed of the liquid crystal capacitor and the storage capacitor of the liquid crystal display panel, and shorten the residual charge discharge. 5 time 'to reduce the occurrence of tides. The above-described embodiments are merely examples for the convenience of the description, and the scope of the claims is intended to be limited by the scope of the claims. ❹ 10 BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of a timing controller in accordance with a preferred embodiment of the present invention. 2 is a flow chart showing the control of the signal processing in one of the embodiments of FIG. 1. FIG. 3 is a schematic diagram of a control clock of one embodiment of FIG. 1. FIG. 4 is a flow chart showing control of display signal processing in accordance with another preferred embodiment of the present invention. 15 is a schematic diagram of the control clock of the embodiment of FIG. 4. 〇[Main component symbol description] Timing controller 1 Data driver 2 Scan driver 3 Data receiving unit 11 Data detecting unit 12 Data output unit 14 Processing unit 15 Data transfer unit 16 Low-drive side display data generating unit j 3 Steps 210, 220, 230, 240, 250, 260, 270, 280 410,420,430,440,450,460 12