TW200926931A - Method for fabricating printed circuit board - Google Patents

Method for fabricating printed circuit board Download PDF

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Publication number
TW200926931A
TW200926931A TW96148010A TW96148010A TW200926931A TW 200926931 A TW200926931 A TW 200926931A TW 96148010 A TW96148010 A TW 96148010A TW 96148010 A TW96148010 A TW 96148010A TW 200926931 A TW200926931 A TW 200926931A
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Taiwan
Prior art keywords
printed circuit
circuit board
copper
conductive
layer
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TW96148010A
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Chinese (zh)
Inventor
Chih-Wen Chao
Original Assignee
Dynamic Electronics Co Ltd
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Publication date
Application filed by Dynamic Electronics Co Ltd filed Critical Dynamic Electronics Co Ltd
Priority to TW96148010A priority Critical patent/TW200926931A/en
Publication of TW200926931A publication Critical patent/TW200926931A/en

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Abstract

A method for fabricating printed circuit board is provided. First, a copper clad laminate is provided. The copper clad laminate includes a substrate and a copper foil located on a surface of the substrate. The copper clad laminate is patterned to form a patterning region exposing the surface of the substrate. Then, the copper clad laminate is soaked into a solution to form a conducting polymer layer on the patterning region. After that, an electroplating copper layer is formed on the conducting polymer layer and the copper through an electroplating process. The conducting polymer and the electroplating copper layer located thereon are patterned to form an electrical circuit.

Description

200926931 九、發明說明: . 【發明所屬之技術領域】 本發明是有關於一種積層板及其製作方法,且特別是 有關於一種印刷電路板及其製作方法。 【先前技術】 印刷電路板的應用與製程發展至今已有數十年之歷 〇 < °伴隨著各種新型電子產品之開發,印刷電路板的使用 亦越趨廣泛。 伴隨著印刷電路板的大量使用’世界各國亦開始針對 印刷電路板的製程提出不同環保法規上之要求。此外,在 不同的應用領域,通常亦存在不同印刷電路板製程之要 H應運前述錢領域與法規上的要求,騎各種不同 的印刷電路板製程已成為目前業界努力的方向之一。 ❹ 【發明内容】 本發明實施例提出一種印刷電路板製作方法。 根據本發明-實施例,提出一種印刷電路板的製作方 法。首先,提供-覆銅積層板,此覆銅積層板包含基材盘 7基材表面之㈣。接著,圖案化銅落,以於覆銅積層 板上形成圖案化區域’此圖案化區域曝露出基材。之後, :覆銅積層板浸泡於溶液令’以於圖案化區域上形成導電 電铲鈉二”〜電阿分子層與銅箔的表面電鍍形成 電鑛銅層。取後’圖案化導電高分子層與導電高分子層上 5 200926931 的電鍍銅層,以形成導電線路。 根據本發明另一實施例,接 , ^ J 徒出一種印刷電路板。此印 刷電路板包含基材、導雷古八2 η 工私^ 導電冋分子層舆導電線路。導電高分 層位於基材之部份表面, 古 a ^ ^ 等電网刀子層主要係由聚二 乳乙烯噻吻構成。導電線路位於導電高分子層上。 本發明上述實施例所述之印刷電路板及其製作方法, ❻ 可減少貴重金屬的使m降低㈣成本,同時亦可避 免貴重金屬污染的情形產生。 【實施方式】 第卜4圖係緣示依照本發明一實施例所述之一種印刷 電路板製作方法之剖面結構示意圖。請參考第1圖,首先 提供一覆銅積層板110。覆銅積層板uo包含基材112與位 於基材112表面之銅箔11扣基材112可為任何可行之印刷 電路板基材,例如常見之藉由將玻纖浸泡於樹脂組成物而 . 製成之硬板基材。 接著,可進一步對覆銅積層板110中的銅箔ιΐ4進行 圖案化製程,以在覆銅積層板110上形成至少一個圖案Z 區域116。其中,圖案化區域116曝露出覆銅積層板11〇之 基材112。上述之圖案化製程可採用任何可行的製程,例如 先在覆銅積層板上塗佈感光性之油墨(未繪示),接著再 以曝光、顯影步驟搭配銅箱m蝕刻步驟,形成前述之圖 案化區域116。 在進行前述圖案化步驟前,覆銅積層板亦可進^ 6 200926931 電路板製程中常見之鑽孔步驟,以形成多個通孔(未繪示)。 上述之鑽孔步驟為電路板製程中常見之步驟,在此不加贅 述。 接著’請參考第2圖,在圖案化區域116上形成導電 高分子層120。其中,構成導電高分子層120的主要材料可 為聚二氧乙烯噻吩。導電高分子層120的形成步驟可包含 依序將覆銅積層板110浸泡於包含高錳酸鉀之第一溶液與 0 包含二氧乙烯噻吩單體之第二溶液。 形成前述導電高分子層120之具體化學反應如下所 述。圖案化區域116中所曝露之基材112之樹脂可與第一 溶液中的高錳酸鉀進行反應,高錳酸鉀於反應後形成二氧 化錳並沉積於圖案化區域116中(未繪示)。在進行前述之反 應時,第一溶液的pH值可控制在6 8〜7 5,以獲得適當厚 度之-氧化錢沉積物。 —接著,在第二溶液令,圖案化區域116中所沉積之二 ❹ 氧化錳進一步催化第二溶液中的二氧乙烯噻吩單體聚合成 聚—氧乙烯嗟吩。聚二氧乙稀嗟吩沉積於圖案化區域叫 中形成導電南分子層12〇。 前述之導電高分子層120形成步驟亦可更包含多道水 洗之步驟’例如在形成二氧化猛沉積物後,可進行多次水 洗之步驟以去除殘除之第一、、交你.—〜上、w 弟冷液,在形成聚二氧乙烯噻吩 後,亦可通過水洗之步驟去除第二溶液。 =考第3圖’導電高分子層m形成後,將具有導 网刀I 12G的覆銅積層板m置於電鍛槽中進行電 7 200926931 鐘。藉由電鍍之步驟,可於導電高分子層12〇與銅箔l14 上分別形成電鍍銅層13〇a與電鍍銅層l3〇lv電鍍銅層n〇a 與130b的厚度約為0.2~0·5毫英对(mili inch ; mil),可用 以製作印刷電路板中的導電線路。200926931 IX. Description of the Invention: 1. Field of the Invention The present invention relates to a laminated board and a method of fabricating the same, and more particularly to a printed circuit board and a method of fabricating the same. [Prior Art] The application and process of printed circuit boards have been developed for decades. 伴随 With the development of various new electronic products, the use of printed circuit boards has become more widespread. Along with the extensive use of printed circuit boards, countries around the world have also begun to impose different environmental regulations on the manufacturing process of printed circuit boards. In addition, in different application fields, there are usually different printed circuit board processes. H should be in the aforementioned money field and regulatory requirements. It has become one of the current efforts of the industry to ride a variety of different printed circuit board processes. ❹ SUMMARY OF THE INVENTION Embodiments of the present invention provide a method of fabricating a printed circuit board. In accordance with the present invention, an embodiment of a method of fabricating a printed circuit board is presented. First, a copper clad laminate is provided, which comprises (4) the surface of the substrate of the substrate disc 7. Next, the copper is patterned to form a patterned region on the copper clad laminate. This patterned region exposes the substrate. After that, the copper-clad laminate is immersed in a solution to form a conductive electric shovel sodium on the patterned region. The electro-molecule layer and the surface of the copper foil are electroplated to form an electro-boring copper layer. The layer and the electroplated copper layer on the conductive polymer layer 5 200926931 to form a conductive line. According to another embodiment of the present invention, a printed circuit board is included. The printed circuit board comprises a substrate and a guide 2 η 私 ^ ^ Conductive 冋 molecular layer 舆 conductive line. Conductive high stratification is located on part of the surface of the substrate, the ancient a ^ ^ and other power grid knife layer is mainly composed of polydivinyl thiophene kiss. Conductive line is located in high conductivity On the molecular layer, the printed circuit board and the manufacturing method thereof according to the above embodiments of the present invention can reduce the cost of the precious metal by m (four), and can also avoid the occurrence of precious metal pollution. [Embodiment] BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic view showing a cross-sectional structure of a method for fabricating a printed circuit board according to an embodiment of the present invention. Referring to FIG. 1, a copper clad laminate 110 is first provided. The copper clad laminate uo includes The material 112 and the copper foil 11 on the surface of the substrate 112 can be any feasible printed circuit board substrate, such as a hard board substrate which is usually made by immersing the glass fiber in a resin composition. Next, the copper foil ITO 4 in the copper clad laminate 110 may be further subjected to a patterning process to form at least one pattern Z region 116 on the copper clad laminate 110. wherein the patterned region 116 exposes the copper clad laminate 11 The substrate 112. The above-mentioned patterning process can adopt any feasible process, for example, coating a photosensitive ink (not shown) on the copper-clad laminate, and then using an exposure and development step with a copper box m etching step. Forming the aforementioned patterned region 116. Before performing the foregoing patterning step, the copper clad laminate may also be subjected to a drilling step which is common in the circuit manufacturing process of the 200926931 circuit to form a plurality of through holes (not shown). The drilling step is a common step in the circuit board process, and will not be described herein. Next, please refer to FIG. 2 to form a conductive polymer layer 120 on the patterned region 116. The conductive polymer layer 120 is formed. The material may be a polyoxyethylene thiophene. The step of forming the conductive polymer layer 120 may include sequentially immersing the copper clad laminate 110 in a first solution containing potassium permanganate and 0 containing a monomer comprising dioxyethylene thiophene. The specific chemical reaction for forming the foregoing conductive polymer layer 120 is as follows: the resin of the substrate 112 exposed in the patterned region 116 can be reacted with potassium permanganate in the first solution, and potassium permanganate After the reaction, manganese dioxide is formed and deposited in the patterned region 116 (not shown). When the foregoing reaction is carried out, the pH of the first solution can be controlled at 6 8 to 7 5 to obtain an appropriate thickness - oxidation money Deposits. - Next, in the second solution, the manganese dioxide deposited in the patterned region 116 further catalyzes the polymerization of the dioxyethylene thiophene monomer in the second solution to polyoxyethylene porphin. Polyoxyethylene porphin is deposited in the patterned region to form a conductive south molecular layer 12〇. The step of forming the conductive polymer layer 120 may further comprise a plurality of steps of water washing. For example, after the formation of the oxidized fissure deposit, the step of washing multiple times may be performed to remove the first residue, and the same. After the formation of the polyoxyethylene thiophene, the second solution may be removed by a water washing step. = Test Figure 3 After the formation of the conductive polymer layer m, the copper clad laminate m having the wire guide I 12G was placed in an electric forging tank for electricity 7 200926931. The electroplated copper layer 13〇a and the electroplated copper layer l3〇lv electroplated copper layers n〇a and 130b are respectively formed on the conductive polymer layer 12〇 and the copper foil l14 by a plating step of about 0.2~0· 5 milli-pairs (mili inch; mil) can be used to make conductive traces in printed circuit boards.

相較於傳統印刷電路板之化學鍍銅步驟(利用鈀與銅 的氧化還原反應形成電鍍銅層)’本發明上述實施例所述的 電鍍銅層形成步驟可減少貴重金屬(鈀)的使用,藉此降低製 作成本,同時亦可避免貴重金屬污染的情形產生。此外, 藉由上述電鍍鋼層製作步驟,所製成之電鍍銅層的厚度可 小於0.5 mil,對於後續細線寬之導電線路的製程中的蝕刻 步驟亦有所助益。 請參考第4圖,上述導電高分子層12〇與電鍍銅層u〇a 可進一步進行圖案化,以形成導電線路。圖案化的方式如 前所述,可藉由曝光、顯影與蝕刻之步驟完成,在此不加 贅述。藉由上述厚度小於0·5 mil之電鍍銅層,可蝕刻出最 小導線間距與最小導線線寬達2mU之導電線路。 上述之導電線路製作完成後,可進行後續之印刷電路 板製程如綠色防焊漆的形成、金屬接點之形成及電路板 型步驟。防焊漆、金屬接點形成與電路板成型步驟 刷電路板常見之製程步驟,在此不加贅述。 雖然本發明已以實施例揭露如上,然其並非用以p 本發明,任何熟胃此技藝者,在不脫離本發明之 ^ ,内:當可作各種之更動與_,因此本發明之保護範= §視後附之申晴專利範圍所界定者為準。 200926931 【圖式簡單說明】 為讓本發明之上述和其他目的、特徵、優點與實施例 月匕更明顯易僅’所附圖式之詳細說明如下: 第1〜4圖係繪示依照本發明一實施例所述之一種印刷 電路板製作方法之剖面結構示意圖。 導電高分子層 【主要元件符號說明】 110 :覆銅積層板 114 :銅箱 120 :逡赍合,v a 112 :基材 116 :圖案化區域 13 0a、130b :電鑛銅層Compared with the conventional electroplating step of a conventional printed circuit board (using a redox reaction of palladium and copper to form an electroplated copper layer) 'the electroplated copper layer forming step of the above embodiment of the present invention can reduce the use of precious metal (palladium), This reduces the cost of production and also avoids the occurrence of precious metal contamination. In addition, the electroplated copper layer can be made to have a thickness of less than 0.5 mil by the galvanized steel layer fabrication step, which is also beneficial for the etching step in the subsequent process of thin line width conductive lines. Referring to FIG. 4, the conductive polymer layer 12A and the copper plating layer u〇a may be further patterned to form a conductive line. The patterning method can be accomplished by the steps of exposure, development and etching as described above, and will not be described herein. By the above-mentioned electroplated copper layer having a thickness of less than 0.5 mil, a conductive line having a minimum wire pitch and a minimum wire width of 2 mU can be etched. After the above-mentioned conductive circuit is completed, subsequent printing circuit board processes such as formation of green solder resist, formation of metal contacts, and circuit board type steps can be performed. Solder Mask, Metal Contact Formation and Board Forming Procedures The common process steps for brush boards are not mentioned here. Although the present invention has been disclosed in the above embodiments, it is not intended to be used in the present invention, and the skilled in the art can be used in various embodiments without departing from the invention. Fan = § As defined in the scope of the Shenqing patent attached to the latter. BRIEF DESCRIPTION OF THE DRAWINGS [0009] The above and other objects, features, advantages and embodiments of the present invention will become more apparent and obvious. The detailed description of the drawings is as follows: Figures 1 to 4 are diagrams in accordance with the present invention. A schematic cross-sectional view of a method of fabricating a printed circuit board according to an embodiment. Conductive polymer layer [Description of main components] 110: Copper-clad laminate 114: Copper box 120: 逡赍, v a 112 : Substrate 116: Patterned area 13 0a, 130b: Electro-mineral copper layer

Claims (1)

200926931 十、申請專利範圍: 1. 一種印刷電路板的製作方法,至少包含: 提供一覆銅積層板’該覆銅積層板包含一基材與位於 該基材表面之一銅羯; 圖案化該銅箔’以於該覆銅積層板上形成至少—圖案 化區域’其中該圖案化區域曝露出該基材; 次泡該覆銅積層板於至少一溶液中,以於該些圖案化 區域上形成一導電高分子層; 電鍍形成一電鍍銅層於該導電高分子層與該銅箔之表 面;以及 圖案化該導電高分子層與該導電高分子層上之該電鍍 銅層’以形成一導電線路。 2. 如申請專利範圍第丨項所述之印刷電路板的製作方 法,其中該導電高分子層主要係由聚二氧乙稀嘆吩所組成。 3. 如申請專利範圍第2項所述之印刷電路板的製作方 法’其中形成該導電局分子層的方式包含: 浸泡該覆銅積層板於一第一溶液中,該第一溶液包含 一高錳酸鉀,以於該圖案化區域反應形成二氧化錳沉積; 以及 ' 浸泡該覆銅積層板於一第二溶液中,其中該第二溶液 中包含二氧乙烯噻吩單體,以透過該二氧化錳之催化於該 圖案化區域聚合形成該聚二氧乙烯D塞吩。 200926931 • 、4.如巾請專利範圍第3項所述之印刷電路板的製作 法,其中該第—溶液的pH值約為6.8〜7.5。 、5_ *申請專利範圍帛1項料之印刷電路板的製作方 去,、中該電鍍銅層的厚度約為〇 2〜〇 5毫英口寸。 ❿ 6·如申凊專利範圍第1項所述之印刷電路板的製作方 法其中該導電線路的最小線宽約為2毫英忖。 、、7·如申請專利範圍第1項所述之印刷電路板的製作方 法八中該導電線路中的最小導線間距約為2毫英吋。 8·—種印刷電路板,至少包含: 一基材; Φ 導電兩分子層,位於該基材之部份表面,其中該導 電高分子層主要係由聚二氧乙烯噻吩構成;以及 —導電線路,位於該導電高分子層上。 _ 9.如申清專利範圍第8項所述之印刷電路板,其中該 導電線路的最小線寬約為2毫英吋。 =〇·如申凊專利範圍第8項所述之印刷電路板,其中 該導電線路中的最小導線間距約為2毫英吋。200926931 X. Patent application scope: 1. A method for manufacturing a printed circuit board, comprising: providing a copper-clad laminate; the copper-clad laminate comprises a substrate and a copper crucible on a surface of the substrate; a copper foil to form at least a patterned region of the copper clad laminate, wherein the patterned region exposes the substrate; the secondary copper clad laminate is in at least one solution for the patterned regions Forming a conductive polymer layer; electroplating to form an electroplated copper layer on the surface of the conductive polymer layer and the copper foil; and patterning the conductive polymer layer and the electroplated copper layer on the conductive polymer layer to form a Conductive line. 2. The method of fabricating a printed circuit board according to the above aspect of the invention, wherein the conductive polymer layer is mainly composed of polydioxane. 3. The method for fabricating a printed circuit board according to claim 2, wherein the method of forming the conductive layer of the conductive layer comprises: immersing the copper clad laminate in a first solution, the first solution comprising a high Potassium manganate to react to form a manganese dioxide deposit in the patterned region; and 'soaking the copper clad laminate in a second solution, wherein the second solution contains a dioxyethylene thiophene monomer to penetrate the second The manganese oxide is catalyzed by polymerization in the patterned region to form the polydioxyethylene D. The method for producing a printed circuit board according to the third aspect of the invention, wherein the pH of the first solution is about 6.8 to 7.5. 5_ * The scope of the patented printed circuit board of the patent application 帛1, the thickness of the electroplated copper layer is about 〇 2~〇 5 milli-inch. The method of fabricating the printed circuit board of claim 1, wherein the conductive line has a minimum line width of about 2 millimeters. 7. The minimum conductor spacing in the conductive circuit of the method for fabricating a printed circuit board according to claim 1 of claim 1 is about 2 millimeters. 8· a printed circuit board comprising: at least: a substrate; Φ conductive two molecular layer, located on a part of the surface of the substrate, wherein the conductive polymer layer is mainly composed of polyoxyethylene thiophene; and - conductive lines Located on the conductive polymer layer. 9. The printed circuit board of claim 8, wherein the conductive line has a minimum line width of about 2 millimeters. The printed circuit board of claim 8, wherein the minimum conductor spacing in the conductive line is about 2 millimeters.
TW96148010A 2007-12-14 2007-12-14 Method for fabricating printed circuit board TW200926931A (en)

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