200921386 九、發明說明： 【發明所屬之技術領域】 本發明係有關一種快閃記憶體之資料即p 、 τ更新方法，特別是運用热— 種快閃記憶體内部資料區的資料即時更新方去 【先前技術】 現今，由於消費者對各型儲存媒體的需求急速增加，且快閃記憶體 吵缝耐y)不需要電力即可維持數據的儲存，加上早期的電子可齡 唯讀記憶擊觸M)只允許單處執行緒重寫，但快閃記憶體卻可允許_ 多處執行緒Μ，_㈣記憶_執行速度纽—般早期電子可抹除式 唯讀記憶扉舰⑽)快«’使得㈣雜^補取代電何抹除式唯 碩5己憶體(EEPROM)成為目前消費性電子儲存裝置的主流之一。 快閃記憶體之卫作原理是利用浮閑大量導引金屬氧化半導體 (Fl〇ating-Gate Avalanche_Injecti〇n Μ_ι 〇獅 過内部的電容#合(Coupling)來纽地控織相(FiQating Gate)上之電荷 移動，使得5亥浮閘可根據該電荷的移動而決定下層電晶體的閥值電壓。如 當負電子注入該浮閘時，該浮閘的儲存狀態便會從i變成〇 ;而當負電子從 該洋閘移走後，該浮閘的儲存狀態便會從0變成i。藉此，即可令快閃記憶 體執行寫入(Write)、抹除(Erase)及讀取(Read)等操作。 目前快閃記憶體主要分成四種類型：反或閘(N〇R)型、反及閘(NAND：) 型、及閘(AND)型以及分裂位線反或閘(Divi(iedbit-lineNOR，DiNOR)型等， 各有不同的特性以滿足不同的功能或應用上的需求，其中雖然反或閘型快 200921386 閃記憶體是最早被開發出來的’但目前以反及閘型快閃記憶體的使用率最 廣。 該反或閘(NOR)型快閃記憶體具有低工作電壓、較高的資料存取可靠 度' 完整地址和數據界面並可隨機讀取，且資料可以寫入單一位元組戋位 元(Bitwise)，但無法抹除(Erase)單一位元組，而必須是以區塊（Bi〇ck)為 單位或對整個區域執行抹除，因此反或閘(N0R)型快閃記憶體的抹除和寫入 速度較慢，加上區塊尺寸較大，使得反或閘(NOR)型快閃記憶體無法應用於 單純的>料儲存或槽案儲存，故較適用儲存不需要經常更新的資料如程式 碼(如可支援XIP) ' BIOS或韌體，目前被大量應用於可攜式電子裝置及電 子通訊裝置中之系統資料，如個人電腦(Personal Computer, Pc)、行動電話 (Cell Phone)、個人數位助理(Personal Digital Assistance，pDA)或轉頻器 (Set-top Box，STB)等，或用於滿足上述電子裝置的開機需求。 該反及閘(NAND)型快閃記憶體的資料存取是以頁(page)為單位，每一 頁包含256或512 Byte的儲存空間(User Space)，加上8或16 Byte的 輔助空間（Spare Space)。該輔助空間主要用來存放錯誤更正碼（Err〇r Correction Code，ECC)，記憶體損壞標記和檔案系統的資料。大約32頁或 64頁即組成每一個區塊（Block)，但典型的反及閘(NAND)型快閃記憶體的 區塊事實上是比反或閘(NOR)型快閃記憶體的區塊小約8倍，且該反及閘 (NAND)型快閃記憶體的抹除是以區塊鮮位，相對於反或聰〇R)型快閃 把憶體的抹除區塊是具有1〇 tb 1的區塊抹除週触，如反及_AND)型 快閃記憶體塊抹除時間是2mS，則反或閘(nqr)型㈣記憶體塊之抹除時間 200921386 可達到幾百ms。因此，該反及閘(NAND)型快閃記憶體具有&N〇R型快閃 §己憶體更快的寫入和抹除時間、高密度、較長的產品壽命，以及比^^^汉型 快閃記憶體低的製造成本。但因為該反及閘(NAND)型快閃記憶體之1/〇界 面只允許序列讀取，所以反及閘(HAND)型快閃記馋體不適合儲存程式碼， 但是適合作為可儲存大量數據之儲存裝置如儲存卡等之用，亦可用於手 機、MP3播放器或數位多媒體播放器等存放多媒體檔案的媒介之一。 然而，特別是反及閘(NAND)型快閃記憶體，除了在製程中有可能會導 致壞區塊(Bad Block)的產生外，當該快閃記憶體經過多次的寫入、抹除及 讀取運作後’亦會造成位元的損毁(Bit Error·)。因此，習知反及閘…八^) 型快閃記紐内部均具有輕塊資料管_ad Bk)ek Managemen，bbm)以 及可自動债錯及改正損毁位元的錯誤校正碼(Err〇r —η c〇de，ecc)， 以識別及取代在寫人、抹除及讀取運作時所產生的壞區塊，並同時將該等 壞區塊的資料拷制有效區塊，從轉持該快閃記賊的可靠性。 但疋，上述的壞區塊資料管理及錯誤校正碼仍無法確保該反及閘 (NANTD)型快閃記憶體内部所儲存的資料的可靠性及安全性，其主要原因為 U反及M(NAND)型快η記’隨係藉由電容輕合來控制該浮間上電荷的 移動’以心_的讀取或寫人運作。然而，當該反及閘(ΝΑ购)型快閃記 隱體在執衫次棘運作日^於铜—區塊(Βω)巾，雜縣做讀取 的頁面所產生的通這熱載子(channdh〇t_ier)會對浮閘充電，即產生些微 的電位差’ m而導致抹_狀態由丨轉變為Q，或是时閘自身的漏電問題 而’’’、法將狀鱗續保持為〇，上述之問題皆會造成讀取混亂(ReadDi_b广 200921386 因此當該快閃記丨音声 就會因為讀取混亂(Read 之重要資料it失。軸此讀取混亂並未 影響’但卻需重新對此區塊(w〇ck)再—次 體重複讀取數十萬次之後， 胸，造柄_記,_所儲存 對快閃記髓（纟罐造成破壞性的 進行抹除與寫入之程序。 因此 理提供-物軸的資料區管 > 法，以避免該快閃記憶體因讀取混亂(Head Γ r L猶存的電制題造成資料嚴重遺失的問題。 【發明内容] 為解決上述問題，本發明之主要目的係提供-種即時資料更新方法， 其用於-快閃錢體内部的資料區之資料自動更新處理，其可有效地避免 該快閃記㈣因内料_儲存的電制_造成轉遺失，絲短開機 時該快閃記憶體内資料區的f料回復時間，故能增加該快閃記憶體的可靠 性及資料的安全性。 為達到上述發明目的，本發明揭示—種即時資料更新方法，係運用於 -快閃記Μ之資機射，該結構縣含—紳區塊(_ Bbck)， 其内部具有-主要資料分塊以及複數個次要_分籠塊、—冗餘區 塊(RedundantBlock) ’其内部具有複數個冗餘分割區塊，並與該資料區塊内 的各次要分割區塊呈對應連結，以及一變換後備缓衝區(Translati〇n Look-aside Buffer，TLB)，其分別連接至該資料區塊及該冗餘區塊，用於讀 取該資料區塊内的主要資枓分割區塊所儲存的備份資料。該資料結構更新 之方法包含下列步驟· 200921386 步驟一： 步驟二 步驟三 步驟四 步驟五 步驟六 步驟七 步驟八 讀取該資料區塊内的主要資料分割區塊所儲存的備份資料； 將該備份資料與該冗餘區塊内的冗餘分割區塊所暫存的資料進行 比較，以識別該冗餘分割區塊所暫存的資料是否為最後一筆寫入 的資料； :如果該冗餘區塊所暫存的資料即是最後一筆寫入的資料，更新該 變換後備緩衝區内的對映表，並將該資料置換至該資料區塊内， 接者该快閃記憶體便執行正常運作； :如果該賊區塊崎存的倾並不是最後—f以的龍，則該 快閃記憶體便直接執行正常運作； :若該快閃記憶體在初始储束錢錄行—正常運料，接收到 —更新指令’則該快閃記憶體便啟動自動更新運作，接著將該冗 餘區塊内其中-個冗餘分割區塊所暫存的資料抹除以形成一個 空的冗餘分#m塊；反之，若該快閃記憶體在執行正常運作時未 接收到該更新指令’則該快閃記憶體便繼續執行正常運作； .將。亥資籠塊内其巾-織定的次要資料分艱塊賴存的資料 移至該冗餘區塊内空的冗餘分割區塊中； :將該資料區助其中另-個次要資料分觀塊所儲存㈣料抹除 以形成一個空的次要資料分割區塊； :將於步驟六巾移人該冗麵塊⑽料龍移魏f料區塊内空 的次要資料分塊巾，接著騎閃記髓便顧執行正常運 200921386 綜上所述，藉由本發明的資料即時更新方法，除可有效地避免因快閃 記憶體内浮麟儲存的電制題而造成資料的遺失外，尚可縮短開機時該 快閃記憶體内資料區的資料回復時間，以及增加該快閃記憶體的可靠性及 資料的安全性。 【實施方式】 請參閱第1A圖，係闡示本發明的資料結構示意圖，其適用於一快閃記 憶體内部的資料區。該快閃記憶體的類型可為反或寒〇r)、反及閑 _降及閘_)以及分裂位線反或開(胸如咖加職；蘭况） 等四種其中之-’惟在本發日月之較佳實_巾係以—具有n〇r介面之反及 閘(NAND)蝴記紐為義加㈣明，但料目此限定本發明之專利範 圍第A圖所不的資料區塊101 (Data Block)包含複數個資料分割區塊 應、祕、1Gle、1Qld、職〜1Qlm，其中魅要資料分塊驗用 於存放有關該資料區塊1()1的各種管理資料及一對映表⑽卿㈣侧小從 V刀u’j區塊l〇lb開始才真正被用於儲存各種由該快閃記憶體外部寫 入的資料。 前述每—個資料分割區塊101b〜101m進一步包含64個全頁面(Full Page)且每個全頁面又為4個分頁面和伽血㈣所組成，其中如第 圖所不之母—頁面ωΐ()包含5i2b_的使用者資料位於使用者空間( SPaCe)’以及16邮冗餘資料位於辅助空間(Spare Space)，其中該⑴Bytes 的使用者資料僅儲存由該快閃記憶體外部寫人的資料，以及該⑽辦冗餘 貝料用於储存该快閃記憶體每一個頁面的狀態訊息，該等狀態訊息係包含 200921386 狀悲(Status,以”S”表示）訊息、邏輯區塊位址(L〇gical Bi〇ck Address,以” LBA”表示)訊息、旗標(Tag，以，，T”表示；)訊息、同位元(Parity，以，’p”表示)訊 ‘ 息以及循環冗餘檢查(Cyclic Redundancy Check，CRC)碼訊息，使得連接該快 閃記憶體的控制器(Controller)能夠確實了解資料的安全性且易於管理。 又如第1A圖所示，該快閃記憶體還具有一冗餘區塊1〇2(Redundant Block)包含複數個冗餘分割區塊1〇2a、1〇2b、1〇2c〜1〇2n可對應連結至資 料區塊101内之各次要資料分割區塊1〇化〜l〇lm，由於冗餘區塊102之作 f " 用主要係作為緩衝區’以暫存該資料區塊101内各次要資料分割區塊101b〜 101m所儲存的資料。須注意的是，冗餘區塊1〇2内的每一個冗餘分割區塊 102a〜102η均未對映至資料區塊1〇ι的主要資料分割區塊1〇la。在實際應 用上，若以一具有lGbits記憶容量的快閃記憶體為例，資料區塊101内所 有資料分割區塊101a〜101m)的容量加上冗餘區塊1〇2内所有冗餘分割區塊 102a〜102η)的容量大概僅佔用約1〇24KBytes，對於該快閃記憶體的整體記 憶容量並不會造成太大影響。 、 此外’ 5亥快閃s己憶體具有一變換後備緩衝區103(Translation Look-aside200921386 IX. Description of the invention: [Technical field of the invention] The present invention relates to a method for updating flash data, that is, p, τ, in particular, using an instant update of the data in the internal data area of the thermal-flash memory. [Prior Art] Nowadays, due to the rapid increase in consumer demand for various types of storage media, and flash memory arbitrarily resistant to y), data storage can be maintained without power, and early electronic age-reading memory Touch M) only allows single-thread rewriting, but flash memory can allow _ multiple executions, _ (four) memory _ execution speed 纽 - early early electronic erasable read-only memory 扉 (10)) fast « 'Make (four) miscellaneous ^ replace the electric and erase the type of only 5 5 memory (EEPROM) has become one of the mainstream consumer electronic storage devices. The principle of the flash memory is to use a large amount of floating metal-oxide semiconductors (Fl〇ating-Gate Avalanche_Injecti〇n Μ_ι 〇 lion internal capacitor #合(Coupling) to control the fabric phase (FiQating Gate) The charge movement causes the 5H floating gate to determine the threshold voltage of the lower layer transistor according to the movement of the charge. If the negative electron is injected into the floating gate, the storage state of the floating gate will change from i to 〇; After the negative electrons are removed from the oceanic gate, the storage state of the floating gate will change from 0 to i. This allows the flash memory to perform writing, erasing (Erase) and reading (Read). Operations such as . Currently flash memory is mainly divided into four types: reverse or gate (N〇R) type, reverse gate (NAND:) type, and gate (AND) type and split bit line inverse or gate (Divi ( iedbit-lineNOR, DiNOR), etc., each with different characteristics to meet different functional or application requirements, although the reverse or gate type 200921386 flash memory is the earliest developed 'but currently with the anti-gate type Flash memory is the most widely used. The reverse or gate (NOR) type flash memory has low work. Voltage, high data access reliability' The full address and data interface can be read randomly, and the data can be written to a single byte bitwise (Bitwise), but can not erase (Erase) a single byte. It must be in the block (Bi〇ck) or erase the entire area, so the reverse or gate (N0R) type flash memory is slower to erase and write, and the block size is larger. Therefore, the anti-gate (NOR) type flash memory cannot be applied to the simple storage or trough storage, so it is more suitable for storing data that does not need to be updated frequently, such as code (such as XIP support) 'BIOS or toughness. Body, currently used in a large number of system data in portable electronic devices and electronic communication devices, such as Personal Computer (Pc), Cell Phone, Personal Digital Assistance (pDA) or Set-top box (STB), etc., or to meet the booting requirements of the above electronic device. The data access of the NAND flash memory is in units of pages, each Page contains 256 or 512 Bytes of Storage Space (User Space) plus 8 Or 16 Byte of auxiliary space (Spare Space). This auxiliary space is mainly used to store Err〇r Correction Code (ECC), memory damage mark and file system data. About 32 pages or 64 pages constitute each a block, but the block of a typical NAND type flash memory is actually about 8 times smaller than the block of the inverse or gate (NOR) type flash memory, and the counter The wipe of the NAND flash memory is in the block fresh position, and the erase block of the memory is the block eraser with 1〇tb 1 relative to the reverse or the R) type flash. Weekly touch, such as _AND) type flash memory block erase time is 2mS, then the reverse gate (nqr) type (four) memory block erasure time 200921386 can reach several hundred ms. Therefore, the NAND type flash memory has a faster writing and erasing time, a higher density, a longer product life, and a ratio ^^ of the &N〇R type flash § memory. ^ Han type flash memory has low manufacturing cost. However, because the 1/〇 interface of the NAND flash memory only allows sequence reading, the HAND flash memory is not suitable for storing code, but it is suitable for storing large amounts of data. The storage device, such as a memory card, can also be used for one of the media for storing multimedia files, such as a mobile phone, an MP3 player or a digital multimedia player. However, especially the NAND type flash memory, in addition to the possibility of causing bad blocks in the process, when the flash memory is repeatedly written and erased And after reading the operation, it will also cause bit error (Bit Error). Therefore, the conventional anti-gate... eight ^) type flash flashing New Zealand has a light block data tube _ad Bk) ek Managemen, bbm) and an error correction code that can automatically correct the error and correct the damaged bit (Err〇r - η c〇de,ecc), to identify and replace the bad blocks generated during the writing, erasing and reading operations, and at the same time copy the data of the bad blocks into valid blocks, from the transfer Quickly remember the reliability of the thief. However, the above-mentioned bad block data management and error correction codes still cannot ensure the reliability and security of the data stored in the NANTD type flash memory. The main reason is U and M ( The NAND) type fast η 'has to control the movement of the charge on the float by the light coupling of the capacitor' to read or write the operation of the heart. However, when the anti-gate (purchasing) type flash flashing invisible body is in the copper-block (Βω) towel, the miscellaneous county produces the hot carrier generated by the read page ( Channdh〇t_ier) will charge the floating gate, that is, it will produce a slight potential difference 'm, which will cause the smear state to change from 丨 to Q, or the timing of the gate's own leakage problem and ''', the law will continue to be 〇, All of the above problems will cause read confusion (ReadDi_b wide 200921386, so when the flash is recorded, the sound will be confusing (the important information of Read is lost. The axis does not affect the reading confusion) but it needs to be re-introduced. After the block (w〇ck) and the sub-body are repeatedly read hundreds of thousands of times, the chest, the handle, the _ record, the _ stored for the flash memory (the canister is destructive to erase and write the program. The data section of the object axis is provided to avoid the problem that the flash memory is seriously lost due to the reading disorder (Head Γ r L). [Summary of the problem] The main purpose of the present invention is to provide a method for updating real-time data, which is used for - flashing money The information in the data area of the Ministry is automatically updated, which can effectively avoid the flash flash (4) due to the internal materials _ stored electrical system _ caused by the loss, the short flashing time of the flash memory data area of the material recovery time, Therefore, the reliability of the flash memory and the security of the data can be increased. In order to achieve the above object, the present invention discloses an instant data update method, which is applied to the flashing machine, which is included in the county. The block (_Bbck), which has a - primary data block and a plurality of secondary _ split blocks, - Redundant Blocks - has a plurality of redundant partitions inside, and the data Each of the secondary partitions in the block is a corresponding link, and a Translati〇n Look-aside Buffer (TLB) is respectively connected to the data block and the redundant block, and is used for The backup data stored in the main resource partition block in the data block is read. The data structure update method includes the following steps: 200921386 Step 1: Step 2 Step 3 Step 4 Step 5 Step 6 Step 7 Step 8 Read The backup data stored in the main data segmentation block in the data block; the backup data is compared with the data temporarily stored in the redundant partition block in the redundant block to identify the redundant partition block Whether the temporarily stored data is the last written data; if the data temporarily stored in the redundant block is the last written data, update the mapping table in the transform backup buffer, and the data Replacement into the data block, the flash memory will perform normal operation; if the thief block is not the last -f, the flash memory will directly perform normal operation. ; : If the flash memory is in the initial storage money record - normal transport, receive - update command ' then the flash memory starts the automatic update operation, and then one of the redundant blocks The data temporarily stored in the remaining partition is erased to form an empty redundancy sub-m block; conversely, if the flash memory does not receive the update instruction when performing normal operation, then the flash memory is Continue to perform normal operations; The data of the towel-weaving secondary data in the Haizi cage block is transferred to the redundant partition in the redundant block; the data area is assisted by another secondary The data is stored in the block (4), and the material is erased to form an empty secondary data segment; the secondary data of the empty block in the block (10) is transferred to the block. Block towel, then ride the flashing marrow to perform normal operation 200921386 In summary, the instant update method of the present invention can effectively avoid the loss of data caused by the electric problem stored in the flash memory. In addition, the data recovery time of the flash memory data area at the time of booting can be shortened, and the reliability of the flash memory and the security of the data can be increased. [Embodiment] Please refer to FIG. 1A for a schematic diagram of a data structure of the present invention, which is applied to a data area inside a flash memory. The type of flash memory can be reverse or cold r), anti-free and fall _ drop and gate _), and the split bit line is reversed or open (chest is like a service; blue condition), etc. In the present day and the month, it is better to use the NAND butterfly with the n〇r interface as the NAND card, but it is intended to limit the scope of the patent of the present invention. The data block 101 includes a plurality of data partitioning blocks, secrets, 1Gle, 1Qld, and jobs~1Qlm, wherein the charm data block is used to store various management materials related to the data block 1()1. And the pair of maps (10) Qing (four) side small from the V knife u'j block l 〇 lb is actually used to store a variety of data written externally from the flash memory. Each of the foregoing data partitioning blocks 101b to 101m further includes 64 full pages (Full Page) and each full page is composed of 4 partial pages and gamma blood (4), wherein the mother page of the figure is not the page ωΐ () The user data containing 5i2b_ is located in the user space (SPaCe)' and the 16-mail redundant data is located in the auxiliary space (Spare Space), wherein the user data of the (1) Bytes is only stored by the outside of the flash memory. The data, and the (10) redundant material is used to store the status message of each page of the flash memory, and the status message includes a message of 200921386 (Status, indicated by "S"), logical block address. (L〇gical Bi〇ck Address, expressed as "LBA") message, flag (Tag, to, T";) message, parity (represented by 'p") message and cyclic redundancy The Cyclic Redundancy Check (CRC) code message enables the controller (Controller) connected to the flash memory to know the security of the data and is easy to manage. As shown in FIG. 1A, the flash memory further has a redundant block 1〇2 (Redundant Block) including a plurality of redundant partition blocks 1〇2a, 1〇2b, 1〇2c~1〇2n. Corresponding to each of the secondary data partitioning blocks in the data block 101, 〇1~1〇lm, because the redundant block 102 is used as the buffer buffer to temporarily store the data block. The data stored in each of the secondary data partitioning blocks 101b to 101m in 101. It should be noted that each of the redundant partitions 102a to 102n in the redundant block 1〇2 is not mapped to the main data partition block 1〇1a of the data block 1〇. In practical applications, if a flash memory having a memory capacity of 1 Gbits is taken as an example, the capacity of all data partitioning blocks 101a to 101m in the data block 101 plus all redundant partitions in the redundant block 1〇2. The capacity of the blocks 102a to 102n) is only about 1 〇 24 KBytes, which does not have much influence on the overall memory capacity of the flash memory. In addition, the '5H' flash has its own lookup buffer 103 (Translation Look-aside)
Buffer ’ TLB)設於一靜態隨機存取記憶體(SRAM)中，並分別連結至資料區 塊101及冗餘區塊102，用於提供各種管理資料及對映表(Mapping丁此⑹予 該主要資料分割區塊l〇la，且該對映表記錄資料區塊1〇1之每一個次要資 料分割區塊101b〜101m (除了主要資料分割區塊1〇ia以外)的邏輯位址 (Logical Address)與實體位址(Physical Address)之間的位址關係，且該對映表 係定義該複數個冗餘分割區塊與對應的複數個次要分割區塊之間的對映關 11 200921386 係，以加快該快閃記憶體的資料搜尋效率。 為了確保該快閃記憶體儲存的資料 貝幵不會因多次讀取導致其浮閘 (Pl〇ating Gate)t ^ ^ 2 即時更新方法來自動完成資料更新的處理。舉例而言，假使該電子裝置突 然關機或不明電力帽時，導致如第u _示該快閃記憶體之資料區塊 皿之某-次要資料娜塊刪發生資料遺失，此時驅塊搬仍會 保有原本對應的冗餘分割區塊職㈣料。此時，第2圖所示之依據 本發明之資料更新方法，可在有限的__喊執行—關記憶體之初 使化流程S2〇，在此初始化過程中先改變該變換後備緩斷岡請之對 _MaPping table__ ’並利用置換(swappmg)方式以節省開機時的 資料回«間(待後詳述），再_此更正f料執行該㈣記‘執行另一資 料自動更新流程S21。 該快閃記憶體之初使化流程S2〇包括以下步驟： 乂驟201表不一電子裝置(諸如電腦、手機、個人數位助理等)開機時， 開始初始化其配置㈣閃記紐。此開機並不限為冷識(⑽b_)或暖 開機(Warm Boost)。 於步驟202中’讀取該資料區塊1〇1之主要資料分割區塊黯所儲存 的變換後備緩衝(TLB)區1〇3之備份資料(包括資料區塊皿&各種管理資料 及對映表）。φ於雜閃記憶體位在靜態隨機存取記憶體(SRAM)巾，使得 變換後備緩祕1()3具有熱取(Caehe)—樣快的讀取碰，鼠步驟並不 會耗費报多時間。 12 200921386 於步驟203中，依據讀取到該變換後備緩衝區103内的對映表，與冗 餘區塊102内各几餘分割區塊進行逐一的比較，由於冗餘區塊體主要係 作為緩衝區’其係用於暫存資料區塊1〇1内各次要資料分割區塊所儲存的 資料’因此當上述的巾央處職讀取完冗餘區塊搬内某—個冗餘分割區 塊的資料後’會自動把資料區塊1G1内下—個次要資料分塊所儲存的 貧料預先移至冗餘區塊繼内其中一冗餘分割區塊。當該中央處理器需要 讀取下-個次要資料分割區塊的資料時，就可直接在冗餘區塊搬内進行 5貝取°再者’由於變換後備緩衝區1〇3内的對映表係藉由讀取至資料區塊 l〇la的備份資料而取得，因此該對映表係具有一完整之邏輯位址及實體位 址之間的對應關係。然而，雖然冗餘區塊1〇2於前次使用時係暫存資料區 塊101内各資料分割區塊所儲存的資料，但卻是採用逐一暫存的方式。因 此’對照於第ΙΑ B，當暫存於冗餘區塊1〇2内的冗餘分割區塊1〇2b的資 料被讀取後，才會自動將下一筆的次要資料分割區塊1〇1(1所儲存資料移進 冗餘區塊102的冗餘分割區塊102c中，此時若於使用時發生電力中斷或是 因該快閃記憶體内浮閘所儲存的電荷問題而造成資料區塊1〇1内次要資料 分割區塊ioid所儲存的資料遺失時’冗餘區塊102内的冗餘分割區塊i〇2c 仍保有於前次使用時次要資料分割區塊1〇1(1所儲存的資料；此時，當變換 後備緩衝區103内的對映表與冗餘區塊1〇2内的各冗餘分割區塊相互比較 時，由於在冗餘分割區塊102c之後並未有任何的資料移入，因此經由變換 後備緩衝區103即可識別冗餘區塊1〇2内的冗餘分割區塊1〇2c即是最後一 筆寫入的貢料。 13 200921386 再者’於步驟S204中，更新變換後備緩衝區103内的對映表，並同時 將冗餘分割區塊l〇2c内的資料置換(Swapping)至資料區塊1〇1内的次要資 * 料分割區塊l〇ld中，這時變換後備缓衝區103首先將已儲存的對映表中關 於次要資料分割區塊l〇ld的邏輯位址及實體位址移除，並將次要資料分割 區塊101d新的邏輯位址及實體位址寫入，從而使變換後備緩衝區ι〇3在之 後的處理時會有更高的命中率(Hit Rate) ’而於變換後備緩衝區ι〇3更新完 之後便於步驟S211作進一步的處理。惟，若於前述步驟S203中識別出冗 f! 餘區塊102内各冗餘分割區塊的資料均與變換後備缓衝區103内的對映表 相同，即冗餘區塊102内的冗餘分割區塊i〇2a至冗餘分割區塊ι〇2η所暫 存的資料均相同於資料區塊1〇1内次要資料分割區塊101b至次要資料分割 區塊101m所儲存的資料。換言之，即表示於前次使用時並未發生電力中斷 或是因該快閃記憶體内浮閘所儲存的電荷問題而造成資料區塊1〇1内各次 要資料分割區塊所儲存的資料遺失。因此，變換後備緩衝區1〇3便不需要 更新而直接到步驟sm進-步的處理。然而，這裡需注意献，由於冗餘 ( 區塊102内每一個冗餘分割區塊的收尋時間約為8〇微秒，附匕利較換的 方式達到資料區塊101完整的初使化可有效地縮短開機時資料回復的時間。 此外，該資料自動更新流程S21包括以下步驟： 步驟㈣即是該快閃記憶體在完成前述的初使化步驟之後，開始執行 諸如各種外部資料的讀取、抹除或“等的正f運作。當該，㈣記憶體外 部所連接駐端在閒_e)，即並未執行存取運作時，可自行根據應 用程式的需求判斷是發出-更新指令(Refresh c_and)給該快閃記憶 14 200921386 體。因此，於步驟如中，絲快閃記憶體並未接收到由主端所發出的更 新指令’便_於步驟S211中執行各種外部資料的讀取、抹除或寫入的正 常運作。惟，若該快閃記憶體於步驟S212中接㈣φ主端所發出的 令時，則於步驟S213中作進一步的處理。 於步驟咖中，當該快閃記憶體接收到由主端所發出的更新指令，便 啟動自動更新運作。此時，首先將冗餘區塊舰内其中一冗餘分割區塊所 暫存的資料抹除以形成—個空的冗餘分舰塊，再於步驟咖中將資料區 塊UH内其中-個次要資料分割區塊所儲存的資料移至冗餘區塊舰内空 的冗餘分割區塊中。 又，於步驟咖中，再將資料區塊1〇1内其中另—次要資料分割區塊 所儲存的資料抹除以形成—個空的資料分縣塊。並於步驟伽中，係將 已於前述步驟S2M中暫存於冗餘區塊搬内的資料移至資料區塊而内空 的次要資料分割區塊中。最候，於步驟S217即表示結束自動更新的運作， 即該快閃記憶體係返回步驟S211以執行各種外部資料的讀取、抹除或寫入 的正常運作。綜上所述，步驟奶啦整更新時間約為毫秒，其可有 效地確保龍區塊1G1不會目多次讀取而造成浮閘所儲存的電荷問題，進 而造成資料區塊101内各次要資料分割區塊所儲存的資料遺失。 因此，藉由本發明的資料結構及其即時更新方法，除可有效地避免因 快閃記憶翻浮閘所儲存的電制題而造成龍的遺失外，尚可縮短開機 時該快閃記憶體内資料區的資料回復時間，以及增加該快閃記憶體的可靠 性及資料的安全性。 15 200921386 . 綜合以上所述，雖然本發明已較佳實施例揭露如上，然其並非用以限 疋本發明，任何熟習此項技藝者，在不脫離本發明之精神和範圍内，當可 乍各種更動與潤部，因此本發明之保護範圍當視後附之申請專利範圍所界 定者為準。 | 16 200921386 【圖式簡單說明】 第1A圖係闡示根據本發明的資料結構示意圖。 第1B圖係闡示根據本發明的資料結構中每一頁的組成示意圖。 第2圖係闡示本發明的資料即時更新方法流程圖。 【主要元件符號說明】 104 資料區塊 105 冗餘區塊 r ' 106 變換後備緩衝區 101a主要資料分割區塊 1010 頁面 101b、101c、101d、101e、101m 次要資料分割區塊 102a、102b、102c、102η 冗餘分割區塊 S20、S2(U、S202、S203、S204、S210、S21、S211、S212、S213、 S214、S215 步驟 17The Buffer 'TLB is set in a static random access memory (SRAM) and is respectively connected to the data block 101 and the redundant block 102 for providing various management data and mapping tables (Mapping Ding (6) to the The main data partitioning block l〇la, and the mapping table records the logical address of each of the secondary data partitioning blocks 101b to 101m (except the main data partitioning block 1〇ia) of the data block 1〇1 ( Logical Address) is an address relationship between the physical address and the physical address, and the mapping table defines an mapping between the plurality of redundant partitions and the corresponding plurality of secondary partitions. 200921386 to speed up the data search efficiency of the flash memory. To ensure that the data stored in the flash memory does not cause its floating gate (Pl〇ating Gate) t ^ ^ 2 to be updated instantly due to multiple readings. The method is used to automatically complete the processing of the data update. For example, if the electronic device is suddenly turned off or the power cap is unknown, the data of the data block of the flash memory is deleted. Loss of data occurs, at this time, the block will still be retained. The corresponding redundant partition block (four) material. At this time, the data updating method according to the present invention shown in FIG. 2 can be made at the beginning of the limited __ shouting execution-off memory. In this initialization process, first change the transformation backup slow-breaking _MaPping table__ ' and use the replacement (swappmg) method to save the data back to the «time (to be detailed later), then _ this correction f material to perform (4) Recording 'execution of another data automatic update process S21. The flash memory initialization process S2 includes the following steps: Step 201: When an electronic device (such as a computer, a mobile phone, a personal digital assistant, etc.) is turned on, Start to initialize its configuration (4) flash button. This boot is not limited to cold ((10)b_) or warm boot (Warm Boost). In step 202, 'read the main data partition block of the data block 1〇1 is stored. The backup buffer (TLB) area 1〇3 backup data (including the data block & various management data and mapping table). φ in the flash memory bit in the static random access memory (SRAM) towel, making Transforming backup slow 1 () 3 has a heat take (Caehe) - like The reading step does not consume much time. 12 200921386 In step 203, according to the mapping table read in the transform backup buffer 103, and several partitions in the redundant block 102 The blocks are compared one by one, because the redundant block body is mainly used as a buffer 'it is used to temporarily store the data stored in each secondary data partition block in the data block 1〇1' After reading the data of a redundant partition in the redundant block, the user will automatically move the poor materials stored in the data block 1G1 to the secondary data block to the redundant block. Following one of the redundant partitions. When the central processing unit needs to read the data of the next-second secondary data partitioning block, it can directly perform 5 bucks in the redundant block moving, and then the mapping in the transformed backup buffer 1〇3. The table is obtained by reading the backup data to the data block l〇la, so the mapping table has a complete correspondence between the logical address and the physical address. However, although the redundant block 1〇2 is used for temporarily storing the data stored in each data segment in the data block 101, it uses a temporary storage method. Therefore, in contrast to the second block B, when the data of the redundant partition block 1〇2b temporarily stored in the redundant block 1〇2 is read, the next secondary data is automatically divided into blocks 1 〇1 (1 stored data is moved into the redundant partition 102c of the redundant block 102, at this time, if a power interruption occurs during use or due to a charge problem stored in the floating memory body of the floating memory In the data block 1〇1, the data stored in the secondary data partition ioid is lost. 'The redundant partition block i〇2c in the redundant block 102 is still retained in the previous use. 〇1 (1 stored data; at this time, when the mapping table in the transform backup buffer 103 and the redundant partitions in the redundant block 1 〇 2 are compared with each other, due to the redundant partition After 102c, there is no data to be moved in. Therefore, the redundant partition block 1〇2c in the redundant block 1〇2 can be identified by the conversion backup buffer 103. It is the last written tribute. 13 200921386 In step S204, the mapping table in the transform lookaside buffer 103 is updated, and the redundant partition block is simultaneously The data in 2c is Swapping to the secondary resource partition l〇ld in the data block 1〇1. At this time, the transformation backup buffer 103 firstly stores the secondary data in the stored mapping table. The logical address and the physical address of the partition block l〇ld are removed, and the new logical address and the physical address of the secondary data partitioning block 101d are written, so that the transform backup buffer ι〇3 is after There is a higher hit rate during processing. After the update buffer buffer ι〇3 is updated, the processing in step S211 is facilitated. However, if the redundant portion is identified in the foregoing step S203. The data of each redundant partition in 102 is the same as the mapping table in the transform backup buffer 103, that is, the redundant partition i〇2a in the redundant block 102 to the redundant partition ι〇2η The temporarily stored data is the same as the data stored in the secondary data segment 101b to the secondary data segment 101m in the data block 1.1. In other words, it means that no power interruption occurred during the previous use or The data block is caused by the charge problem stored in the floating memory of the flash memory. The data stored in each of the secondary data partitions is lost. Therefore, the conversion backup buffer 1〇3 does not need to be updated and goes directly to the step sm to step-by-step processing. However, it is necessary to pay attention here, due to redundancy ( The acquisition time of each redundant partition in the block 102 is about 8 microseconds, and the complete initialization of the data block 101 can effectively shorten the time of data recovery at the time of booting. In addition, the automatic data updating process S21 includes the following steps: Step (4) is that the flash memory starts to perform reading, erasing or "such as the operation of various external materials" after completing the foregoing initializing step. . When the (4) memory is connected to the external station in the idle state, that is, when the access operation is not performed, it may be determined according to the requirements of the application that the refresh-update command (Refresh c_and) is given to the flash memory 14 200921386 body. Therefore, in the step, the silk flash memory does not receive the update command issued by the master terminal, and the normal operation of reading, erasing or writing various external data is performed in step S211. However, if the flash memory is connected to the (4) φ main terminal in step S212, further processing is performed in step S213. In the step coffee, when the flash memory receives the update command issued by the master, the automatic update operation is started. At this point, firstly, the data temporarily stored in one of the redundant partitions in the redundant block is erased to form an empty redundant sub-ship, and then in the data block UH in the step coffee- The data stored in the secondary data partitions is moved to redundant partitions in the redundant block ship. Moreover, in the step coffee, the data stored in the other-secondary data partitioning block in the data block 1〇1 is erased to form an empty data sub-block. In the step gamma, the data temporarily stored in the redundant block transfer in the foregoing step S2M is moved to the secondary data partition block in the data block. Most recently, the operation of ending the automatic update is indicated in step S217, i.e., the flash memory system returns to step S211 to perform the normal operation of reading, erasing or writing various external materials. In summary, the step milk refreshing time is about milliseconds, which can effectively ensure that the 1G1 of the dragon block does not read many times and causes the charge problem stored in the floating gate, thereby causing each time in the data block 101. The data stored in the data partition is lost. Therefore, with the data structure of the present invention and the instant update method thereof, in addition to effectively avoiding the loss of the dragon caused by the electric problem stored in the flash memory floating gate, the flash memory can be shortened at the time of booting. The data recovery time of the data area, as well as the reliability of the flash memory and the security of the data. In addition to the above, the above-described preferred embodiments of the present invention are disclosed above, and are not intended to limit the present invention, and those skilled in the art can, without departing from the spirit and scope of the present invention, The scope of the invention is defined by the scope of the appended claims. 16 200921386 [Simple Description of the Drawing] FIG. 1A is a schematic diagram showing the structure of a data according to the present invention. Figure 1B is a schematic diagram showing the composition of each page in the data structure according to the present invention. Fig. 2 is a flow chart showing the method for updating the data of the present invention. [Description of main component symbols] 104 data block 105 redundant block r '106 transform backup buffer 101a main data partition block 1010 pages 101b, 101c, 101d, 101e, 101m secondary data partition blocks 102a, 102b, 102c 102n redundant partition blocks S20, S2 (U, S202, S203, S204, S210, S21, S211, S212, S213, S214, S215) Step 17