TW200910557A - Under bump metallization structure having a seed layer for electroless nickel deposition - Google Patents

Under bump metallization structure having a seed layer for electroless nickel deposition Download PDF

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Publication number
TW200910557A
TW200910557A TW097123132A TW97123132A TW200910557A TW 200910557 A TW200910557 A TW 200910557A TW 097123132 A TW097123132 A TW 097123132A TW 97123132 A TW97123132 A TW 97123132A TW 200910557 A TW200910557 A TW 200910557A
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Taiwan
Prior art keywords
layer
seed layer
electroless nickel
ubm
metal seed
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TW097123132A
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Chinese (zh)
Inventor
Thomas Strothmann
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Flipchip Int Llc
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Publication of TW200910557A publication Critical patent/TW200910557A/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Chemically Coating (AREA)

Abstract

Structures and methods for fabrication of an under bump metallization (UBM) structure having a metal seed layer and electroless nickel deposition layer are disclosed involving a UBM structure comprising a semiconductor substrate, at least one final metal layer, a passivation layer, a metal seed layer, and a metallization layer. The at least one final metal layer is formed over at least a portion of the semiconductor substrate. Also, the passivation layer is formed over at least a portion of the semiconductor substrate. In addition, the passivation layer includes a plurality of openings. Additionally, the passivation layer is formed of a non-conductive material. The at least one final metal layer is exposed through the plurality of openings. The metal seed layer is formed over the passivation layer and covers the plurality of openings. The metallization layer is formed over the metal seed layer. The metallization layer is formed from electroless deposition.

Description

200910557 九、發明說明: 【發明所屬之技術領域】 本揭式内谷大致係關於微電子半導體晶 片尺寸和覆晶處理。更明確地說,係關於具 層和無電錄層之凸塊下金屬化結構及其之製 【先前技術】 覆晶技術是一種先進的半導體技術,其 ς 晶粒面朝下放置並以各種内連材料將其黏到 晶黏接過程中,先在晶片或晶粒上沉積焊 bump) ’並以之在晶片或積體電路與基板間驾 晶圓層級的晶片尺寸封裝和晶圓層級封 體元件製造過程中直接在半導體元件上形成 較覆ea觀念更先進的技術。此容許將半導體 在印刷電路板上,藉以去除個別封裝的必要 裝元件與裸露的半導體元件尺寸類似。200910557 IX. DESCRIPTION OF THE INVENTION: TECHNICAL FIELD OF THE INVENTION The inner valley of the present invention is roughly related to the size and flip chip processing of microelectronic semiconductor wafers. More specifically, the under bump metallization structure with and without the electro-recording layer and its fabrication [Prior Art] The flip chip technology is an advanced semiconductor technology in which the germanium grains are placed face down and in various interiors. The bonding material adheres to the crystal bonding process, first depositing a bump on the wafer or the die) and driving the wafer level wafer size package and wafer level sealing between the wafer or the integrated circuit and the substrate. In the component manufacturing process, a more advanced technology than the ea concept is formed directly on the semiconductor component. This allows the semiconductor to be on the printed circuit board to remove the necessary components of the individual packages similar to the dimensions of the bare semiconductor components.

覆晶之凸塊下方金屬化層(under bump l,i (UBM) layer)是整個結構的支推。需要UBM 的表面並做為焊錫與金屬墊之最終金屬層間 此UBM必須滿足數種要件,包括,但不限 終金屬層間之—強而穩定的低電阻連接,可 黏接以使銘可被密封而與外界隔絕,並提供 其它凸塊金屬擴散。 第1 A和1 B圖顯示一未經處理得習知晶 括基板10、元件最終金屬12和元件鈍化層 圓層級中的晶 有一金屬晶種 造方法。 涉及將晶片或 基板上。在覆 錫凸塊(solder I行電連接。 裝透過在半導 電接點而成為 元件直接安裝 。所獲得的封 metallization 做為一可焊接 的一阻障層。 於,提供與最 與鋁和鈍化層 強阻障以防止 圓。此元件包 14。基板10 5 200910557 可包括一種材料,其包含但不限於矽、钟化鎵、 矽鍺或其他可用於半導體產業的適當晶圓基板。 金屬12包含一種金屬,其典型為銘、銅或金、或 所形成的一種複合物。 元件鈍化層14典型包括氮化矽、氧化氮或其 此鈍化層並不連續,而是有已界定之不含鈍化 口,分別稱其為鈍化開口。此純化開口一般是圓 在元件中央。這些鈍化開口界定出一後續晶圓層 寸或覆晶封裝處理以製造連線並黏附在基板上時 沉積的區域。 第2 A圖顯示一以無電鎳處理所形成之傳統 的上視圖,且第2B圖顯示出以無電鎳處理所形 UBM 16的剖面視圖。此UBM 16部分覆蓋鈍化 附在最終金屬12上,並形成一層約1.0微米或更 UBM 16的上表面提供可放置凸塊並促進其黏附备 但是,以無電鎳來形成UBM有一些其他缺 鎳並無法黏附到鈍化層上。在某些情況下,因為 合金内的變異造成無電鎳的沉積不均勻,以及不 化層接點所造成的接點開口。此使得電子元件的 現問題,而無法提供穩定、低電阻的電接點。此 些接觸開口中還可能產生水氣,使得焊錫凸塊無 黏接,進而造成電接點產生問題。 此外,在不適於沉積無電鎳的電子元件上沉 可能很困難。舉例來說,除非可針對每一特定金 组酸鍾、 元件最終 這些材料 •類似物。 材料的開 形並集中 級晶片尺 可供金屬 UBM 16 成之傳統 層14,黏 厚的層。 J位置。 點。無電 最終金屬 一致的純 完整性出 外,在這 法恰當地 積無電鎳 屬而將無 6 200910557 電製程中的化學最佳化,否則純鋁、銅、和金可能無法恰 當地黏附在無電鎳層上。其他最終的金屬層可能不具有無 電鎳層該有的恰當導電性,因此無法提供較強的電性連接。 其他習知的覆晶和晶圓層級晶片尺寸封裝元件係使用 薄膜濺鍍來沉積一層薄金屬層,以做為u B Μ使用。但是, 這些濺鍍層非常昂貴且不像無電鎳層這麼厚。結果,造成 UBM的熱機械效能不佳。隨著市場對UBM產品的需求增 加之際,價格與效能壓力也迫使產業必須尋找效能更好的 薄膜沉積技術。 【發明内容】 本發明一特點是提供一種在金屬化晶種層上使用無電 鎳的凸塊下金屬結構,其可提供改良的熱-機械力、一致性 沉積、和與數種最終金屬層間的結構與電相容性。 【實施方式】 所揭示為一種凸塊下金屬化結構,其具有一薄膜金屬 層,可做為一可沉積無電鎳或無電鎳合金的晶種層。此晶 種層可以是任何一種能黏附在無電鎳上的材料或金屬。合 併使用無電鎳層與金屬晶種層,可創造出一種凸塊下金屬 化結構,其可提供改良之熱-機械強健性與脫落測試效能。 此用於晶圓層級封裝應用之改良的機械效能是利用以下來 達成:UBΜ結構隱含的低碎裂性、改善無電鎳與其他非傳 導表面間的黏性和使無電鎳UBM沉積最佳化。 200910557 透過使用晶種層,使得可將無電鎳當作UBΜ 不具恰當最終金屬合金(做為電接點)的元件上。 說,所揭示的 UBM具有一薄膜金屬晶種層,其容 相同的無電鎳沉積製程在電子元件的各種電接點金 例如铭、銅、和金。此外,其提供無電錦與不導電表 氧化物、氮化物和聚合物層)間優異的黏性。此外, 過移除製程中一主要變異來源而使無電鎳沉積製程 定。舉例來說,如果做為一未圖案化的毯覆層來使 UBM可排除在電子元件之各式電接點上進行之電 差異,該些變異是因為電子元件内主動元件間的互 成。 在電子元件的例子中,此金屬晶種層是沉積在 點開口上以密封此開口並創造出可供無電鎳沉積的 面。此晶種層也可沉積在鈍化接點開口以外的區域 以圖案化,以容許圖案化沉積無電鎳。 為製備此結構,可執行兩種不同方法。第3-6 用來形成改良之UBM結構的第一種實施方式。首 第3A及3B圖所示,利用濺鍍或電鍍沉積至少一金 層1 8,並將其最佳化以用於欲求得無電鎳沉積。此 種層18覆蓋鈍化層14和最終金屬層12。在例示的 式中,所沉積的金屬晶種層18是由IS銅合金、一層 (例如鈦)、接續在鋁銅合金之後的其他濺鍍材料、 沉積無電鎳的其他適當合金所組成。 而用在 舉例來 許使用 屬上, 面(如’ 其可透 趨於穩 用,此 鍍間的 動所造 鈍化接 最佳表 上並加 圖示出 先,如 屬晶種 金屬晶 實施方 狀結構 或可供 8 200910557 將金屬晶種層 1 8沉積在無電鎳上使得此結構更能將 鈍化開口和電子元件的電接點加以密封,藉以創造出更強 的電性連接,進而能改善覆晶或晶圓效能。 此外,此金屬晶種層18也容許無電鎮UBM 16可沉積 在最終金屬以及厚度太薄以致於無法形成電接點的脆弱結 構上。此也使得更多元的UBM可與更多數目的材料一起 使用。The under bumped metallization layer (under bump l, i (UBM) layer) is the support of the entire structure. The UBM surface is required and is used as the final metal layer between the solder and the metal pad. The UBM must meet several requirements, including, but not limited to, a strong and stable low resistance connection between the final metal layers, which can be bonded so that the seal can be sealed. It is isolated from the outside world and provides other bump metal diffusion. Figs. 1A and 1B show an unprocessed conventional substrate 10, a final metal 12 of the element, and a crystal in the circular layer of the element passivation layer. It involves placing the wafer or substrate. In the tin-clad bump (solder I row electrical connection. The mounting is directly mounted on the semi-conducting contact. The obtained metallization is used as a solderable barrier layer. Provided with the most aluminum and passivated The layer is strongly resistive to prevent rounding. This component package 14. The substrate 10 5 200910557 may comprise a material including, but not limited to, germanium, gallium carbide, germanium or other suitable wafer substrate useful in the semiconductor industry. A metal, typically of the order of copper, gold or gold, or a composite formed. The element passivation layer 14 typically comprises tantalum nitride, nitrogen oxide or a passivation layer thereof that is not continuous, but has a defined passivation-free The ports, referred to as passivation openings, respectively, are generally rounded in the center of the element. These passivation openings define a region that is deposited by subsequent wafer layer or flip chip processing to make the wires and adhere to the substrate. 2 A shows a conventional top view formed by electroless nickel treatment, and Fig. 2B shows a cross-sectional view of UBM 16 treated with electroless nickel. This UBM 16 part is covered with passivation attached to the most The upper surface of the final metal 12 and forming a layer of about 1.0 micron or more UBM 16 provides for the placement of bumps and facilitates adhesion. However, the formation of UBM with electroless nickel has some other nickel deficiency and cannot adhere to the passivation layer. In some cases, the variation in the alloy causes uneven deposition of electroless nickel and the contact opening caused by the contact of the layer. This causes problems with electronic components and cannot provide stable, low-resistance electrical contacts. Water vapor may also be generated in such contact openings, so that the solder bumps are not bonded, thereby causing problems in the electrical contacts. Furthermore, it may be difficult to sink electronic components that are not suitable for depositing electroless nickel. For example, unless For each specific gold group, the acid clock, the component, and finally these materials and the like. The material's open-form and concentrated-level wafer scale can be used to form the metal layer UBM 16 into a conventional layer 14, a thick layer. J position. Point. The uniform purity of the metal is out of the ordinary, in this method properly accumulate electroless nickel and will optimize the chemical in the process of 200910557, otherwise pure aluminum, copper, and gold may not be The method adheres properly to the electroless nickel layer. Other final metal layers may not have the proper conductivity of the electroless nickel layer, and thus cannot provide a strong electrical connection. Other conventional flip chip and wafer level wafer sizes The package components use thin film sputtering to deposit a thin metal layer for use as a U B. However, these sputters are very expensive and not as thick as the electroless nickel layer. As a result, the thermomechanical performance of the UBM is poor. As the demand for UBM products increases, price and performance pressures also force the industry to look for better performing thin film deposition techniques. SUMMARY OF THE INVENTION A feature of the present invention is to provide an electroless nickel on a metallized seed layer. A sub-bump metal structure that provides improved thermo-mechanical forces, consistent deposition, and structural and electrical compatibility with several final metal layers. [Embodiment] It is disclosed as an under bump metallization structure having a thin film metal layer which can be used as a seed layer for depositing electroless nickel or electroless nickel alloy. The seed layer can be any material or metal that can adhere to the electroless nickel. The combination of an electroless nickel layer and a metal seed layer creates a sub-bump metallization structure that provides improved thermal-mechanical robustness and shedding test performance. This improved mechanical performance for wafer level packaging applications is achieved by the low fragmentation implied by the UBΜ structure, improved adhesion between electroless nickel and other non-conductive surfaces, and optimized electroless nickel UBM deposition. . 200910557 By using a seed layer, it is possible to use electroless nickel as a component that does not have a proper final metal alloy (as an electrical contact). The disclosed UBM has a thin film metal seed layer that accommodates the same electroless nickel deposition process at various electrical contacts of electronic components such as ingot, copper, and gold. In addition, it provides excellent adhesion between the electroless luminescence and the non-conductive surface oxide, nitride and polymer layers. In addition, an electroless nickel deposition process is determined by removing a major source of variation in the process. For example, if it is an unpatterned blanket layer, the UBM can be excluded from the electrical differences made at the various electrical contacts of the electronic component due to the mutual interaction between the active components within the electronic component. In the case of an electronic component, the metal seed layer is deposited on the dot opening to seal the opening and create a surface for electroless nickel deposition. This seed layer can also be deposited in a region other than the passivation contact opening to allow patterning to deposit electroless nickel. To prepare this structure, two different methods can be performed. Sections 3-6 are used to form a first embodiment of a modified UBM structure. As shown in the first 3A and 3B, at least one gold layer 18 is deposited by sputtering or electroplating and optimized for electroless nickel deposition. This layer 18 covers the passivation layer 14 and the final metal layer 12. In the illustrated embodiment, the deposited metal seed layer 18 is comprised of an IS copper alloy, a layer (e.g., titanium), other sputter materials subsequent to the aluminum-copper alloy, and other suitable alloys that deposit electroless nickel. And used in the example to use the genus, the surface (such as 'the permeable can be stabilized, the plating between the plating made the best connection on the table and added the picture first, if it is a crystal metal crystal implementation square Structure or available 8 200910557 The deposition of the metal seed layer 18 on the electroless nickel makes the structure more able to seal the passivation opening and the electrical contacts of the electronic components, thereby creating a stronger electrical connection and thus improving the overlay. In addition, the metal seed layer 18 also allows the electroless town UBM 16 to be deposited on the final metal and on fragile structures that are too thin to form electrical contacts. This also allows for more UBMs. Use with a larger number of materials.

在其他實施方式中,此金屬晶種層18是在沉積無電鎳 之前先行沉積,藉以壓制無電鎳厚度中的元件依賴型變異。 接著,如第4A和4B圖所示,在金屬晶種層18上放 置一光阻圖案。此沉積的光阻層2 0可覆蓋住意欲用來沉積 無電鎳的區域。接著使用化學蝕刻劑將未被光阻層2 0保護 區域内不要的材料加以移除。接著再使用適當、習知的光 阻剝除製程將光阻2 0移除,留下圖案化的金屬晶種層1 8 覆蓋住鈍化開口内的最終金屬層12,如第5A和5B圖所 示。最後,執行無電鎳沉積,藉以創造出對最終金屬層1 2 具有良好黏附性的UBM 16,並在元件内提供較強的電子 連接性,如第6A和6B圖所示。 在例示的實施方式中,可使用鈦或其他濺鍍材料做為 黏接厚度約200~5,000埃(A)的材料。在其他例示的實施方 式中,可使用鋁銅合金做為用以黏接厚度約2,000~20,000 A之無電鎳的晶種層金屬材料。在其他例示的實施方式 中,無電鎳層的厚度大約在0.5微米至50微米間。一般來 9 14 200910557 說,圖案化晶種層的形狀為圓形,且較鈍化開口來得大 但是,可依據欲求凸塊高度而有特定直徑。 在另一實施方式中,如第10〜13圖所示,在鈍化層 上濺鍍沉積至少一金屬晶種層1 8,以使欲求的無電鎳沉 製程可最佳化。如第1 0 A和1 0 B圖所示,一光阻圖案係 光阻2 0 —同沉積, 接著,當光阻20就定位時,此無電鎳沉積製程即已 成。接下來,使用適當的光阻剝除製程將光阻2 0移除。 後,以所沉積的無電鎳層做為保護性遮罩並利用化學蝕 劑移除不必要的晶種金屬。此提供UMB 1 6與最終金屬 1 2間良好的黏附性並提供類似第6 Λ和6 B圖中很強的 連接性。 第7~9圖顯示出可容許無電鎳被最佳化成為在衝擊 掉落測試中可改善機械效能之下方結構的製程。在鈍化 14上方製造出一金屬晶種層18。接著,在此金屬晶種層 創造出一圖案化的光阻結構2 0。在此實施方式中,圖案 的光阻結構20包括一與鈍化開口重疊的部分,以及一與 化層14重疊的部分。接著,金屬晶種層1 8與後來的無 鎳UB Μ不僅與鈍化開口 15中的最終金屬層12重疊, 會與一部分的鈍化層14重疊。利用將UBM置放在一部 的鈍化層14上,元件變得更具耐熱性且機械強度更佳。 雖然在此所述採用圓形尺寸或是第6~9圖所示的幾 形狀,但在不悖離本發明精神範疇下也可使用其他不同 何形狀來取代例示的UBM和晶種層。例如,可採用方形 積 與 完 最 刻 層 電 和 曾 上 化 純 電 還 分 何 幾 10 200910557 此外,可用的幾何形狀參見US臨時申請案60/91 3337 (標 題:Bump Interconnect for Improved Mechanical and Thermo-Mechanical Performance),其全文在此併入做為參 考。 此外,透過容許製程去創造出其他可用於UBM的幾 何形狀’可使一無電鎳UBM的尺寸變成可恰當地用於所 求的UBM應用中,而不去管鈍化開口或電子元件件接點 的尺寸大小如何。或者,也可使用其他結構。舉例來說, 可建構出假凸塊或其他必要的結構。此外,此製程容許在 具有各式純化接觸開口大小的電子元件上創造出均一尺寸 的無電鎳圖案。 聯合電子元件工程委員會(JEDEC)制定的JESD22-B1 11標準中規範用來評估覆晶或晶圓層級之晶片能力的方 法乃是這些晶片必須能承受當一手提裝置掉落時,其中的 半導體元件所會感受到的機械震動力。這點非常重要,因 為這些元件都是用在行動電話、個人數位助理(PDA)等裝 置中,而這些裝置可能會頻繁地因使用者使用不慎而掉 落’但使用者又預期這些裝置的功能不會因掉落而有所影 響。JEDEC要求這些裝置必須能承受至少3〇次掉落’且 不會出現功能失效的情形。 第1 4、1 5圖示出從例示的ubμ結構(依照所述方法製 造而成)所獲得的測試結果。這些由無電鎳所製成的結構可 承受至少400次掉落,之後才會出現失效。此外’此無電 鎳元件在5 0 0次掉落後的失效率小於5 %。習知僅具有一濺 11 200910557 鍍UBM的元件失效的速度較快,在一次試驗中,習知UB Μ 元件在2 0 0次掉落後就出現失效。在另一試驗中,則是在 JEDEC規格中的3 0次掉落後就失效了。習知的濺鍍裝置 失效的比例也較高,在5 0 0次掉落後,其失效比例比本發 明的無電鎳UBM結構高出20%。目前揭示結構提供較強 的熱-機械穩定度,以及濺鍍金屬UBM的其他電安定性優 點。此外,目前揭示的不同形狀元件結構也可提高熱-機械 強度。 雖然已經參照示範性實施例呈現本揭露,但上述之描 述僅為說明之目的,不應視為本發明之範圍的限制。那些 熟悉技術之人士可在不悖離由申請專利範圍所提出之本發 明精神與範圍的情況下,對所述之實施例作出各種改良與 變動。將由接下來的申請專利範圍來確定本發明。 【圖式簡單說明】 爲了更完整地了解本揭露,現參照下述之圖式,其中 所有圖式中相同的元件符號代表相同的元件: 第1 Α圖描繪一晶圓在進行具有鈍化開口和最終金屬 層的處理前之上視圖; 第1B圖描繪一晶圓在進行具有鈍化開口和最終金屬 層的處理前之剖面視圖; 第2A圖描繪具有以無電鎳製程形成之習知UBM結構 之晶圓的上視圖; 12 200910557 第2B圖描繪具有以無電鎳製程形成之習知UBM結構 之晶圓的剖面視圖; 第3 A圖描繪具有尚未圖案化、薄金屬晶種層沉積於 其上之晶圓的上視圖, 第3B圖描繪具有尚未圖案化、薄金屬晶種層沉積於 其上之晶圓的剖面視圖, 第4A圖描繪在金屬晶種層上之一圖案化光阻層的上 視圖, 第4 B圖描繪在金屬晶種層上之一圖案化光阻層的剖 面視圖; 第5 A圖描繪金屬晶種層上已露出的金屬被化亨蝕刻 且光阻被移除後該金屬晶種層的上視圖; 第5 B圖描繪金屬晶種層上已露出的金屬被化學蝕刻 且光阻被移除後該金屬晶種層的剖面視圖; 第6 A圖描繪出待無電鎳被沉積在圖案化的金屬晶種 層上後該已完成的UBM結構的上視圖; 第6 B圖描繪待無電鎳被沉積在圖案化的金屬晶種層 上後該已完成的UBM結構的剖面視圖; 第7A圖描繪出另一 UBM結構中放在金屬晶種層上之 一圖案化光阻層的上視圖; 第7B圖描繪在另一 UBM結構中放在金屬晶種層上之 一圖案化光阻層的剖面視圖; 13In other embodiments, the metal seed layer 18 is deposited prior to deposition of electroless nickel to suppress component-dependent variations in electroless nickel thickness. Next, as shown in Figs. 4A and 4B, a photoresist pattern is placed on the metal seed layer 18. The deposited photoresist layer 20 covers the area intended to deposit electroless nickel. The material that is not in the protected area of the photoresist layer 20 is then removed using a chemical etchant. The photoresist 20 is then removed using a suitable, conventional photoresist strip process, leaving a patterned metal seed layer 18 covering the final metal layer 12 within the passivation opening, as shown in Figures 5A and 5B. Show. Finally, electroless nickel deposition is performed to create UBM 16 with good adhesion to the final metal layer 12 and to provide strong electronic connectivity within the component, as shown in Figures 6A and 6B. In the illustrated embodiment, titanium or other sputter material may be used as the material for bonding thicknesses of about 200 to 5,000 angstroms (A). In other exemplary embodiments, an aluminum-copper alloy can be used as the seed layer metal material for bonding electroless nickel having a thickness of about 2,000 to 20,000 Å. In other exemplary embodiments, the electroless nickel layer has a thickness between about 0.5 microns and 50 microns. Generally speaking, the patterned seed layer has a circular shape and is larger than the passivation opening. However, it may have a specific diameter depending on the height of the bump to be desired. In another embodiment, as shown in Figures 10 to 13, at least one metal seed layer 108 is sputter deposited on the passivation layer to optimize the desired electroless nickel sink process. As shown in Figures 10A and 10B, a photoresist pattern is deposited as a photoresist, and then, when the photoresist 20 is positioned, the electroless nickel deposition process is completed. Next, the photoresist 20 is removed using a suitable photoresist strip process. Thereafter, the deposited electroless nickel layer is used as a protective mask and the chemical seed is used to remove unnecessary seed metal. This provides good adhesion between UMB 16 and final metal 12 and provides a strong connection similar to that of Figures 6 and 6B. Figures 7 through 9 show that the process of allowing electroless nickel to be optimized as a structure that improves mechanical performance in an impact drop test. A metal seed layer 18 is formed over the passivation 14. Next, a patterned photoresist structure 20 is created in the metal seed layer. In this embodiment, the patterned photoresist structure 20 includes a portion that overlaps the passivation opening and a portion that overlaps the layer 14. Next, the metal seed layer 18 and the subsequent nickel-free UB Μ overlap not only with the final metal layer 12 in the passivation opening 15, but also with a portion of the passivation layer 14. By placing the UBM on a passivation layer 14 of one part, the element becomes more heat resistant and mechanically stronger. Although a circular size or a plurality of shapes as shown in Figs. 6 to 9 are used herein, other different shapes may be used instead of the illustrated UBM and seed layer without departing from the spirit of the present invention. For example, the square product can be used to calculate the most recent layer and the last layer of pure electricity. 2009 10557 In addition, the available geometry can be found in US Provisional Application 60/91 3337 (Title: Bump Interconnect for Improved Mechanical and Thermo- Mechanical Performance), which is incorporated herein by reference in its entirety. In addition, by allowing the process to create other UBM-available geometries', the size of an electroless nickel UBM can be properly used in the desired UBM application without the need for passivation openings or electronic component contacts. What is the size? Alternatively, other structures can be used. For example, dummy bumps or other necessary structures can be constructed. In addition, this process allows for the creation of a uniform size electroless nickel pattern on electronic components having a variety of purified contact opening sizes. The method used in the JESD22-B1 11 standard developed by the Joint Electronic Components Engineering Committee (JEDEC) to evaluate the wafer-on-wafer or wafer-level wafer capability is that these wafers must be able to withstand the semiconductor components when a handheld device is dropped. The mechanical shock that you will feel. This is very important because these components are used in mobile phones, personal digital assistants (PDAs), etc., and these devices may be frequently dropped by the user's careless use, but the user expects these devices. The function will not be affected by the drop. JEDEC requires these devices to withstand at least 3 drops and no functional failure. Figures 14 and 15 illustrate the test results obtained from the illustrated ubμ structure (made according to the method). These structures made of electroless nickel can withstand at least 400 drops before failure occurs. In addition, the failure rate of this electroless nickel component after less than 500 drops is less than 5%. It is only known that there is a splash. 11 200910557 UBM-coated components fail faster. In one test, the conventional UB Μ components failed after 200 drops. In another test, it was invalid after 30 drops in the JEDEC specification. Conventional sputtering devices also have a higher proportion of failures, and after 5,000 drops, the failure rate is 20% higher than the electroless nickel UBM structure of the present invention. The disclosed structure now provides strong thermo-mechanical stability and other electrical stability advantages of sputtered metal UBM. In addition, the differently shaped component structures disclosed so far can also increase the thermo-mechanical strength. The present invention has been described with reference to the exemplary embodiments thereof, and the description is not intended to be construed as limiting the scope of the invention. Those skilled in the art can make various modifications and changes to the described embodiments without departing from the spirit and scope of the invention as claimed. The invention will be determined by the scope of the following patent application. BRIEF DESCRIPTION OF THE DRAWINGS For a more complete understanding of the present disclosure, reference is now made to the drawings, in which the same reference numerals represent the same elements throughout the drawings: Figure 1 depicts a wafer having a passivated opening and a top view of the final metal layer prior to processing; FIG. 1B depicts a cross-sectional view of a wafer prior to processing with a passivation opening and a final metal layer; and FIG. 2A depicts a crystal having a conventional UBM structure formed by an electroless nickel process Round top view; 12 200910557 Figure 2B depicts a cross-sectional view of a wafer having a conventional UBM structure formed in an electroless nickel process; Figure 3A depicts a crystal having a patterned, thin metal seed layer deposited thereon Round top view, Figure 3B depicts a cross-sectional view of a wafer having a patterned, thin metal seed layer deposited thereon, and Figure 4A depicts a top view of one of the patterned photoresist layers on the metal seed layer Figure 4B depicts a cross-sectional view of one of the patterned photoresist layers on the metal seed layer; Figure 5A depicts the exposed metal on the metal seed layer being etched and the photoresist removed a top view of the seed layer; Figure 5B depicts a cross-sectional view of the metal seed layer after the exposed metal on the metal seed layer is chemically etched and the photoresist is removed; Figure 6A depicts the nickel to be deposited a top view of the completed UBM structure after patterning the metal seed layer; FIG. 6B depicts a cross-sectional view of the completed UBM structure after electroless nickel is deposited on the patterned metal seed layer; Figure 7A depicts a top view of one of the patterned photoresist layers placed on the metal seed layer in another UBM structure; Figure 7B depicts one of the patterned lights placed on the metal seed layer in another UBM structure. Sectional view of the resist layer; 13

200910557 第8A圖描繪出在另一 UBM結構中,金屬晶種層上 露出的金屬被化學蝕刻且光阻被移除後該金屬晶種層的 視圖; 第8B圖描繪出在另一 UBM結構中,金屬晶種層上 露出的金屬被化學蝕刻且光阻被移除後該金屬晶種層的 面視圖; 第9A圖描繪出在另一 UBM結構中,待圖案化無電 被沉積在金屬晶種層結構之後,該已完成的U B Μ結構 上視圖; 第9Β圖描繪出在另一 UBM結構中,待圖案化無電 被沉積在金屬晶種層結構之後,該已完成的U 3 Μ结構 剖面視圖; 第10Α圖描繪出使用另一種可製造元件的方法時, 元件的上視圖,圖上示出在金屬晶種層上有一圖案化的 阻層; 第10Β圖描繪出使用另一種可製造元件的方法時, 元件的剖面視圖,圖上示出在金屬晶種層上有一圖案化 光阻層; ^ 第11Α圖描繪出使用另一種可製造元件的方法時, 元件的上視圖,所示元件為無電鎳已沉積在具有光阻層 金屬晶種層上; 第11Β圖描繪出使用另一種可製造元件的方法時, 元件的剖面視圖,所示元件為無電鎳已沉積在具有光阻 之金屬晶種層上; 已 上 已 剖 鎳 的 鎳 的 該 光 該 的 該 之 該 層 14 200910557 第1 2 A圖描繪出使用另一種可製造元件的方法時,該 元件的上視圖,所示為已從金屬晶種層之無電鎳層上將光 阻剝除後的元件圖; 第12B圖描繪出使用另一種可製造元件的方法時,該 元件的剖面視圖,所示為已從金屬晶種層之無電鎳層上將 光阻剝除後的元件圖; 第13A圖描繪出在無電鎳製程後和化學蝕刻已露出之 晶種層後,該已完成之UBM的上視圖; 第1 3 B圖描繪出在無.電鎳製程後和化學蝕刻已露出之 晶種層後,該已完成之UBM的剖面視圖; 第1 4圖繪示出各類型UBM在掉落测試的結果,艽中 顯示含有無電鎳層的元件在較多次掉落後才出現失效; 第1 5圖繪示出各類型UBM在掉落測試的結果,其中 顯示含有無電鎳層的元件在500次掉落後的失效率較低。 本文提出之範例描述特定之實施例,且不預期上述之 範例以任何方式作為限制。 【主要元件符號說明】 10 基板 12 最終金屬層 14 元件鈍化層 16 凸塊下方金屬層(UBM) 18 金屬晶種層 15200910557 Figure 8A depicts a view of the metal seed layer after the metal exposed on the metal seed layer is chemically etched and the photoresist is removed in another UBM structure; Figure 8B depicts another UBM structure a surface view of the metal seed layer after the metal exposed on the metal seed layer is chemically etched and the photoresist is removed; FIG. 9A depicts that in another UBM structure, the pattern to be electrolessly deposited on the metal seed crystal After the layer structure, the completed UB Μ structure is a top view; FIG. 9 depicts a cross-sectional view of the completed U 3 Μ structure after another electroless deposition of the metal seed layer structure in another UBM structure. Figure 10 depicts a top view of the component when using another method of fabricating the component, showing a patterned resist layer on the metal seed layer; Figure 10 depicts the use of another fabricated component In the method, a cross-sectional view of the component, showing a patterned photoresist layer on the metal seed layer; ^ Figure 11 depicts a top view of the component when using another method of fabricating the component, the component shown is no Nickel has been deposited on a metal seed layer with a photoresist layer; Figure 11 depicts a cross-sectional view of the device using another method of fabricating the component, the component being an electroless nickel deposited on a metal seed with photoresist On the layer; the layer of nickel that has been nickel-plated nickel. 200910557 Figure 12A depicts a top view of the component when it is used to process another component. A component diagram of the photoresist on the electroless nickel layer of the seed layer; Figure 12B depicts a cross-sectional view of the component using another method of fabricating the component, showing the absence of electricity from the metal seed layer a diagram of the component after stripping the photoresist on the nickel layer; Figure 13A depicts a top view of the completed UBM after the electroless nickel process and after chemical etching of the exposed seed layer; Figure 13B depicts The cross-sectional view of the completed UBM after the electroless nickel process and the chemical etching of the exposed seed layer; Figure 14 shows the results of the drop test of each type of UBM, the sputum shows no electricity The components of the nickel layer are only after many times Failure occurred; Figure 15 depicts the results of the drop test for each type of UBM, showing that the component containing the electroless nickel layer had a lower failure rate after 500 drops. The examples presented herein are illustrative of specific embodiments and are not intended to be limiting in any way. [Main component symbol description] 10 Substrate 12 Final metal layer 14 Component passivation layer 16 Under bump metal layer (UBM) 18 Metal seed layer 15

Claims (1)

200910557 十、申請專利範圍: 1 . 一種凸塊下金屬化(UBM)結構,包含: 一半導體基板,具有一鈍化層形成於其上和經由該鈍化 層中的多個開口而暴露出來的多層最終金屬層; 一金屬晶種層,形成在每一可暴露出最終金屬層的開口 上方並延伸超過該每一開口; 該金屬晶種層形成在如氮化物、氧化物或各種可做為電 子元件之最終鈍化層的非傳導性材料上方; 一金屬化層,利用無電沉積而形成在該金屬晶種層上。 2. 如申請專利範圍第1項所述之UBM結搆.其中該金屬 晶種層是在沉積無電鎳之前沉積,以抑制無電鎳厚度的 元件依賴型變化。 3. 如申請專利範圍第1項所述之UBM結構,其中該金屬 晶種層是在沉積無電鎳UBM之前被沉積用來密封該些 鈍化開口並電接觸該電子元件。 4. 如申請專利範圍第1項所述之UBM結構,其中該金屬 晶種層是在沉積無電鎳U B Μ之前被沉積,以使其大小 可恰當地用在意欲進行的凸塊應用中並被最佳化以達 成熱-機械效能,而不去管純化開口的大小或形狀或是 電子元件的電接觸。 16 200910557 5. 如申請專利範.圍第1項所述之UBM結構,其中一金屬 晶種層被沉積以使無電錄可被應用在元件晶圓之極薄 的最終金屬和脆弱結構上。 6. —種凸塊下金屬化(UBM)結構,包含: 一半導體基板, 至少一最終金屬層,其中該至少一最終金屬層是形成在 至少一部分的該半導體基板上; 一鈍化層,其中該鈍化層是形成在至少一部分的該半導 體基板上’ 其中該鈍化層包括多個開口, 其中該鈍化層是由一非傳導性材料所形成, 其中該至少一最終金屬層是經由該些開口而暴露出來; 一金屬晶種層, 其中該金屬晶種層是形成在該鈍化層上並覆蓋該些開 σ ; 一金屬化層; 其中該金屬化層是形成在該金屬晶種層上方, 其中該金屬化層是由無電鎳沉積而成。 7. 如申請專利範圍第6項所述之UBM結構,其中該金屬 晶種層是在沉積無電鎳之前沉積,以抑制無電鎳厚度的 元件依賴型變化。 17 200910557 8. 如申請專利範圍第6項所述之UBM結構,其中該金屬 晶種層是在沉積無電鎳UBM之前被沉積用來密封鈍化 層中的該些開口並電接觸該電子元件。 9. 如申請專利範圍第6項所述之UBM結構,其中該金屬 晶種層是在沉積無電鎳UBM之前被沉積,以使其大小 可恰當地用在意欲進行的凸塊應用中並被最佳化以達 成熱-機械效能,而不去管純化開口的大小或形狀或是 電子元件的電接觸。 10.如申請專利範圍第6項所述之UBM結構,其中一金屬 晶種層被沉積以使無電鎳可被應用在元件晶圓之極薄 的最終金屬和脆弱結構上。200910557 X. Patent Application Range: 1. A sub-bump metallization (UBM) structure comprising: a semiconductor substrate having a passivation layer formed thereon and a plurality of layers exposed through a plurality of openings in the passivation layer a metal seed layer formed over each opening that exposes the final metal layer and extending beyond each of the openings; the metal seed layer being formed in, for example, a nitride, an oxide, or various electronic components Above the non-conductive material of the final passivation layer; a metallization layer formed on the metal seed layer by electroless deposition. 2. The UBM structure of claim 1, wherein the metal seed layer is deposited prior to depositing the electroless nickel to suppress component-dependent changes in the thickness of the electroless nickel. 3. The UBM structure of claim 1, wherein the metal seed layer is deposited to seal the passivation openings and electrically contact the electronic component prior to depositing the electroless nickel UBM. 4. The UBM structure of claim 1, wherein the metal seed layer is deposited prior to depositing the electroless nickel UB , so that its size can be properly used in the desired bump application and Optimized to achieve thermo-mechanical performance without the need to purify the size or shape of the opening or electrical contact of the electronic components. 16 200910557 5. A UBM structure as described in claim 1, wherein a metal seed layer is deposited such that electroless recording can be applied to the extremely thin final metal and fragile structures of the component wafer. 6. A sub-bump metallization (UBM) structure comprising: a semiconductor substrate, at least one final metal layer, wherein the at least one final metal layer is formed on at least a portion of the semiconductor substrate; a passivation layer, wherein the a passivation layer is formed on at least a portion of the semiconductor substrate' wherein the passivation layer includes a plurality of openings, wherein the passivation layer is formed of a non-conductive material, wherein the at least one final metal layer is exposed through the openings a metal seed layer, wherein the metal seed layer is formed on the passivation layer and covers the opening σ; a metallization layer; wherein the metallization layer is formed over the metal seed layer, wherein The metallization layer is deposited from electroless nickel. 7. The UBM structure of claim 6, wherein the metal seed layer is deposited prior to depositing electroless nickel to suppress component-dependent changes in electroless nickel thickness. The UBM structure of claim 6, wherein the metal seed layer is deposited to seal the openings in the passivation layer and electrically contact the electronic component prior to depositing the electroless nickel UBM. 9. The UBM structure of claim 6, wherein the metal seed layer is deposited prior to depositing the electroless nickel UBM so that its size can be properly used in the desired bump application and is most The thermal-mechanical performance is achieved without the need to clean the size or shape of the opening or the electrical contact of the electronic components. 10. The UBM structure of claim 6, wherein a metal seed layer is deposited such that electroless nickel can be applied to the extremely thin final metal and fragile structure of the component wafer. 1818
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