200903767 九、發明說明： 【發明所屬之技術領域】 本發明是有關一種晶片型保險絲及其製造方 法，特別是指一種可將晶片型保險絲之保險絲線路多 層保護，避免保險絲線路因突發電流過高導致燒燬 時，保險絲線路斷開所產生之火花不致外洩者。几坎 【先前技術】 按，習見之晶片型保險絲，基本上設有一基板， 基板的表面形成一隔熱層，隔熱層的上方被覆一層可 將該隔熱層包覆並貼覆到隔熱層外周之基板表面的 金屬膜，金屬膜的上方形成第一層金屬層，第—層金 屬層的上方再形成第二金屬層，第二金屬層的上方形 成一保濩層。如此，利用兩金屬層分別具 而作為保險絲部。 惟上述之習知晶片型保險絲，由於僅以一層保護 層包覆在最外層’當保險絲線路因突發電流過二導致 燒燬時，保險絲線路斷開所產生之火花外洩，對帝 電路造成傷害。 ％ 【發明内容】 發明人有鑑於前述先前技術之缺點，乃依其從事 各種晶片型保險絲之製造經驗和技術累積，針對上述 缺失悉心研究各種解決的方法，在經過不斷的研究、 200903767 貫驗與改良後，終於開發設計出本發明。 因此，本發明之主要目的在提供一種晶片型保險 絲，係藉由兩架橋層及熱吸收層的設置，可避免保險 絲線路因突發電流過高導致燒燬時，保險絲線路斷開 所產生之火花不慎外洩者。200903767 IX. Description of the Invention: [Technical Field] The present invention relates to a wafer type fuse and a method of manufacturing the same, and more particularly to a multi-layer protection of a fuse line of a wafer type fuse to prevent a fuse current from being excessively high in burst current When the burn is destroyed, the spark generated by the disconnection of the fuse line will not cause leakage.千坎 [Prior Art] According to the wafer-type fuse, it is basically provided with a substrate, the surface of the substrate is formed with a heat insulation layer, and a layer of the heat insulation layer is coated to cover and coat the heat insulation layer to the heat insulation layer. A metal film on the surface of the substrate on the outer periphery of the layer, a first metal layer is formed over the metal film, a second metal layer is formed over the first metal layer, and a protective layer is formed on the second metal layer. Thus, the two metal layers are used as the fuse portions, respectively. However, the above-mentioned conventional chip type fuses are covered in the outermost layer with only one protective layer. When the fuse line is burnt due to the sudden current exceeding two, the spark generated by the disconnection of the fuse line leaks, causing damage to the circuit. . [Invention] In view of the above-mentioned shortcomings of the prior art, the inventors have been engaged in the manufacturing experience and technical accumulation of various wafer-type fuses, and have carefully studied various solutions for the above-mentioned deficiencies, and have undergone continuous research, 200903767 continuous improvement and improvement. After that, the invention was finally developed and designed. Therefore, the main object of the present invention is to provide a wafer type fuse, which is provided by two bridge layers and a heat absorbing layer, so as to prevent a spark generated when the fuse line is broken due to a sudden high current caused by a fuse line being broken. Be careful.
根據上述之目的，本發明乃提供一種晶片型保險 絲之製造方法’係以下列之步驟製作形成，包括：基 板’月洗步驟、第—聚合物層印刷步驟、第一架橋層形 j步驟、保險絲線路形成步驟、熱吸收層形成步驟、 第二聚合物印刷步驟、第二架橋層形成步驟、保護層 形成步驟、型號印刷步驟、背面電極形成步驟、端^ 連接電極形成步驟及焊接層形成步驟。 、為便貴審查委員能對本發明之目的'形狀、構 =置特徵及其功效，做更進一步之認識與瞭解，兹 舉貫施例配合圖式，詳細說明如下： 【實施方式】 本發明之晶片型保險絲，其製造步驟包括·· 基板清洗步驟：對氧化鋁基板Γ1進行清洗 ΪΑ、1Β圖所示）； 乐 :合物層印刷步驟：於基板u上印 +仃的聚合物層21、22，該兩條相互 S 91 no ,χ 丨1丁 <聚合物 θ 係设於基板表面的内側，並不與其也, 緣連接（如第2A、2B圖所示）； 、土邊 200903767 架橋層形成步驟：於上述聚合物層21、22的上 方被覆一架橋層31 ’架橋層31的範圍包含兩聚合物 層21、22的周邊及上方，而將兩聚合物層21、 完全包覆，架橋層31和兩聚合物層2卜22之間的基 板上方形成—密閉的空間32(如第3 A、3B圖所示）； 保險絲線路形成步驟：於架橋層31上方及架橋 層外圍的基板11上方佈設保險絲線路41，該保險絲 線路41呈(如第4A、4B圖所示）； 熱吸收層形成步驟：於保險絲線路4丨的橫向部 份的上方形成—熱吸收層51，該熱吸收層51係完全 包覆保險絲線路41的橫向部份之上方及其上下兩 側’其使用多孔性陶瓷材料，以吸收保險絲線路 產生的熱，降低保險絲因熔斷產生火花外洩（如第 5A、5B圖所示）； 聚合物印刷步驟：於熱吸收層5 1的上方，相對 ϋ 至前述聚合物層21、22的位置，再形成兩道相互平 行的第二聚合物層61、62，兩第二聚合物層Q 之間有一距離（如第6A、6B圖所示）； 架橋層形成步驟：於上述第二聚合物層61、62 的上方被覆一第二架橋層71，該第二架橋層71的範 圍係包含聚合物層61' 62的周邊及其上方，當第二 架橋層7i完全包覆兩聚合物層61、62後，兩^合^ 層61、62之間的基板上方即形成一第二空間72(如第 200903767 7 A、7 B圖所示）； 保濩層形成步驟：於上述第二架橋層71的外周 形成一可將該第二架橋層完全包覆之保護層81，該 保護層81可使用環氧樹脂（ep0Xy)材料以防止氧化 (如第8A、8B圖所示）； 型號印刷步驟：於保護層8〗上方表面將標示保險 絲線路規格或承受電流強度之規格91印刷至其上方（ 如第9A、9B圖所示）； 背面電極形成步驟：在基板丨i的底部兩端印刷金 屬背面電極1〇1、102(如第1〇A、1〇B圖所示）； 端面連接電極鍍膜形成步驟：在整體的兩側形成 端面電極m、112(如第UA、UB圖所示）； 焊接層形成步驟：在兩側形成—包覆端面電極 1、112和背面電極101、1〇2的焊接層12卜122，以 便晶片得焊接於電路板上（如第12A、12B圖所示）。 如笛：?岡由上-述衣作步驟所製成之晶片型保險絲200， 71及不’由於在晶片内部設有兩道架橋層31、 電产過=閉空間32'72,故當保險絲線路41因突發 線路斷開時’透過層層隔離，得避免保險絲 =開所產生之火花外洩。 法，確實且本發明之晶片晶保險絲及其製造方 既未見於Cl未=構造及其製造方法，其 市面上亦未見有任何類似的產 200903767 品，是以，其具有新穎性應無疑慮。另外，本發明所 ，獨特特徵以及功能遠非習用所可比擬，所以直 進步性’而符合我國專利法有關 <專利之以要件之規定，乃依法提㈣利申妹。 U上所述，僅為本發明較佳具體實施例，月 明之構造特徵並不侷限於此，任何熟悉該項技： 本發明領域内’可輕易思及之變化或修匕； 在以下本發明之申請專利範圍。 j /㈡盍 200903767 【圖式簡單說明】 第ΙΑ、1B圖為本發明之晶片型保險絲一製 &步驟製成品的上視圖與剖面圖； 弟2A、则為本發明之晶片型保險絲的第二製 化^驟製成品的上視圖與剖面圖； 第3B圖為本發明之晶片型保險絲的第三製 k v称‘成品的上視圖與剖面圖； r &第4A、4B圖為本發明之晶片型保險絲的第四製 化步驟製成品的上視圖與剖面圖； 1第5A、5B圖為本發明之晶片型保險絲的第五製 k步驟製成品的上視圖與剖面圖； &第6A、6B圖為本發明之晶片型保險絲的第六製 •步驟製成品的上視圖與剖面圖； 、第7A、7B1I為本發明之晶片型保險絲的第七製 步心製成品的上視圖與剖面圖； 、第8A、8B圖為本發明之晶片型保險絲的第八製 ^步<1+製成品的上視圖與剖面圖； 、第9A、9B圖為本發明之晶片型保險絲的第九 k步驟製成品的上視圖與剖面圖； 第1〇A、1〇B圖為本發明之晶片型保險絲的第十 ‘造步驟製成品的上視圖與剖面圖； 第HA、11B圖為本發明之晶片型保險絲 一製造步驟製成品的上視圖與剖面圖； 十 200903767 第12A、12B圖為本發明之晶片型保險絲的第十 二製造步驟製成品的上視圖與剖面圖； 第2圖為本發明之晶片型保險絲的製成品剖面 圖。 【主要元件符號說明】 11 :氧化鋁基板 21、 2 2 :聚合物層 31 ： 架橋層 32 ： 空間 41 ： 保險絲線路 51 ： 熱吸收層 61、 62 :第二聚合物 71 ： 第二架橋層 72 ： 空間 81 ： 保護層 91 ： 電>/il規格表不 101 、102 :背面電極 111 、112 :端面電極 121 、122 :焊接層 200 :晶片型保險絲 11According to the above object, the present invention provides a method for manufacturing a wafer type fuse, which is formed by the following steps, including: substrate 'month wash step, first polymer layer printing step, first bridge layer step j, fuse A line forming step, a heat absorbing layer forming step, a second polymer printing step, a second bridge layer forming step, a protective layer forming step, a pattern printing step, a back electrode forming step, a terminal connecting electrode forming step, and a solder layer forming step. For the sake of the examination, the reviewer can make a further understanding and understanding of the shape, structure, and function of the present invention. The following examples are combined with the drawings, and the details are as follows: [Embodiment] The present invention The wafer type fuse includes a substrate cleaning step: cleaning the alumina substrate Γ1, as shown in FIG. 1; and a layer printing step: printing a polymer layer 21 on the substrate u, 22, the two mutual S 91 no , 丨 丨 1 butyl < polymer θ system is located on the inner side of the substrate surface, and is not connected with its edge (as shown in Figures 2A, 2B);, soil edge 200003767 bridging a layer forming step: coating a bridge layer 31 above the polymer layers 21, 22, the bridge layer 31 includes a periphery and an upper portion of the two polymer layers 21, 22, and completely coating the two polymer layers 21, A closed space 32 is formed above the substrate between the bridging layer 31 and the two polymer layers 2 (as shown in FIGS. 3A and 3B); a fuse line forming step: a substrate above the bridging layer 31 and at the periphery of the bridging layer Fuse line 41 is placed above 11 The fuse line 41 is formed (as shown in FIGS. 4A and 4B); the heat absorbing layer is formed by forming a heat absorbing layer 51 over the lateral portion of the fuse line 4, the heat absorbing layer 51 completely covering the fuse line Above the lateral portion of 41 and its upper and lower sides, it uses a porous ceramic material to absorb the heat generated by the fuse circuit, reducing the spark leakage caused by the fuse (as shown in Figures 5A and 5B); Step: above the heat absorbing layer 51, two second polymer layers 61, 62 are formed in parallel with respect to the positions of the polymer layers 21, 22, and there is a second polymer layer Q between the two a distance (as shown in FIGS. 6A and 6B); a bridging layer forming step: coating a second bridging layer 71 over the second polymer layers 61, 62, the second bridging layer 71 comprising a polymer layer At the periphery of 61'62 and above, when the second bridge layer 7i completely covers the two polymer layers 61, 62, a second space 72 is formed above the substrate between the two layers 61, 62 (such as 200903767 7 A, 7 B shows); A protective layer 81 for completely covering the second bridging layer is formed on the outer periphery of the second bridging layer 71. The protective layer 81 can be made of epoxy (ep0Xy) material to prevent oxidation (as shown in FIGS. 8A and 8B). Model printing procedure: Print the specification of the fuse line specification or current intensity 91 on the upper surface of the protective layer 8 (as shown in Figures 9A and 9B); the back electrode formation step: on the substrate 丨The metal back electrodes 1〇1 and 102 are printed on both ends of the bottom of i (as shown in FIG. 1A and FIG. 1B); the end surface connection electrode plating film forming step: forming end surface electrodes m and 112 on both sides of the whole body (eg, UA, UB diagram); solder layer forming step: forming on both sides - covering the end face electrode 1, 112 and the back electrode 101, 1 〇 2 of the solder layer 12 122, so that the wafer is soldered to the circuit board (such as Figures 12A and 12B show). Such as the flute: the wafer-type fuse 200, 71 made by the upper-shoe-making step and not because of the two bridge layers 31 inside the wafer, the electricity production = the closed space 32'72, so the fuse When the line 41 is disconnected due to the burst line, the layer is separated by the layer to avoid the leakage of the spark generated by the fuse = opening. The method and the wafer die of the present invention and the manufacturer thereof are neither found in the structure of the Cl nor the structure and the manufacturing method thereof, and there is no similar product of the product of the product No. 200003767 on the market, so that the novelty should be undoubtedly considered. . In addition, the unique features and functions of the present invention are far from being comparable to the conventional ones, so it is straightforward and conforms to the requirements of the patent law of the Chinese patent law, which is based on the law (4) Li Shenmei. U is only a preferred embodiment of the present invention, and the structural features of the moon are not limited thereto. Any familiarity with the technique: a change or repair that can be easily considered in the field of the invention; The scope of the patent application. j / (2) 盍200903767 [Simple description of the drawings] The first and second drawings are a top view and a cross-sectional view of the wafer-type fuse of the invention, and the second step is the wafer-type fuse of the present invention. Figure 2B is a top view and a cross-sectional view of the third system of the wafer type fuse of the present invention; r & 4A, 4B is the present invention A top view and a cross-sectional view of the finished product of the wafer type fuse; 1A, 5B, 5B are a top view and a cross-sectional view of the fifth process of the wafer type fuse of the present invention; & 6A and 6B are a top view and a cross-sectional view of a sixth-step manufacturing step of the wafer type fuse of the present invention; and 7A and 7B1I are top views of the seventh-step finished product of the wafer type fuse of the present invention; FIG. 8A and FIG. 8B are a top view and a cross-sectional view of the eighth step <1+ finished product of the wafer type fuse of the present invention; and FIGS. 9A and 9B are diagrams of the wafer type fuse of the present invention. Top view and sectional view of the finished product of the nine-k step; Section 1A, 1 〇B is a top view and a cross-sectional view of a tenth manufacturing step of the wafer type fuse of the present invention; and FIGS. HA and 11B are a top view and a cross-sectional view of the finished product of the wafer type fuse of the present invention; 200903767 FIGS. 12A and 12B are a top view and a cross-sectional view showing the manufacture of the twelfth manufacturing step of the wafer type fuse of the present invention; and FIG. 2 is a cross-sectional view showing the finished product of the wafer type fuse of the present invention. [Main component symbol description] 11 : Alumina substrate 21, 2 2 : Polymer layer 31 : Bridge layer 32 : Space 41 : Fuse line 51 : Heat absorbing layer 61 , 62 : Second polymer 71 : Second bridge layer 72 : Space 81 : Protective layer 91 : Electric > / il specification table 101 , 102 : Back electrode 111 , 112 : End surface electrode 121 , 122 : Solder layer 200 : Wafer type fuse 11