TW200842213A - Polysilicon dummy wafers and process used therewith - Google Patents

Abstract

Non-production wafers of polycrystalline silicon are placed in non-production slots of a support tower for thermal processing monocrystalline silicon wafers. They may have thicknesses of 0.725 to 2 mm and be roughened on both sides. Nitride may be brown on the non-production wafers to a thickness of over 2 m without flaking. The polycrystalline silicon is preferably randomly oriented Czochralski polysilicon grown using a randomly oriented seed, for example, CVD grown silicon. Both sides are ground to introduce sub-surface damage and then oxidized and etch cleaned. An all-silicon hot zone of a thermal furnace, for example, depositing a nitride layer, may include a silicon support tower placed within a silicon liner and supporting the polysilicon non-production wafers with silicon injector tube providing processing gas within the liner.

Description

200842213 IX. Description of the Invention: TECHNICAL FIELD OF THE INVENTION The present invention generally relates to heat treatment of tantalum wafers. More specifically, there are non-productive crystals used in batch heat treatment of wafers. The invention also relates to polysilicon types that can be used as such non-productive wafers and for other applications. [Prior Art] Batch heat treatment is continued for use in several stages of the manufacture of entanglement circuits. A low temperature heat treatment deposits a layer of tantalum nitride by low temperature chemical vapor deposition (LPCVD), typically using chlorosilane and ammonia as precursor gases at a temperature range of about 700 °C. In one application, about 1 〇 0 nm of nitride was deposited on all wafers in the oven in each cycle. A similar process is used to deposit polycrystalline germanium and bismuth oxynitride. In addition, high temperature processes include oxidation, annealing, deuteration, and other processes that typically use higher temperatures, such as above 1 000 ° C or even 1 350 ° C. For large-scale commercial production, a vertically disposed wafer tower that conventionally uses a vertical furnace tube and supports a large number of wafers in the furnace tube is generally configured as shown in the schematic cross-sectional view of Fig. 1. The furnace tube 1 〇 includes a heat insulating heating cylinder 12 that supports a resistance heating coil 14 that is powered by a power supply not shown. A bell cover 1-6, usually composed of quartz, includes a top plate and is mounted inside the heating coil 14. An open inner lining 18 is mounted inside the bell jar 16. A support tower 20 is seated on a pedestal 22, and the pedestal 22 and the support tower 20 are typically surrounded by the lining 18 during the process. It consists of a vertically set slit, 5 200842213 A wafer set at a level that is intended to be heat treated in batch mode. A bulk injector 24 is disposed primarily between the liners 18 and has an outlet at the upper end for injecting process gases into the interior of the liner 18. A vacuum, not shown, removes the process gas through the bottom of the bell jar 16. The heating cartridge ι2, the cover 16, and the liner 18 can be raised vertically to allow the wafer to be transported into and out of the tower 20, although in some configurations these components are raised and lowered on the pedestal 22 and loaded The tower 20 does not move when it enters the bottom of the furnace tube 10. The bell jar 16 has an upper end that is closed to help maintain a common soaking temperature in the middle and upper portions of the bellows. This is called the hot zone where the temperature is controlled to have the best thermal process. However, the bottom of the bell jar 16 and the mechanical support of the pedestal 22 cause the lower half of the furnace tube to be low 'typically low enough that a thermal process such as chemical vapor deposition is not effective. This hot zone can exclude some of the lower slits of the tower 20. Conventionally, in low temperature applications, the tower, lining, and injector are composed of fused or fused alumina. However, the quartz column and injector are replaced by a turret and an inlet. A configuration of a turret that is available from Integrated Materials, Sunnyvale, Calif., is shown in the orthogonal view of FIG. The crucible bases 3 0, 3 2 are joined to three or four legs 3 4 having slits formed therein to support the plurality of wafers 38. The shape and length of the fingers between the slits vary with application and process temperatures. The manufacture of such a tower is described in U.S. Patent No. 6,455,395. The helium injector was also obtained from Integrated Materials, Inc., such as Zehavi et al., filed on July 8, 2005, the US patent application No. 1 1 /1 77,808, which should be lowered to the public. It is disclosed in U.S. Patent Application Publication No. 1 006/1 08 5 5 89. The lining has been proposed by Boyle et al. in U.S. Patent No. 7,133,546. The height of the tower can be adjusted according to the height of the tube and can include slits for more than 100 wafers. Such a large number of wafers initiate the use of thermal buffer wafers and dummy wafers to ensure that the production wafer encounters a uniform thermal environment in the hot zone. Both the top and bottom of the wafer stack within the tower are subjected to a hot end effect during the thermal process. Specifically, the bottom wafer is heated to a significantly lower temperature, and the temperature may be low enough to disable the nitride CVD process or other thermal processes. Accordingly, a hot-wafer wafer, rather than a substantially single-crystalline germanium production wafer, is placed in the uppermost and lowermost slits to thermally buffer the end of the stack and provide a more uniform production wafer therebetween. Temperature Distribution. Typically, the pedestal 22 is configured to accommodate a heat shield wafer that is left in the oven for many cycles. These heat shield wafers also function to remove impurities from the furnace tube environment, which tends to be denser at the top and bottom of the tube. It is not unusual to use up to six or twelve heatsink wafers at each end. These heat shield wafers are reused over multiple cycles, but current heat shield wafers are typically limited to no more than four or five cycles. - 矽 Production wafers are typically processed in batches of approximately 25 wafers, equivalent to the capacity of the carrier wafers that are transferred between manufacturing equipment. A large number of wafer slits allow multiple batches to be processed simultaneously. However, there may be cases where it is necessary to heat treat less than the maximum number of batches. These conditions include process development in the laboratory and occasional use of test wafers during process development. Nitride deposits have a tendency to be sensitive to the load of the oven. That is, if all of the wafer slits are not filled, the process will change. In these cases, the tower is still completely filled by inserting a test wafer into an empty slit. The polycrystalline germanium deposits are subjected to slightly similar loads. On the other hand, oxidation is a tendency to be relatively insensitive to loads. The test wafer and the heat shield wafer on the upstream side of the process gas flow at the top of the oven are monitored to prevent the generation of excess particles due to the build-up of the film. That is, after so many cycles, it needs to be replaced with new test and thermal wafers or regenerated wafers. On the other hand, the heat shield wafer at the bottom of the oven may still produce particles, but the particles do not affect the upstream production of wafers. Test and heat shield wafers are collectively referred to as non-production wafers. Thermal buffer wafers and test wafers are collectively referred to as non-production wafers. In the past, in conjunction with quartz towers, these non-productive wafers were typically composed of quartz (melted alumina), which was inexpensive and had the further advantage of being opaque to infrared radiation, thereby reducing the flooding of the tower by more than 4.5 microns ( The end effect of the radiation of the transmission edge of quartz I j ). However, like quartz towers, it is recognized that quartz buffers and test wafers provide the ability to produce particles that are unsatisfactory to the manufacture of advanced components. The use of production-type single crystal germanium wafers as non-productive crystals has not been entirely successful. It was observed that it would break easily when it was used repeatedly. Further in the nitride deposition process, tantalum nitride is deposited on a non-productive wafer to a large thickness and observed to be peeled off under repeated use, again causing particle problems. As a result, in advanced manufacturing, the lifetime of a single crystal germanium non-production wafer is limited to only a few cycles before it is discarded or regenerated. 8 200842213 Single crystal germanium wafers are currently used as test wafers. It is very similar to a production wafer except that it can be made from a lower grade of tantalum. It did not have a satisfactory performance. In the application of LPCVD tantalum nitride, it has been found that it has to be replaced after accumulating about 3,300 nm of nitride, since particles are emitted beyond this film thickness. Since some applications may deposit 1 1 nanometer of nitride per cycle, this thickness limitation means that the test wafers must be removed every three cycles or so. It is very common to clean these test wafers and then use them. However, re-cleaning is usually performed only twice because the single crystal wafer appears to produce streaks in further re-cleaning. Accordingly, after about 3 300 nm of nitride or three cycles, the test crystals are discarded. Non-carbonized niobium is also used to produce wafers, especially at higher temperatures. However, the "carbonization chopping wafer", especially the bulk carbonization of the C V D, is expensive and also suffers from the effect of the difference in thermal expansion coefficient between the tantalum carbide wafer and the crucible. Accordingly, it is desirable to have less expensive non-productive wafers that still provide superior performance, including ruggedness and the thickness of the larger nitride and other materials deposited thereon without peeling off. SUMMARY OF THE INVENTION One aspect of the present invention includes randomly oriented polycrystalline germanium (ROP Si), for example, by using Chai's long crystal method (C ζ 〇chra 1 ski, CZ) to grow seed crystals from Shi Xi Xuan liquid. . The seed crystal itself may be a randomly oriented polycrystalline germanium. It can be cut from a virgin polycrystalline ruthenium rod, also known as an electronic grade ruthenium, which is grown from decane-based materials by chemical vapor deposition (CVD). Alternatively, the seed crystal may be cut from a CZ grown ingot (i n g 〇 t) using a seed crystal cut from an ingot grown from a seed crystal derived from C V D . In the latter case, at least one of the distal generations of the seed crystal is derived from a primary polycrystalline germanium or a seed crystal derived from such a seed crystal grown into CVD.

Another aspect of the invention includes polysilicon buffer and test wafers, collectively referred to as non-production wafers. More preferably, the polycrystalline silicon wafers are cut from an ingot grown from a randomly oriented polycrystalline seed crystal, such as a seed crystal derived from C V D together. In a typical use, the non-productive wafers of the present invention are placed on a column with a single crystal germanium wafer and processed simultaneously in a furnace tube or other heat treatment apparatus. The non-productive wafer can be prepared in a multi-step process. After being cut from the ingot, the wafer can be etched, for example, in an alkaline solution to reduce or eliminate tension. The wafer, preferably after a etch process, undergoes a surface treatment to cause subsurface damage on its two major surfaces, and perhaps on its periphery. This surface damage can be performed by bead blasting or by grinding or machining. The surface damaged wafer is then subjected to a pickling step followed by ultrasonic cleaning. CZ grown or randomly oriented polycrystalline germanium can also be used to form processed structures due to their purity, good polycrystalline structure, and reinforcement. [Embodiment] We believe that single crystal germanium wafers are not suitable for use as heat shields and test crystals. It is known that production wafers are usually not perfect single crystals and may have some drawbacks, including dislocations and slips. However, such defects are typically minimal in terms of reasonable production yield, and the typical goal is to obtain and maintain low misalignment and no slip single crystal production wafers. Ο

If the edge of a single crystal wafer is broken under repeated use as a non-productive wafer, the gap may spread and break on the wafer along the cleavage planes. Commercial grade single crystal wafers are less suitable for use as non-production wafers because they are expensive. Although surface treatment is performed on the back side of the older wafer while polishing on the front surface, very advanced manufacturing requires polishing both sides of the front and back surfaces of the wafer. Single crystal wafers are also not suitable for repeated use as buffers and hot wafers because of their tendency to warp into a matrix shape or other curved shape after extensive high temperature processing. Semi-monocrystalline non-produced wafers have been used in the past, but they suffer from the inconvenience of many single-crystal non-productive wafers, for example, along a relatively good crystal plane. Instead of producing a single crystal wafer, it is preferred to form the non-productive crystals from polycrystalline germanium. The polycrystalline germanium non-product wafer 40 shown in the plan view of Figure 3 has a very similar shape to a single wafer germanium wafer, but has a visible random grain structure rather than a featureless surface of a single crystal wafer. The diameter of non-production wafers should fall within the industry standard applicable to the production of wafers, that is, the current circulation of wafers is about 200 or 300 mm, but the continuous use of 150 mm wafers is expected. To 450 mm wafers. Nonetheless, non-productive wafers are somewhat thicker and do not require the characteristics of standard wafers, such as orientation bevels or notches. Visible markers 42, such as product numbers and serial numbers, can be formed on the main surface. It is also biased to surface treat both sides of the non-product wafer to provide a more adherent basis for thicker layers deposited over multiple cycles. The original polycrystalline stone, also known as electronic grade silicon (ESS), is the source material used by most of the Chai method (匚乙) to be used as a wafer for the production of wafers. Wafer towers and other structures have recently been fabricated using native polycrystalline slabs as described in the two patent documents of Boyle et al. The primary multi-stone system, chemical vapor deposition using decane or halodecane is about 600. (: or more

The south temperature grows on the hot twin seed in the presence of hydrogen. For example, the dioxane's, he can be replaced by Shi Xi. See Wolf et al., Vatti Era, Lattice Press, 2000: Volume 1 Process Technology, Second Edition, pp. 5-8. The growth of native polycrystalline germanium from Shi Xi-sing has potential advantages due to its purity, but native polycrystalline germanium grown from chlorite or other halosilanes is more economical. Such a grown-up polycrystalline twin rod 5 has a cross-sectional structure as shown in Fig. 4, and the 纟σ crystal branch 5 2 extends outward from the seed rod 5 4 . Primary polycrystalline germanium generally grows with high internal stresses, which usually prevent the material from being processed. However, as explained by y e et al., 4 annealing the native polycrystalline $, it may be processed 'because annealing is eliminated', stress. The native cerium grown from pure decane (SiH4) generally has smaller crystallites than those grown from trichlorin. According to one aspect of the present invention, the guest can also use the single ^ ^ y- ^ η, ^ described by Wolf et al. on pages 8-21 of ibid, the Japanese and Japanese Chai's long crystal method. (CZ) grows into (pulsed or pushed from the crucible). The polycrystalline CZ矽 that is large can be taken from a few companies. Such ruthenium contains many crystallites, ^ ^ a turbulent pavement is usually a <100> oriented microcrystal group within ±20 degrees of the surface normal, although it may be obtained under appropriate conditions such as <111> or <11〇 > Other biased orientations. The semi-single crystal 12 200842213 material can be surface treated. It has no tendency to crack propagation compared to single crystal germanium, but cracks can still propagate due to better orientation. It is also possible to obtain polycrystalline shreds per stone in each of the Shiyang, but the purity level is lower than that of the polycrystalline stone grown from CZ. In general, according to one aspect of the invention, polycrystalline cz矽, which is tilted

For random orientation, a polycrystalline silicon (R0Psi) can be used instead of a typical single crystal seed crystal or a polycrystalline seed crystal obtained from a semi-single crystal stone. . A standard C# crystal growth furnace tube can be used, but should include a conical heat shield that extends into the 40 mm surface of the melt surface. The chamber pressure for backfilling chlorine can be maintained in the range of 丨〇 to 5 Torr. After the primary polysilicon or the CZ charge that has been discarded has been melted and the temperature is stable, the seed is immersed in the surface of the melt and held therein until the crystal is smooth and smooth. New moon type. The seed crystal is then pulled at a rate sufficient to prevent the neck of the diameter below the seed crystal from forming. A simple conical expansion region joining the seed 2 m or 300 mm ingot can be extended by more than 10 to 20 cm. The pull rate is then adjusted to maintain the desired crystal k. The polycrystalline crucible cZ crystal can be pulled at a faster rate than the single crystal cz ingot. At this pull tail, only the minimum end end aper is required. The crystal rods that are pulled out should be slowly cooled in the general environment. Fig. 5 is a cross-sectional view showing a polycrystalline CZ crystal rod 60 grown from the day of the day using a polycrystalline seed crystal of the original system of the shovel or the smectite precursor. It is observed that the shape is slightly irregular. (1) The outer side of the outer zone 62 and the shape: the size of the symmetry is usually ... the centimeter is called the larger crystallite. . 64. This figure does not accurately show the size of the crystallites. In some implementations 13 200842213, 3 to 10 mm of crystallites are randomly scattered on the wafer. In general, the growth conditions can be varied to control the distribution to an expected distribution within 1 to 1 mil. One embodiment of the CZ polycrystal growth of the present invention uses a seed rod cut from the outer region of the native polycrystalline ingot 50 along the axis of the ingot 50 after annealing the ingot 50 to allow processing thereof. 6 6, shown in Figure 4. The native polycrystalline seed crystal used for CA growth produces the ingot shown in the cross-sectional view of Figure 5.

6 0. The material of such a C-crystal rod 60 can be characterized by a C V D source, since its crystal structure is derived from the native polycrystal produced by CVD. The ingot 60 was grown by a Kayex of Rochester, New York, under the direction of the inventors, using a twin seed rod having a diameter of about 1 cm and a length of about 20 cm. Seed crystals of two primary polycrystalline germanium materials formed from decane and trichloromethane as CVD precursor gases produce substantially similar CZ crystal growth results. Laue X-ray experiments were used to create slicing of wafers or wafers of such materials. It is determined that the polycrystalline germanium exhibits crystallites that are substantially randomly oriented and that there is no preferred conventional orientation relative to the ingot axis or other axis. It is possible to use a polycrystalline CZ ingot 70, shown in the cross-sectional view of Fig. 6, which may be the ingot of Fig. 5, as a source of further seeding, for example by crystallization from the ingot 7 The radial plug 7 8 or its thick section is cut and used as a seed for another generation of polycrystalline CVD source. Specifically, the end of the plug 7 8 may have a smaller crystallite size near the outer edge of the ingot and is a preferred portion of the seed that contacts the crucible melt. If it is necessary to obtain a seed rod of sufficient length, a shorter ROPSi seed crystal may be welded or otherwise joined to a longer crystal rod because most of the seed crystal 14 200842213 rod assembly will not be immersed in the melt. And the longer ingot can be grown into the next generation 来源 source CZ ingot from the seed developed from the previous generation. CVD source seed crystals comprise the first generation of native polycrystals grown from any type of flood-containing material, including butane, monochloromethane, dichlorodecane, trichlorodecane, and tetrachlorodecane and decane. And the next generation cut from C Ζ polycrystalline enamel has a seed crystal that can be traced back to the native polycrystalline seed crystal. Ρ Other types of polycrystalline germanium, especially randomly oriented polycrystalline germanium, are used in combination with non-productive wafers of the invention. The polycrystalline silicon wafers may be formed by casting or by seeding of a seed crystal other than the native polycrystalline germanium. The fabrication of buffers and test wafers starting with polycrystalline ingots follows a process that follows the process of fabricating a single crystal from a single crystal ingot. It should have a slightly larger diameter than the wafer. The advanced commercial production of 200 mm gradually changed to 300 mm, although the standard wafer size was still 亳米, 100 mm, 1.25 mm, and 150 mm. It is expected that there will be a diameter of 450 mm in the next life. Polycrystalline ROPSi or other polycrystalline germanium wafers may be formed using the process 80 illustrated in Figure 7, which incorporates and modifies the standard fabrication wafer process described on pages 22-31 of Wolf et al. and in Boyle et al. - references The process described to form a native polycrystalline column. Take. Can require and manufacture results, some steps can be omitted. The CZ can be easily processed without further annealing, possibly because the polysilicon is effectively annealed from the CZ pull. At step 82, preferably the stone blade or diamond slurry is used from the crystal with a wire saw or an internal or external circular saw. CVD CVD 矽 前 前 前 矽 矽 矽 矽 矽 矽 矽 矽 矽 矽 矽 矽 矽 矽 矽 矽 矽 矽 CVD CVD CVD CVD CVD CVD CVD CVD CVD CVD CVD CVD CVD CVD CVD CVD CVD CVD CVD CVD CVD CVD CVD CVD CVD CVD CVD CVD CVD CVD Next 15

200842213 Polycrystalline wafer. At step 84, the polysilicon wafer is ground to the desired circular shape. The Blanchard mill can use diamond abrasive particles to flatten both sides of the wafer in a similar manner to the grinding. The edges are preferably shaped into wafers. The thickness of the production wafer is usually 2 mm. The wafer is 0. 7 7 5 m of the wafer or 300 square meter wafer. It is expected that the buffer wafer will be as rough as possible, so thicker non-production wafers have an advantage. The initial non-production wafer batch is prepared to have a thickness of 1 〇 to 15 or even 2 mm. That is, the cross-sectional view as in Fig. 8 of the non-productive wafer 100 preferably has a thickness t in the range of 0·725 to 15 mm or perhaps to 2 mm. Most of the production equipment can accommodate a slightly thicker wafer. However, it is expected that the thickness will be substantially satisfactory for commercial use of the production wafer, non-productive wafers, although the roughness may be lower than for thick wafers. Grinding introduces subsurface processing damage, as shown in Fig. 8, cracking; Xi 102 and crack, slit 1〇4 to 25 to 5 μm deep from the two main surfaces 106, 1〇8 of the thickness t

U.S. Patent No. 11/521,199, issued to theU. The stability of the film depends on it. This feature, when grown on a non-production round, stabilizes the accumulation of thick deposits deposited during many production cycles to reduce spalling and resulting particles. Wafer cutting provides the processing damage you need. It is noted that there is no polishing step, such as in the production of wafers, which will remove the surface damage. The process is similar to that of the student. 7 2 5 亳 and the test According to this, the house rice or as shown, 1 0.725 纳 These are quite thick and contain 100 degrees. If the application is opened in the rough 矽 • exhibition time, therefore, the surface is performed on 16 200842213 to perform a selective corrosion or alkaline tension etch 8 6 by immersing the polycrystalline wafer in diluted oxidized hydroxide Potassium (reverse 〇 11). This tension etch 86 releases the tension and typically cleans the wafer. However, another process only ultrasonically cleans the wafer in a deionized (DI) water bath. A surface treatment step 88 is performed on the two major surfaces of the wafer to remove visible surface features of the cut and grind to further develop the surface finish damage and leave a uniform gray surface. The surface treatment can include Blanchard grinding or processing that produces a pre-stage secondary surface processing damage. This subsequent surface finish can be removed by sandblasting using tantalum carbide powder if it is not necessary to utilize the subsequent surface processing of the grinding. After the surface is processed, in step 89 A, the wafer is cleaned by ultrasonic waves. At step 89B, the wafer is oxidized, for example, at 1100 dc for 15 hours in an air environment. A first acid cleaning step 90 is performed by immersing the polycrystalline wafer in dilute hydrofluoric acid. The first acid cleaning step 90 is effective in removing any ruthenium oxide on the surface of the wafer. A second acid cleaning step 92 is performed by immersing the wafer in a mixture of water, hydrofluoric acid, and hydrazine hydride (H2 〇 2), although nitric acid (hN03) and hydrochloric acid (HC1) may Replace hydrofluoric acid. This second acid cleaning step 92 is effective in removing heavy metals from the vicinity of the wafer surface. Other acidic etchants or other types of ‘cleaners can be substituted, for example, for well-developed commercial enamel wafers or other chemical analysis and instrumentation for wafers. The ultrasonic cleaning step 94 is performed by immersing the wafer in a deionized (DI) water bath and ultrasonically stimulating the DI water to remove particles from the wafer surface. It is noted that the illustrated process does not include polishing performed at least on the component side of the production wafer. If desired, the product number and serial number and other identification marks can be etched on one of the major surfaces of the non-2008 200842213 production wafer. In addition, depending on the fab, a layer of CVD-deposited and non-productive wafers, such as tantalum nitride, may be pre-coated on both sides of the non-production wafer, which will be firmly attached to the crack and Inside the crack. The polycrystalline wafer is then ready for use on the fab line. The lifetime of such polycrystalline non-productive wafers is much longer than that of single crystals. Its purity level is much higher than that of conventional quartz non-production wafers, and its particle generation is much lower. If the deposition on the polycrystalline non-production wafer accumulates to an excessive thickness,

The P wafer is, for example, removed by removing a portion of the accumulated thickness, or all of it is removed and the wafer fabrication steps of Figure 7 are repeated. The polycrystalline germanium wafer can be regenerated or re-cleaned by immersing it in hydrofluoric acid to remove the nitride. Then it can return to work. Preliminary tests have shown that 2.5 μm of tantalum nitride can be deposited on the polycrystalline germanium test wafer thus treated in an LPCVD process without significant flaking. This is far above the 300 mm thickness limit used in the past before discarding the test wafer. The Wafer production line is subject to a 2 micron thickness limit (J is the basis for major replacements when using test wafers. Even a 1 micron thickness limit can represent a significant improvement over previous techniques. In addition, the recovered polysilicon test The wafer does not exhibit the streaks and streaks observed on the recovered single crystal germanium test wafer, so it is possible to clean the test wafer of the present invention more than twice. It is clear that the polycrystalline silicon wafer of the present invention Can be used as a baffle wafer in the same LPCVD process. It may be desirable to continue to use some quartz wafers as thermal buffers, especially at the bottom of the tower, which is outside the hot zone. The expected opacity of 18 Γ, υ 200842213 in infrared radiation. However, 3 the use of polycrystalline wafer 1 in the tube (4) zone is preferably in the case of deposition, including the tower, the lining, the injection: If it is 'the entire hot zone will be filled with other buffers and test wafers. There is no other material other than the production of the wafer, and the amount of contamination in the hot zone is important. The problem of expansion. Ren Yan, can adjust polycrystalline wafer properties, especially these buffer wafers. It can, for the required infrared shielding, form the R0PSi material of the test wafer, grow with sufficient semiconductor doping - cm, and Good ground below u reduces the resistivity to less than 1 ohm. The wafer is essentially 'cm: or even lower' in the tube. See Wo 1 f; k · ^! ^ Daily heat radiation is opaque 0 brother wolf's lbld about doping 矽 quality, # Η使户# e grow. Boron is the preferred erbium and its growth can have such doping can also be boxed -,, CZ Shi Xifang This is a well-known thing. In this case, JL is applied to the test wafer in advance, and the thickness of the nitride is cut (or possibly the other material). It provides the required infrared absorption. CZ矽, especially CVd non-production 曰m ιν & μ β , original CZ矽, can be applied to other applications except the seat day 0. Work. 哕 β β rw u Small crystal structure promotes Shi Xi's addition π On the eve of the day, the CZ material advantageously possesses a small crystal size of 雁 尔 θ π 々 。 。 。 。 。 。 。 。 。 。 。 。 。 。 The other possible uses of the two bases of the tower are as the edge support ring 1 1 D. The geostatistic mouth of each of the clothes 110 shown in Figure 9 has a thin inwardly extending edge, which is made at 4 o'clock. The lip 11 2 supports the wafer edge in the rapid thermal process (RTP). The period is more than 20 mils (7) s t 1 to reduce the thickness of the lip 112 to not (0.5 mils), which is in addition to 7 It is difficult to go to # ΛΑ, f, the polycrystalline stone other than the invention is difficult to achieve on the eve. Two _ under the choice Μ ^ Down the garment-like edge 11 4, 1 1 6 攫 live in the orthogonal map The rotating tube 丨 2〇 shown in the view supports and rotates the edge 19 Ο C^ 200842213 ring ο and the wafer supported thereon. Less complex edge structures are known. Other similar rings include an edge exclusion ring in which the lip or protrusion is located above and separated from the edge of the wafer to protect it from deposition, and a clamp ring that contacts the upper wafer edge during the process

Clip to a pedestal. The support tube 12A can also be formed from the polycrystalline CZ of the present invention. These edge rings and tubes, which are composed of crucibles for RTP® production wafers, not only provide high purity levels, but also simplify the radiation and thermal expansion problems that exist when these components are made from their materials. Other applications of the CZ(R) of the present invention include a pedestal platform. For example, the platform 130 can preferably be wafer processed by a randomly oriented c ζ polycrystalline dome. Usually, the dish-shaped flat cymbal 13 can be used for the shaft through hole 133 for lifting, or the shallow groove for the dendritic structure 34 to conduct the gas supply hole 136. The processing of such fine features is easy due to this H4. Such tower bases, crystal® rings, fingers and sley and other chamber components are slightly larger in diameter. However, straight::: directly forms the ingot for the wafer to be processed than the wafer to be processed. The polycrystalline cz ingot can be pulled in the same cz puller as the single crystal CZ ingot. Diameter, because it is added to the single: wafer: from the rise from it. It is not required that the structural components have such a strict polycrystalline CZ ingot for homogenous properties. It can be taught by using polycrystalline crystals:: evenly ten students' so long conditions are grown in the same equipment, and the examples are used for Larger diameter - species CZ polycrystalline (four) use, \' by lowering the pull-up speed: the source crystal grows into a polycrystal that is formed too: from the original. Born in polycrystalline stone or Dianchi 140, in the 12th ring, it is not subject to the support of the eleventh. It is invented with heat and invented the tube, the diameter is slightly used, and the pot is large. The pn 正 正 2008 2008 2008 200842213 cross-sectional view shows that a vertical pn junction is formed in the 矽 slice, which can maintain its circular ingot size or cut into a rectangle. Electrical contacts 142, 144 are made on the front and back sides of the solar cell 140. The randomly oriented CZ crystallites produce a stronger material, thus allowing the solar cell to be formed from a thinner semiconductor germanium layer having a relatively small crystallite size but a large surface area. In addition, the high purity of the CZ polysilicon relative to the cast tantalum provides better semiconducting properties because the impurities in the polycrystalline germanium migrate to the grain boundaries and cause leakage along the boundaries. \ : Although the test wafer of the present invention is particularly advantageous in LPCVD of tantalum nitride, non-product wafers used as test and heat shield wafers can be used in combination with many processes, including polysilicon, bismuth oxynitride, and CVD and other deposition processes for yttrium oxide, and more extensively any thermal process. Although polycrystalline germanium non-produced wafers are advantageously used in conjunction with the crucibles, they have advantages in towers and boats for other materials, including quartz and carbon carbide. The wafer boat is advantageously used in another wafer support in the process. In a wafer boat, the wafer is arranged in a horizontally extending array in a slit in the boat and is mainly surfaced. Positioning from the vertical direction by a few degrees. As a result, the edge of the wafer rests on the bottom of the boat and the teeth of the slit contact and support the back side of the wafer. The non-productive wafer of the present invention can be advantageously used. The wafer and the tower are used in combination. The random orientation polysilicon of the present invention provides many advantages of non-productive wafers and is applicable to other rough components and structures, and the material can be grown by the well-developed CZ technology of commercial single crystal wafers. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic cross-sectional view of a typical heat treatment furnace tube. Fig. 2 is an orthogonal view of a crucible tower advantageously used in conjunction with the present invention. Fig. 3 is a plan view of a polycrystalline silicon non-production wafer of the present invention. Figure 4 is a cross-sectional view of a native polycrystalline twin rod. Figure 5 is a cross-sectional view of a Czd polycrystalline germanium rod grown from a native polycrystalline germanium seed crystal, and a plan view of the non-produced wafer cut therefrom. A cross-sectional view of a VD source Czd polycrystalline germanium rod and a plan view of a non-product wafer cut therefrom. Figure 7 is a process for processing a polycrystalline germanium non-produced wafer. Example 0 Figure 8 is rough on both sides A cross-sectional view of a polycrystalline germanium wafer. Figure 9 is an orthogonal view of a cross section of a type of wafer ring, specifically, an RTP outer edge ring. Figure 10 is used to support and rotate the outer view of Figure 9. Orthogonal view of the rim of the edge ring. Figure 11 is an orthogonal view of a pedestal platform. Figure 12 is an orthogonal view of the CZ solar cell. [Key symbol description] 10 Furnace tube 12 Heater 14 Resistor Heating coil 16 bell jar 18 lining 20 support tower 22 200842213 η 22 pedestal 24 gas injector 30, 32 矽 base 34 矽 foot 38 wafer 40 polycrystalline 矽 non-production 42 mark 50 polycrystalline dream crystal rod 52 crystal branch 54 66 seed rod 60 ' 70 Chua polycrystalline rod 62 outer area 64 inner area 78 plug 80 process 100 non-product wafer 102 crack 104 crack 106, 1 08 main surface 110 edge support ring 112 lip 11 4 > 116 Edge 120 Rotating Tube 130 Platform 132 Shaft Through Hole 134 Shallow Groove 136 Supply Hole 140 Solar Cell 142, 144 Electrical Contact

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Claims (1)

200842213 X. Patent application scope: 1. A non-productive wafer for filling a non-production slit of a multi-wafer supporting device, the non-production wafer comprising a wafer containing polycrystalline germanium and having substantially twin crystals The diameter of the circle is equal in diameter. 2. A non-product wafer as described in claim 1 of the patent application, having a thickness in the range of 0.725 to 2 mm. 〇 3. A non-product wafer as described in claim 2, wherein the above range is 0.725 to 1.5 mm. 4. The non-product wafer as described in claim 1 has two major sides of the roughening. 5. The non-product wafer as described in claim 4, wherein the two main sides have subsurface damage extending at least 25 microns from the main sides. '6 · As claimed in the patent scope The non-productive wafer according to any one of items 1 to 5, wherein the polycrystalline germanium has a substantially random orientation crystallography. 7 - The non-productive crystal according to any one of claims 1 to 5 The circle, wherein the diameter is selected from the group consisting of 150, 200, 300, and 450 mm. 24 200842213 8 The non-product wafer of claim 6, wherein the polysilicon is a CZ polysilicon. 9. The non-product wafer according to claim 8, wherein the polysilicon is a CVD source CZ polysilicon. 〇1 〇. A nitride deposition process comprising at least the following steps: a deposition cycle comprising: Providing a single crystal crucible to produce a wafer on some slits of a supporting tower; and providing at least one polycrystalline non-productive wafer on the other slits of the supporting tower, and using the chemical gas in the furnace tube in which the tower is disposed Phase deposition The tantalum nitride is deposited on the production and non-production wafers; and the deposition cycle is repeated on different production wafers and the same non-production wafer; wherein the repeating step is continued until the same non-production wafer The tantalum nitride is deposited to a thickness of at least 1 micron. 11. The process of claim 10, wherein the thickness is at least 2 microns. 1 2. As described in claim 10 Process, wherein the above-mentioned tower system 25 200842213 is a broken tower. 1 3. The process described in claim 10, wherein the non-product wafer has a thickness ranging from 0.725 to 2 mm. The process of claim 10, wherein the non-product wafer has two main sides roughened. η 1 5. The process described in claim 14 of the patent application, wherein the two The primary side has a subsurface damage extending at least 25 microns from the major sides. 1 6. The process of any one of claims 10 to 15, wherein the polycrystalline non-produced crystal Round polycrystalline The process of any one of the above-mentioned claims, wherein the polycrystalline germanium is a CVD source CZ polycrystalline germanium. 1 8 · as claimed in the patent application The process of any one of 10 to 15, wherein the diameters of both the produced and non-produced wafers described above are selected from a common diameter of 150, 200, 300, and 450 mm. 26 200842213 19. A manufacturing A method of not producing a wafer, comprising at least the steps of: cutting a wafer from a polycrystalline chopping bar, emulsifying the wafer, and processing the wafer so that it is included on both sides thereof when processing is completed Subsurface damage. 20. The method of claim 19, wherein the above-described sub-surface ('face damage comprises cracks and cracks and extends from the two sides to a depth of at least 25 microns. 27