TW200840014A - Electrostatic discharge protection device and fabrication method thereof - Google Patents

Abstract

An electrostatic discharge (ESD) protection device and a fabrication method thereof are provided. The ESD protection device with an embedded high-voltage P type SCR (EHVPSCR) structure of the present invention is employed to guide the ESD current/voltage to a system voltage trace VDD via a pad.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to an electrostatic discharge protection device, and more particularly to an electrostatic discharge protection device and a method of fabricating the same. [Prior Art] ☆ + Electronic components (such as integrated circuits) are often subjected to electrostatic discharge (ESD) in actual environments. Most different

Is her (10) alpha coffee transfer pad (PA = packet discharge protection device to protect its internal circuit. According to the degree of voltage generated by electrostatic discharge (four), electrostatic discharge can be roughly human, discharge mode (Human_B〇dy M〇dd, Hbm), mechanical discharge = Machme Model (MM) and charging element module == M〇del ' CDM). The voltage of the electrostatic discharge is much larger than the line voltage being supplied. When an electrostatic discharge occurs, (4) New Zealand may burn electronic components. This must be directed to = some pieces * a number of electrostatic discharge prevention and control · species 八 + eight 2, ^ know know 1 again. There are several pole types for the test of electric discharge protection devices, namely PD, PS, ND W 输 input positive pulse on the pad, secret έ r M type. The PD mode is such that the voltage rail VDD is grounded. The nd mode PS mode is grounded on the pad wheel and the aging age line VDD. Ground. The NS mode is for soldering, and the grounding electric trajectory VSS is connected.

Ground. ^贞崎, make the ground voltage line VSS 5

200840014 UMCD-2006-0358 22213 twf.doc/n Figure 1 is a cross-sectional view showing the layout of an electrostatic discharge tampering device of U.S. Patent No. 6,459,127. Please refer to the figure, the high-pressure process of N-type gold oxide half (n_channei metai_oxide-semic〇nduct〇r, NM〇s) transistor D1 and T2 by its parasitic voltage controlled rectifier (siHc〇仏c〇ntr〇〗 ied Γ er' SCR) to protect against electrostatic discharge. This NMOS transistor τι is parasitic to its full configuration so that the current of ϋΐί Γί can be completely uniform. Although the age of bf knows the technology (four) and the shame model, this conventional technology can't prevent the electrostatic discharge of the 弁i mode and the ND mode. This is known as the dry discharge = electrostatic discharge current / voltage from the pad n - this two know: circuit connection In the system == line: 'and then through the myocardium _ another electrostatic discharge anti-can ground voltage rail VSS voltage from the ground voltage rail vsn set (not: no) will electrostatic discharge current / after this electrostatic discharge Lead to the money voltage rail VDD. Most = from the welding Mo guide bow I to Li by 4 ^ = connected to the electrostatic discharge current / Ϊ electric current / turn the clock 彳 VDD, privately the above static [invention] child 200840014 UMCD-2006-0358 22213twfdoc / n this meal Ming provides a kind of quiet

And the ND mode of the electrostatic rose = under-current protection device to protect the PD mode test day and month I made high-voltage electrostatic discharge ^ Baofei Mei turtle protection 5 蒦 device manufacturing method, in order to solve the above problem 2 1 'include The substrate and the heart of the present invention propose an electrostatic discharge protection doped region, a first and a _th, a p-type doped region, a first and a second type N-type well disposed in the p+ type doping region, a gate, First and second electrodes. The doping type doping region _ p ° P domain mismatch region is arranged in the N-type well. The first-second N+ type doped + type doped regions are all disposed in the p-type doped region. And the f Ίp+ type doped regions outside the p-type doped region are disposed in the n-type well and are not in contact with the _/, doped region. The gate is arranged between the electrode electrical secret ^-P + miscellaneous ship and the p-type leg. The first electrode is electrically connected to the first impurity region and the first p-type doped region. The second bamboo shoots have another Jiangshan doped region, a second P+ doped region and a gate. The bottom, p i doped region electrical protection device j includes an N-type p + -type doped region, a gate, an f_= doping, and a first and second N-type substrate. Flute /, brother a turtle. The P-type doped region is disposed in the p-type doped region, and the T:+ type:: region and the first-P+-type doped region are disposed in the contact 1 and outside the P-type doped region, and the P-type doped region It is not the same as the p-type doped substrate and the second p+ doped region. The first pole of the brother is connected to the first lead #二二, a p+ type doped region via the first electrical conductor. The second electrode is via a second electrical, -di-N+ doped region, a second p+ doped region, and a gate. 7 200840014 UMCD-2006-0358 22213twf.doc/n The present invention provides a substrate for providing an electrostatic discharge scale device; forming an N-type in the substrate, including a doped region; and a P-doped region. Forming #二 in the middle; forming a p P+ doped region in the I type well; forming a p P+ doped region in the N type well and the aN+ doped region and the first type doped region and the second P+ doped p product in the N type well, forming outside the doped region The second N+ soil is mixed with the p-type doped on the N-type well and in the second P+-type doped region; the gate-gate is formed; the first electrode and the second electrode are formed: The intermediate shape is connected to the first-electrode conductor by the first-N+-type impurity-distribution region, and the second electrode is via the second electrical conductor, and the second P+-type doped region and the gate. The miscellaneous region, the present invention provides an embedded high voltage p-type SCR high 'tage p-type SCR, EHVPS_ device' so that the ESD current/voltage 1 to the voltage can be directly applied to VDD. The above-described features and advantages of the present invention will become more apparent from the detailed description of the preferred embodiments. A layout view of the discharge protection. Figure 3 is a diagram showing an application example of the electrostatic discharge device 200 of Figure 2 in accordance with the present invention. Referring to FIG. 2 and FIG. 3 at the same time, the static protection device 200 comprises a high-depletion p-type metal-oxide-semiconductor (PMOS) transistor 2〇1. The high voltage PMOS transistor 201 is disposed in an N-type well (for example, a high-pressure N-type well) and the high-pressure N-type well 220 is formed in a P-type substrate 21A. In the high voltage 8 200840014 UMCD-2006-0358 22213twf.doc/n N type A p-type doped region is formed in the well 220 as a high voltage transistor torn pole. The P-type doped region is implemented as a p-type progressive region (p_Grade) 23 。. The -N+-type doped region 231 and the first A p+ doped region is said to be disposed in the P-type progressive region 23G. In the present embodiment, both the p-th + doped region and the first N+ doped region 231 may be adjacent.

The first electrode 271 is connected to the first -n + type doping region 231 and the first p + -type dummy region via a first electrical conductor (e.g., a metal conductor). In this embodiment, the first electrode 271 is electrically connected to a pad 27〇. In the integrated circuit, the core circuit 310 can externally input/output data via the resistor 33 and the pad 27. The second N+ doping region 221 is disposed in the high voltage N-well 22 以及 and the p-type progressive region 230, and the second p+ doped region milk is disposed in the high voltage n-well 220 and the third N+ doping The area 221 is between the p-type progressive zone. Wherein the doped region 22b 222 is not in contact with the P-type progressive region 23〇. Wherein the second P+ doping region 222 and the second interrogation region 221 may be adjacent. The second P+ doping region 222 serves as the source of the high voltage transistor 201. The second electrode 272 connects the second N+ type doping region 221 and the second p^ region 222 via a second electrical conductor such as a metal conductor. In this embodiment, the second electrode 272 is electrically I: the voltage rail VDD. Muwang Le,-dead The gate of the PMOS transistor 201 is placed above the high voltage n 220. Here, the gate electrode 24 is separated from the high voltage n-type 220 by a gate oxide layer. The gate 240 is disposed between the second P+ doped region 222 and the p-type progressive region 230. In this embodiment, the second electrode 272 is connected to the gate 240 via an electrical conductor 9 200840014 UMCD-2006-0358 22213twf.doc/n. In the integrated circuit, the core circuit 31A can obtain an external portion via the line VDD and the ground voltage rail vss; for: in the present embodiment, the N (N-Field) 250 is formed in the high-pressure N-well 220. . The third N+ type doping region 251 is disposed in the n-type 250. The third N+ doping region 251 and the N-type field region 25 are used as the bulk electrode of the PMOS transistor 201. The base electrode of the high voltage pM〇s, g body 201 is also connected to the system voltage = VDD via an electrical conductor. Field oxide layer 262 is disposed in high voltage N-type well 22A and is disposed between second N+ doped region 221 and third N+ doped region 2S1. . The second ρ+ type doping region 222, the high voltage Ν-type well 220 and the p-type gradation region 230 constitute an in-line transistor gpnp, and the high-voltage Ν-type well 2, the progressive region 230 and the first N+-type doping region 231 constitutes another internal contiguous transistor Qnpn. The embedded transistors Qpnp and Qnpn form a structure, that is, the second P+ doping region 222, the high voltage N-well 22 〇, the p-progress region 230 and the first N+ doping region 231 form an SCR path. The anode gate of the SCR structure is connected to the system voltage rail through the second N+ type doping region 221 and the internal resistance RN of the high vapor N-type well 220. The cathode gate of the SCR structure is transmitted through the p-type progressive region 23〇 First, the internal resistance RGmde of the doped region 232 is connected to the pad 27A. If the system voltage rail VDD is grounded and the pad 270 is positively pulsed by the static discharge, the electrostatic discharge current will pass through the first p+ type doping = 2.32, the P type progressive zone 230, the high pressure n-well 220, the first The two N+ type doping region 221 reaches the system voltage rail VDD. Therefore, the electrostatic enemy 200840014 UMCD-2006-0358 22213twf.doc/n flow k-pad 270 is guided to the viable diode discharge device 20 through the electrostatic discharge protection device and the system voltage rail VDI3. The 〇 can prevent the PD from damaging the core circuit 310 by static pressure. Static packet discharge current / electricity If the system voltage rail VDD is connected to the negative pulse, the electrostatic discharge voltage will be light; 27 mountain 0 electrostatic discharge is extremely idle. The internal voltage of the internal resistance, Lin ===(10) is much smaller than the positive voltage of the internal SCR structure ‘=:=polar gate VDD voltage. Therefore, it is embedded, (ie, the system % rail line discharge current is emitted from the system voltage line VDD, so that the static electricity is led to the outside of the integrated circuit.); road = and pad 3: anti-static Discharge two == _ line; sU between the pad 270 and the grounding electric clothing to place her electric discharge protection 4 + n ground and the pad 27 〇 static /. Right - voltage rail VSS will trigger the electrostatic discharge After the positive pulse is applied, the electrostatic discharge voltage is 270, and the electrostatic discharge current is discharged from the pad to the integrated body. 320, so that + # + + electric voltage will trigger the electrostatic discharge protection electric protection _^ = ^ = Wei line defeat through the electrostatic discharge 70 and break the guide to the outside of the integrated circuit. 200840014 UMCD-2006-0358 22213twf.doc/n In the case of "Operational Sorrow", in order to avoid accidentally triggering electrostatic discharge, it is necessary to appropriately increase the electrostatic discharge to ensure the second touch and the position. In this embodiment, the high voltage N-type well 220 and the gate 240 and the first A field oxide layer 261 is disposed between a P+ doped region 232. By determining the thickness and depth of the field oxide layer 261, The trigger level of the electrostatic discharge protection device 200 is adjusted. The above electrostatic discharge protection device 200 can be implemented by referring to the following manufacturing method. First, a substrate 210 is provided, which is, for example, a p-type doped substrate. A high pressure n-type well 220 is formed in the middle. Next, a P-type doped region (p-type progressive region 230 in this embodiment) is formed in the high-pressure N-type well 220, and an N-type field region 250 is formed. The N+ doping regions 221, 231, and 251 are formed on the upper side of the 220, and the p+ doping regions 222 and 232 are further formed on the upper side of the high voltage N-well 22, wherein the N+ doping region 221 and the P+ doping region 222 are formed. It is disposed in the p-type progressive region 230 and the N-type field region 25, the doping region 231 and the P+-type doping region 232 are disposed in the p-type progressive region 23〇, and the N+-type doping region 251 is disposed in the N-type. The field region is within 25 。. In the example of the yoke, the N+ doping region 221 and the p+ doping region 222 are adjacent to each other, but the P-type progressive region 23 〇 / N-type field region 25 〇 In addition, the N+ doping region 231 and the p+ doping region 232 are adjacent to each other. The field oxide layers 261 and 262 are formed in the high voltage N-well 220, The field oxide layer 261 is disposed between the gate 240 and the p+ doping region 232 and the field oxide layer 262 is disposed in the N+ doping region 221 and the N+ doping 12 200840014 UMCD-2006-0358 22213twf.doc/n Between the hybrid regions 251. A gate 240 is then formed over the high voltage N-well 220 and between the p+ doped region 222 and the P-type progressive region 230, wherein the gate 240 is oxidized by the gate between the high voltage N-well 220 The layers are isolated. Next, electrodes 271 and 272 are formed over the substrate 210. The electrode 271 is connected to the n + -type doping region 231 and the p + -type doping region 232 via the electrical conductor via the electrical conductor connection type doping region 221 , the p + -type doping region 222 , the gate electrode 240 , and the N + -type doping region. 25 in this embodiment

The i-pole 271 is electrically connected to the pad 270, and the electrode 272 is electrically connected to the system voltage rail VDD. The above embodiment is described with reference to Fig. 3 to illustrate one of the electrostatic discharge protection devices. The technical field of the art has a knowledge of the person who can rely on the pot, and the electrostatic discharge protection device of Fig. 2 should be in (4) other circuits. Set fine to the electric hard line · between strong and VSS. Fig. 4 is another application example of the recording phase 2 electrostatic discharge device 200. ', ° Please also Mai Zhao® 4, for the pattern _, in the electrostatic discharge device, shouting s Λ 块 块 块 PS PS 以 以 以 以 以 以 以 以 以 以 以 以 以 以 以 以 以 以 以 以 以 以 以 以 以 以 以In the present embodiment, the designer can perform the number of connections between VDD and the survey according to the requirements. Therefore, when the electrostatic discharge protection device VDD (or the voltage rail vss), the electrostatic resonance is triggered after the voltage rail, the SCR structure is triggered and the internal protection device 200 is pressed with the VSS (or the voltage rail). VDD). Electric discharge current is directed to electricity 13 200840014 UMCD-2006-0358 22213twfdoc/n It is worth noting that the electrostatic discharge 峨 of the actual figure 2:: two in this implementation _ static 2 independent 'the difference is in the power detection circuit Without. ^^至至静 = The resistor iw is connected to the capacitor Cesd. At this road 420. The technical field 1 has a pass ^= into electrostatic discharge detection electricity to achieve electrostatic discharge by other means when::, and the road gamma is connected in series to the electric wire VDd: ❹ discharge detection electric line V' and vss have static electricity so that The detection voltage is under normal operation, since the capacitor is set to 2. . _ Bao r: d (four) stand). Therefore, each == _ =1=?. #静电放铸件" " ί Give each electrostatic ί=irw_na and vss electric fresh position between the protection device 2〇〇; ^ Clothespin 0 of the idle pole 240 ° therefore 'electrostatic discharge will be electrostatic discharge = squat will be Turning on (1) and VDD) L, the packet vertical line VSS (or one of the voltage lines) is as shown in the present invention. The electrostatic discharge protection device 200 of Fig. 2 represents a static example. Here, only the block PSCR is similar, and the SCR structure is embedded in the reading device 2〇0. The static electricity of Figure 5 is the same as that of Figure 3. It is worth noting that the present embodiment 、', the repeating device 200 and the figure 2 Electrostatic discharge protection device 2〇〇14 200840014 UMCD-2006-0358 22213twf. doc/π is somewhat different, the difference is that the present embodiment sets the furnace to the electrostatic discharge detection circuit s2〇== VDD phase Connection. It is known in the art that the person skilled in the art has relied on, and sought, and realized electrostatic discharge detection by any means. FIG. 5, electrostatic discharge detection circuit '.

The 盥煜 Π 97 Π 叫 υ υ υ υ υ υ υ υ 。 。 。 。 。 。 。 。 。 。 。 。 电压 电压 电压 电压 电压 电压 电压 电压 电压Electrostatic discharge detection circuit = 270 and voltage performance νςς: + ρ 日甲接知知(4)With or without === Piece of money to detect solder and voltage line level power detection circuit 520 will output high voltage protection And ^ voltage level) to the electrostatic discharge to keep the electric fresh position (approximate to '3 = electricity, circuit 530 will turn on the voltage level of the gate of the power protection device 32G ^) to the electrostatic discharge 32 〇 to maintain the off state. On the day of the 'electrostatic discharge protection device 200 and when an electrostatic discharge event occurs and the pad 270 is electrostatically discharged, "[the line of milk line grounding wheel out of the low voltage level #% pulse, the evaluation of the electric discharge detection circuit 520 and The voltage is called the voltage; the electric discharge protection device 2〇 (/, D and the device is set to 200 the gate 240. Therefore, static η), and immediately, the :M〇S transistor will be turned on (turn line V〇D, or direct the static current from the soldering wire 27〇 to the voltage rail pad 270. The rabbit current is guided from the voltage rail VDD to the soldering 15

200840014 UMCD-2006-0358 22213twf.doc/n If the voltage line vss is grounded and the pad 27 is flushed, the static electricity discharge detection circuit 530 will rotate the high voltage level = 270 and the dust line VSS voltage Between the bits) the gate for electrostatic placement. Therefore, the body of the ESD protection device 320 is turned on (tumGn), and the ESD current is immediately guided from the two pads 270 to the voltage rail vss, or the electrostatic discharge is guided to the VSS. To the pad 270. ...claw pressure The following will be further exemplified in accordance with the present invention. Fig. 6 is a cross-sectional view showing the layout of another embodiment of the electrostatic discharge protection device according to the present invention. Please refer to Figure 6, the ESD protection device _ contains the high voltage p_s transistor 601. This high voltage PMOS transistor 6〇1 is disposed in the N-type substrate 6(7). A p-type doped region is formed in the N-type substrate 610 as a drain of the high voltage pM〇s transistor 601. The aforementioned P-type doped region is, for example, implemented in a p-type progressive region 6 3 〇. The first N+ doping region 631 and the first P+ doping region 632 are disposed in the P-type progressive region 630. In this embodiment, the first p+ doping region 632 and the first N+ doping region 631 may be adjacent to each other. The first electrode 671 is connected to the first N+ type doping region 631 and the second π+ type impurity region 2 via an electrical conductor (e.g., a metal conductor). The first electrode 671 can be electrically connected to the pad 270. The second N+ type doping region 621 is disposed in the N-type substrate 610 and outside the P-type progressive region 630, and the second p+-type doping region 622 is disposed in the N-type substrate 610 and the second-type doping region 621 and the P-type Between progressive zones 630. The doped regions 621, 622 are not in contact with the P-type progressive region 630, and the doped regions 622 and 621 can be adjacent to each other. The second P+ doped region 16 200840014 UMCD-2006-0358 22213twf.doc/n 622 serves as the source of the high voltage PMOS transistor 6〇1. The second electrode milk pan = a sex conductor (e.g., a metal conductor) is connected to the second N+ type doping region i /, di-P + -type doping region 622. In this embodiment, the first electrical connection is to the system voltage line VDD. The gate of the high voltage PMOS transistor 6G1 is disposed above the n-type substrate 610. Here, the gate oxide isolation gate 64〇 and the n-type substrate gate 640 are disposed in the second P+ type doped region milk and the p-type progressive region _

between. In the present embodiment, the second electrode 672 is connected to the idler 640 via an electrical conductor. In the present embodiment, an N-type field region (N-Fidd) 650 is formed in the germanium substrate (10). The third N+ type doped region (6) is disposed in the meander field region 650. The third germanium + doped region 651 material field region 65 is used as the base electrode of the high voltage PMOS transistor 601. The base electrode of the high voltage pM〇s transistor 6〇1 is also connected to the system voltage rail vdi>mn type substrate 610 via an electrical conductor, and to the second n+ type doping region 621 and the third n+ type doping region 651. A field oxide layer 662 is disposed between. The second P+ doping region 622, the N-type substrate 61A and the P-type progressive region 630 constitute an in-line transistor Qpnp, and the N-type substrate 61〇, the p-type progressive region 630 and the first N+-type doping region 631 Then constitute another embedded transistor Qnpn. The internal dispersion transistors Qpnp and Qnpn form an embedded SCr structure, that is, the second P+ type doping region 622, the N type substrate 610, the P type progressive region 630 and the first N+ type doping region 631 form an SCR path. The anode gate of the embedded SCR structure is connected to the system voltage rail VDD through the second N+ doping region 621 and the internal resistor RN of the n-type substrate 610, and the inner 17 200840014 UMCD-2006-0358 22213twf.doc/n embedded The cathode gate of the SCR structure is connected to the internal resistor RGrade of the p-type doped region. If the voltage of the system is VDD grounded and the positive pulse of the solder bump 2 is generated, the electrostatic discharge current will pass. The first - = discharge button, P-type progressive zone 63. , N-type substrate 61. The second zone 621 reaches the system voltage rail VDD. Therefore, the region is guided from the pad 270 to the outside of the integrated circuit via the system voltage line VDD of the electrostatic discharge protection device 6 (10). ==pressure=, 7° negative pulse of electrostatic discharge: ^, the electric house will be transferred to the anode of the embedded SCR structure. The two-resistance RN makes the anode gate voltage of the embedded SCR structure much smaller than the anode voltage of the embedded R structure (that is, the system test line VDD voltage' has fine hair, so that the electrostatic discharge current is discharged from the system to the SCR scale pad 27G. Shouting to the integrated body in the normal operating state, in order to avoid false triggering of static electricity, so the money is _ high static electric tilting device _ ^ = ^ in this embodiment is more in the N-type substrate 61 以及 and the interpole 64 一○, 632, between the field oxide layer 661. By determining the visibility of the field oxidation and the ice, the trigger level of the electrostatic discharge protection device _ is adjusted accordingly. In summary, the above embodiments provide Embedded high-voltage p-type SCR (EHvpscR) structure of static 18 200840014 UMCD-2006-0358 22213twf.doc/n Electric discharge Baoxian set 'gj this can directly direct the electrostatic pad to System voltage rail VDD. Motor voltage from 蝉 Although the present invention has been disclosed in the preferred embodiments as above, the present invention is not limited to the spirit and scope of any of the technical fields in the art. Change and refinement, = the scope of the invention The applicant's application and the definition of the enclosure shall prevail.

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a cross-sectional view showing the layout of a discharge protection device of U.S. Patent No. 6,459. 2 is a cross-sectional view showing the layout of _ according to an embodiment of the present invention. Electrostatic Discharge Protection Device of Patent No. 127 FIG. 3 is an application example of the ESD protection device of FIG. 2 according to the present invention. 4 is a diagram showing an application example of FIG. 2 in accordance with the present invention. Another electrostatic discharge protection device

Figure 5 is a diagram showing an example of application of the electrostatic species of Figure 2 in accordance with the present invention. Still Another FIG. 6 is a cross-sectional view showing a layout of an electrostatic discharge example in accordance with the present invention. Another implementation of the electric protection device [Main component symbol description] 110, 270: pads 200, 320, 600: electrostatic discharge protection device 201, 601 · south voltage PMOS transistor 19 200840014 UMCD-2006-0358 22213twf.doc/n 210: P-type substrate 220: N-type well 22 231, 251, 621, 631, 651: N+-type doped regions 222, 232, 622, 632: P+-type doped regions 230, 630: P-type progressive region 240, 640 · Gates 250, 650: N-type field regions 261, 262, 661, 662: field oxide layers 271, 272, 671, 672: electrode 310: core circuit 330, Resd · resistors 420, 520, 530 · · static Discharge detection circuit 610: N-type substrate Cesd: capacitor

Qnpn, Qpnp: inner and rear transistors K-N-well Λ I^Grade Rn: internal resistance ΤΙ, T2: NMOS transistor VDD, VSS: voltage line 20

Claims (1)

200840014 UMCD-2006-0358 22213twf.doc/n X. Patent application scope: L—Electrostatic discharge protection device, including · a substrate; an N-type well, disposed in the substrate, · a P-doped region, Disposed in the N-type well. The type doped region 'is disposed in the p-type doped region; -f- Ρ+-type doped lung, disposed in the Ρ-type doped region; a second Ρ+-doped region , the configuration of the penalty is outside the doped region, wherein the second impurity is in the well and the Ρ-type contact; the impurity is not connected to the 掺杂-type doped region, and is disposed in the 井-type well region and the Between the Ρ-type doped regions; and the second electrode + doped-first electrode, which is connected to the first Ρ+-type doped region via a first-electrode doped region; a second electrode, which is connected to the gate via a second type doping region and the second electrode + 2. The P-doped region is as described in the scope of claim 2 P-type progressive zone. Reading and reading device, 3. As mentioned in the patent application scope, it also includes a first error / μ S 4+ pen discharge protection device, (5) Di% emulsion layer The device is disposed between the dressing 罝-, the first Ρ+-type doping region. The well and the gate are further included as described in the application of the TT protection device, 21 200840014 UMCV-^u06- 0358 22213twf.doc/n The broadcast region is not doped outside the region 'the second N+ doped region is in contact with the p. The main 5 is as set forth in claim 4, wherein the second _ blend The miscellaneous zone and the second guarantee; the adjoining. i each miscellaneous zone - the phase discharge protection device, 6 · The static electricity as described in claim 1 includes an · N type field, disposed in the N And a third N+-type doped region disposed on the second-type electrode via the second conductor to connect the third speaker/, the patent is referred to in item 6. Further includes a second Field oxidation #, heart is in the 兮: electric privilege protection device, p + type _ turn = 1 = miscellaneous material ^ and the second second yiyi = two range of the first paragraph of the electrostatic discharge protection A younger electrode is electrically connected to the solder pad. Straight as / please the electrostatic discharge protection tank described in the first paragraph of the patent range 2:: _ to - the cap track. ', ' Set, The first month of the month - the electric brother of the second item 3 of the electrostatic discharge protection skirt 11 such as Shen 4 H brother - the electrical conductivity system is metal. Jin Shi Shi Shen May patent range of the first item of the electrostatic discharge with 1 strong intermediate the P-type doped region and the first-N+ type doped 12.-type electrostatic discharge protection device, comprising: 22 200840014 umijl^u06-035 8 22213twf.doc/n an N-type substrate; a doped region disposed in the N-type substrate; a first N+ doped region disposed in the p-type doped region; a first P+ doped region disposed in the p-type doped region (d) a bis-doped-type doped region disposed in the N-type substrate and wherein the P-type doped region and the p-type doped region are not in phase with each other, and are disposed on The N-type bottom hv. is doped between the doped region and the P-type doped region; & is cut into the first electrode of the second type, which is connected to the first P+ type via a first electrically doped region a doped region; and a body connected to the first N+ di-electrode electrode via a multi-band alpha-type doping region and the gate. The I conductor is connected to the second P+ 13 as described in claim 12, wherein the p-type doped region is a P-type progressive region. The electric discharge protection device 14·, as claimed in claim 12, further includes a -first field oxide layer, the distribution discharge protection 褒 between the gate and the first ρ+ type doped region. In the phase-type substrate, and as in the 12th aspect of the patent application, the method further includes: the electrostatic discharge protection device-second Ν+-type doping region disposed outside the type # 杂 region, wherein the second substrate In contact with the Ρ. 4 faces and the doped doped region are not 23 200840014 UMCD-2006-0358 22213tw£doc/n ortho to it (4): 峨 (4) 17. As claimed in the 12th article, including: 义, ESD protection An N-type field region disposed in the N-type substrate; and a third N+-type doping region disposed on the N-type second electrode via the second electrical conductor to connect the third N, wherein the 18 The electrostatic discharge zone described in item 17 of the patent scope. ^更f a second field oxide layer, which is disposed in the protective device and the third-mode doping region: in the substrate, and the static device described in claim 12 of the patent application The first electrode is electrically connected to the pad. $ i protects the farm 20 · as applied for the patent (4) 12 items. ’ Π Π Π :: extremely electrical connection to - system voltage L spring protection I 21 · as patent application _ ~ I trajectory. The electrostatic discharge protection package and the second lightning conductivity protection device are included in the first electric material (4). Set, where the »- subsequent item is shaped by the electrostatic discharge protection 裴 abutting. 4 push zone and the first N+ doped region are both 23. The electrostatic discharge provides a substrate; the manufacturing method of the money saving device comprises: forming an N-type well in the substrate; in the N-type well Shi County; 24 200840014 uivi^i>r-zu06-0358 22213twf.doc/n forming a first Ν+-type impurity region in the 擦-type impurity region; forming a first layer in the Ρ-type doping region a Ρ+-type doped region; forming a second 卩+-type impurity region in the Ν-type well and outside the p-type doped region, wherein the two ρ+-type doped regions are not connected to the p-type doped region a region and (4) a: ρ + doped region and the ρ ^ ^ ^ - -1 li f form a second electric H in the 1 ^ 1 = type change region; and the body is connected to the second p + type -% pole via - second electrical guide 24. As claimed in the patent; 23] 'pole. Manufacture 2 square 5 = where the input and discharge [electric protection protection set 25] such as the patent application progressive zone. The manufacturing method further includes: the electrostatic discharge device in the N-type well and forming a first field oxide layer. X A. The first-N+5 type change A second type of touch is formed outside the area. Q and that? The type doped regions are not connected to each other. 25 ^06-0358 22213 twf.doc/n 200840014 27. The electrostatic discharge protection method according to claim 26, wherein the second P+ doped region is The second £-- is adjacent.卜2=青专: The electrostatic discharge manufacturing method according to the 23rd item, further comprising: forming a Ν-type field region in the Ν-type well; and forming a third-stage doping region in the Ν-type field region The electrode is connected to the third Ν+· impurity region μ via the second electrical conductor. 29. The manufacturing method accompanying the scope of claim 28 further includes: the electric wind protection device is in the 井 type well And forming a second field oxide layer between the second dummy regions. Type 30. The manufacturing method of the scope of the patent application, wherein the electrode of the electrostatic discharge protection device is connected to the pad. The manufacturing method of the Jingdi 所述 in the 23rd item of the patent application scope, wherein (4) _ w qing 3 ^ electric discharge protection device 32 is electrically connected to the "system electric trajectory". • 3) For example, the manufacturing method of the 23rd electric & 踝 凊 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 , the towel knows - the electrical conductor _ the second electrical conduction system for the electrostatic discharge protection device area is adjacent to each other. , 玺 doped region and the first Ν + type doping 26