TW200838361A - A method for driving flat lamp - Google Patents

A method for driving flat lamp Download PDF

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Publication number
TW200838361A
TW200838361A TW96107661A TW96107661A TW200838361A TW 200838361 A TW200838361 A TW 200838361A TW 96107661 A TW96107661 A TW 96107661A TW 96107661 A TW96107661 A TW 96107661A TW 200838361 A TW200838361 A TW 200838361A
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Taiwan
Prior art keywords
driving
voltage
flat lamp
lamp
driving voltage
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TW96107661A
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Chinese (zh)
Inventor
Jin-Chyuan Hung
Chun-Hsien Lee
Yui-Shin Fran
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Nulight Technology Corp
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Priority to TW96107661A priority Critical patent/TW200838361A/en
Publication of TW200838361A publication Critical patent/TW200838361A/en

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Abstract

A method for driving a flat lamp is disclosed. The method comprises the steps of: providing a driving voltage for driving the flat lamp; raising the driving voltage to a lighting voltage for lighting the flat lamp; lowering the driving voltage to a low level voltage, wherein the low level voltage is substantially lower than 50V; and further raising the driving voltage to the lighting voltage.

Description

200838361 九、發明說明: 【發明所屬之技術領域】 本發明係有關於一種平面燈之驅動方法,特別是有關於 可提升發光和操作效率之平面燈的驅動方法。 【先前技術】 由於液晶電視的需求日增,各家廠商紛紛投入研究開發 新型背光源,例如發光二極體(Light Emitting Diode; LED) ” 與無汞平面燈(Flat Fluorescent Lamp ; FFL)等背光源。 以無汞平面燈為例,由於無汞平面燈是平面光源,當無 汞平面燈在被組裝成為背光模組時,其所配合使用的光學膜 的穿透率可以較傳統者為高,因而對背光模組的光學效能的 提升上會有很大的幫助。因此,相對於也同樣具有無汞特色 的LED背光源而言,無汞平面燈可具有較佳的發展空間。 無汞平面燈主要優點在於利用氙(Xe)來取代汞(Hg),因而 具有符合環保趨勢、壽命長(60,00(M00,000小時)、操作溫度 範圍大(_40°C〜85°C)、製作成本低、容易組裝成背光模組的優 點。且利用無汞平面燈作為背光模組所需的光學膜較少,並 可得到較高的效能,另外,相較於傳統的直下式背光模組, 無汞平面燈背光模組厚度具有進一步薄形化的潛力。 無汞平面燈係使兩平面玻璃之間形成真空,接著充填入 固定比例分壓的混合惰性氣體-氙氣(Xe),然後在陽極與陰極 之間施加一高電壓產生之電位差放電,使得腔體中的氙氣(Xe) 原子,受到激發而成為氙分子與低能階電子等激發態粒子。 當氙分子回復到氙單體原子之際,即同時產生紫外線,塗佈 5 200838361 在玻璃空間中的螢光粉受此紫外線激發後,便產生了可見 光’此種發光原理類似於電襞顯示器。 請參照第1圖,其繪示依照習用之平面燈的驅動波形示 意圖。傳統的平面燈係利用單極性脈衝電壓來進行驅動,然 而,由於單極性脈衝電壓係固定極性的單一脈衝電壓,故隨 • 著操作時間的增加,惰性氣體游離所產生的正、負離子容易 依附並堆積於電極附近,因而形成壁電荷(Wallcharge),使後 續的驅動電壓需升高才可獲得相同的驅動效能。因此,造成 ί 平面燈的整體發光效率下降,且增加燈面的溫度,容易導致 平面燈内的電弧不穩定,影響平面燈的操作性能。 【發明内容】 因此,本發明之一方面係在於提供一種平面燈的驅動方 法’藉以維持平面燈内特定且適當的壁電荷密度,因而提升 平面燈的操作和發光效率。 本發明之又一方面係在於提供一種平面燈之驅動方法, 藉由在驅動過程適度地降低驅動電壓來避免變壓器的鐵心過 飽和’並可避免燈體的溫度過高。 本發明之又一方面係在於提供一種平面燈之驅動方法, 藉由控制驅動頻率在特定範圍内變動,以減少電磁干擾效應 “和聲波頻率共振情形。 - 根據本發明之實施例,此平面燈之驅動方法至少包含·· 提供驅動電壓,其中驅動電壓具有驅動波形,且每一驅動波 形的週期中至少包含至少二點燈區間和至少一低位準區間。 點燈區間係用以使驅動電壓實質高於點燈電壓,其中點燈電 6 200838361 壓係用以允許平面燈開始點亮。低位準區間係形成於此二點 燈區間之間,用以使驅動電壓實質低於5〇伏特(V);接著, 使用驅動電壓來驅動平面燈進行運作。 又,根據本發明之實施例,此平面燈的驅動電壓具有一 驅動波形,其中每一驅動波形的週期至少包含:至少二點燈 • 區間和至少一低位準區間。點燈區間係用以使驅動電壓實質 高於點燈電壓,其中點燈電壓係用以允許平面燈開始點亮。 低位準區間係形成於此二點燈區間之間,用以使驅動電壓實 質低於50伏特(V)。 又’根據本發明之實施例,此平面燈之驅動方法至少包 含:提供驅動電壓來驅動平面燈;提升驅動電壓至點燈電壓, 用以允許平面燈開始點亮;降低並維持驅動電壓於低位準電 壓’其中低位準電壓係實質低於50伏特(V);以及再提升驅 動電壓至點燈電壓。 因此本發明之平面燈之驅動方法的指狀電極可有效地維 持平面燈内特定且適當的壁電荷密度,以提升操作和發光效 L/ 率’且可在平面燈的驅動過程適度地降低驅動電壓,以避免 燈體的溫度過高和變壓器的鐵心過飽和。另外,本發明之驅 動波形可為頻率擾動波形,以減少電磁干擾效應和聲波頻率 共振情形。 【實施方式】 ^月參弟2圖和第3圖,第2圖係繪示依照本發明之第 一實施例之平面燈之驅動電壓波形、燈内放電電流波形及光 輪出波形的時序圖,第3圖係繪示依照本發明第一實施例之 7 200838361 平面燈的剖面示意圖。本實施例之平面燈的驅動方法係利用 一具有驅動波形100的驅動電壓來驅動平面燈200進行運 作’此平面燈200例如為:冷陰極燈(c〇ld Cathode Fluorescent Lamp ; CCFL)、電漿顯示器(Plasma Display Panel ; PDP)的顯 示光源或無汞平面燈(jqat Fluorescent Lamp ; FFL)。當平面燈 - 200例如為外部電極型式時,平面燈2〇〇係藉由在玻瑜基板 210外的電極220和230來施加電壓,以穿過介電能障(玻璃 基板210)來產生電衆,並激發平面燈2〇〇内的螢光體層24〇 Ο 來產生可見光。當平面燈200施加電壓於時,在接近電極220 和230處容易累積電荷,因而形成壁電荷w(Wall Charge),而 特定且適當的壁電荷w密度可有助於平面燈2〇〇的操作。本 實施例之具有驅動波形100的驅動電壓可使平面燈200内維 持特定且適當的壁電荷w密度,以提升平面燈200的操作性 值得注意的是,上述係以外部電極型式的平面燈來舉例 說明’但本實施例之驅動方法並不以此為限,本實施例之驅 〇 動方法係可用以驅動任何具有壁電荷之情形的平面燈。 如第2圖所示,每一驅動波形1〇〇的週期11〇中至少包 含有至少二點燈區間lu、112和至少一低位準區間113,點 燈區間111和112係用以使驅動電壓實質高於點燈電壓vi, J 其中點燈電壓VI係用以允許平面燈2〇〇開始點亮。低位準區 間113係形成於點燈區間111和112之間,用以使驅動電壓 實質低於50伏特(V)。由於在低位準區間113的電壓(低於50V) 係相對遠低於點燈電壓VI(例如為2kV),故當本實施例之具 有驅動波形1〇〇的驅動電壓用以驅動平面燈2〇〇時,驅動波 8 200838361 形100的低位準區間U3可使驅動電壓近似於零電壓,以避 免因壁電荷W漏電而造成燈體溫度上升的情形,因而降低平 面燈200的運作溫度,增加整體運作性能。 以物理意義來作說明,本實施例之平面燈的驅動方法係 包含:提升平面燈200的驅動電壓至點燈電壓vi (相當於驅 " 動波形100的點燈區間111),以允許平面燈200開始點亮; 接著’降低並維持驅動電壓至低位準電壓(相當於驅動波形 1〇〇的低位準區間113),其中此低位準電壓係實質低於5〇伏 Ο 特(V),接著’再提升平面燈2〇〇的驅動電壓至點燈電壓vi (相當於驅動波形1〇〇的點燈區間112)。 請參照第2圖和第4圖,第4圖係繪示依照本發明之第 一實施例之平面燈的驅動電路示意圖。本實施例之驅動波形 100係利用一驅動電路3〇〇來提供至平面燈2〇〇,此驅動電路 300例如係由功率元件qi、Q2、變壓器τι、T2、T3、T4、 耗合電感LI、L2及整流器Dl、D2、D3、D4、D5、D0所構 成,並電性連接一輸入電源Vin。值得注得的是,第4圖之驅 〇 動電路僅為本發明的一種實施方式,熟悉電子電路之技術者 可藉由各種不同的電子電路設計來達成相同功效,惟其控制 方式和驅動方法皆不脫本發明之申請專利範圍所限。 當使用本實施例之平面燈的驅動方法時,首先,提供驅 • 動電壓。本實施的驅動波形100例如係利用功率元件Q1、Q2 - 的切換動作來使一直流電源形成具有方波特性的電壓波形, 意即驅動電壓在特定區間内(例如點燈區間丨丨丨、丨12和低位準 區間113)可維持固定電壓,且具有雙極性的波形,其中此功 率元件Ql、Q2例如可為金氧半場效電晶體(M〇SFET)。又例 9 200838361 如’本貝施的驅動波形1 〇〇亦可係直接藉由輸入電源Vh為 一交流電源(已具有正弦波特性)來形成方波電壓。 接著,利用變壓器Tl、T2、T3、T4(例如:高頻變壓器、 自耦變壓器或隔離變壓器)和耦合電感L1、L2來提升驅動電 壓至點燈電壓VI(例如為2kV),並維持預定時間Δτι,使壁 電荷w穩定於電極220和230,因而形成點燈區間U1,此時, 平面燈200内開始形成脈衝式的放電電流,並產生光輸出, 且同時在平面燈200内累積壁電荷w。 接著’降低驅動電壓至低位準電壓,並維持預定時間△ T2,其中低位準電壓係實質低於5〇伏特(v),因而形成低位 準區間113,此時,由於低位準電壓相對遠低於點燈電壓νι, 且未能穿過介電層能障,故在平面燈2〇〇内無放電電流形成, 而平面燈200内由於具有自持放電電流(Self_dischai^200838361 IX. Description of the Invention: [Technical Field] The present invention relates to a driving method of a flat lamp, and more particularly to a driving method of a flat lamp which can improve light emission and operational efficiency. [Prior Art] Due to the increasing demand for LCD TVs, various manufacturers have invested in research and development of new backlights, such as Light Emitting Diodes (LEDs) and backlights such as Flat Fluorescent Lamps (FFLs). Taking a mercury-free flat lamp as an example, since the mercury-free flat lamp is a planar light source, when the mercury-free flat lamp is assembled into a backlight module, the transmittance of the optical film used together can be higher than that of the conventional one. Therefore, it will greatly contribute to the improvement of the optical performance of the backlight module. Therefore, the mercury-free flat lamp can have a better development space than the LED backlight which also has mercury-free characteristics. The main advantage of the flat lamp is that it replaces mercury (Hg) with xenon (Xe), so it has a trend of environmental protection, long life (60,00 (M00,000 hours), large operating temperature range (_40 ° C ~ 85 ° C), Low production cost and easy assembly into a backlight module. The use of a mercury-free flat lamp as a backlight module requires less optical film and higher performance, and is comparable to a conventional direct-lit backlight module. The thickness of the mercury-free flat-lamp backlight module has the potential to be further thinned. The mercury-free flat lamp system creates a vacuum between the two flat glass, and then fills in a fixed proportion of the mixed inert gas-xenon (Xe), and then A potential difference discharge generated by applying a high voltage between the anode and the cathode causes the helium (Xe) atom in the cavity to be excited to become an excited state particle such as a ruthenium molecule and a low-energy electron. When the ruthenium molecule returns to the 氙 monomer atom At the same time, ultraviolet rays are simultaneously generated, and coating 5 200838361 The phosphor powder in the glass space is excited by the ultraviolet light, and the visible light is generated. The principle of the light emission is similar to that of the electric power display. Referring to FIG. 1 , the drawing is as follows. Schematic diagram of the driving waveform of a conventional flat lamp. The conventional flat lamp is driven by a unipolar pulse voltage. However, since the unipolar pulse voltage is a single pulse voltage of a fixed polarity, the inert gas is released as the operation time increases. The generated positive and negative ions are easily attached and accumulated in the vicinity of the electrode, thus forming a wall charge (Wallcharge). The driving voltage needs to be increased to obtain the same driving performance. Therefore, the overall luminous efficiency of the flat lamp is lowered, and the temperature of the lamp surface is increased, which easily causes the arc in the flat lamp to be unstable and affects the operation performance of the flat lamp. SUMMARY OF THE INVENTION Accordingly, it is an aspect of the present invention to provide a method of driving a planar lamp 'to maintain a specific and appropriate wall charge density within a planar lamp, thereby enhancing the operation and luminous efficiency of the planar lamp. Yet another aspect of the present invention. The invention provides a method for driving a flat lamp, which avoids over-saturation of the core of the transformer by moderately lowering the driving voltage during the driving process and can avoid excessive temperature of the lamp body. Another aspect of the present invention is to provide a flat lamp The driving method reduces the electromagnetic interference effect "and the acoustic frequency resonance situation by controlling the driving frequency to vary within a specific range. According to an embodiment of the invention, the driving method of the planar lamp comprises at least a driving voltage, wherein the driving voltage has a driving waveform, and each driving waveform has at least two lighting intervals and at least one low level interval in a period of each driving waveform. . The lighting interval is used to make the driving voltage substantially higher than the lighting voltage, wherein the lighting system is used to allow the flat light to start to light up. A low level interval is formed between the two light intervals to drive the drive voltage substantially below 5 volts (V); then, the drive voltage is used to drive the planar light to operate. Moreover, in accordance with an embodiment of the present invention, the driving voltage of the planar lamp has a driving waveform, wherein the period of each driving waveform includes at least: at least two lighting intervals and at least one low level interval. The lighting interval is used to make the driving voltage substantially higher than the lighting voltage, wherein the lighting voltage is used to allow the planar light to start to illuminate. A low level interval is formed between the two lighting intervals to make the driving voltage substantially less than 50 volts (V). Further, according to an embodiment of the present invention, the driving method of the planar lamp includes at least: providing a driving voltage to drive the planar lamp; raising a driving voltage to the lighting voltage to allow the planar lamp to start to light; and reducing and maintaining the driving voltage at a low level The quasi-voltage 'where the low level voltage is substantially less than 50 volts (V); and the driving voltage is raised again to the lighting voltage. Therefore, the finger electrodes of the driving method of the planar lamp of the present invention can effectively maintain a specific and appropriate wall charge density in the planar lamp to improve the operation and luminous efficiency L/rate' and can moderately reduce the driving process during the driving of the planar lamp. Voltage to avoid excessive temperature of the lamp body and supersaturation of the core of the transformer. Additionally, the drive waveform of the present invention can be a frequency disturbance waveform to reduce electromagnetic interference effects and acoustic frequency resonance conditions. [Embodiment] ^月参弟2图 and 3rd diagram, FIG. 2 is a timing diagram showing a driving voltage waveform of a planar lamp, a discharge current waveform in a lamp, and a light wheeling waveform according to the first embodiment of the present invention, Figure 3 is a cross-sectional view showing a 7 200838361 flat lamp in accordance with a first embodiment of the present invention. The driving method of the planar lamp of this embodiment uses a driving voltage having a driving waveform 100 to drive the planar lamp 200 to operate. The planar lamp 200 is, for example, a cold cathode lamp (CCFL), a plasma. Display light source for display (Plasma Display Panel; PDP) or jqat Fluorescent Lamp (FFL). When the flat lamp-200 is, for example, an external electrode type, the flat lamp 2 is applied with a voltage applied to the electrodes 220 and 230 outside the glass substrate 210 to generate electricity through the dielectric barrier (glass substrate 210). The phosphor layer 24 〇〇 in the plane lamp 2 激发 is excited to generate visible light. When the planar lamp 200 applies a voltage, it is easy to accumulate charges near the electrodes 220 and 230, thus forming a wall charge w, and a specific and appropriate wall charge w density can contribute to the operation of the planar lamp 2 . The driving voltage of the present embodiment having the driving waveform 100 can maintain a specific and appropriate wall charge w density in the planar lamp 200 to enhance the operability of the planar lamp 200. It is noted that the above-described planar lamp of the external electrode type For example, the driving method of the embodiment is not limited thereto, and the driving method of the embodiment can be used to drive any planar lamp having a wall charge. As shown in FIG. 2, at least two light intervals lu, 112 and at least one low level interval 113 are included in the period 11〇 of each driving waveform 1〇〇, and the lighting intervals 111 and 112 are used to drive the voltage. Substantially higher than the lighting voltage vi, J where the lighting voltage VI is used to allow the flat light 2 〇〇 to start lighting. A low level alignment 113 is formed between the lighting sections 111 and 112 for making the driving voltage substantially lower than 50 volts (V). Since the voltage in the low level interval 113 (below 50V) is relatively far below the lighting voltage VI (for example, 2kV), the driving voltage having the driving waveform 1〇〇 in this embodiment is used to drive the planar lamp 2〇. In the case of 〇, the low level U3 of the driving wave 8 200838361 can make the driving voltage approximate zero voltage, so as to avoid the temperature rise of the lamp body due to the leakage of the wall charge W, thereby lowering the operating temperature of the flat lamp 200 and increasing the overall Operational performance. In a physical sense, the driving method of the planar lamp of the present embodiment includes: raising the driving voltage of the planar lamp 200 to the lighting voltage vi (corresponding to the lighting interval 111 of the driving waveform 100) to allow the plane The lamp 200 begins to illuminate; then 'lower and maintain the drive voltage to a low level voltage (corresponding to a low level interval 113 of the drive waveform 1 )), wherein the low level voltage is substantially less than 5 volts (V), Then, the driving voltage of the flat lamp 2 再 is further raised to the lighting voltage vi (corresponding to the lighting section 112 of the driving waveform 1〇〇). Referring to Figures 2 and 4, Figure 4 is a schematic diagram showing the driving circuit of the planar lamp in accordance with the first embodiment of the present invention. The driving waveform 100 of the embodiment is provided to the planar lamp 2 by using a driving circuit 3, for example, by the power components qi, Q2, the transformer τι, T2, T3, T4, and the consuming inductance LI. And L2 and rectifiers D1, D2, D3, D4, D5, D0 are formed, and are electrically connected to an input power source Vin. It is worth noting that the driving circuit of FIG. 4 is only one embodiment of the present invention, and those skilled in the art of electronic circuits can achieve the same function by various electronic circuit designs, but the control method and the driving method are both It is not limited by the scope of the patent application of the present invention. When the driving method of the planar lamp of this embodiment is used, first, the driving voltage is supplied. The driving waveform 100 of the present embodiment uses a switching operation of the power elements Q1, Q2 - to form a voltage waveform having a square wave characteristic, that is, the driving voltage is within a specific interval (for example, a lighting interval 丨丨丨, 丨). The 12 and low level intervals 113) can maintain a fixed voltage and have a bipolar waveform, wherein the power elements Q1, Q2 can be, for example, a gold oxide half field effect transistor (M〇SFET). Example 9 200838361 For example, the driving waveform 1 of Benbesch can also form a square wave voltage directly by the input power source Vh being an AC power source (having a sine wave characteristic). Then, using the transformers T1, T2, T3, T4 (for example: high-frequency transformer, autotransformer or isolation transformer) and the coupled inductors L1, L2 to boost the driving voltage to the lighting voltage VI (for example, 2kV) and maintain the predetermined time Δτι, the wall charges w are stabilized at the electrodes 220 and 230, thereby forming the lighting interval U1, at which time, a pulsed discharge current is started to be formed in the planar lamp 200, and a light output is generated, and at the same time, wall charges are accumulated in the planar lamp 200. w. Then 'lower the driving voltage to the low level voltage and maintain the predetermined time Δ T2 , wherein the low level voltage is substantially lower than 5 volts (v), thus forming a low level interval 113, at this time, since the low level voltage is relatively far lower than The lighting voltage νι, and fails to pass through the dielectric layer barrier, so no discharge current is formed in the planar lamp 2〇〇, and the self-sustaining discharge current in the planar lamp 200 (Self_dischai^

Current),故可維持平面燈2〇〇的光輸出。另外,由於低位準 區間113可使驅動電壓近似於零電壓,以避免燈體溫度上升 的情形’因而可降低燈體溫度,並可降低變壓器T1、Τ2、T3、 T4所承受的電壓,以降低變壓器Τι、T2、T3、T4的鐵心磁 通避免變壓态Tl、Τ2、Τ3、Τ4的鐵心過飽和,而影響元 件性能。 曰 接著’再提升驅動電壓至點燈電壓VI,並維持預定時間 △ Τ3,因而再形成點燈區間丨丨2,並形成之驅動波形工⑼之單 一週期110的一半波形u〇a。此時,平面燈2〇〇内再此形成 脈衝式的放電電流,並產生光輸出,且同時在平面燈2〇〇内 再次寫入壁電荷w,以維持特定且適當的壁電荷w密度。 然後,形成驅動波形1 〇〇之單一週期丨丨〇的另一半波形 10 200838361 110b,以完成驅動波形100之單一週期110,並可重覆此週期 110來驅動平面燈200。此另一半波形110b的波形係相同於 半波形110a,但極性係相反於半波形110a,意即半波形110a 和半波形ll〇b的相位相差180度。 因此,本實施例之平面燈的驅動方法利用具有驅動波形 - 100的驅動電壓來驅動平面燈200,以使平面燈200内可維持 特定且適當的壁電荷w密度,因而提升操作和發光效率,且 可適度地降低驅動電壓,以避免燈體的溫度過高而影響平面 燈的運作。另外,由於本實施例之驅動方法可維持平面燈200 内適當的壁電荷w密度,因而可適用於均勻地點亮大尺寸的 平面燈200 〇 請參照第5圖,其繪示依照本發明之第二實施例之平面 燈之驅動電壓波形。相較於第一實施例,第二實施例之平面 燈之驅動頻率係控制於一主頻率值(例如為65kHz)附近的增 減範圍内,以驅動平面燈。意即第二實施例之驅動波形400 係屬一頻率擾動波形(Frequency Perturbation),其波形頻率(週 {j 期)係在特定變化量内變動(即週期410和410’之間具有些微 變動),例如在3〜5kHz之間變動,而非僅固定於單一主頻率。 由於一般平面燈200係藉由高驅動電壓(大於lkV)來驅動,且 平面燈200的操作主頻率大多係位於30〜90kHz之間,因而容 • 易發生電磁干擾效應(Electromagnetic Interference ; EMI)和聲 波頻率共振(Acoustic Resonance)的情形,使平面燈200的發 光不穩定。因此本實施之驅動波形400可避免聲波共振的情 形,並由於驅動波形400的能量不集中,而可降低電磁干擾 效應。 11 200838361 由上述本發明的實施例可知,本發明之平面燈的驅動方 法利用具有驅動波形的驅動電壓來驅動平面燈,以使平面燈 内可維持特定且適當的壁電荷密度,提升操作和發光效率, 且可在驅動過程適度地降低驅動電壓(低於50v),以避免燈體 的溫度過高和變壓器的鐵心過飽和。另外,本發明之驅動波 ' 形可為頻率擾動波形,以減少電磁干擾效應和聲波頻率共振 情形。 、八 雖然本發明已以一較佳實施例揭露如上,然其並非用以 f' :定本發明,任何熟習此技藝者,在不脫離本發明之精神和 範圍内,當可作各種之更動與潤飾,因此本發明之保護範圍 當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 為讓本發明之上述和其他目的、特徵、優點與實施例能 更明顯易懂,所附圖式之詳細說明如下·· 第1圖係繪示根據習用之平面燈的驅動波形示意圖。 G 第2 ®⑽示根據本發明之第―實_之平面燈之驅動 «壓波形、燈内放電電流波形及光輸出波形的時序圖。 第3圖係緣示根據本發明之第—實施例之平面燈的剖面 示意圖。 - 第4圖係繪示根據本發明之第-實_之平面燈的驅動 電路示意圖。 第5圖係繪示減本發明之第二實施例之平面燈之驅動 12 200838361 【主要元件符號說明】 D1、D2、D3、D4、D5、D6 ··整流器 LI、L2 :耦合電感 Ql、Q2 ··功率元件 ΤΙ、T2、T3、T4 :變壓器 Vin:輸入電源 “ VI :點燈電壓 w :壁電荷 - ΑΤΙ、ΛΤ2、△TS :預定時間 100、400 :驅動波形 110、 410、410,:週期 (s 110a、110b :半波形 113 :低位準區間 210 :玻璃基板 240 :螢光體層 111、 112 :點燈區間 200 :平面燈 220、230 :電極 300 :驅動電路Current), so the light output of the flat light can be maintained. In addition, since the low level interval 113 can drive the driving voltage to be close to zero voltage to avoid the temperature rise of the lamp body, the lamp body temperature can be lowered, and the voltages of the transformers T1, T2, T3, and T4 can be reduced to reduce the voltage. The core flux of the transformers Τι, T2, T3, and T4 avoids over-saturation of the cores of the transformed states T1, Τ2, Τ3, and Τ4, and affects component performance.曰 Then, the driving voltage is raised to the lighting voltage VI again for a predetermined time Δ Τ 3, thereby forming the lighting interval 丨丨 2, and forming a half waveform u 〇 a of the single period 110 of the driving waveform worker (9). At this time, a pulsed discharge current is again formed in the planar lamp 2, and a light output is generated, and at the same time, the wall charges w are written again in the planar lamp 2 to maintain a specific and appropriate wall charge w density. Then, the other half of the waveform 10 200838361 110b of the single period 驱动 of the driving waveform 1 形成 is formed to complete the single period 110 of the driving waveform 100, and the period 110 can be repeated to drive the planar lamp 200. The waveform of the other half waveform 110b is the same as the half waveform 110a, but the polarity is opposite to the half waveform 110a, meaning that the phases of the half waveform 110a and the half waveform 11b differ by 180 degrees. Therefore, the driving method of the planar lamp of the present embodiment drives the planar lamp 200 by using the driving voltage having the driving waveform -100 so that the specific and appropriate wall charge w density can be maintained in the planar lamp 200, thereby improving the operation and luminous efficiency. And the driving voltage can be moderately reduced to avoid the temperature of the lamp body being too high and affecting the operation of the planar lamp. In addition, since the driving method of the present embodiment can maintain an appropriate wall charge w density in the planar lamp 200, it can be applied to uniformly illuminate a large-sized planar lamp 200. Referring to FIG. 5, it is shown in accordance with the present invention. The driving voltage waveform of the planar lamp of the second embodiment. In contrast to the first embodiment, the driving frequency of the planar lamp of the second embodiment is controlled within an increase/decrease range near a main frequency value (e.g., 65 kHz) to drive the planar lamp. That is, the driving waveform 400 of the second embodiment is a frequency perturbation waveform whose waveform frequency (week {j phase) varies within a certain amount of variation (ie, slight variation between periods 410 and 410') For example, it varies between 3 and 5 kHz, not just a single main frequency. Since the general planar lamp 200 is driven by a high driving voltage (greater than lkV), and the operating main frequency of the planar lamp 200 is mostly between 30 and 90 kHz, electromagnetic interference (EMI) and electromagnetic interference (EMI) are easily generated. In the case of Acoustic Resonance, the illumination of the planar lamp 200 is unstable. Therefore, the driving waveform 400 of the present embodiment can avoid the situation of acoustic resonance, and the electromagnetic interference effect can be reduced because the energy of the driving waveform 400 is not concentrated. 11 200838361 It can be seen from the above embodiments of the present invention that the driving method of the planar lamp of the present invention drives the planar lamp by using a driving voltage having a driving waveform, so that a specific and appropriate wall charge density can be maintained in the planar lamp, and the operation and illumination are improved. Efficiency, and the driving voltage can be moderately reduced (less than 50v) during the driving process to avoid excessive temperature of the lamp body and supersaturation of the core of the transformer. In addition, the driving wave shape of the present invention may be a frequency disturbance waveform to reduce the electromagnetic interference effect and the acoustic frequency resonance. The present invention has been described above with reference to a preferred embodiment. However, it is not intended to be used in the present invention, and various modifications may be made without departing from the spirit and scope of the invention. The scope of protection of the present invention is therefore defined by the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS The above and other objects, features, advantages and embodiments of the present invention will become more <RTIgt; Drive the waveform diagram. G 2 ® (10) shows the driving of the flat lamp according to the first embodiment of the present invention « Timing diagram of the voltage waveform, the discharge current waveform in the lamp, and the light output waveform. Fig. 3 is a schematic cross-sectional view showing a flat lamp according to a first embodiment of the present invention. - Figure 4 is a schematic diagram showing the driving circuit of the planar lamp according to the first embodiment of the present invention. Figure 5 is a diagram showing the driving of the flat lamp according to the second embodiment of the present invention. 200838361 [Description of main components] D1, D2, D3, D4, D5, D6 · Rectifiers LI, L2: Coupling inductors Ql, Q2 · Power components ΤΙ, T2, T3, T4: Transformer Vin: Input power supply "VI: lighting voltage w: wall charge - ΑΤΙ, ΛΤ 2, ΔTS: predetermined time 100, 400: drive waveforms 110, 410, 410,: Period (s 110a, 110b: half waveform 113: low level interval 210: glass substrate 240: phosphor layers 111, 112: lighting section 200: plane lamps 220, 230: electrode 300: driving circuit

Claims (1)

200838361 十、申請專利範圍: 1. 一種平面燈之驅動方法至少包含: 提供一驅動電壓,其中該驅動電壓具有一驅動波形,且 每一該驅動波形的週期中至少包含: 至少二點燈區間,用以使該驅動電壓實質高於一點 ^ 燈電壓,其中該點燈電壓係用以允許該平面燈開始點 亮;以及 至少一低位準區間,形成於該二點燈區間之間,用 ( 以使該驅動電壓實質低於50伏特(V);以及 使用該驅動電壓來驅動該平面燈進行運作。 2. 如申請專利範圍第1項所述之平面燈之驅動方法,其 中該平面燈係一無汞平面燈(Flat Fluorescent Lamp ; FFL)。 3. 如申請專利範圍第1項所述之平面燈之驅動方法,其 中該平面燈係一冷陰極燈(Cold Cathode Fluorescent Lamp; U CCFL) 〇 4. 如申請專利範圍第1項所述之平面燈之驅動方法,其 中該平面燈係一電漿顯示器(Plasma Display Panel ; PDP)的顯 示光源。 5.如申請專利範圍第1項所述之平面燈之驅動方法,其 中該點燈電壓係實質高於1000伏特(V)。 14 200838361 6.如申睛專利㈣第5項所述之平面燈之驅動方法,其 中該點燈電壓係實質高於2000伏特(v)。 7·如中請專利範圍第i項所述之平面燈之驅動方法,其 中該提供該驅動電㈣步驟中該驅動電壓係利用—驅動電路 來提供該驅動電壓,且該驅動電路係電性連接—輸入電源。 8. 如巾請專利_第7項所述之平面燈之㈣方法,其 中該輸入電源係一直流電源。 9. 士口申請專利範圍第7項所述之平面燈之驅動方法,其 中該輸入電源係一交流電源。 10.如申請專利範圍第7項所述之平面燈之驅動方法, U 動電路具有複數個功率元件、複數個變壓器、複數 個耦合電感及複數個整流器。 其二 …/:申二專利範圍第1項所述之平面燈之驅動方法, 其中更至少包含: 控制該驅動電壓的頻率於 午於主頻率值的一增減範圍内。 15 200838361 13·如申請專利範圍第12項所述之平面燈之驅動方法, 其中該主頻率值係實質介於30kHz至90kHz。 14. 如申請專利範圍第13項所述之平面燈之驅動方法, 其中該主頻率值係實質約50kHz。 15. 如申請專利範圍第12項所述之平面燈之驅動方法, 其中該主頻率值的該增減範圍係實質介於3kHz至10kHz。 Γ 16. —種平面燈之驅動電壓,其具有一驅動波形,其中 每一該驅動波形的週期至少包含: 至少二點燈區間,用以使該驅動電壓實質高於一點燈電 壓,其中該點燈電壓係用以允許該平面燈開始點亮;以及 至少一低位準區間,形成於該二點燈區間之間,用以使 該驅動電壓實質低於50伏特(V)。 (j 17.如申請專利範圍第16項所述之平面燈之驅動電壓, 其中該平面燈係一無汞平面燈(Flat Fluorescent Lamp ; FFL)。 18.如申請專利範圍第16項所述之平面燈之驅動電壓, - 其中該平面燈係一冷陰極燈(Cold Cathode Fluorescent Lamp ; CCFL) 〇 19 ·如申請專利範圍第16項所述之平面燈之驅動電壓, 其中該平面燈係一電漿顯示器(Plasma Display Panel ; PDP)的 16 200838361 顯示光源。 20·如申請專利範圍第16項所述之平面燈之驅動電壓, 其中該點燈電壓係實質高於1000伏特(V)。 21 ·如申明專利範圍第2〇項所述之平面燈之驅動電壓, 其中該點燈電壓係實質高於2〇〇〇伏特(v)。 Γ 22·如申請專利範圍第16項所述之平面燈之驅動電壓, 其中該驅動電壓係利用一驅動電路來形成,且該驅動電路係 電性連接一輸入電源。 23·如申請專利範圍第22項所述之平面燈之驅動電壓, 其中該輸入電源係一直流電源。 24·如申鉍專利範圍第22項所述之平面燈之驅動電壓, 其中該輸入電源係一交流電源。 25·如申清專利範圍第22項所述之平面燈之驅動電壓, 其中該驅動電路具有複數個功率元件、複數個變壓器、複數 ― 個耦合電感及複數個整流器。 26·如申請專利範圍第16項所述之平面燈之驅動電壓, 其中該驅動波形係一方波波形。 200838361 27·如申請專利範圍第 其中該驅動電壓的頻率係實 圍内。 16項所述之平面燈之驅動電壓, 貝控制於一主頻率值的一增減範 Ο 」如巾明專利㈣第28項所述之平面燈之驅動電壓 其中該主頻率值係實質約50kHz。 30·如申請專利範圍第27項所述之平面燈之驅動電壓, 其中該主頻率值的該增減範圍係實質介於3kHz至10kHz。 31· —種平面燈之驅動方法至少包含: 提供一驅動電壓來驅動該平面燈; 提升該驅動電壓至一點燈電壓,用以允許該平面燈開始 Cj 點亮; 降低並維持該驅動電壓於一低位準電壓,其中該低位準 電壓係實質低於50伏特(V);以及 再提升該驅動電壓至該點燈電壓。 32·如申請專利範圍第31項所述之平面燈之驅動方法, 其中該提升該驅動電壓的步驟中該驅動電壓係利用至少_變 壓器來提升。 18 200838361 33. 如申請專利範圍第31項所述之平面燈之驅動方法, 其中該平面燈係一無汞平面燈(Flat Fluorescent Lamp ; FFL)。 34. 如申讀專利範圍第31項所述之平面燈之驅動方法, 其中該平面燈係一冷陰極燈(Cold Cathode Fluorescent Lamp ; CCFL) 〇 35. 如申請專利範圍第31項所述之平面燈之驅動方法, 其中該平面燈係一電漿顯示器(Plasma Display Panel ; PDP)的 顯示光源。 36. 如申請專利範圍第31項所述之平面燈之驅動方法, 其中該點燈電壓係實質高於1000伏特(V)。 37. 如申請專利範圍第36項所述之平面燈之驅動方法, 其中該點燈電壓係實質高於2000伏特(V)。 38. 如申請專利範圍第31項所述之平面燈之驅動方法, 其中該提供該驅動電壓的步驟中該驅動電壓係利用一驅動電 路來提供該驅動電壓,且該驅動電路係電性連接一輸入電源。 39·如申請專利範圍第38項所述之平面燈之驅動方法, 其中該輸入電源係一直流電源。 40·如申請專利範圍第3 8項所述之平面燈之驅動方法, 19 200838361 其中該輸入電源係一交流電源。 41_如申請專利範圍帛38項所述之平面燈之驅動方法, 其中該驅動電路具有複數個功率元件、複數個變壓器、複數 個耦合電感及複數個整流器。 42·如申研專利範圍第31項所述之平面燈之驅動方法, 其中更至少包含: 控制該驅動電壓的頻率於一主頻率值的一增減範圍内。 认如巾請專利範圍第〇項所述之平面燈之驅動方法, 其中該主頻率值係實質介於30kHz至90kHz。 1 如申明專利範圍第43項所述之平面燈之驅動方法, ,、中該主頻率值係實質約5〇kHz。 直中Μ如中明專利耗圍第42項所述之平面燈之驅動方法, 〆、以頻率值的該增減範圍係實質介於遞冗至臟2。 20200838361 X. Patent application scope: 1. A driving method for a flat lamp comprises: providing a driving voltage, wherein the driving voltage has a driving waveform, and each of the driving waveform periods includes at least: at least two lighting intervals, The driving voltage is substantially higher than a lamp voltage, wherein the lighting voltage is used to allow the planar lamp to start to light; and at least a low level interval is formed between the two lighting intervals. The driving voltage is substantially lower than 50 volts (V); and the driving voltage is used to drive the planar lamp to operate. 2. The driving method of the planar lamp according to claim 1, wherein the planar lamp is The method of driving a flat lamp according to claim 1, wherein the flat lamp is a Cold Cathode Fluorescent Lamp (U CCFL) 〇 4 The method for driving a flat lamp according to claim 1, wherein the flat lamp is a display light source of a plasma display panel (PDP) 5. The driving method of a flat lamp according to claim 1, wherein the lighting voltage is substantially higher than 1000 volts (V). 14 200838361 6. The flat lamp according to claim 5 of claim 4 (4) The driving method, wherein the lighting voltage is substantially higher than 2000 volts (v). 7. The driving method of the planar lamp according to the invention, wherein the driving voltage is provided in the driving step (four) The driving voltage is provided by the driving circuit, and the driving circuit is electrically connected to the input power source. 8. The method according to the fourth aspect of the invention, wherein the input power source is a continuous power source. 9. The driving method of the flat lamp according to the seventh aspect of the patent application, wherein the input power source is an alternating current power source. 10. The driving method of the flat lamp according to claim 7 of the patent application, the U moving circuit The method includes the following: a plurality of power components, a plurality of transformers, a plurality of coupled inductors, and a plurality of rectifiers. The method for driving the planar light according to the first aspect of the patent application, wherein the method further comprises: The driving voltage is in the range of increasing or decreasing from the main frequency value. The driving method of the flat lamp according to claim 12, wherein the main frequency value is substantially between 30 kHz and 90 kHz. 14. The method of driving a flat lamp according to claim 13, wherein the main frequency value is substantially 50 kHz. 15. The driving method of the flat lamp according to claim 12, wherein the main frequency The range of increase or decrease of the value is substantially between 3 kHz and 10 kHz. Γ 16. The driving voltage of the flat lamp has a driving waveform, wherein the period of each of the driving waveforms at least includes: at least two lighting intervals for making the driving voltage substantially higher than a lamp voltage, wherein the point The lamp voltage is used to allow the planar lamp to start to illuminate; and at least a low level interval is formed between the two lighting intervals for making the driving voltage substantially lower than 50 volts (V). (j 17. The driving voltage of the flat lamp according to claim 16 wherein the flat lamp is a Flat Fluorescent Lamp (FFL). 18. As described in claim 16 The driving voltage of the flat lamp, wherein the flat lamp is a cold cathode lamp (CCFL) 〇 19 · The driving voltage of the flat lamp as described in claim 16 of the patent application, wherein the flat lamp is electrically The plasma display panel (PDP) of 16 200838361 displays the light source. The driving voltage of the flat lamp as described in claim 16 wherein the lighting voltage is substantially higher than 1000 volts (V). The driving voltage of the flat lamp as described in claim 2, wherein the lighting voltage is substantially higher than 2 volts (v). Γ 22 · The flat lamp according to claim 16 a driving voltage, wherein the driving voltage is formed by a driving circuit, and the driving circuit is electrically connected to an input power source. 23. The driving voltage of the planar lamp according to claim 22, The input power source is a continuous power source. 24. The driving voltage of the flat lamp as described in claim 22, wherein the input power source is an alternating current power source. 25 · The plane as described in claim 22 of the patent scope The driving voltage of the lamp, wherein the driving circuit has a plurality of power components, a plurality of transformers, a plurality of coupled inductors, and a plurality of rectifiers. 26. The driving voltage of the planar lamp according to claim 16 wherein the driving The waveform is a square wave waveform. 200838361 27·If the frequency range of the driving voltage is within the real range of the application, the driving voltage of the flat lamp described in item 16 is controlled by a frequency increase or decrease of a main frequency value. The driving voltage of the flat lamp described in item 28 of the patent (4), wherein the main frequency value is substantially about 50 kHz. 30. The driving voltage of the flat lamp as described in claim 27, wherein the main frequency value The range of the increase or decrease is substantially between 3 kHz and 10 kHz. 31. The driving method of the planar light comprises at least: providing a driving voltage to drive the planar light; Voltage to a lamp voltage for allowing the planar lamp to start Cj lighting; lowering and maintaining the driving voltage at a low level voltage, wherein the low level voltage is substantially less than 50 volts (V); and boosting the driving voltage The driving method of the flat lamp according to claim 31, wherein the driving voltage is increased by using at least a transformer in the step of raising the driving voltage. 18 200838361 33. The method for driving a flat lamp according to claim 31, wherein the flat lamp is a Flat Fluorescent Lamp (FFL). 34. The method of driving a flat lamp according to claim 31, wherein the flat lamp is a Cold Cathode Fluorescent Lamp (CCFL) 〇 35. The plane as described in claim 31 The driving method of the lamp, wherein the flat lamp is a display light source of a plasma display panel (PDP). The method of driving a flat lamp according to claim 31, wherein the lighting voltage is substantially higher than 1000 volts (V). 37. A method of driving a planar light as described in claim 36, wherein the lighting voltage is substantially higher than 2000 volts (V). The driving method of the flat lamp according to claim 31, wherein in the step of providing the driving voltage, the driving voltage is provided by a driving circuit, and the driving circuit is electrically connected Input power. 39. The method of driving a flat lamp according to claim 38, wherein the input power source is a continuous power source. 40. A method of driving a flat lamp as described in claim 38, wherein the input power source is an alternating current power source. 41. The method of driving a planar lamp according to claim 38, wherein the driving circuit has a plurality of power components, a plurality of transformers, a plurality of coupled inductors, and a plurality of rectifiers. 42. The driving method of the flat lamp according to claim 31, wherein the method further comprises: controlling the frequency of the driving voltage to be within a range of increasing or decreasing of a main frequency value. The driving method of the flat lamp described in the scope of the patent application, wherein the main frequency value is substantially between 30 kHz and 90 kHz. 1 The method for driving a flat lamp according to claim 43 of the patent scope, wherein the main frequency value is substantially about 5 kHz. For example, the driving method of the flat lamp described in Item 42 of Zhongming Patent Consumption, 〆, the range of increase or decrease of the frequency value is substantially between the redundancy and the dirty. 20
TW96107661A 2007-03-06 2007-03-06 A method for driving flat lamp TW200838361A (en)

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