TW200837833A - Reflow processing method and production method of TFT - Google Patents

Reflow processing method and production method of TFT Download PDF

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Publication number
TW200837833A
TW200837833A TW097102010A TW97102010A TW200837833A TW 200837833 A TW200837833 A TW 200837833A TW 097102010 A TW097102010 A TW 097102010A TW 97102010 A TW97102010 A TW 97102010A TW 200837833 A TW200837833 A TW 200837833A
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Taiwan
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photoresist
mask
wiring
photoresist mask
electrode
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TW097102010A
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Chinese (zh)
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Yutaka Asou
Masatoshi Shiraishi
Shinobu Tanaka
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Tokyo Electron Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/16—Coating processes; Apparatus therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Thin Film Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

Disclosed is a reflow processing method and a production method of TFT that perform resist reduction and reduction in number of steps, while the accuracy of the reflow processing is secured. The line width W1 and W2 are set so that volume V1 for each unit length of resist mask 210 (resist mask 211 for the drain electrode) for the source electrode may increase for volume V2 for each unit length of resist mask 231 for wiring by a factor of 1.5-3. As a result, the line width W3 of transformation resist 212 obtained by transforming resist mask 210 (resist mask 211 for the drain electrode) for the source electrode is secured by width enough for the cover of concave part 220. The line width W4 of transformation resist 232 obtained by transforming resist mask 231 for wiring is controlled small.

Description

200837833 九、發明說明 【發明所屬之技術領域】 本發明是關於例如薄膜電晶體（TFT)等的製程所能夠 利用的光阻劑之回流處理方法及薄膜電晶體（TFT)之製造 方法。 【先前技術】 Φ 主動式矩陣（active matrix)型液晶顯示裝置係以在形 成有薄膜電晶體（TFT)之薄膜電晶體（TFT)基板與形成有彩 色濾光片（color filter)之對向基板之間夾入液晶來予以支 撐，可選擇性地對每一像素施加電壓的方式所構成。此處 所採用之薄膜電晶體（TFT)基板的製程，必須藉由微影技 術（lithography technology)來反覆進行光阻劑等之感光性 材料的圖案處理，故每一微影製程都必須要有光阻遮罩。 但是，近年隨著液晶顯示裝置往高積體化及微細化進 ©展，該製程也跟著變複雜，製造成本則有增加的趨勢。於 是’針對應要降低製造成本，讓微影用之遮罩圖案的形成 步驟統合來削減全體的步驟數，進行檢討。提案回流製程 來作爲削減遮罩圖案的形成步驟之技術，該回流製程係讓 有機溶劑滲透到以圖案形成的光阻劑，使光阻劑溶化，再 使圖案形狀變化來再度使用，藉此來省略遮罩圖案的形成 步驟 0 [專利文獻1]日本專利特開2002-3 3 483 0號公報 (專利文獻的範圍等） 200837833 【發明內容】 &lt;發明所欲解決之課題&gt; 回流技術的優點是可以削減微影（lithography)步驟的 次數，並且還可以節省光阻劑的消耗量。但是，回流處理 會將基板表面的光阻劑曝露在溶劑氛圍中，故要依照基板 面內的區域來調節回流速度（也就是光阻劑的變形速度）會 有困難。因而’即使經由回流處理而在基板上存在欲讓光 阻劑包覆的區域、及不欲讓光阻劑包覆的區域的情況，仍 然會對基板面內一律進行回流，其結果造成的問題爲：在 下一個的蝕刻步驟利用變形的光阻劑來作爲蝕刻遮罩，會 損及下層膜的蝕刻精度。 例如，薄膜電晶體（TFT)元件的製程中應用回流處理 的情況，要使作爲源極電極/汲極電極形成用的蝕刻遮罩 來利用之光阻劑變形，包覆源極電極與汲極電極之間的通 道部的話，作爲配線形成用的蝕刻遮罩來使用之配線上的 光阻劑也跟著變形而寬於配線寬度。此情況所造成的問題 爲：將利用回流處理所變形的光阻劑作爲遮罩，在下一個 步驟進行下層的非晶質砂（a - S i)層的飩刻，對於配線的寬 度則會如同擠出而殘留過寬之下層的a-Si層，不容易與 薄膜電晶體（TFT)元件的微細化或高積體化相對應。 因此，本發明的目的是提供能夠確保回流處理的精度 ’並達到節省光阻劑以及削減步驟數之回流處理方法及薄 膜電晶體（TFT)之製造方法。 200837833 &lt;用以解決課題之手段&gt; 爲了要解決上述課題，本發明的第1重點係提供回流 處理方法’該回流處理方法是一種在回流處理裝置的處理 室內，讓溶劑對具有形成有圖案的電極用金屬膜和與該電 極用金屬膜相連接的配線用金屬膜、及分別被設置在前述 電極用金屬膜和前述配線用金屬膜的上面之電極用光阻遮 罩和配線用光阻遮罩之基板產生作用，使光阻劑軟化變形 ，以變形光阻劑來包覆與前述電極用金屬膜相鄰的區域之 回流處理方法，其特徵爲： 相對於前述配線用光阻遮罩每單位長度L的體積V2 ，前述電極用光阻遮罩每單位長度L的體積¥1爲1.5〜3倍 〇 上述本發明的第1重點中，也可以將前述電極用光阻 遮罩的線寬形成爲大於前述配線用光阻遮罩的線寬。另外 ，還可以將前述電極用光阻遮罩的膜厚形成爲大於前述配 線用光阻遮罩的膜厚。 另外，本發明的第2重點係提供回流處理方法，該回 流處理方法是一種在回流處理裝置的處理室內，讓溶劑對 具有以圖案形成的電極用金屬膜和與該電極用金屬膜相連 接的配線用金屬膜、及分別被設置在前述電極用金屬膜和 前述配線用金屬膜的上面之電極用光阻遮罩和配線用光阻 遮罩之基板產生作用，使光阻劑軟化變形，以變形光阻劑 來包覆與前述電極用金屬膜相鄰的區域之回流處理方法， 200837833 其特徵爲= 相對於前述配線用光阻遮罩每單位長度L的體積V2 ，前述電極用光阻遮罩每單位長度L的體積¥1爲〇.2〜0.7 上述本發明的第2重點中，也可以將前述電極用光阻 遮罩的線寬形成爲小於前述配線用光阻遮罩的線寬。另外 ，還可以將前述電極用光阻遮罩的膜厚形成爲小於前述配 線用光阻遮罩的膜厚。在這兩情況下，可以在前述配線用 光阻遮罩尙未流動化的時間，進行回流處理。尤其，最好 是在前述配線用光阻遮罩尙未流動化的時間，反覆進行回 流處理，強勢地使前述電極用光阻遮罩變形。 另外，本發明的第3重點係提供薄膜電晶體（TFT)之製 造方法，該TFT之製造方法是一種具有源極電極與汲極 電極之間的通道部、及分別與前述源極電極和前述汲極電 極相連接的配線的薄膜電晶體（TFT)之製造方法，其特徵 爲： 包含有以下的步驟： 在被形成於基板上之金屬膜的上面形成光阻膜之步驟 ;及 利用微影技術（lithography technology) ’以圖案形成 前述光阻膜，而形成源極電極用光阻遮罩、汲極電極用光 阻遮罩以及配線用光阻遮罩之步驟；及 以前述源極電極用光阻遮罩、前述汲極電極用光阻遮 罩以及前述配線用光阻遮罩當作遮罩，將前述金屬膜予以 200837833 蝕刻’形成前述源極電極及前述汲極電極及前述配線之金 屬膜蝕刻步驟；及 讓溶劑對前述源極電極用光阻遮罩、前述汲極電極用 光阻遮罩以及前述配線用光阻遮罩產生作用，使光阻劑軟 化變形’以變形光阻劑來包覆前述源極電極與前述汲極電 極之間之回流步驟；及 前述回流步驟中，相對於前述配線用光阻遮罩每單位 φ 長度L的體積V2，前述源極電極用光阻遮罩和/或前述汲 極電極用光阻遮罩每單位長度L的體積乂！爲1.5〜3倍。 另外，本發明的第4重點係提供薄膜電晶體（TFT)之製 造方法，該薄膜電晶體（TFT)之製造方法是一種具有源極 電極與汲極電極之間的通道部、及分別與前述源極電極和 前述汲極電極相連接的配線的薄膜電晶體（TFT)之製造方 法，其特徵爲： 包含有以下的步驟： • 在被形成於基板上之金屬膜的上面形成光阻膜之步驟 ;及 利用微影技術（lithography technology)，以圖案形成 前述光阻膜，而形成源極電極用光阻遮罩、汲極電極用光 阻遮罩以及配線用光阻遮罩之步驟；及 以前述源極電極用光阻遮罩、前述汲極電極用光阻遮 罩以及前述配線用光阻遮罩當作遮罩，將前述金屬膜予以 蝕刻，形成前述源極電極及前述汲極電極及前述配線之金 屬膜蝕刻步驟；及 -9- 200837833 讓溶劑對前述源極電極用光阻遮罩、前述汲極電極用 光阻遮罩以及前述配線用光阻遮罩產生作用，使光阻劑軟 化變形，以變形光阻劑來包覆前述源極電極與前述汲極電 極之間之回流步驟；及 前述回流步驟中’相對於前述配線用光阻遮罩每單位 長度L的體積V2，前述源極電極用光阻遮罩和/或前述汲 極電極用光阻遮罩每單位長度L的體積νι爲〇·2〜〇· 7倍。 φ 另外，本發明的第5重點係提供薄膜電晶體（TFT)之製 造方法，其特徵爲： 包含有以下的步驟： 在基板上形成閘極電極之步驟；及 將覆蓋前述閘極電極的閘極絕緣膜予以形成之步騾； 及. 從下起依序，使hSi膜、歐姆接觸用Si膜及金屬膜 ，堆積在前述閘極絕緣膜上之步驟；及 • 在前述金屬膜上形成光阻膜之步驟；及 用特定的曝光遮罩來曝光處理前述光阻膜之步驟；及 將被曝光處理過的前述光阻膜經顯影處理來予以以圖 案形成，形成源極電極用光阻遮罩、汲極電極用光阻遮罩 以及配線用光阻遮罩之遮罩圖案處理步驟；及 以前述源極電極用光阻遮罩、前述汲極電極用光阻遮 罩以及前述配線用光阻遮罩當作遮罩，將前述金屬膜予以 倉虫刻，形成源極電極及汲極電極及分別與該兩電極相連接 的配線之金屬膜蝕刻步驟；及 -10- 200837833 讓有機溶媒對前述源極電極用光阻遮罩、前述汲極電 極用光阻遮罩以及前述配線用光阻遮罩產生作用，使光阻 劑軟化變形’以變形光阻劑來至少將前述源極電極與前述 汲極電極之間之通道用凹部內的前述歐姆接觸用Si膜予 以覆蓋之回流步驟；及 以前述變形光阻劑以及前述源極電極和前述汲極電極 當作遮罩，將下層的前述歐姆接觸用Si膜和前述a-Si膜 予以飩刻之步驟；及 除去前述變形光阻劑，讓前述歐姆接觸用Si膜再度 曝露在前述通道用凹部內之步驟；及 以前述源極電極及前述汲極電極當作遮罩，將曝露在 這兩電極之間的前述通道用凹部之前述歐姆接觸用Si膜 予以蝕刻之步驟；及 前述回流步驟中，相對於前述配線用光阻遮罩每單位 長度L的體積V2，前述源極電極用光阻遮罩和/或前述汲 極電極用光阻遮罩每單位長度L的體積乂1爲1.5〜3倍。 另外，本發明的第6重點係提供TFT之製造方法，其 特徵爲： 包含有以下的步驟： 在基板上形成閘極電極之步驟；及 將覆蓋前述閘極電極的閘極絕緣膜予以形成之步驟； 及 從下起依序，使“膜、歐姆接觸用Si膜及金屬膜 ，堆積在前述閛極絕緣膜上之步驟；及 -11 - 200837833 在前述金屬膜上形成光阻膜之步驟；及 用特定的曝光遮罩來曝光處理前述光阻膜之步驟；及 將被曝光處理過的前述光阻膜經顯影處理來予以以圖 案形成，形成源極電極用光阻遮罩、汲極電極用光阻遮罩 以及配線用光阻遮罩之遮罩圖案處理步驟；及 以前述源極電極用光阻遮罩、前述汲極電極用光阻遮 罩以及前述配線用光阻遮罩當作遮罩，將前述金屬膜予以 触刻，形成源極電極及汲極電極及分別與該兩電極相連接 的配線之金屬膜触刻步驟；及 讓有機溶媒對前述源極電極用光阻遮罩、前述汲極電 極用光阻遮罩以及前述配線用光阻遮罩產生作用，使光阻 劑軟化變形，以變形光阻劑來至少將前述源極電極與前述 汲極電極之間之通道用凹部內的前述歐姆接觸用Si膜予 以覆蓋之回流步驟；及 以前述變形光阻劑以及前述源極電極和前述汲極電極 當作遮罩，將下層的前述歐姆接觸用Si膜和前述a-Si膜 予以蝕刻之步驟；及 除去前述變形光阻劑，讓前述歐姆接觸用 Si膜再度 曝露在前述通道用凹部內之步驟；及 以前述源極電極及前述汲極電極當作遮罩，將曝露在 這兩電極之間的前述通道用凹部之前述歐姆接觸用Si膜 予以蝕刻之步驟；及 前述回流步驟中，相對於前述配線用光阻遮罩每單位 長度L的體積V2，前述源極電極用光阻遮罩和/或前述汲 -12- 200837833 極電極用光阻遮罩每單位長度L的體積V】爲0.2〜0.7倍。 本發明的第7重點係提供可電腦讀取的記憶體，該可 電腦讀取的記憶體是一種記憶有會在電腦上動作的控制程 式之可電腦讀取的記憶體，其特徵爲： 前述控制程式係在執行時，以在回流處理裝置的處理 室內施行上述第1重點或2重點所述之回流處理方法的方式 ，控制回流處理裝置。 φ 本發明的第8重點係提供回流處理裝置，其特徵爲， 具備有： 裝備有載置基板的支撐台之處理室；及 用來將有機溶媒供應給前述處理室內之氣體供應手段 ;及 以在前述處理室內施行上述第1重點或2重點所述之回 流處理方法的方式進行控制之控制部。 # [發明效果] 依據本發明，調節回流處理所使用之光阻劑的體積， 在被處理體的面內，高精度地控制軟化光阻劑的擴散量， 使欲包覆的區域確實地擴散光阻劑，不欲包覆的區域則可 以控制光阻劑的擴散。該結果，可以使以經過回流處理所 變形的光阻劑作爲遮罩來使用之蝕刻的精度提高。 因此，將本發明的回流方法應用於製造反覆進行以光 阻劑作爲遮罩的鈾刻步驟之薄膜電晶體（TFT)元件等的半 導體裝置，具有不但能夠省遮罩並削減步驟數，還確保高 -13 - 200837833 蝕刻'精度，又能夠與半導體裝置的高積體化或微細化 應的效果。 【實施方式】 以下’參考第1圖來說明本發明的理想形態。 第1圖爲表示本發明的回流方法適合應用的全體 處理系統之槪略平面圖。此處，回流處理系統具備有 晶顯示裝置（LCD)用玻璃基板（以下，只稱爲「基板 的表面上所形成的光阻膜，在顯影處理後予以軟化變 爲了要將下層膜再度當作蝕刻時的蝕刻遮罩來使用而 回流處理之回流處理單元、及在該回流處理之前，因 所需，進行表面改質處理之黏著單元，以該回流處理 爲例來進行說明。該回流處理系統1 〇〇係以經由基板 生產線（未圖示），在與外部的光阻劑塗佈/顯影處理系 曝光裝置、蝕刻裝置、灰化裝置等之間，進行基板 交接的方式所構成。 回流處理系統100具備有：載置收容複數片基板 卡匣C之基板卡匣站（搬進搬出部）1、及用來對基板 予包含回流處理和在這處理先行處理的表面改質處理 連串的處理之具備有複數個處理單元之處理站（處理 、控制回流處理系統1 00的各構成部之控制部3。此外 1圖中，將回流處理系統1 0 0的長軸方向當作X方向 水平面上與X方向成垂直的方向當作Y方向。 基板卡匣站1係與處理站1其中一方的端部相鄰來 相對 回流 讓液 」）G 形， 進行 應於 系統 搬送 統或 G的 G的 G施 之一 部）2 ，第 ，將 配置 • 14 - 200837833 。該基板卡匣站1具備有在卡匣C與處理站2之間用來進行 基板G的搬進搬出之搬送裝置11，在該基板卡匣站〗，對 外部進行卡匣C的搬進搬出。另外，搬送裝置π具有可在 沿著卡匣C的排列方向之Y方向所設置之搬送路10上進 行移動之搬送臂11a。該搬送臂lla係被設置成可往X方 向進行進出/退避、往上下方向進行升降以及進行迴轉， 以與卡匣C與處理站2之間進行基板G的交接的方式所構 成。 處理站2具備有對基板G進行光阻劑的回流處理，在 這之前的處理用來進行表面改質處理之複數個處理單元。 經過這些各處理單元，基板G則逐片進行處理。另外， 處理站2基本上具有往X方向延伸出去之基板G搬送用的 中央搬送路20，隔著中央搬送路20，在該兩側以與中央搬 送路20相臨的方式配置各處理單元。 另外，在中央搬送路20，備有用來與各處理單元之間 進行基板G的搬入搬出之搬送裝置21，具有可在處理單 元的配列方向之X方向上移動之搬送臂2 1 a。進而，該搬 送臂2 1 a被設置成可往¥方向進行進出/退避、往上下方 向進行升降以及進行迴轉，以與處理站之間進行基板G 的搬入搬出的方式所構成。 沿著處理站2的中央搬送路20，在其中一側，從基板 卡匣站1側起，依黏著單元（AD)30和回流處理單元 (REFLW)60的順序予以排列，沿著中央搬送路20，在另一 側，成一列排列3個加熱/冷卻處理單元（HP/COL)80a、80b -15- 200837833 、80c。各加熱/冷卻處理單元（HP/COL)80a、80b、80c係 朝鉛直方向層積配置成多段（未圖示）。 黏著單元（AD) 3 0係因應於所需，在回流處理之前，將 含有例如以Η M D S (六甲基二砂院·· h e X a m e t h y 1 d i s i 1 a z a n e ) 、TMSDEA(N-二甲基砂二乙胺：N-trimethylsilyldiethylamine) 等的矽烷化劑爲代表的表面改質處理劑之氛圍予以形成， 對基板G進行表面改質處理。表面改質處理係以回流處 φ 理時抑制光阻劑的流動的方式，將底層膜表面予以改質之 處理。這些表面改質處理劑已知具有疏水處理作用，作爲 疏水處理劑。 此處，參考第2圖來說明黏著單元（AD)30。 黏著單元（AD)30具有長方體形狀的框體（未圖示），在 該框體的內側具有固定式的處理室本體3 1及可升降的蓋體 3 3。處理室本體3 1，其尺寸比基板G還要大很多，由上 面開口之扁平長方體的下部容器所構成。 9 蓋體33則是由與處理室本體31幾乎相同尺寸（面積）的 向下面開口之扁平長方體的上部容器所構成，與如同後述 貯存用於表面改質的HMDS之HMDS供應源35相連接。 另外’蓋體33固定在朝水平方向（X方向或γ方向）延伸之 複數個水平支撐構件37，各別的水平支撐構件37與升降驅 動機構（未圖示）例如複數個氣缸的活塞桿相連接。因此， 形成爲令這些氣缸的活塞桿朝向垂直上方上升下降，則蓋 體33與水平支撐構件37變成爲一體，而向垂直上方移動（ 上升）’處理室則張開，相反，令各活塞桿向垂直下方後 -16- 200837833 退，則蓋體33與水平支撐構件37變成爲一體，而向垂直下 方移動（下降）。 在處理室本體3 1內，水平地配置與基板G大致對應 大小之矩形狀的加熱板41，藉由固定具42來予以固定。該 加熱板4 1係由導熱率很高的金屬例如鋁所組成，在該內部 或下面設置例如由電阻發熱體所組成的電熱器（未圖示）。 另外，還設置：加熱板4 1形成有複數個貫穿孔43，各 • 貫穿孔43分別裝設有頂出桿44，讓基板G上下升降之基 板升降機構45。然後，構成爲與外部的搬送裝置21之搬送 臂21 a(參考第1圖）之間使這些頂出桿44從加熱板41的表面 突出而可以轉交基板G。頂出桿44係利用被配置在加熱板 41的下面之水平支撐板46來相互連結，以可以同步升降位 移的方式所構成。此外，用來使水平支撐板46升降移動之 升降驅動部（未圖示），配置在處理室本體3 1的內側或是外 側。 • 處理室本體3 1的側壁上端面，安裝有朝周圍方向延伸 之無縫的密封構件32。形成爲在使蓋體33與處理室本體31 變成一體的狀態下，該密封構件3 2夾隔在蓋體3 3的側壁下 端面與處理室本體31的側壁上端面之間而可以密閉。藉由 此方式，形成利用處理室本體3 1及蓋體3 3予以氣密之處理 室47 〇 蓋體33的其中一側面設有HMDS氣體導入埠48，與該 HMDS氣體導入璋48相對向的另一側面設有排氣埠49。 HMDS氣體導入埠48具有：以任意的間隔來形成在蓋 -17- 200837833 體33的其中一側面之複數個貫穿孔50'及從該外側來裝著 在各貫穿孔50的氣体供應管51之終端轉接器53、及被設置 在比各貫穿孔50還要更內側，隔著一定間隔形成有多數個 氣體噴出口 55之緩衝室54。 另外，排氣埠49具有隔著一定間隔形成在與MMDS 氣體導入埠48相對向之蓋體33的側面之多數個通氣孔56， 並且具有被設置在蓋體33的外側之排氣管路室57。被形成 在該排氣管路室5 7的底部之排氣口 5 8，經由排氣管5 9，連 接到排氣幫浦（未圖示）。 在這種方式構成的黏著單元（AD) 3 0進行表面改質處理 時，先在讓基板升降機構45的頂出桿44上升的狀態下，從 搬送裝置2 1的搬送臂2 1 a來承接基板G。然後，讓頂出桿 44下降，將基板G載置在加熱板41上之後，讓蓋體33從 退避位置垂直下降，抵接於處理室本體3 1，將處理室密閉 。基板G則藉由加熱板4 1來加熱到特定溫度例如1 1 0 °C 〜120 °C。然後，——面利用排氣幫浦（未圖示）來將處理室47 內予以排氣，一面由HMDS供應源35經由氣體供應管51和 HMDS氣體導入埠，將HMDS氣體供應至處理室47。處理 室47內，由HMDS氣體導入璋48的氣體噴出口 55所噴出的 HMDS氣體，形成朝向排氣埠49的氣體流，該中途與基板 G的表面接觸，將該表面予以表面改質。 通過處理室47的HMDS氣體，經過排氣埠49從通氣孔 5 6往排氣管路室57輸送，從該處藉由排氣幫浦的作用進行 排氣。經過特定的處理時間，結束表面改質處理之後，使 -18- 200837833 HMDS氣體的供應及排氣幫浦停止，再藉由升降驅動機構 (未圖示）的上升驅動，將蓋體33向上方脫離處理室本體31 ，就這樣向上升起到特定的退避位置。之後，使基板升降 機構45的頂出桿44上升.，將基板G往加熱板41的上方升 起，轉交給搬送裝置2 1的搬送臂2 1 a。之後，利用搬送臂 21a，將表面改質處理後的基板G搬出黏著單元（AD)30。 因應於所需施予表面改質處理過後的基板G，接著， 藉由搬送臂21 a，搬入到處理站2的回流處理單元 (REFLW)60，在有機溶媒例如稀釋劑的氛圍中，進行：讓 形成在基板G上的光阻劑軟化，使遮罩變形之回流處理 〇 此處，詳細地針對回流處理單元回流處理單元 (REFLW)60的構成進行說明。第3圖爲回流處理單元 (REFLW)60之槪略咅ij面圖。回流處理單元（REFL W)60具有 處理室6 1，該處理室6 1則是由下部處理室6 1 a、及抵接於 該下部處理室61a之上部處理室61b所構成。上部處理室 61b及下部處理室61a係以可利用開關機構（未圖示）來進 行開關所構成，當開的狀態時，利用搬送裝置2 1，進行基 板G的搬進搬出。 該處理室62內，設有水平地支撐基板G之支撐台（支 撐工作台62)，支撐工作台62係由導熱率優異的材質例如 鋁所構成。 支撐工作台62係藉由升降機構（未圖示）來驅動，使基 板G升降之3支升降桿63(第3圖中只圖示2支），以貫穿支 -19- 200837833 撐工作台62的方式設置。該升降桿63在升降感63與搬送裝 置21之間轉父基板G時’從支撐工作台62升起基板G，在 特定的高度位置處支撐基板G，基板G進行回流處理中， 例如以成爲該前端與支撐工作台6 2的上面相同高度的方式 予以保持。 下部處理室61a的底部，形成有排氣口 64a、64b，該 ： 排氣口 64a、64b，連接具備有排氣幫浦等的排氣裝置之排 ! • 氣系統64。然後，處理室6 1內的氛圍氣體透過該排氣系統 6 4來排氣。 支撐工作台62的內部，設有溫度調節媒體流路65，該 溫度調節媒體流路65，經由溫度調節媒體導入管65a，導 入例如溫調冷卻水等的溫度調節媒體，從溫度調節媒體排 出管65b排出來進行循環，該熱（例如冷熱）經由支撐工作 \A ' 台62，對基板G導熱，藉由此方式，基板G的處理面被 控制在所要的溫度。 ® 以與支撐工作台62相對向的方式，在處理室61的頂部 壁部分，設置噴淋頭66。該噴淋頭66的下面66a，設有多 數氣體噴出孔66b。 另外，噴淋頭66的上部中央，設有氣體導入部67。該 氣體導入部67，與形成在噴淋頭66的內部之空間68相連通 。在該導入部67連接著配管69。配管69連接將有機溶媒例 如稀釋劑予以氣化來供應之起泡槽70，該中途設有開關閥 71。在起泡槽71的底部，配備與N2氣體供應源（未圖示）相 連接之N2氣體供應配管74，作爲讓稀釋劑氣化用的起泡 -20- 200837833 產生手段。該N2氣體供應配管74，設有質量流量控制器 (mass flow control】 er)72及開關閥73。另外，起泡槽70具 備有用來將貯存在內部之稀釋劑的溫度調節在特定溫度之 溫度調節機構。然後，從N2氣體供應源（未圖示），一面藉 由質量流量控制器72來控制N2氣體的流量，一面導入至 起泡槽70的底部，以使被調節到特定溫度之起泡槽70內的 稀釋劑氣化，經由配管69、氣體導入部67，可以導入到處 理室6 1內的方式所構成。 另外，噴淋頭66上部的周緣部，設有複數個沖洗氣導 入部75，各沖洗氣導入部75，連接將例如作爲沖洗氣的 N2氣體供應至處理室6 1內之沖洗氣供應配管76。沖洗氣供 應配管76連接到沖洗氣供應源，該中途設有開關閥77。 這樣的構成之回流處理單元（REFLW)60中，首先，從 下部處理室6 1 a來將上部處理室6 1 b予以張開，在該狀態 下，用搬送裝置2 1的搬送臂2 1 a，搬入具有已經以圖案所 形成有光阻劑的基板G，載置在支撐工作台62。然後，讓 上部處理室6 1 b與下部處理室6 1 a相抵接，關閉處理室6 1 〇 其次，將配管69的關閉閥71和N2氣體供應配管74的 開關閥73予以開啓，藉由質量流量控制器72來調節仏氣 體的流量以控制稀釋劑的氣化量，並從起泡槽7 0，經由配 管69、氣體導入部67，將已氣化的稀釋劑，導入到噴淋頭 66的空間68，從氣體噴出孔66b噴出。藉由此方式，處理 室61內成爲特定濃度的稀釋劑氛圍。 -21、 200837833 因在已被載置在處理室61內的支撐工作台62之基板G 上，設有已經以圖案形成的光阻劑，所以該光阻劑曝露在 稀釋劑氛圍中，稀釋劑則會滲透到光阻劑中。藉由此方式 ，光阻劑軟化，該流動性則升高，經變形而以變形光阻劑 包覆基板G表面的特定區域（標靶區域）。此時，藉由將溫 度調節媒體導入到已被設置在支撐工作台62的內部之溫度 調節媒體流路65，該熱經由支撐工作台62來對基板G導 熱，藉由此方式，基板G的處理面被控制在所要的溫度 例如2 0 °C。從噴淋頭6 6朝向基板G的表面所噴出之含有 稀釋劑的氣體，與基板G的表面接觸後，朝向排氣口 64a 、64b流動，從處理室61往排氣系統64進行排氣。 經由以上的方式，回流處理單元（REFLW)60的回流處 理結束後，一面持續排氣，一面開啓沖洗氣供應配管7 6上 的開關閥77，經由沖洗氣導入部75，將作爲沖洗氣的N2 氣體導入到處理室6 1內，置換處理室內的氛圍。之後，從 下部處理室6 1 a來張開上部處理室6 1 b，以與前述相反的 順序，藉由搬送臂21a，從回流處理單元（REFLW)60來搬 出回流處理後的基板G。 在3個加熱/冷卻處理單元（HP/COL) 80a、80b、80c， 呈多段重疊來構成分別對基板G進行加熱處理之熱板單 元（HP)、對基板G進行冷卻處理之冷卻板單元（COL)(圖示 省略）。該加熱/冷卻處理單元（HP/COL)80a、80b、80c， 係對表面改質處理後或回流處理後的基板G，因應於所需 來進行加熱處理或冷卻處理。 -22- 200837833 如第1圖所示，回流處理系統1 0 0的各構成部，形成爲 連接到具備有控制部3的CPU的控制器90來進行控制之構 成。控制器90連接有由製程管理者爲了要管理回流處理系 統1 〇 〇而進行指令的輸入操作之鍵盤、或將回流處理系統 1 〇 〇的運作狀況予以可視化來顯示之顯示器等所組成之用 戶界面9 1。 另外，控制器90連接有記億部92，該記憶部92則爲儲 存紀錄有經由控制器90的控制所用來實現回流處理系統 1〇〇所執行的各種處理之控制程式或處理條件資料等之配 方。 然後，因應於所需，依照來自用戶界面9 1的指示等， 從記憶部92讀出經由控制器90來執行任意的配方，在控制 器90的控制下，以回流處理系統100來進行所要的處理。 另外，前述配方也能夠利用例如CD-ROM、硬碟、軟碟、 快閃記憶體等的儲存在電腦可讀取之記憶媒體的狀態之記 憶媒體、或者利用從其他的裝置，經由例如專用回線隨時 進行傳送。 以上所構成之回流處理系統1 〇〇中，首先在基板卡匣 站1，搬送裝置1 1的搬送臂1 1 a，對收容已經形成有光阻圖 案的基板G之卡匣C進行存取，取出1片基板G。基板G 則從搬送裝置1 1的搬送臂1 1 a ’轉交給處理站2的中央搬送 路2 0上之搬送裝置2 1的搬送臂2 1 a，進行表面改質處理的 情況，搬入到黏著單元（AD)3〇。然後，黏著單元（AD)30 中，因應於所需，在回流處理之前進行表面改質處理之後 -23- 200837833 ，基板G藉由搬送裝置21從黏著單元（AD)3 0取出，搬入 到加熱/冷卻處理單元（HP/COL)80a、80b ' 80c的任一單 元。然後，在加熱/冷卻處理單元（HP/COL)80a ' 80b、80c 施予冷卻處理過的基板G，搬入到回流處理單元（REFLW)60 ，在該處進行回流處理。 回流處理後，因應於所需，在各加熱/冷卻處理單元 (HP/COL)80a、80b、8 0 c施予特定的加熱、冷卻處理。這 種一連串的處理結束之基板G，利用搬送裝置21，轉交給 基板卡匣站1的搬送裝置1 1，收容到任意的卡匣C中。 其次，說明回流處理單元（REFLW)60所進行之回流處 理的原理。 第4圖爲表示回流理之成爲對象且以圖案所形成爲線 &amp;空間等的形狀之光阻遮罩每單位長度L(L爲任意長度， 可以設定爲例如L = 1 0 // m，本發明中採用同樣的長度）的 光阻劑體積、與回流處理導致光阻劑擴散的量（△ CD)的關 係之基礎實驗資料。由該第4圖得知：光阻遮罩每單位長 度L的光阻劑體積愈大，△ CD則愈大。因此，理解：以 圖案形成光阻遮罩時，經由回流處理所欲受到光阻劑包覆 的區域則要預先增大光阻劑體積，相反，經由回流處理所 不欲受到光阻劑包覆的區域則要預先縮小體積，藉此可以 控制基板G的面內之變形光阻劑的擴散量。 第5圖爲表示回流理之成爲對象之光阻遮罩每單位長 度L的光阻劑體積、與利用回流處理所軟化的光阻劑變形 而直到開始流動爲止的擴散開始時間的關係之基礎實驗資 -24- 200837833 料。從該第5圖得知：光阻遮罩每單位長度L的光阻劑體 積愈大，擴散開始時間則愈長。也就是表示：直到經過回 流處理光阻劑開始變形爲止，光阻劑體積很大的情況比光 阻劑體積很小的情況還需要更長的時間，短時間在溶劑氛 圍曝露不容易導致變形。 因此，以圖案形成光阻遮罩時，經由回流處理所欲受 到光阻劑包覆的區域則要預先縮小光阻劑體積，相反，經 由回流處理所不欲受到光阻劑包覆的區域則要預先增大一 定以上的光阻劑體積。然後，將溶劑氛圍曝露的時間設定 在光阻劑不會產生大體積變形的程度的短時間、或者反覆 該短時間的溶劑氛圍曝露，不會讓不欲包覆的區域之大體 積的光阻劑變形，——方面又可以強勢地使欲包覆的區域之 小體積的光阻劑變形。如此，即使藉由調節光阻劑體積及 溶劑氛圍曝露時間，基板G的面內仍然可以控制變形光 阻劑的擴散量。 如同以上所述’藉由調節基板G的面內成爲回流處 理對象之光阻遮罩的體積，能夠使基板G面內變化光阻 劑的擴散量（△ CD)和變形開始時間變化。光阻劑的體積可 以藉由例如基板G的面內改變光阻遮罩的線寬和膜厚來 進行調節。 改變光阻遮罩的線寬，若是利用微影技術來以圖案形 成光阻遮罩時，使利用回流處理所欲進行包覆的區域、及 不欲包覆的區域，對線寬持有差的話即可。 另外’改變光阻遮罩的膜厚，若是利用微影技術來以 -25- 200837833 圖案形成光阻遮罩時，利用例如半色調網點的曝光遮罩來 進行半色調網點的曝光處理，並進行顯影處理，使利用回 流處理所欲進行包覆的區域、及不欲包覆的區域，對光阻 遮罩持有膜厚差的話即可。 其次，參考第6〜9圖來說明薄膜電晶體（TFT)製程中進 行本發明的回流處理時的適切例子。 〈第1實施形態&gt; 第6圖爲對電極用光阻劑與配線用光阻劑施予線寬差 ，對體積造成差異，根據第4圖中的資料所示的經驗，控 制回流後之光阻劑的擴散量之實施形態。在由玻璃等的透 明基板所組成之絕緣基板201上，形成閘極電極202和閘極 線（未圖示），再依順序層積矽酮氮化膜等的閘極絕緣膜 20 3、a-Si(非晶質矽）膜204、當作歐姆接觸層之n+Si膜 205、源極電極206a和汲極電極206b以及源極電極用光阻 遮罩210及汲極電極用光阻遮罩211。另外，絕緣基板201 上的些許偏離的位置，在Si膜205上形成有配線23 0， 在該上層層積配線用光阻遮罩23 1。源極電極206a、汲極 電極206b以及配線230，以源極電極用光阻遮罩210、汲 極電極用光阻遮罩2 1 1以及配線用光阻遮罩2 3 1當作遮罩分 別進行触刻，使屬於基底膜之Si膜2 05的表面露出。 對於具有這種層積構造之被處理體，經由回流處理系 統100的回流處理單元（REFLW) 60，在稀釋劑等的溶劑氛 圍中，進行回流處理。藉由該回流處理，使構成源極電極 •26- 200837833 用光阻遮罩2 1 0、汲極電極用光阻遮罩2 1 1以及配線用光阻 遮罩23 1的光阻劑軟化而持有流動性。回流處理係以藉由 以流動化的光阻劑覆蓋源極電極206a與汲極電極206b之 間的凹部220(通道形成區域）之n4 Si膜205的表面，在下 一個步驟將n+ Si膜20 5和a-Si膜204予以蝕刻時，防止通 道形成區域的n+ Si膜205和a-Si膜204受到蝕刻爲目的而 進行。如此，具有的優點爲使構成源極電極用光阻遮罩 2 1 0和汲極電極用光阻遮罩2 1 1的光阻劑回流來再度利用光 阻遮罩，可以省略微影步驟。 但是，以使源極電極用光阻遮罩210和汲極電極用光 阻遮罩2 Π流動化爲目的，進行回流處理，則藉由溶劑氛 圍，溶劑也會對配線用光阻遮罩23 1產生作用而軟化變形 。然後，經由回流處理而變形的變形光阻劑23 2超出配線 23 0，而擴散到基底的n+ Si膜2 05的表面，則會有在下一 個步驟將nH Si膜205和a-Si膜204予以飩刻時蝕刻精度降 低的問題。 即是，經過回流處理導致變形光阻劑23 2超過配線230 的面積而擠出到周圍，則會在下一個步驟將Si膜205和 a-Si膜204予以鈾刻時，成爲遮罩之變形光阻劑23 2的包覆 面積擴大。在該狀態下，將1^以膜2〇5和3-8丨膜204予以 蝕刻，則蝕刻後的n+ Si膜205和a-Si膜204的側面與配線 2 3 0的側面不會成爲一面’造成階差。在這樣的狀態下製 造薄膜電晶體（TFT)的情況’除了擔心會有降低開口率、 產生光雜訊等的問題之外，對於微細化或高基體化也會造 -27- 200837833 成困難。 於是，本實施形態中，以源極電極用光阻遮罩2 1 0(汲 極電極用光阻遮罩21 1)的線寬W!大於配線用光阻遮罩23 1 的線寬WAWi &gt; W2)的方式，進行圖案形成。也就是以相 對於前述配線用光阻遮罩231每單位長度L的體積V2，源 極電極用光阻遮罩210(汲極電極用光阻遮罩211)每單位長 度L的體積〜，爲1.5〜3倍，最好是2〜3倍的方式，設定線 寬1和W2。體積V!相對於體積V2不到1.5倍則達不到良 好的效果，不會對光阻劑的擴散量造成有意義的差。一方 面體積V;相對於體積V2超過3倍則圖案不容易控制、線寬 過大導致開口率的降低。如此，藉由比配線用光阻遮罩 23 1的光阻劑體積還要更加大源極電極用光阻遮罩2 1 0(汲 極電極用光阻遮罩2 1 1)的光阻劑體積，可以確保源極電極 用光阻遮罩210(汲極電極用光阻遮罩211)變形所獲得之變 形光阻劑212的線寬W3有足夠的寬度來包覆凹部220。一 方面，小幅抑制配線用光阻遮罩23 1變形所獲得之變形光 阻劑23 2的線寬\^4，可以減少對11+81膜205和13丨膜204 的蝕刻精度造成的不良影響。 &lt;第2實施形態&gt; 第7圖爲對電極用光阻劑與配線用光阻劑施予膜厚差 ，對體積造成差異，根據第4圖中的資料所示的經驗，控 制回流後之光阻劑的擴散量之實施形態。此外，與第6圖 同樣的構成，附註相同的圖號，其說明則省略。 -28- 200837833 本實施形態中，以源極電極用光阻遮罩210(汲極電極 用光阻遮罩211)的膜厚ΤΊ大於配線用光阻遮罩231的膜厚 T2(Ti &gt; T2)的方式，進行圖案形成。也就是以相對於前述 配線用光阻遮罩23 1每單位長度L的體積V2，源極電極用 光阻遮罩210(汲極電極用光阻遮罩211)每單位長度L的體 積乂1爲1.5〜3倍，最好是2〜3倍的方式，設定膜厚TjD T2 。此外，本實施形態中，將源極電極用光阻遮罩21 0(汲極 電極用光阻遮罩21 1)的線寬W5、與配線用光阻遮罩231的 線寬 W6設定成相等（W5= W6)，不過可以在體積爲 = 1.5V2〜3V2的範圍任意地設定線寬W5及線寬W6。 如此，藉由比配線用光阻遮罩23 1的光阻劑體積還要 更加大源極電極用光阻遮罩21 0(汲極電極用光阻遮罩21 1) 的光阻劑體積，可以確保源極電極用光阻遮罩21 0(汲極電 極用光阻遮罩211)變形所獲得之變形光阻劑212的線寬W7 有足夠的寬度來包覆凹部220。一方面，小幅抑制配線用 光阻遮罩231變形所獲得之變形光阻劑23 2的線寬W8，可 以減少對n+ Si膜205和a-Si膜204的蝕刻精度造成的不良 影響。 &lt;第3實施形態&gt; 第8圖爲對電極用光阻劑與配線用光阻劑施予線寬差 ，對體積造成差異，根據第5圖中的資料所示的經驗，控 制回流後之光阻劑的擴散量之另一種實施形態。此外，與 第6圖同樣的構成，附註相同的圖號，其說明則省略。 •29- 200837833 本實施形態中，以源極電極用光阻遮罩2 1 0(汲極電極 用光阻遮罩21 1)的線寬W9小於配線用光阻遮罩231的線寬 W1G(W9 &lt; W1Q)的方式，進行圖案形成。也就是以相對於前 述配線用光阻遮罩231每單位長度L的體積V2，源極電極 用光阻遮罩210(汲極電極用光阻遮罩211)每單位長度L的 體積ν,ΜΟ」〜0.7倍，最好是0.2〜0.5倍的方式，設定線寬 〜9和W1G。體積Vi相對於體積V2不到0.2倍則圖案不容易 控制，線寬過度細而無法進行解像。一方面，體積 ν!相 對於體積V2超過0.7倍則看不出擴散量受控制的效果。 如此，將源極電極用光阻遮罩2 1 0(汲極電極用光阻遮 罩2 1 1 )的光阻劑體積設定爲小於配線用光阻遮罩23 1的光 阻劑體積，且對於體積很小的源極電極用光阻遮罩21 0(汲 極電極用光阻遮罩2 1 1 )，雖將經由回流處理使溶劑產生作 用的時間設定爲溶劑滲透到內部即會充分軟化，但對於體 積很大的配線用光阻遮罩23 1，則設定爲溶劑未充分滲透 到內部，擴散不會開始的時間，藉此可以確保源極電極用 光阻遮罩210(汲極電極用光阻遮罩211)變形所獲得之變形 光阻劑212的線寬有足夠的寬度來包覆凹部220。具體 上，如第5圖所示，擴散開始時間，5.0 μιη2的情況爲50 sec ，：ΙΟ.Ομιη2的情況爲90 sec，所以反覆進行50 sec以上，不 到90 sec的處理的話，1〇.〇μηι2以上的圖案則不會擴散。 一方面，極力抑制配線用光阻遮罩23 1的變形，小幅抑制 變形光阻劑23 2的線寬W12，可以減少對η | Si膜205和a· Si膜204的蝕刻精度造成的不良影響。 -30- 200837833 另外，本實施形態中，回流處理時，體積很大的配線 用光阻遮罩2 3 1，在未充分軟化不會開始擴散的短時間’ 反覆形成溶劑氛圍’藉此來強制使體積很小的源極電極用 光阻遮罩210(汲極電極用光阻遮罩21 1)軟化，可以在欲包 覆的區域形成足夠擴散量的變形光阻劑2 1 2。 &lt;第4實施形態&gt; φ 第9圖爲對電極用光阻劑與配線用光阻劑施予膜厚差 ，對體積造成差異，根據第5圖中的資料所示的經驗，控 制回流後之光阻劑的擴散量之另一種實施形態。此外，與 第6圖同樣的構成，附註相同的圖號，其說明則省略。 本實施形態中，以源極電極用光阻遮罩21 0(汲極電極 用光阻遮罩2 11)的膜厚T3小於配線用光阻遮罩2 3 1的膜厚 Τ4(Τ3 &lt; Τ4)的方式，進行圖案形成。也就是以相對於前述 配線用光阻遮罩23 1每單位長度L的體積¥2，源極電極用 φ 光阻遮罩210(汲極電極用光阻遮罩211)每單位長度L的體 積▽1爲0.2〜0.7倍的方式，設定線寬Τ3和Τ4。 如此，將源極電極用光阻遮罩210(汲極電極用光阻遮 罩2 1 1 )的光阻劑體積設定爲小於配線用光阻遮罩23 1的光 阻劑體積，且對於體積很小的源極電極用光阻遮罩21 0(汲 極電極用光阻遮罩2 1 1 )，雖將經由回流處理使溶劑產生作 用的時間設定爲溶劑滲透到內部即會充分軟化，但對於體 積很大的配線用光阻遮罩23 1，則設定爲溶劑未充分滲透 到內部，擴散不會開始的短時間，藉此可以確保源極電極 -31 - 200837833 用光阻遮罩210(汲極電極用光阻遮罩211)變形所獲得之變 形光阻劑212的線寬Wh有足夠的寬度來包覆凹部220。具 體上，與第8圖同樣，反覆進行50 sec以上，不到90 sec 的處理的話，10.0 μηι2以上的圖案則不會擴散。一方面， 極力抑制配線用光阻遮罩23 1的變形，小幅抑制變形光阻 劑232的線寬W16，可以減少對n+ Si膜2〇5和a-Si膜204的 蝕刻精度造成的不良影響。 另外，本實施形態中，回流處理時，體積很大的配線 用光阻遮罩23 1，在未充分軟化不會開始擴散的短時間， 反覆形成溶劑氛圍，藉此來強制使體積很小的源極電極用 光阻遮罩21 0(汲極電極用光阻遮罩21 1)軟化，可以在欲包 覆的區域形成足夠擴散量的變形光阻劑2 1 2。 以上的回流處理方法可以適用於例如第1 〇〜1 2圖所示 的形狀的薄膜電晶體（TFT)之通道部的回流處理。第10(a) 圖則是具有分別從配線呈到T字型連接之源極電極和汲極 電極成平行對向配置之源極/汲極構造。然後，源極電極 用光阻遮罩2 1 0和汲極電極用光阻遮罩2 1 1的線寬 W !，形 成爲大於配線用光阻遮罩231的線寬W2(Wi &gt; W2，參考第 6圖），相對於前述配線用光阻遮罩23 1每單位長度L的體 積 V2，源極電極用光阻遮罩2 1 0和汲極電極用光阻遮罩 211每單位長度L的體積1.5〜3倍。 經由回流處理，如第1 0(b)圖所示，源極電極用光阻 遮罩2 1 0和汲極電極用光阻遮罩2 1 1變形，分別成爲具有線 寬W3的變形光阻劑21 2，可以進行包覆該兩方之間的通道 -32- 200837833 部。一方面，配線用光阻遮罩231變形所獲得之變形光阻 劑212的線寬W4與變形前的線寬W2作比較’幾乎沒有變 化，可以小幅抑制擴散量。 第1 1 (a)圖中所具有的源極/汲極構造係以插入直線狀 的源極電極的方式，配置在從配線連接之平面上成U形 狀的具有端部之汲極電極之間。然後，源極電極用光阻遮 罩210和汲極電極用光阻遮罩211的膜厚T!，形成爲大於 配線用光阻遮罩231的膜厚丁2(1 &gt; T2，參考第7圖），相對 於前述配線用光阻遮罩231每單位長度L的體積V2，源極 電極用光阻遮罩2 1 0和汲極電極用光阻遮罩2 1 1每單位長度 L的體積乂！爲1 .5〜3倍。此外，源極電極用光阻遮罩210和 汲極電極用光阻遮罩2 1 1的線寬W5，設定爲與配線用光阻 遮罩231的線寬W6相同（W5=W6)。 經由回流處理，如第1 1 (b)圖所示，體積很大的源極 電極用光阻遮罩210和汲極電極用光阻遮罩211，經變形成 爲分別具有線寬W3的變形光阻劑212，可以進行包覆該兩 方之間的通道部。一方面，體積很小的配線用光阻遮罩 231變形所獲得之變形光阻劑212的線寬W8與變形前的線 寬W6作比較，幾乎沒有變化，可以小幅抑制擴散量。 第12(a)圖中所具有的源極/汲極構造係以呈套匣狀插 入從配線所連接之平面上成U形狀的具有端部之源極電 極的方式，配置在從配線所連接之平面上大致成W形狀 的具有端部之汲極電極之間。然後，源極電極用光阻遮罩 2 1 0和汲極電極用光阻遮罩2 1 1的線寬W9，形成爲小於配 -33- 200837833 線用光阻遮罩23 1的線寬W1Q(W9 &lt; W1G，參考第8圖），相 對於前述配線用光阻遮罩23 1每單位長度L的體積V2，源 極電極用光阻遮罩2 1 0和汲極電極用光阻遮罩2 1 1每單位長 度L的體積¥1爲0.2〜0.7倍。 回流處理中，對於源極電極用光阻遮罩21 0(汲極電極 用光阻遮罩2 1 1 )，雖將讓溶劑產生作用的時間設定爲溶劑 滲透到內部即會充分軟化，但對於配線用光阻遮罩23 1， 則設定爲溶劑未滲透到內部，不會充分軟化的時間。藉由 此方式，如第12(b)圖所示，體積很小的源極電極用光阻 遮罩210和汲極電極用光阻遮罩211，經變形成爲分別具有 線寬W! !的變形光阻劑212，可以進行包覆該兩方之間的 通道部。一方面，體積很大之配線用光阻遮罩231的變形 受到抑制，所以變形光阻劑232的線寬 W12與變形前的線 寬W i 〇作比較，幾乎沒有變化，可以小幅抑制擴散量。 以上的說明中，列舉對於第1 0圖的源極/汲極構造採 用第1實施形態（第6圖）的回流處理方法之例子，但並不侷 限於此，也可以採用第2〜第4實施形態（第7〜9圖）的回流處 理方法。同樣，對於第Π圖的源極/汲極構造，也不侷限 於第2竇施形態的的回流處理方法（第7圖），可以採用第1 、第3或第4實施形態（第6、8、9圖）的回流處理方法。進 而，對於第1 2圖的源極/汲極構造，並不侷限於第3實施形 態的回流處理方法（第8圖），也可以採用第1、第2或第4實 施形態（第6、7、9圖）的回流處理方法。尤其’基板面內 改變光阻遮罩的膜厚來施予體積差之第2和第4實施形態（ -34- 200837833 第7圖和第9圖）的回流處理方法，可以理想地應用於第1 0 圖〜第12圖中全體的源極/汲極構造。另外，基板面內改變 光阻遮罩的線寬來施予體積差之第1實施形態（第6圖）的回 流處理方法，可以理想地應用於第1 〇圖和第1 1圖中的源極 /汲極構造。進而，基板面內改變光阻遮罩的線幅來施予 體積差之第3實施形態（第8圖）的回流處理方法，可以理想 地應用於第1 1圖和第1 2圖中的源極/汲極構造。 其次，參考第13〜19圖來說明將本發明的回流方法應 用於液晶顯示裝置用TFT元件的製程之實施形態。 第1 3圖爲表示本發明的一種實施形態之液晶顯示裝置 用TFT元件的製造方法的主要步驟之流程圖。第14〜16圖 爲代表性的步驟後的基板G之剖面圖。 首先，如第14(a)圖所示，在由玻璃等的透明基板所 組成之絕緣基板201上，形成閘極電極202和閘極線（未圖 示）’再依以下的順序層積堆積矽氮化膜等的閘極絕緣膜 202、a-Si(非晶質矽）膜204、當作歐姆接觸層的Si膜 20 5、A1合金或Mo合金等的電極用金屬膜206 (步驟S1) 〇 其次，如第14(b)圖所示，在電極用金屬膜206上，形 成光阻劑207(步驟S2)。然後，如第14(c)圖所示，用曝光 遮罩3 00 ’對光阻劑207進行曝光處理（步驟S3)。該曝光遮 罩3 00係以可以以特定的圖案來將光阻劑207予以曝光的方 式所構成。如此，曝光處理光阻劑207，如第14(d)圖所示 ’形成曝光光阻部208、及未曝光光阻部209。 -35- 200837833 曝光後進行顯影處理，如第15(a)圖所示，除去曝光 光阻部208，讓未曝光光阻部209殘存在電極用金屬膜206 上（步驟S4)。未曝光光阻部209分離在源極電極用光阻遮 罩2 1 0和汲極電極用光阻遮罩2 11並以圖案形成。此處，在 源極電極用光阻遮罩2 1 0和汲極電極用光阻遮罩2 1 1與配線 用光阻遮罩2 3 1之間施予線寬差（參考第6圖）。 然後，將源極電極用光阻遮罩2 1 0、汲極電極用光阻 遮罩211以及配線用光阻遮罩231作爲蝕刻遮罩來使用，將 電極用金屬膜206予以蝕刻，如第15(b)圖所示，形成源極 電極206a及汲極電極206b及配線23 0，並且在之後成爲通 道區域的部分，形成凹部2 2 0 (步驟S 5 )。藉由該蝕刻，可 以在源極電極206a與汲極電極206b之間的凹部220內讓n + Si膜205露出。 此外，步驟S5的金屬膜蝕刻之後，第2圖的黏著單元 (AD)30中，也可以對露出之n+ Si膜205的表面實施表面改 質處理。藉由使用矽烷化劑等進行表面改質處理，n + Si 膜205的表面被表面改質，例如純水的接觸角變成50度以 上，因可以形成光阻劑不容易流動的狀態，所以可以更有 效地抑制配線用光阻遮罩23 1的擴散。 其次，步驟S6的回流處理中，讓藉由稀釋劑等的有 機溶媒所軟化之光阻劑流入到之後成爲通道區域之目的地 的凹部220。該回流處理則是利用第3圖的回流處理單元 (RpFLW)60來進行。第15(c)圖爲表示回流處理後，藉由變 形光阻劑2 1 2來使凹部220內受到包覆的狀態。回流處理時 -36- 200837833 ，由於源極電極用光阻遮罩2 1 0和汲極電極用光阻遮罩2 1 1 與配線用光阻遮罩23 1之間有線幅差，故光阻劑往之後變 成通道區域的凹部220內的擴散，大於光阻劑往配線230周 圍的擴散，可以確實地包覆凹部220內（參考第6圖）。另外 ，抑制光阻劑往配線230周圍的擠出，能夠確保高蝕刻精 度，又能夠與薄膜電晶體（TFT)元件的高積體化、微細化 相對應。 其次，如第16(a)圖所示，將變形光阻劑212、232作 爲蝕刻遮罩來使用，將n + Si膜205和a-Si膜2 04予以蝕刻 處理（步驟S 7)。之後，利用使用利如光阻劑剝離液之濕式 處理等的手法，將變形光阻劑212、23 2予以除去（步驟S 8) ，如第16(b)圖所示，讓源極電極206a及汲極電極206b及 配線230露出。 其次，將源極電極206a和汲極電極206b作爲飩刻遮 罩來使用，將凹部2 2 0內所露出的η 4 S i膜2 0 5予以鈾刻處 理（步驟S9)。藉由此方式，如第16(c)圖所示，形成通道 區域22 1。 以後的步驟則省略圖示，例如以覆蓋通道區域22 1與 源極電極206a和汲極電極206b的方式形成有機膜之後（步 驟S 1 0)’利用微影技術’藉由飩刻來形成連接到源極電 極206 a(汲極電極206b)之接觸孔（步驟si 1)，接著，利用 銦錫氧化物（1T 0)等來形成透明電極（步驟s 1 2 )，以製造液 晶顯示裝置用的薄膜電晶體（TFT)元件。 上述實施形態中，因施行步驟S 6的回流步驟，可以 -37- 200837833 利用經由一次的微影所形成的光阻劑，也就是利用源極電 極用光阻遮罩210、汲極電極用光阻遮罩211以及變形光阻 劑212，施行將步驟S5的電極用金屬膜206予以蝕刻的步 驟、及將步驟S7的n H Si膜205和a-Si膜20 4予以蝕刻的步 驟，所以能夠達到削減微影步驟數及省光阻劑化。 其次，第17圖爲表示本發明的另一種實施形態之液晶 顯示裝置用薄膜電晶體（TFT)元件的製造方法的主要步驟 之流程圖。第1 8圖和1 9圖爲代表性的步驟後的基板G之 剖面圖。此外，第17圖中的步驟S21、S22以及S27〜S32 的各步驟，與第13圖的步驟S1、S2以及步驟S7〜S12相同 ，其說明則省略。 如第18(a)圖所示，在電極用金屬膜206上形成有光阻 劑2 0 7的狀態下，使用半色調網點曝光遮罩301，對光阻劑 207施行半曝光處理（步驟S23)。半色調網點曝光遮罩301 係以可以以2階段的曝光量來對光阻劑2 07進行曝光的方式 所構成。如此，將光阻劑207予以半曝光處理，如第1 8(b) 圖所示，形成曝光光阻部20 8、及未曝光光阻部209。未曝 光光阻部209則是與半色調網點曝光遮罩301的透過率相對 應，呈階梯狀形成與曝光光阻部208的交界。 曝光後進行顯影處理，如第18(c)圖所示，除去曝光 光阻部208，讓未曝光光阻部209殘存在電極用金屬膜206 上（步驟S 24)。未曝光光阻部209分離在源極電極用光阻遮 罩210和汲極電極用光阻遮罩211並以圖案形成。源極電極 用光阻遮罩210和汲極電極用光阻遮罩211，藉由半曝光處 -38- 200837833 理來形成較厚的膜厚，配線用光阻遮罩23 1則形成較薄的 膜厚。如此，本實施形態中，在源極電極用光阻遮罩2 1 0 和汲極電極用光阻遮罩2 1 1與配線用光阻遮罩23 1之間施予 膜厚差（參考第7圖）。 然後，將源極電極用光阻遮罩210和汲極電極用光阻 遮罩21 1作爲蝕刻遮罩來使用，將電極用金屬膜206予以蝕 刻，如第19(a)圖所示，形成源極電極206a及汲極電極 2〇6b及配線230，並且在之後成爲通道區域的部分，形成 凹部220(步驟 S25)。藉由該蝕刻，可以在源極電極206a 與汲極電極206b之間的凹部220內讓n + Si膜205露出。 此外，步驟S25的金屬膜蝕刻之後，第2圖的黏著單 元（AD)3 0中，也可以對露出之n+ Si膜205的表面實施表面 改質處理。藉由使用矽院化劑等進行表面改質處理，n+ Si 膜205的表面被表面改質，例如純水的接觸角變成50度以 上，因可以形成光阻劑不容易流動的狀態，所以可以更有 效地抑制配線用光阻遮罩23 1的擴散。 其次，步驟S26的回流處理中，讓藉由稀釋劑等的有 機溶媒所軟化之光阻劑流入到之後成爲通道區域之目的地 的凹部220。該回流處理則是利用第3圖的回流處理單元 (REFLW)00來進行。第19(b)圖爲表示回流處理後，藉由 變形光阻劑212來使凹部220內受到包覆的狀態。回流處理 時，由於源極電極用光阻遮罩210和汲極電極用光阻遮罩 211與配線用光阻遮罩2 31之間有線幅差，故光阻劑往之後 變成通道區域的凹部220內的擴散，大於光阻劑往配線230 -39- 200837833 周圍的擴散，可以確實地包覆凹部220內（參考第7圖）。另 外，抑制光阻劑往配線230周圍的擠出，能夠確保下一個 步驟的高蝕刻精度，又能夠與薄膜電晶體（TFT)元件的高 積體化、微細化相對應。 第13〜19圖所示的實施形態中，藉由增大源極電極用 光阻遮罩210和汲極電極用光阻遮罩211的線寬或膜厚、縮 小配線用光阻遮罩23 1的線寬或膜厚，對兩者施予體積差 ，控制回流處理的擴散量，不過也可以藉由縮小源極電極 用光阻遮罩210和汲極電極用光阻遮罩211的線寬或膜厚、 增大配線用光阻遮罩23 1的線寬或膜厚，控制回流處理的 擴散量（參考第8圖和第9圖）。 此情況’回流處理中，在配線用光阻遮罩23 1變形之 前，停止曝露在回流處理單元（REFLW)60的處理室內的溶 劑（稀釋劑）中。或者也可以依照第2 〇圖所示的順序，在源 極電極用光阻遮罩2 1 0和汲極電極用光阻遮罩2 1 1變形，且 配線用光阻遮罩2 3 1未變形程度的曝露時間，反覆進行短 時間的回流處理。該情況，具體上與第8圖同樣，若是反 覆進行50 sec以上，不到90 sec的處理的話，10.0μιη2以 上的圖案不會擴散。即是在回流處理單元（REFLW)60，首 先將具有已經以圖案形成的光阻劑之基板G載置在支撐 工作台6 2上’使上部處理室6 1 b與下部處理室6〗&amp;相抵接 ，關閉處理室6 1 (步驟S 4 1)。 其次’處理室6 1內開始排氣（步驟s 4 2)。然後，.開啓 配管69的關閉閥71和N2氣體供應配管74的開關閥73，藉 -40- 200837833 由質量流量控制器（mass flow controller)來調節N2氣體的 流量，控制稀釋劑的氣化量，並從起泡槽70，將氣化的稀 釋劑，經由配管69、N2氣體導入部67，導入至噴淋頭66的 空間68，從氣體噴出孔66b噴出。藉由此方式，處理室61 成爲特定濃度的稀釋劑氛圍（步驟S43)。基板G上以圖案 形成的光阻劑，曝露在稀釋劑氛圍中予以軟化，該流動性 提高，經變形而以變形光阻劑2 1 2，包覆基板G表面的源 極電極206a與汲極電極206b之間的通道部。 該步驟S43的步驟係在體積很小的源極電極用光阻遮 罩2 1 0和汲極電極用光阻遮罩2 1 1變形、體積很大的配線用 光阻遮罩23 1未變形的時間予以進行。該時間經過後，停 止供應稀釋劑（步驟S44)。然後，一面持續排氣，一面開 啓沖洗氣供應配管76上的開關閥77，經由沖洗氣導入部75 ，將作爲沖洗氣的N2氣體導入至處理室61內，置換處理 室氛圍（步驟S4 5)。經過特定時間之後，停止供應沖洗氣（ 步驟S46)。 直到源極電極用光阻遮罩2 1 0和汲極電極用光阻遮罩 211充分變形爲止，反覆進行以上直到步驟S43〜步驟S46 爲止的處理之後，停止處理室61的排氣（步驟S47)，之後 ，從下部處理室6 1 a來張開上部處理室6 1 b，依照與前述 相反的順序，藉由搬送臂21a，從回流處理單元（REFLW)60， 搬出回流處理後的基板G(步驟S48)。 如此，反覆進行直到步驟S43〜步驟S46的處理，可以 一面抑制變形光阻劑232往不欲包覆的配線23 0周圍擴散， -41 - 200837833 一面確實地進行包覆目的地的通道部。 以上，已針對本發明的實施形態進行說明過，但本發 明並不侷限於這些形態。 例如，上述的說明是以製造使用LCD用玻璃基板的 TFT元件爲例子，不過本發明也可以應用於進行被形成在 其他的平面顯示器（FPD)基板或半導體基板的基板之光阻 劑的回流處理的情況。 [產業上的可利用性] 本發明適合應用於製造例如薄膜電晶體（TFT)元件等 的半導體裝置。 【圖式簡單說明】 第1圖爲說明回流處理系統的槪要之圖面。 第2圖爲表示黏著單元（A D)的槪略構成之剖面圖。 Φ 第3圖爲表示回流處理單元（REFLW)的槪略構成之剖 面圖。 第4圖爲回流處理時光阻劑的體積與擴散量的關係之 圖形。 第5圖爲回流處理時光阻劑的體積與擴散開始時間的 關係之圖形。 第6圖爲說明本發明的第〗實施形態之回流處理方法的 槪要之圖面。 第7圖爲說明本發明的第2實施形態之回流處理方法的 -42- 200837833 槪要之圖面。 第8圖爲說明本發明的第3實施形態之回流處理方法的 槪要之圖面。 第9圖爲說明本發明的第4實施形態之回流處理方法的 槪要之圖面。 第1〇圖爲表示可適用本發明的回流處理方法之薄膜電 晶體（TFT)的通道部的形狀之圖面。 第1 1圖爲表示可適用本發明的回流處理方法的另一種 實施形態之薄膜電晶體（TFT)的通道部的形狀之圖面。 第12圖爲表示可適應本發明的回流處理方法的再另一 種實施形態之薄膜電晶體（TFT)的通道部的形狀之圖面。 第1 3圖爲本發明的一種實施形態之液蟲顯示裝置用薄 膜電晶體（TFT)元件的製造方法的主要步驟之流程圖。 第14圖爲表示薄膜電晶體（TFT)元件的製程中，從對 絕緣基板上形成層積膜起至曝光處理爲止的狀態之基板的 縱向剖面圖。 第15圖爲表示薄膜電晶體（TFT)元件的製程中，從顯 影處理後起至回流處理後爲止的狀態之基板的縱向剖面圖 〇 第16圖爲表示薄膜電晶體（TFT)元件的製程中，從回 流處理後起至通道形成後爲止的狀態之基板的縱向剖面圖 〇 第1 7圖爲表示本發明的另一種實施形態之液晶顯示裝 置用薄膜電晶體（TFT)元件的製造方法的主要步驟之流程 -43- 200837833 圖。 第18圖爲表示薄膜電晶體（TFT)元件的製程中，從半 曝光處理起至顯影處理後爲止的狀態之基板的縱向剖面圖 〇 第19圖爲表示薄膜電晶體（TFT)元件的製程中，從金 屬膜蝕刻後起至回流處理後爲止的狀態之基板的縱向剖面 圖。 第20圖爲表示本發明的一種實施形態之回流處理方法 的步驟順序之流程圖。 【主要元件符號說明】 1 :基板卡匣站 2 :處理站 3 :控制站 20 :中央搬送路 21 :搬送裝置 30 :黏著單元（AD) 60 :回流處理單元（REFLW) 80a、8〇b ' 80c :加熱/冷卻處理單元（HP/COL) 1〇〇 :回流處理系統 201 :絕緣基板 2 02 :閘極電極 203 :閘極絕緣膜 204 ： a-Si 膜 -44- 200837833 205 : n+ Si 膜 206a:源極電極 2 0 6 b :汲極電極 2 1 0 :源極電極用光阻遮罩 211 :汲極電極用光阻遮罩 23 0 :配線 231 :配線用光阻遮罩 23 2 :變形光阻劑 G :基板 -45-BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reflow processing method of a photoresist which can be used in a process such as a thin film transistor (TFT), and a method of manufacturing a thin film transistor (TFT). [Prior Art] Φ Active matrix type liquid crystal display device is a thin film transistor (TFT) substrate on which a thin film transistor (TFT) is formed and a counter substrate on which a color filter is formed. The liquid crystal is sandwiched between them to support, and a voltage can be selectively applied to each pixel. The process of the thin film transistor (TFT) substrate used herein must be repeated by pattern processing of a photoresist such as a photoresist by lithography technology, so that each lithography process must have light. Block the mask. However, in recent years, as the liquid crystal display device has been highly integrated and miniaturized, the process has become complicated, and the manufacturing cost has increased. Therefore, in order to reduce the manufacturing cost, the steps of forming the mask pattern for lithography are integrated to reduce the number of steps and review. The reflow process is proposed as a technique for reducing the formation step of a mask pattern by allowing an organic solvent to permeate into a patterned photoresist, melting the photoresist, and changing the shape of the pattern to be used again. Step 10 of omitting the mask pattern [Patent Document 1] Japanese Patent Laid-Open No. 2001-3 3 483 0 (Scope of Patent Document, etc.) 200837833 [Summary of the Invention] &lt;Problems to be Solved by the Invention&gt; The reflow technique has an advantage in that the number of lithography steps can be reduced, and the consumption of the photoresist can be saved. However, the reflow treatment exposes the photoresist on the surface of the substrate to a solvent atmosphere, so it is difficult to adjust the reflow speed (i.e., the deformation speed of the photoresist) in accordance with the area inside the substrate. Therefore, even if there is a region where the photoresist is coated on the substrate and a region where the photoresist is not coated by the reflow treatment, the surface of the substrate is uniformly reflowed, and the result is a problem. Therefore, in the next etching step, the deformed photoresist is used as an etching mask, which may impair the etching precision of the underlying film. For example, in the case of applying a reflow process in a process of a thin film transistor (TFT) device, a photoresist which is used as a source electrode/drain electrode for etching is deformed, and a source electrode and a drain electrode are coated. When the channel portion between the electrodes is used, the photoresist on the wiring used as the etching mask for wiring formation is also deformed to be wider than the wiring width. The problem caused by this situation is that the photoresist deformed by the reflow process is used as a mask, and the underlying amorphous sand (a-S i) layer is etched in the next step, and the width of the wiring is the same. The a-Si layer which is extruded and remains too wide under the layer is less likely to correspond to the miniaturization or high integration of the thin film transistor (TFT) element. Accordingly, it is an object of the present invention to provide a reflow processing method and a thin film transistor (TFT) manufacturing method capable of ensuring the accuracy of reflow processing and achieving a photoresist saving and a reduction in the number of steps. 200837833 &lt;Means for Solving the Problems&gt; In order to solve the above problems, a first aspect of the present invention provides a reflow processing method which is a method in which a solvent pair is formed in a processing chamber of a reflow processing apparatus. a metal film for an electrode, a metal film for wiring connected to the metal film for the electrode, and a photoresist mask for the electrode and a photoresist for wiring which are provided on the electrode metal film and the metal film for the wiring, respectively. The substrate of the cover acts to soften and deform the photoresist, and the reflow treatment method of coating the region adjacent to the electrode metal film with a deformed photoresist is characterized in that: each of the photoresist masks for the wiring is used. The volume V2 of the unit length L, the volume of the electrode mask used per unit length L is ¥1. 5 to 3 times 〇 In the first aspect of the invention, the line width of the photoresist mask for the electrode may be larger than the line width of the wiring mask for wiring. Further, the film thickness of the photoresist mask for the electrode may be formed to be larger than the film thickness of the photoresist mask for the wiring. Further, a second aspect of the present invention provides a reflow treatment method in which a solvent pair has a patterned metal film for an electrode and a metal film for the electrode in a processing chamber of a reflow processing apparatus. a metal film for wiring and a substrate for a photoresist mask for electrodes and a photoresist mask for wiring provided on the upper surface of the electrode metal film and the wiring metal film, respectively, and the photoresist is softened and deformed. A reflow treatment method for coating a region adjacent to the electrode metal film with a deformed photoresist, 200837833, characterized in that the electrode is covered with a photoresist with respect to the volume V2 per unit length L of the photoresist mask for wiring The volume of the cover per unit length L is ¥1. 2~0. In the second aspect of the invention, the line width of the photoresist mask for the electrode may be smaller than the line width of the wiring mask for wiring. Further, the film thickness of the photoresist mask for the electrode may be formed to be smaller than the film thickness of the photoresist mask for the wiring. In either case, the reflow treatment can be performed at the time when the wiring photoresist mask is not fluidized. In particular, it is preferable that the reflow processing is repeatedly performed while the wiring mask for wiring is not fluidized, and the photoresist mask for the electrode is strongly deformed. Further, a third aspect of the present invention provides a method of manufacturing a thin film transistor (TFT), which is a channel portion having a source electrode and a drain electrode, and a source electrode and the foregoing A method for manufacturing a thin film transistor (TFT) of a wiring in which a drain electrode is connected, comprising the steps of: forming a photoresist film on a metal film formed on a substrate; and utilizing lithography Lithography technology 'step of forming the photoresist film to form a photoresist mask for a source electrode, a photoresist mask for a drain electrode, and a photoresist mask for wiring; and the source electrode The photoresist mask, the photoresist mask for the drain electrode, and the photoresist mask for the wiring are used as a mask, and the metal film is etched by 200837833 to form the source electrode and the drain electrode and the metal of the wiring a film etching step; and causing a solvent to act on the photoresist mask for the source electrode, the photoresist mask for the drain electrode, and the photoresist mask for the wiring to soften the photoresist Forming a step of reflowing between the source electrode and the drain electrode with a deformed photoresist; and a volume V2 of the length L of the unit φ with respect to the wiring mask with respect to the wiring, The source electrode is covered with a photoresist mask and/or the aforementioned photoresist for the drain electrode is covered by a volume per unit length L! Is 1. 5 to 3 times. Further, a fourth aspect of the present invention provides a method of manufacturing a thin film transistor (TFT), which is a channel portion having a source electrode and a drain electrode, and the foregoing A method of manufacturing a thin film transistor (TFT) of a wiring in which a source electrode and a drain electrode are connected, comprising: forming a photoresist film on a metal film formed on a substrate; a step of forming a photoresist film for a source electrode, a photoresist mask for a drain electrode, and a photoresist mask for wiring by using a lithography technology to pattern the photoresist film; and The photoresist mask for the source electrode, the photoresist mask for the drain electrode, and the photoresist mask for the wiring are used as a mask, and the metal film is etched to form the source electrode and the drain electrode. And a metal film etching step of the wiring; and -9-200837833, the solvent is applied to the photoresist mask for the source electrode, the photoresist mask for the drain electrode, and the photoresist mask for the wiring a step of softening and deforming the photoresist, and a step of reflowing between the source electrode and the drain electrode with a deformed photoresist; and a photoresist mask per unit length L with respect to the wiring in the reflow step The volume V2, the source electrode photoresist mask and/or the above-mentioned drain electrode photoresist mask has a volume νι per unit length L of 〇·2 to 〇·7 times. Further, a fifth aspect of the present invention provides a method of manufacturing a thin film transistor (TFT), comprising: the steps of: forming a gate electrode on a substrate; and: a gate covering the gate electrode a step of forming a pole insulating film; and  a step of depositing a hSi film, an ohmic contact Si film, and a metal film on the gate insulating film in order from the bottom; and a step of forming a photoresist film on the metal film; and masking with a specific exposure a step of exposing the photoresist film to a exposure process; and forming the exposed photoresist film by a development process to form a photoresist mask for a source electrode and a photoresist mask for a drain electrode; a mask pattern processing step of the photoresist mask for wiring; and the photoresist for the source electrode, the photoresist mask for the drain electrode, and the photoresist mask for the wiring as a mask a metal film etching step of forming a source electrode and a drain electrode and wirings respectively connected to the electrodes; and -10- 200837833, allowing the organic solvent to mask the photoresist for the source electrode, The photoresist mask for the drain electrode and the photoresist mask for the wiring function to soften and deform the photoresist to deform the photoresist to at least the recess in the channel between the source electrode and the drain electrode Afore mentioned a step of reflowing covered with a Si film; and using the deformed photoresist, the source electrode and the drain electrode as a mask, and the underlying ohmic contact Si film and the a-Si film are etched a step of engraving; and removing the deformed photoresist to expose the ohmic contact Si film to the recess for the channel; and using the source electrode and the drain electrode as a mask to expose the photoresist a step of etching the ohmic contact Si film in the recessed portion between the two electrodes; and a light V2 per unit length L with respect to the wiring photoresist mask in the reflow step, the source electrode light The volume 乂1 per unit length L of the mask and/or the photoresist mask for the aforementioned drain electrode is 1. 5 to 3 times. Further, a sixth aspect of the present invention provides a method of manufacturing a TFT, comprising: the steps of: forming a gate electrode on a substrate; and forming a gate insulating film covering the gate electrode; a step of depositing a film of a film and an ohmic contact Si film and a metal film on the above-mentioned gate insulating film; and -11 - 200837833 a step of forming a photoresist film on the metal film; And exposing the photoresist film to a predetermined exposure mask; and exposing the exposed photoresist film to a pattern to form a photoresist mask for the source electrode and a drain electrode a mask pattern processing step using a photoresist mask and a photoresist mask for wiring; and the photoresist mask for the source electrode, the photoresist mask for the drain electrode, and the photoresist mask for the wiring a mask, a step of etching the metal film to form a source electrode and a drain electrode, and a metal film of each of the wires connected to the electrodes; and a photoresist mask for the source electrode to the source electrode The photoresist mask for a drain electrode and the photoresist mask for wiring function to soften and deform the photoresist, and deform the photoresist to at least the recess for the channel between the source electrode and the drain electrode. a step of reflowing the ohmic contact covered by the Si film; and using the deformed photoresist, the source electrode and the drain electrode as a mask, and the Si film for the ohmic contact of the lower layer and the a-Si a step of etching the film; and removing the deformed photoresist to expose the ohmic contact Si film to the channel recess; and exposing the source electrode and the drain electrode as a mask a step of etching the ohmic contact with the Si film by the recessed portion between the electrodes; and the source electrode of the photoresist layer per unit length L with respect to the wiring for the wiring Use a photoresist mask and / or the aforementioned 汲-12- 200837833 pole electrode with a photoresist mask volume per unit length L V] is 0. 2~0. 7 times. A seventh aspect of the present invention provides a computer readable memory, which is a computer readable memory in which a control program for operating on a computer is stored, and is characterized by: At the time of execution of the control program, the reflow processing device is controlled such that the above-described first or second reflow processing method is performed in the processing chamber of the reflow processing apparatus. φ The eighth aspect of the present invention provides a reflow processing apparatus, comprising: a processing chamber equipped with a support table on which a substrate is placed; and a gas supply means for supplying an organic solvent to the processing chamber; A control unit that performs control by performing the above-described first or second reflow processing method in the processing chamber. # [Effect of the Invention] According to the present invention, the volume of the photoresist used in the reflow treatment is adjusted, and the amount of diffusion of the softening resist is controlled with high precision in the surface of the object to be coated, and the region to be coated is surely diffused. The photoresist, the area that is not intended to be coated, controls the diffusion of the photoresist. As a result, the precision of etching using the photoresist deformed by the reflow treatment as a mask can be improved. Therefore, the reflow method of the present invention is applied to a semiconductor device in which a thin film transistor (TFT) element or the like which is subjected to an uranium engraving step using a photoresist as a mask, which not only saves masks but also reduces the number of steps, and ensures High-13 - 200837833 The etching precision can be combined with the semiconductor device to achieve high precision or miniaturization. [Embodiment] Hereinafter, a preferred embodiment of the present invention will be described with reference to Fig. 1. Fig. 1 is a schematic plan view showing the entire processing system to which the reflow method of the present invention is suitable. Here, the reflow processing system includes a glass substrate for a crystal display device (LCD) (hereinafter, simply referred to as a "resist film formed on the surface of the substrate, which is softened after development processing to be regarded as an underlayer film again. The reflow processing unit which is used for the reflow treatment by etching the etching mask and the adhesion unit which is subjected to the surface modification treatment before the reflow treatment will be described by taking the reflow treatment as an example. 1 〇〇 is configured by transferring a substrate between a photoresist coating/developing treatment exposure apparatus, an etching apparatus, an ashing apparatus, and the like via a substrate production line (not shown). The system 100 includes a substrate cassette station (loading and unloading unit) 1 for accommodating a plurality of substrate cassettes C, and a surface modification processing for pre-processing the substrate and reflow processing in this processing. The processing station having a plurality of processing units is processed (the control unit 3 that processes and controls each component of the reflow processing system 100. In addition, in FIG. 1, the reflow processing system 10 The long axis direction of 0 is regarded as the Y direction in the direction perpendicular to the X direction on the horizontal plane in the X direction. The substrate cassette station 1 is adjacent to the end of one of the processing stations 1 to return the liquid to the G" shape, Carrying out a part of the G-G system that should be transferred to the system or G of G) 2, the first, will be configured • 14 - 200837833. The substrate cassette station 1 is provided with a transport device 11 for transporting and transporting the substrate G between the cassette C and the processing station 2, and the cassette cassette C is loaded and carried out to the outside. . Further, the transport device π has a transport arm 11a that can move on the transport path 10 provided in the Y direction along the arrangement direction of the cassette C. The transfer arm 11a is provided so as to be able to move in and out in the X direction, to move up and down in the vertical direction, and to rotate, and to perform the transfer of the substrate G between the cassette C and the processing station 2. The processing station 2 is provided with a plurality of processing units for performing a reflow process of the photoresist on the substrate G and performing a surface modification process in the previous process. Through these processing units, the substrate G is processed piece by piece. Further, the processing station 2 basically has a central transport path 20 for transporting the substrate G extending in the X direction, and the respective processing units are disposed on the both sides so as to be adjacent to the central transport path 20 via the central transport path 20. Further, the center conveyance path 20 is provided with a conveyance device 21 for carrying in and out the substrate G between the processing units, and has a transfer arm 2 1 a movable in the X direction of the arrangement direction of the processing unit. Further, the transfer arm 2 1 a is provided so as to be able to move in and out in the ¥ direction, to move up and down, and to rotate, and to carry out the loading and unloading of the substrate G with the processing station. The central transfer path 20 along the processing station 2 is arranged on the one side from the side of the substrate cassette station 1 in the order of the adhesive unit (AD) 30 and the reflow processing unit (REFLW) 60, along the central transfer path. 20. On the other side, three heating/cooling processing units (HP/COL) 80a, 80b -15-200837833, 80c are arranged in a row. Each of the heating/cooling processing units (HP/COL) 80a, 80b, and 80c is stacked in a plurality of stages (not shown) in the vertical direction. Adhesive unit (AD) 30 is required to be contained, for example, with Η MDS (hexamethyl bismuth) · he X amethy 1 disi 1 azane , TMSDEA (N-dimethyl sand) The surface of the surface modification agent represented by a decylating agent such as diethylamine (N-trimethylsilyldiethylamine) is formed, and the substrate G is subjected to surface modification treatment. The surface modification treatment is to modify the surface of the underlying film in such a manner that the flow of the photoresist is suppressed by the reflow portion. These surface modifying agents are known to have a hydrophobic treatment as a hydrophobic treating agent. Here, the adhesive unit (AD) 30 will be described with reference to FIG. The adhesive unit (AD) 30 has a rectangular parallelepiped frame (not shown), and has a fixed processing chamber main body 31 and a movable lid body 3 3 inside the housing. The processing chamber body 3 1, which is much larger in size than the substrate G, is composed of a lower container having a flat rectangular parallelepiped opening. The lid body 33 is composed of an upper container having a flat rectangular parallelepiped opening to the lower side of the processing chamber main body 31, and is connected to an HMDS supply source 35 for storing HMDS for surface modification as will be described later. Further, the cover body 33 is fixed to a plurality of horizontal support members 37 extending in the horizontal direction (X direction or γ direction), and the respective horizontal support members 37 and the lift drive mechanism (not shown) such as the piston rods of a plurality of cylinders connection. Therefore, when the piston rods of these cylinders are formed to rise and fall upward in the vertical direction, the lid body 33 and the horizontal support member 37 become integrated, and the processing chamber is opened to move vertically upward (upward), and conversely, each piston rod is opened. When the vehicle is retracted vertically downward from -16378378, the cover body 33 becomes integrated with the horizontal support member 37 and moves downward (downward) vertically downward. In the processing chamber main body 3, a rectangular heating plate 41 having a size substantially corresponding to the substrate G is horizontally disposed, and is fixed by a fixture 42. The heating plate 41 is composed of a metal having a high thermal conductivity such as aluminum, and an electric heater (not shown) composed of, for example, a resistance heating body is provided inside or below. Further, it is also provided that the heating plate 41 is formed with a plurality of through holes 43, each of which is provided with a ejector rod 44 for elevating the substrate G up and down. Then, the ejector rods 44 are protruded from the surface of the heating plate 41 between the transfer arms 21a (refer to Fig. 1) of the external transfer device 21, and the substrate G can be transferred. The ejector rods 44 are connected to each other by a horizontal support plate 46 disposed under the heating plate 41, and are configured to be capable of synchronous lifting and lowering. Further, an elevating drive unit (not shown) for moving the horizontal support plate 46 up and down is disposed inside or outside the processing chamber main body 31. • The upper end surface of the side wall of the treatment chamber body 31 is attached with a seamless sealing member 32 extending in the peripheral direction. In a state in which the lid body 33 and the processing chamber main body 31 are integrated, the sealing member 32 can be sealed between the lower end surface of the side wall of the lid body 33 and the upper end surface of the side wall of the processing chamber main body 31. In this manner, the processing chamber 47 which is hermetically sealed by the processing chamber main body 3 1 and the lid body 3 is formed, and one side surface of the lid body 33 is provided with an HMDS gas introduction port 48, which is opposed to the HMDS gas introduction port 48. The other side is provided with an exhaust port 49. The HMDS gas introduction port 48 has a plurality of through holes 50' formed on one side of the cover -17-200837833 body 33 at an arbitrary interval, and a gas supply pipe 51 installed in each of the through holes 50 from the outside. The terminal adapter 53 and the buffer chamber 54 which are provided inside the through-holes 50 and have a plurality of gas discharge ports 55 formed at regular intervals are provided. Further, the exhaust port 49 has a plurality of vent holes 56 formed at a side surface of the lid body 33 opposed to the MMDS gas introduction port 48 with a predetermined interval, and has an exhaust line chamber provided outside the cover body 33. 57. The exhaust port 5 8 formed at the bottom of the exhaust line chamber 57 is connected to an exhaust pump (not shown) via an exhaust pipe 5 9 . When the adhesion unit (AD) 30 configured in this manner performs the surface modification treatment, the delivery arm 2 1 a of the transfer device 2 1 is first received while the ejection lever 44 of the substrate elevating mechanism 45 is raised. Substrate G. Then, the ejector rod 44 is lowered, and after the substrate G is placed on the heating plate 41, the lid body 33 is vertically lowered from the retracted position, and is abutted against the processing chamber main body 3, and the processing chamber is sealed. The substrate G is heated by a heating plate 41 to a specific temperature, for example, 1 to 10 ° C to 120 ° C. Then, the inside of the processing chamber 47 is exhausted by an exhaust pump (not shown), and the HMDS supply source 35 is supplied to the processing chamber 47 via the gas supply pipe 51 and the HMDS gas. . In the processing chamber 47, the HMDS gas discharged from the gas discharge port 55 of the HMDS gas introduction port 48 forms a gas flow toward the exhaust port 49, and the surface thereof is brought into contact with the surface of the substrate G to surface-modify the surface. The HMDS gas passing through the processing chamber 47 is sent from the vent hole 56 to the exhaust line chamber 57 through the exhaust port 49, from which it is exhausted by the action of the exhaust pump. After a specific processing time, after the surface modification process is finished, the supply of the HM-DS37-200837833 gas and the exhaust pump are stopped, and the lid body 33 is lifted upward by the ascending driving mechanism (not shown). When it is separated from the processing chamber main body 31, it rises to a specific retracted position. Thereafter, the ejector rod 44 of the substrate elevating mechanism 45 is raised. The substrate G is lifted above the heating plate 41 and transferred to the transfer arm 2 1 a of the transport device 2 1 . Thereafter, the substrate G subjected to the surface modification treatment is carried out of the adhesive unit (AD) 30 by the transfer arm 21a. The substrate G after the surface modification treatment is applied, and then, by the transfer arm 21a, the reflow processing unit (REFLW) 60 of the processing station 2 is carried in an atmosphere of an organic solvent such as a diluent: The composition of the reflow processing unit reflow processing unit (REFLW) 60 will be described in detail by softening the photoresist formed on the substrate G and reflowing the mask. Figure 3 is a schematic diagram of the reflow processing unit (REFLW) 60. The reflow processing unit (REFL W) 60 has a processing chamber 161. The processing chamber 61 is composed of a lower processing chamber 61a and a processing chamber 61b that is in contact with the lower processing chamber 61a. The upper processing chamber 61b and the lower processing chamber 61a are configured to be switchable by a switch mechanism (not shown), and when the battery is opened, the substrate G is carried in and out by the transport device 2 1. In the processing chamber 62, a support table (supporting table 62) for horizontally supporting the substrate G is provided, and the supporting table 62 is made of a material having excellent thermal conductivity such as aluminum. The support table 62 is driven by a lifting mechanism (not shown) to raise and lower the three lifting rods 63 of the substrate G (only two of which are shown in FIG. 3), and to extend the support -19-200837833 to support the table 62. Way to set. When the lift lever 63 rotates the parent substrate G between the lift feeling 63 and the transport device 21, the substrate G is lifted from the support table 62, the substrate G is supported at a specific height position, and the substrate G is subjected to reflow processing, for example, The front end is held in the same height as the upper surface of the support table 62. At the bottom of the lower processing chamber 61a, exhaust ports 64a and 64b are formed. The exhaust ports 64a and 64b are connected to a row of exhaust devices including an exhaust pump or the like. Then, the atmosphere in the processing chamber 61 is exhausted through the exhaust system 64. Inside the support table 62, a temperature-adjusting medium flow path 65 is provided, and the temperature-adjusting medium flow path 65 is introduced into a temperature-regulating medium such as temperature-controlled cooling water through a temperature-adjusting medium introduction pipe 65a, and is discharged from the temperature-regulating medium discharge pipe. The 65b is discharged for circulation, and the heat (e.g., hot and cold) is thermally conducted to the substrate G via the support work AA, whereby the processing surface of the substrate G is controlled at a desired temperature. The shower head 66 is disposed in the top wall portion of the processing chamber 61 in such a manner as to oppose the support table 62. The lower surface 66a of the shower head 66 is provided with a plurality of gas ejection holes 66b. Further, a gas introduction portion 67 is provided at the center of the upper portion of the shower head 66. The gas introduction portion 67 communicates with a space 68 formed inside the shower head 66. A pipe 69 is connected to the introduction portion 67. The piping 69 is connected to a foaming tank 70 which is supplied by vaporizing an organic solvent such as a diluent, and an on-off valve 71 is provided in the middle. At the bottom of the bubble generating tank 71, an N2 gas supply pipe 74 connected to an N2 gas supply source (not shown) is provided as a means for generating foaming -20-200837833 for vaporizing the diluent. The N2 gas supply pipe 74 is provided with a mass flow controller (er) 72 and an on-off valve 73. Further, the bubbler tank 70 has a temperature adjustment mechanism for adjusting the temperature of the diluent stored therein to a specific temperature. Then, from the N2 gas supply source (not shown), the flow rate of the N2 gas is controlled by the mass flow controller 72, and is introduced to the bottom of the bubbler tank 70 to adjust the bubble generation tank 70 to a specific temperature. The internal diluent is vaporized and can be introduced into the processing chamber 61 through the piping 69 and the gas introduction portion 67. Further, a peripheral portion of the upper portion of the shower head 66 is provided with a plurality of flushing gas introduction portions 75, and each of the flushing gas introduction portions 75 is connected to a flushing gas supply pipe 76 that supplies, for example, N2 gas as a flushing gas to the processing chamber 61. . The flushing gas supply pipe 76 is connected to the flushing gas supply source, and an on-off valve 77 is provided in the middle. In the reflow processing unit (REFLW) 60 having such a configuration, first, the upper processing chamber 6 1 b is opened from the lower processing chamber 61 1 a, and in this state, the transfer arm 2 1 a of the transport device 2 1 is used. The substrate G having the photoresist formed in a pattern is carried in and placed on the support table 62. Then, the upper processing chamber 6 1 b is brought into contact with the lower processing chamber 6 1 a to close the processing chamber 6 1 , and the closing valve 71 of the piping 69 and the opening and closing valve 73 of the N 2 gas supply piping 74 are opened by the mass. The flow controller 72 adjusts the flow rate of the helium gas to control the amount of vaporization of the diluent, and introduces the vaporized diluent from the bubbler tank 70 through the piping 69 and the gas introduction portion 67 to the shower head 66. The space 68 is ejected from the gas ejection hole 66b. In this way, the inside of the processing chamber 61 becomes a diluent atmosphere of a specific concentration. -21, 200837833 Since the photoresist which has been patterned is provided on the substrate G of the supporting table 62 which has been placed in the processing chamber 61, the photoresist is exposed to the diluent atmosphere, the thinner It will penetrate into the photoresist. In this way, the photoresist is softened, and the fluidity is increased to deform a specific region (target region) of the surface of the substrate G with a deformed photoresist. At this time, by introducing the temperature adjustment medium into the temperature adjustment medium flow path 65 which has been disposed inside the support table 62, the heat is thermally conducted to the substrate G via the support table 62, by which the substrate G is The treatment surface is controlled at a desired temperature, for example, 20 °C. The gas containing the diluent ejected from the shower head 66 toward the surface of the substrate G comes into contact with the surface of the substrate G, flows toward the exhaust ports 64a and 64b, and is exhausted from the processing chamber 61 to the exhaust system 64. After the reflow process of the reflow processing unit (REFLW) 60 is completed, the on-off valve 77 on the flushing gas supply pipe 76 is turned on, and the N2 as the flushing gas is supplied via the flushing gas introduction unit 75. The gas is introduced into the processing chamber 61 to replace the atmosphere in the processing chamber. Thereafter, the upper processing chamber 6 1 b is opened from the lower processing chamber 61 1 a, and the substrate G after the reflow processing is carried out from the reflow processing unit (REFLW) 60 by the transfer arm 21a in the reverse order to the above. The three heating/cooling processing units (HP/COL) 80a, 80b, and 80c are stacked in a plurality of stages to form a hot plate unit (HP) that heats the substrate G and a cooling plate unit that cools the substrate G ( COL) (illustrated omitted). The heating/cooling treatment unit (HP/COL) 80a, 80b, 80c is a substrate G after the surface modification treatment or the reflow treatment, and is subjected to heat treatment or cooling treatment as needed. -22- 200837833 As shown in Fig. 1, each component of the reflow processing system 100 is configured to be connected to a controller 90 including a CPU of the control unit 3 for control. The controller 90 is connected with a user interface composed of a keyboard for inputting an instruction by the process manager to manage the reflow processing system 1 or a display for visualizing the operation state of the reflow processing system 1 9 1. Further, the controller 90 is connected to a counter portion 92 for storing a control program or processing condition data for realizing various processes executed by the reflow processing system 1 via control by the controller 90. formula. Then, in response to an instruction from the user interface 91, etc., an arbitrary recipe is executed from the memory unit 92 via the controller 90, and the desired processing is performed by the reflow processing system 100 under the control of the controller 90. deal with. Further, the aforementioned recipe can also use a memory medium stored in a state of a computer-readable memory medium such as a CD-ROM, a hard disk, a floppy disk, a flash memory, or the like, or by using, for example, a dedicated return line from another device. Transfer at any time. In the reflow processing system 1 configured as described above, first, at the substrate cassette station 1, the transfer arm 1 1 a of the transfer device 1 1 accesses the cassette C that accommodates the substrate G on which the photoresist pattern has been formed. One substrate G is taken out. The substrate G is transferred from the transfer arm 1 1 a ' of the transfer device 1 1 to the transfer arm 2 1 a of the transfer device 2 1 on the central transfer path 20 of the processing station 2, and is subjected to surface modification treatment, and is carried into adhesion. Unit (AD) 3〇. Then, in the adhesive unit (AD) 30, the substrate G is taken out from the adhesive unit (AD) 30 by the transfer device 21 after being subjected to the surface modification treatment before the reflow treatment in accordance with the need, and is carried into the heating. / Cooling unit (HP/COL) 80a, 80b '80c. Then, the cooled processed substrate G is applied to the heating/cooling processing units (HP/COL) 80a' 80b, 80c, and carried into a reflow processing unit (REFLW) 60 where it is subjected to a reflow process. After the reflow treatment, specific heating and cooling treatments are applied to the respective heating/cooling treatment units (HP/COL) 80a, 80b, and 80 c as needed. The series of processed substrates G are transferred to the transfer device 1 of the substrate cassette station 1 by the transfer device 21 and stored in an arbitrary cassette C. Next, the principle of the reflow process performed by the reflow processing unit (REFLW) 60 will be described. Fig. 4 is a view showing a photoresist mask having a shape of a line & space formed by a pattern and having a shape per unit length L (L is an arbitrary length, and can be set, for example, to L = 1 0 // m, The basic experimental data on the relationship between the volume of the photoresist of the same length and the amount of diffusion of the photoresist (ΔCD) by the reflow treatment in the present invention. From Fig. 4, it is known that the larger the photoresist of the photoresist mask per unit length L, the larger the ΔCD. Therefore, it is understood that when the photoresist mask is formed by patterning, the area of the photoresist to be coated by the reflow treatment is required to increase the volume of the photoresist in advance, and conversely, it is not required to be coated with the photoresist by the reflow treatment. The area is reduced in advance, whereby the amount of diffusion of the deformed photoresist in the plane of the substrate G can be controlled. Fig. 5 is a basic experiment showing the relationship between the volume of the photoresist per unit length L of the photoresist mask to be reflowed, and the diffusion start time until the flow is started by the deformation of the photoresist softened by the reflow treatment.资-24- 200837833 From Fig. 5, it is known that the larger the photoresist volume per unit length L of the photoresist mask, the longer the diffusion start time. That is to say, until the photoresist is deformed by the reflow treatment, the case where the photoresist is large in volume is longer than the case where the volume of the photoresist is small, and the exposure in the solvent atmosphere is not easily deformed in a short time. Therefore, when the photoresist mask is patterned, the area where the photoresist is to be coated by the reflow treatment is required to reduce the volume of the photoresist in advance, and the region which is not coated with the photoresist by the reflow treatment is reversed. It is necessary to increase the volume of the photoresist by more than a certain amount. Then, the exposure time of the solvent atmosphere is set to a short time in which the photoresist does not cause a large volume deformation, or a solvent atmosphere exposure in which the short time is repeated, and a large-volume photoresist in an area not to be coated is not allowed. The deformation of the agent, in turn, can strongly deform the small volume of photoresist in the area to be coated. Thus, even by adjusting the photoresist volume and the solvent atmosphere exposure time, the amount of diffusion of the deformed photoresist can be controlled in the plane of the substrate G. As described above, by adjusting the volume of the photoresist mask which is the object to be reflowed in the surface of the substrate G, the diffusion amount (ΔCD) of the photoresist and the deformation start time can be changed in the plane of the substrate G. The volume of the photoresist can be adjusted by, for example, changing the line width and film thickness of the photoresist mask in-plane of the substrate G. Change the line width of the photoresist mask. If the photoresist mask is patterned by lithography, the area to be covered by the reflow process and the area not to be covered are inferior to the line width. You can do it. In addition, 'the film thickness of the photoresist mask is changed. If the photoresist mask is formed by the lithography technique in the pattern of -25-200837833, the halftone dot exposure processing is performed by using an exposure mask such as a halftone dot. The development treatment may be such that the region to be coated by the reflow treatment and the region not to be coated may have a film thickness difference with respect to the photoresist mask. Next, a suitable example of the reflow treatment of the present invention in the thin film transistor (TFT) process will be described with reference to Figs. <First Embodiment> Fig. 6 is a view showing a line width difference between a photoresist for a counter electrode and a photoresist for wiring, which causes a difference in volume, and according to the experience shown in the data in Fig. 4, after the reflow is controlled An embodiment of the amount of diffusion of the photoresist. A gate electrode 202 and a gate line (not shown) are formed on an insulating substrate 201 made of a transparent substrate such as glass, and a gate insulating film 20 3 or a such as an fluorenone nitride film is laminated in this order. -Si (amorphous germanium) film 204, n+Si film 205 as ohmic contact layer, source electrode 206a and drain electrode 206b, and photoresist mask 210 for source electrode and photoresist for drain electrode Cover 211. Further, at a position slightly deviated from the insulating substrate 201, a wiring 23 0 is formed on the Si film 205, and a wiring mask 23 1 for wiring is laminated on the upper layer. The source electrode 206a, the drain electrode 206b, and the wiring 230 are used as a mask for the source electrode photoresist mask 210, the drain electrode photoresist mask 2 1 1 , and the wiring photoresist mask 2 3 1 respectively. The surface of the Si film 205 belonging to the base film is exposed by contact. The object to be processed having such a laminated structure is subjected to a reflow treatment in a solvent atmosphere of a diluent or the like via a reflow processing unit (REFLW) 60 of the reflow processing system 100. By this reflow treatment, the photoresist constituting the source electrode 26-200837833 with the photoresist mask 210, the photoresist mask for the drain electrode 2 1 1 and the photoresist mask 23 1 for wiring is softened. Hold liquidity. The reflow treatment is performed by covering the surface of the n4 Si film 205 of the recess 220 (channel formation region) between the source electrode 206a and the drain electrode 206b with a fluidized photoresist, and the n+ Si film 20 5 is performed in the next step. When the a-Si film 204 is etched, the n+ Si film 205 and the a-Si film 204 in the channel formation region are prevented from being etched. Thus, it is advantageous in that the photoresist mask constituting the source electrode photoresist mask 210 and the drain electrode mask 2 1 1 is reflowed to reuse the photoresist mask, and the lithography step can be omitted. However, in order to fluidize the photoresist mask 210 for the source electrode and the photoresist mask 2 for the drain electrode, the reflow treatment is performed, and the solvent is also applied to the photoresist mask for wiring by the solvent atmosphere. 1 produces a role to soften and deform. Then, the deformed photoresist 23 2 deformed by the reflow treatment is out of the wiring 23 0 and diffused to the surface of the n + Si film 205 of the substrate, and the nH Si film 205 and the a-Si film 204 are given in the next step. The problem of reduced etching accuracy during engraving. That is, after the reflow treatment causes the deformed photoresist 23 2 to be extruded to the periphery beyond the area of the wiring 230, the Si film 205 and the a-Si film 204 are uranium engraved in the next step, and become the deformed light of the mask. The coating area of the resist 23 2 is enlarged. In this state, the film 2〇5 and the 3-8丨 film 204 are etched, and the side surfaces of the n+ Si film 205 and the a-Si film 204 after etching and the side surface of the wiring 203 are not one side. 'Cause the difference. In the case where a thin film transistor (TFT) is fabricated in such a state, in addition to the problem that the aperture ratio is lowered and optical noise is generated, it is difficult to make the thinning or high-substrateization -27-200837833. Therefore, in the present embodiment, the line width W of the source electrode photoresist mask 2 10 (the drain electrode photoresist mask 21 1) is larger than the line width of the wiring photoresist mask 23 1 WAWi &gt ; W2) way to pattern formation. That is, the volume V2 per unit length L with respect to the wiring mask 231 for wiring, and the volume per unit length L of the photoresist mask 210 for the source electrode (the photoresist mask 211 for the drain electrode) are 1. 5 to 3 times, preferably 2 to 3 times the way, set the line width 1 and W2. Volume V! is less than 1. 5 times does not achieve good results, and does not cause a meaningful difference in the amount of diffusion of the photoresist. The volume V on one side is less than 3 times the volume V2, and the pattern is not easily controlled, and the line width is too large to cause a decrease in the aperture ratio. Thus, the photoresist volume of the source electrode photoresist mask 2 1 0 (the photoresist mask for the drain electrode 2 1 1) is larger than the photoresist volume of the wiring photoresist mask 23 1 . The line width W3 of the deformed photoresist 212 obtained by deforming the source electrode with the photoresist mask 210 (the photoresist mask 211 for the drain electrode) has a sufficient width to cover the recess 220. On the one hand, the line width of the deformed photoresist 23 obtained by slightly deforming the photoresist mask 23 for wiring can be reduced, and the adverse effect on the etching precision of the 11+81 film 205 and the 13 film 204 can be reduced. . &lt;Second Embodiment&gt; Fig. 7 is a graph showing the difference in thickness between the photoresist for a counter electrode and the photoresist for wiring, and the difference in volume, and the control of the reflow after the experience shown in the data in Fig. 4 An embodiment of the amount of diffusion of the photoresist. In addition, the same configurations as those in Fig. 6 are denoted by the same reference numerals, and the description thereof will be omitted. -28- 200837833 In the present embodiment, the film thickness ΤΊ of the source electrode photoresist mask 210 (the photoresist mask for the drain electrode 211) is larger than the film thickness T2 of the wiring photoresist mask 231 (Ti &gt; In the manner of T2), pattern formation is performed. That is, the volume V2 per unit length L with respect to the wiring mask 23 1 for wiring, and the volume 乂 1 per unit length L of the photoresist mask 210 for the source electrode (the photoresist mask 211 for the drain electrode) For a mode of 1.5 to 3 times, preferably 2 to 3 times, set the film thickness TjD T2. In the present embodiment, the line width W5 of the source electrode photoresist mask 21 0 (the drain electrode photoresist mask 21 1) and the line width W6 of the wiring photoresist mask 231 are set equal. (W5 = W6), but the line width W5 and the line width W6 can be arbitrarily set in a range of volume = 1.5V2 to 3V2. Thus, the photoresist volume of the source electrode photoresist mask 21 0 (the photoresist mask for the drain electrode 21 1 ) is larger than the photoresist volume of the wiring photoresist mask 23 1 . The line width W7 of the deformed photoresist 212 obtained by deforming the source electrode with the photoresist mask 21 0 (the photoresist mask 211 for the drain electrode) has a sufficient width to cover the recess 220. On the other hand, the line width W8 of the deformed photoresist 23 obtained by slightly deforming the photoresist mask 231 for wiring can be reduced, and the adverse effect on the etching precision of the n+ Si film 205 and the a-Si film 204 can be reduced. &lt;Third Embodiment&gt; Fig. 8 is a view showing a line width difference between a photoresist for a counter electrode and a photoresist for wiring, which causes a difference in volume, and according to the experience shown in the data in Fig. 5, after the reflow is controlled Another embodiment of the amount of diffusion of the photoresist. Incidentally, the same configurations as those in Fig. 6 are denoted by the same reference numerals, and the description thereof will be omitted. In the present embodiment, the line width W9 of the photoresist mask for the source electrode 2 10 (the photoresist mask 21 1 for the drain electrode) is smaller than the line width W1G of the photoresist mask 231 for the wiring ( W9 &lt;W1Q) The pattern is formed. That is, the volume V2 per unit length L with respect to the wiring mask 231 for wiring, the volume ν per unit length L of the photoresist mask 210 for the source electrode (the photoresist mask 211 for the drain electrode), ΜΟ ~ 0.7 times, preferably 0.2 to 0.5 times the way, set the line width ~ 9 and W1G. When the volume Vi is less than 0.2 times with respect to the volume V2, the pattern is not easily controlled, and the line width is excessively thin and cannot be resolved. On the one hand, the volume ν! does not show the effect that the amount of diffusion is controlled with respect to the volume V2 exceeding 0.7 times. Thus, the photoresist volume of the source electrode photoresist mask 2 10 (the photoresist mask 2 1 1 for the drain electrode) is set to be smaller than the photoresist volume of the wiring photoresist mask 23 1 , and For a small-sized source electrode photoresist mask 21 0 (the photoresist mask for a drain electrode 2 1 1 ), the time during which the solvent acts by the reflow treatment is set such that the solvent penetrates into the inside and is sufficiently softened. However, for a large-sized wiring photoresist mask 23 1, it is set as a time when the solvent does not sufficiently penetrate into the inside, and diffusion does not start, thereby ensuring the photoresist mask 210 for the source electrode (the drain electrode) The line width of the deformed photoresist 212 obtained by the deformation of the photoresist mask 211) has a sufficient width to cover the recess 220. Specifically, as shown in Fig. 5, the diffusion start time is 50 sec for 5.0 μm 2 and 90 sec for ΙΟ.Ομηη2, so 50 sec or more is repeated, and if it is less than 90 sec, 1 〇. Patterns above ημηι2 will not spread. On the one hand, the deformation of the photoresist mask 23 1 for wiring is suppressed as much as possible, and the line width W12 of the deformed photoresist 23 2 is slightly suppressed, and the adverse effect on the etching precision of the η | Si film 205 and the a· Si film 204 can be reduced. . -30- 200837833 In addition, in the present embodiment, in the reflow process, a large-sized wiring photoresist mask 231 is forced to form a solvent atmosphere in a short time that does not sufficiently soften and does not start to diffuse. The source electrode having a small volume is softened by the photoresist mask 210 (the photoresist mask 21 1 for the gate electrode), and a deformed photoresist 2 1 2 having a sufficient diffusion amount can be formed in the region to be covered. &lt;Fourth Embodiment&gt; φ Fig. 9 is a graph showing the difference in thickness between the photoresist for a counter electrode and the photoresist for wiring, and the difference in volume, and controlling the reflow according to the experience shown in the data in Fig. 5 Another embodiment of the amount of diffusion of the subsequent photoresist. Incidentally, the same configurations as those in Fig. 6 are denoted by the same reference numerals, and the description thereof will be omitted. In the present embodiment, the film thickness T3 of the photoresist mask for the source electrode 20 0 (the photoresist mask 2 11 for the drain electrode) is smaller than the film thickness Τ 4 of the photoresist mask 2 3 1 for wiring (Τ3) &lt; Τ 4) The pattern is formed. That is, the volume per unit length L with respect to the wiring mask 23 1 for wiring, and the volume per unit length L of the φ photoresist mask 210 (the photoresist mask for the drain electrode 211) for the source electrode. ▽1 is a mode of 0.2 to 0.7 times, and line widths Τ3 and Τ4 are set. Thus, the photoresist volume of the source electrode photoresist mask 210 (the photoresist mask for a drain electrode 2 1 1 ) is set to be smaller than the photoresist volume of the photoresist mask 23 1 for wiring, and for the volume A very small source electrode is provided with a photoresist mask 21 0 (a photoresist mask for a drain electrode 2 1 1 ), and the time during which the solvent acts by reflow treatment is set such that the solvent penetrates into the inside to sufficiently soften, but For a very large wiring mask 23 1 for wiring, the solvent is not sufficiently penetrated into the inside, and the diffusion does not start for a short time, thereby ensuring that the source electrode -31 - 200837833 is covered with a photoresist mask 210 ( The line width Wh of the deformed photoresist 212 obtained by deforming the photoresist mask 211) has a sufficient width to cover the recess 220. Specifically, in the same manner as in Fig. 8, the process is repeated for 50 sec or more, and if it is less than 90 sec, the pattern of 10.0 μm 2 or more does not spread. On the one hand, the deformation of the photoresist mask 23 1 for wiring is suppressed as much as possible, and the line width W16 of the deformed photoresist 232 is slightly suppressed, which can reduce the adverse effect on the etching precision of the n + Si film 2 〇 5 and the a-Si film 204. . Further, in the present embodiment, at the time of the reflow treatment, the wiring mask 23 1 for wiring having a large volume is forced to have a small volume in a short period of time without sufficiently softening and diffusion. The source electrode is softened by a photoresist mask 21 0 (the photoresist mask 21 1 for the drain electrode), and a deformed photoresist 2 1 2 having a sufficient amount of diffusion can be formed in the region to be covered. The above reflow treatment method can be applied to, for example, reflow treatment of a channel portion of a thin film transistor (TFT) having a shape shown in Fig. 1 to Fig. 2 . The 10th (a)th plan is a source/drain structure in which the source electrode and the drain electrode which are respectively connected from the wiring to the T-type are arranged in parallel. Then, the line width W of the photoresist mask for the source electrode and the photoresist mask 2 1 1 for the drain electrode is formed to be larger than the line width W2 of the photoresist mask 231 for wiring (Wi &gt; W2 Referring to FIG. 6), the volume V2 per unit length L of the photoresist mask 23 1 for wiring, the photoresist mask for the source electrode 2 1 0 and the photoresist mask for the drain electrode 211 per unit length The volume of L is 1.5 to 3 times. Through the reflow process, as shown in FIG. 10(b), the source electrode photoresist mask 2 1 0 and the drain electrode photoresist mask 2 1 1 are deformed to become deformed photoresists having a line width W3, respectively. The agent 21 2 can be coated with a channel between the two sides - 32 - 200837833. On the other hand, the line width W4 of the deformed photoresist 212 obtained by deforming the wiring resist mask 231 is almost unchanged from the line width W2 before the deformation, and the amount of diffusion can be suppressed slightly. The source/drain structure included in the first 1 (a) diagram is disposed between the gate electrodes having the U-shaped end portions which are formed in a U-shape from the plane of the wiring connection so as to be inserted into the linear source electrodes. . Then, the film thickness T! of the photoresist mask 210 for the source electrode and the photoresist mask 211 for the drain electrode is formed to be larger than the film thickness of the photoresist mask 231 for wiring 2 (1 &gt; T2, reference 7)), with respect to the volume V2 per unit length L of the wiring photoresist mask 231, the photoresist mask for the source electrode 2 1 0 and the photoresist mask for the drain electrode 2 1 1 per unit length L Volume! It is 1.5 to 3 times. Further, the line width W5 of the source electrode photoresist mask 210 and the drain electrode photoresist mask 211 is set to be the same as the line width W6 of the wiring photoresist mask 231 (W5 = W6). According to the reflow treatment, as shown in FIG. 1(b), the photoresist mask 210 for the source electrode and the photoresist mask 211 for the drain electrode are deformed into deformed light having a line width W3, respectively. The resist 212 can cover the channel portion between the two sides. On the other hand, the line width W8 of the deformed photoresist 212 obtained by deforming the wiring mask 231 having a small volume is hardly changed as compared with the line width W6 before the deformation, and the amount of diffusion can be suppressed slightly. The source/drain structure included in the 12th (a) is arranged in a zigzag manner so as to be inserted into the U-shaped source electrode having an end portion from the plane to which the wiring is connected, and is connected to the wiring. The plane is substantially W-shaped between the ends of the drain electrodes. Then, the source electrode is formed by a photoresist mask 2 1 0 and a drain electrode with a line width W9 of the photoresist mask 2 1 1 , and is formed to be smaller than the line width W1Q of the photoresist mask 23 1 for the line 33-200837833. (W9 &lt; W1G, refer to Fig. 8), with respect to the volume V2 per unit length L of the above-mentioned wiring photoresist mask 23 1 , the photoresist mask for the source electrode 2 1 0 and the photoresist mask for the drain electrode 2 1 1 The volume per unit length L is ¥1 to 0.2 to 0.7 times. In the reflow process, for the source electrode photoresist mask 21 0 (the photoresist mask for the drain electrode 2 1 1 ), the time for allowing the solvent to act is set to be sufficiently softened by the penetration of the solvent, but The wiring mask 23 1 is set to a time when the solvent does not penetrate into the inside and does not sufficiently soften. In this way, as shown in FIG. 12(b), the photoresist mask 210 for the source electrode and the photoresist mask 211 for the drain electrode are deformed to have a line width W! The deforming photoresist 212 can cover the channel portion between the two sides. On the other hand, the deformation of the wiring photoresist mask 231 having a large volume is suppressed, so that the line width W12 of the deformed photoresist 232 is almost unchanged from the line width W i 变形 before the deformation, and the amount of diffusion can be suppressed slightly. . In the above description, an example of the reflow processing method using the first embodiment (Fig. 6) for the source/drain structure of Fig. 10 is described. However, the present invention is not limited thereto, and the second to fourth embodiments may be employed. The reflow processing method of the embodiment (Figs. 7 to 9). Similarly, the source/drain structure of the second diagram is not limited to the reflow treatment method of the second sinus form (Fig. 7), and the first, third or fourth embodiment (the sixth embodiment can be employed. 8, 9)) Reflow treatment method. Further, the source/drain structure of the second embodiment is not limited to the reflow processing method (Fig. 8) of the third embodiment, and the first, second or fourth embodiment (the sixth embodiment) may be employed. 7, 9)) Reflow treatment method. In particular, the reflow treatment method of the second and fourth embodiments (-34-200837833, Figs. 7 and 9) in which the film thickness of the photoresist mask is changed in the substrate surface to impart a volume difference can be suitably applied to the first method. 1 0 to the whole source/drain structure of Figure 12. Further, the reflow processing method of the first embodiment (Fig. 6) in which the line width of the photoresist mask is changed in the substrate surface to impart a volume difference can be preferably applied to the sources in the first map and the first graph. Pole / bungee structure. Further, the reflow processing method of the third embodiment (Fig. 8) in which the line width of the photoresist mask is changed in the substrate surface to impart a volume difference can be preferably applied to the sources in the first and second figures. Pole / bungee structure. Next, an embodiment in which the reflow method of the present invention is applied to a TFT element for a liquid crystal display device will be described with reference to Figs. 13 to 19 . Fig. 1 is a flow chart showing the main steps of a method of manufacturing a TFT element for a liquid crystal display device according to an embodiment of the present invention. Figures 14 to 16 are cross-sectional views of the substrate G after a representative step. First, as shown in Fig. 14(a), a gate electrode 202 and a gate line (not shown) are formed on an insulating substrate 201 composed of a transparent substrate such as glass, and stacked in the following order. a gate insulating film 202 such as a tantalum nitride film, an a-Si (amorphous germanium) film 204, an Si film 20 5 as an ohmic contact layer, an electrode metal film 206 such as an Al alloy or a Mo alloy (step S1) Next, as shown in Fig. 14(b), a photoresist 207 is formed on the electrode metal film 206 (step S2). Then, as shown in Fig. 14(c), the photoresist 207 is exposed to light with an exposure mask 300' (step S3). The exposure mask 300 is constructed by exposing the photoresist 207 in a specific pattern. Thus, the exposure-treating photoresist 207 forms the exposure photoresist portion 208 and the unexposed photoresist portion 209 as shown in Fig. 14(d). -35- 200837833 After the exposure, development processing is performed, and as shown in Fig. 15(a), the exposure resist portion 208 is removed, and the unexposed photoresist portion 209 is left on the electrode metal film 206 (step S4). The unexposed photoresist portion 209 is separated from the source electrode photoresist mask 2 10 and the drain electrode photoresist mask 2 11 and patterned. Here, the line width difference is applied between the source electrode photoresist mask 2 10 and the drain electrode photoresist mask 2 1 1 and the wiring photoresist mask 2 3 1 (refer to FIG. 6). . Then, the source electrode photoresist mask 210, the drain electrode photoresist mask 211, and the wiring photoresist mask 231 are used as an etching mask, and the electrode metal film 206 is etched. As shown in Fig. 15(b), the source electrode 206a and the drain electrode 206b and the wiring 23 0 are formed, and the recess portion 2 2 0 is formed in a portion which becomes a channel region later (step S 5 ). By this etching, the n + Si film 205 can be exposed in the recess 220 between the source electrode 206a and the drain electrode 206b. Further, after the metal film of the step S5 is etched, the surface of the exposed n + Si film 205 may be subjected to surface modification treatment in the adhesive unit (AD) 30 of Fig. 2 . By surface modification treatment using a decylating agent or the like, the surface of the n + Si film 205 is surface-modified, for example, the contact angle of pure water becomes 50 degrees or more, and a state in which the photoresist does not easily flow can be formed. The diffusion of the wiring photoresist mask 23 1 is more effectively suppressed. Next, in the reflow process of the step S6, the photoresist softened by the organic solvent such as a diluent flows into the concave portion 220 which becomes the destination of the channel region. This reflow treatment is carried out by using the reflow processing unit (RpFLW) 60 of Fig. 3. Fig. 15(c) is a view showing a state in which the inside of the concave portion 220 is covered by the deforming photoresist 2 12 after the reflow treatment. During the reflow process -36- 200837833, the photoresist is shielded between the photoresist mask for the source electrode and the photoresist mask 2 1 1 for the drain electrode and the photoresist mask 23 1 for the wiring, so the photoresist The diffusion of the agent into the recess 220 of the channel region afterwards is greater than the diffusion of the photoresist to the periphery of the wiring 230, and can be surely covered in the recess 220 (refer to Fig. 6). Further, by suppressing the extrusion of the photoresist to the periphery of the wiring 230, high etching precision can be ensured, and it is possible to cope with the high integration and miniaturization of the thin film transistor (TFT) element. Next, as shown in Fig. 16(a), the deformed photoresists 212 and 232 are used as an etching mask, and the n + Si film 205 and the a-Si film 204 are etched (step S7). Thereafter, the deformed photoresist 212, 23 2 is removed by a wet process such as a photoresist stripping solution (step S8), as shown in Fig. 16(b), the source electrode is used. 206a and the drain electrode 206b and the wiring 230 are exposed. Next, the source electrode 206a and the drain electrode 206b are used as etch masks, and the η 4 S i film 205 exposed in the recess 2 2 0 is subjected to uranium engraving (step S9). In this way, as shown in Fig. 16(c), the channel region 22 1 is formed. The subsequent steps are omitted, for example, after the organic film is formed so as to cover the channel region 22 1 and the source electrode 206a and the drain electrode 206b (step S 1 0) 'by lithography' to form a connection by engraving a contact hole to the source electrode 206a (the drain electrode 206b) (step si1), followed by forming a transparent electrode using indium tin oxide (1T0) or the like (step s 1 2 ) to manufacture a liquid crystal display device Thin film transistor (TFT) components. In the above embodiment, by performing the reflow step of step S6, the photoresist formed by the lithography once, that is, the photoresist mask for the source electrode and the light for the drain electrode can be used as -37-200837833 The mask 211 and the deformed photoresist 212 perform the step of etching the electrode metal film 206 of the step S5 and the step of etching the n H Si film 205 and the a-Si film 20 4 of the step S7. Reducing the number of lithography steps and saving photoresist. Fig. 17 is a flow chart showing the main steps of a method of manufacturing a thin film transistor (TFT) device for a liquid crystal display device according to another embodiment of the present invention. Figures 18 and 19 are cross-sectional views of the substrate G after a representative step. Further, the steps S21, S22, and S27 to S32 in Fig. 17 are the same as steps S1 and S2 and steps S7 to S12 in Fig. 13, and the description thereof will be omitted. As shown in Fig. 18(a), in a state where the photoresist 2 0 7 is formed on the electrode metal film 206, the half-exposure treatment is performed using the halftone dot exposure mask 301 (step S23). ). The halftone dot exposure mask 301 is constructed by exposing the photoresist 206 to a two-stage exposure amount. Thus, the photoresist 207 is subjected to a half exposure process, and as shown in Fig. 18(b), the exposure photoresist portion 208 and the unexposed photoresist portion 209 are formed. The unexposed photoresist portion 209 is formed in a stepped manner at the boundary with the exposure resist portion 208 in correspondence with the transmittance of the halftone dot exposure mask 301. After the exposure, development processing is performed, and as shown in Fig. 18(c), the exposure resist portion 208 is removed, and the unexposed photoresist portion 209 remains on the electrode metal film 206 (step S24). The unexposed photoresist portion 209 is separated from the source electrode photoresist mask 210 and the drain electrode photoresist mask 211 and formed in a pattern. The photoresist mask 210 for the source electrode and the photoresist mask 211 for the drain electrode are formed by a semi-exposure portion -38-200837833 to form a thick film thickness, and the wiring photoresist mask 23 1 is formed thin. Film thickness. As described above, in the present embodiment, the film thickness difference is applied between the source electrode photoresist mask 2 10 and the drain electrode photoresist mask 2 1 1 and the wiring photoresist mask 23 1 (refer to 7)). Then, the source electrode mask 210 and the drain electrode mask 21 1 are used as an etching mask, and the electrode metal film 206 is etched, as shown in Fig. 19(a). The source electrode 206a and the drain electrode 2〇6b and the wiring 230 form a concave portion 220 at a portion which becomes a channel region later (step S25). By this etching, the n + Si film 205 can be exposed in the recess 220 between the source electrode 206a and the drain electrode 206b. Further, after the metal film of the step S25 is etched, the surface of the exposed n + Si film 205 may be subjected to surface modification treatment in the adhesion unit (AD) 30 of Fig. 2 . By surface modification treatment using a brothing agent or the like, the surface of the n+ Si film 205 is surface-modified, for example, the contact angle of pure water becomes 50 degrees or more, and a state in which the photoresist does not easily flow can be formed. The diffusion of the wiring photoresist mask 23 1 is more effectively suppressed. Next, in the reflow process of step S26, the photoresist softened by the organic solvent such as a diluent flows into the concave portion 220 which becomes the destination of the channel region. This reflow process is performed using the reflow processing unit (REFLW) 00 of Fig. 3. Fig. 19(b) shows a state in which the inside of the concave portion 220 is covered by the deforming resist 212 after the reflow treatment. In the reflow process, since the photoresist gap between the source electrode photoresist mask 210 and the drain electrode photoresist mask 211 and the wiring photoresist mask 2 31 is changed, the photoresist becomes a concave portion of the channel region. The diffusion in 220 is greater than the diffusion around the photoresist to the wiring 230-39-200837833, and can be surely covered in the recess 220 (refer to Fig. 7). Further, by suppressing the extrusion of the photoresist around the wiring 230, it is possible to ensure high etching precision in the next step, and it is possible to achieve high integration and miniaturization of the thin film transistor (TFT) element. In the embodiment shown in FIGS. 13 to 19, the line width or film thickness of the photoresist mask 210 for the source electrode and the photoresist mask 211 for the drain electrode is increased, and the photoresist mask 23 for the wiring is reduced. The line width or film thickness of 1 is applied to the difference between the two, and the amount of diffusion of the reflow process is controlled, but the line of the photoresist mask 210 for the source electrode and the photoresist mask 211 for the drain electrode can also be reduced. The width or film thickness is increased, and the line width or film thickness of the photoresist mask 23 1 for wiring is increased to control the amount of diffusion of the reflow process (refer to Figs. 8 and 9). In this case, in the reflow process, the solvent (diluent) exposed to the processing chamber of the reflow processing unit (REFLW) 60 is stopped before the wiring resist mask 23 1 is deformed. Alternatively, the photoresist mask for the source electrode 2 1 0 and the photoresist mask for the drain electrode 2 1 1 may be deformed in the order shown in Fig. 2, and the photoresist mask for wiring 2 3 1 may not be used. The exposure time of the degree of deformation is repeated for a short period of time. In this case, in the same manner as in Fig. 8, if the processing is repeated for 50 sec or more and less than 90 sec, the pattern of 10.0 μm 2 or more does not spread. That is, in the reflow processing unit (REFLW) 60, first, the substrate G having the photoresist which has been patterned is placed on the support table 6 2 'to make the upper processing chamber 6 1 b and the lower processing chamber 6 &amp; Upon abutting, the processing chamber 6 1 is closed (step S 4 1). Next, the exhaust gas is started in the processing chamber 61 (step s 4 2). Then, the shut-off valve 71 of the pipe 69 and the on-off valve 73 of the N2 gas supply pipe 74 are opened, and the flow rate of the N2 gas is regulated by a mass flow controller by -40-200837833, and the gasification amount of the diluent is controlled. The vaporized diluent is introduced into the space 68 of the shower head 66 through the piping 69 and the N2 gas introduction portion 67 from the bubble generating tank 70, and is ejected from the gas ejection hole 66b. In this way, the processing chamber 61 becomes a diluent atmosphere of a specific concentration (step S43). The photoresist formed on the substrate G is softened by exposure to a diluent atmosphere, and the fluidity is improved, and the deformed photoresist 2 2 2 is deformed to cover the source electrode 206a and the drain electrode on the surface of the substrate G. A channel portion between the electrodes 206b. The step S43 is performed in a small-sized source electrode photoresist mask 2 1 0 and a drain electrode photoresist mask 2 1 1 deformed, and a large-volume wiring photoresist mask 23 1 is not deformed. Time to proceed. After the passage of time, the supply of the diluent is stopped (step S44). Then, while the exhaust gas is continuously exhausted, the on-off valve 77 on the flushing gas supply pipe 76 is opened, and the N2 gas as the flushing gas is introduced into the processing chamber 61 via the flushing gas introduction portion 75, and the processing chamber atmosphere is replaced (step S45). . After a certain period of time has elapsed, the supply of the flushing gas is stopped (step S46). Until the source electrode photoresist mask 210 and the drain electrode photoresist mask 211 are sufficiently deformed, the processing up to the steps S43 to S46 is repeated until the exhaust of the processing chamber 61 is stopped (step S47). Then, the upper processing chamber 6 1 b is opened from the lower processing chamber 61 1 a, and the substrate G after the reflow processing is carried out from the reflow processing unit (REFLW) 60 by the transfer arm 21 a in the reverse order to the above. (Step S48). By repeating the processing from the step S43 to the step S46, the deformed photoresist 232 can be prevented from being diffused around the wiring 23 0 to be covered, and the channel portion of the cladding destination can be surely performed while being -41 - 200837833. Although the embodiments of the present invention have been described above, the present invention is not limited to these embodiments. For example, the above description is directed to the manufacture of a TFT element using a glass substrate for LCD, but the present invention is also applicable to reflow treatment of a photoresist formed on a substrate of another flat panel display (FPD) substrate or a semiconductor substrate. Case. [Industrial Applicability] The present invention is suitably applied to a semiconductor device such as a thin film transistor (TFT) device. [Simple description of the drawing] Fig. 1 is a schematic diagram showing the schematic of the reflow processing system. Fig. 2 is a cross-sectional view showing a schematic configuration of an adhesive unit (A D). Φ Fig. 3 is a cross-sectional view showing a schematic configuration of a reflow processing unit (REFLW). Figure 4 is a graph showing the relationship between the volume of the photoresist and the amount of diffusion during reflow processing. Fig. 5 is a graph showing the relationship between the volume of the photoresist and the diffusion start time at the time of reflow processing. Fig. 6 is a view showing a schematic view of a reflow processing method according to a first embodiment of the present invention. Fig. 7 is a view showing a schematic view of a reflow processing method according to a second embodiment of the present invention. Fig. 8 is a view showing a schematic view of a reflow processing method according to a third embodiment of the present invention. Fig. 9 is a view showing a schematic view of a reflow processing method according to a fourth embodiment of the present invention. Fig. 1 is a view showing the shape of a channel portion of a thin film transistor (TFT) to which the reflow processing method of the present invention is applicable. Fig. 1 is a view showing the shape of a channel portion of a thin film transistor (TFT) according to another embodiment of the reflow processing method of the present invention. Fig. 12 is a view showing the shape of a channel portion of a thin film transistor (TFT) according to still another embodiment of the reflow processing method of the present invention. Fig. 1 is a flow chart showing the main steps of a method for producing a thin film transistor (TFT) device for a liquid worm display device according to an embodiment of the present invention. Fig. 14 is a longitudinal cross-sectional view showing the substrate in a state in which a laminated film is formed on the insulating substrate to the exposure process in the process of the thin film transistor (TFT) device. 15 is a longitudinal cross-sectional view of a substrate in a state in which a thin film transistor (TFT) device is processed from a development process to a state after reflow processing. FIG. 16 is a view showing a process of a thin film transistor (TFT) device. The longitudinal cross-sectional view of the substrate from the state after the reflow treatment to the state after the formation of the channel 〇 FIG. 17 is a view showing the main method of manufacturing the thin film transistor (TFT) element for a liquid crystal display device according to another embodiment of the present invention. Step process -43- 200837833 Figure. 18 is a longitudinal cross-sectional view of a substrate in a state in which a thin film transistor (TFT) device is processed from a half exposure process to a development process, and FIG. 19 is a view showing a process of a thin film transistor (TFT) device. A longitudinal cross-sectional view of the substrate in a state from the etching of the metal film to the state after the reflow treatment. Figure 20 is a flow chart showing the sequence of steps of the reflow processing method according to an embodiment of the present invention. [Description of main component symbols] 1 : Substrate cassette station 2 : Processing station 3 : Control station 20 : Central transfer path 21 : Transfer device 30 : Adhesive unit (AD) 60 : Reflow processing unit (REFLW) 80a, 8〇b ' 80c: heating/cooling processing unit (HP/COL) 1〇〇: reflow processing system 201: insulating substrate 2 02: gate electrode 203: gate insulating film 204: a-Si film-44- 200837833 205: n+ Si film 206a: source electrode 2 0 6 b : drain electrode 2 1 0 : photoresist mask for source electrode 211 : photoresist mask for drain electrode 23 0 : wiring 231 : photoresist mask for wiring 23 2 : Deformed photoresist G: substrate -45-

Claims (1)

200837833 十、申請專利範圍 1 · 一種回流處理方法，是在回流處理裝置的處理室內 ’讓溶劑對具有形成有圖案的電極用金屬膜和與該電極用 金屬膜相連接的配線用金屬膜、及分別被設置在前述電極 用金屬膜和前述配線用金屬膜的上面之電極用光阻遮罩和 配線用光阻遮罩之基板產生作用，使光阻劑軟化變形，藉 此以變形光阻劑來包覆與前述電極用金屬膜相鄰的區域之 Φ 回流處理方法，其特徵爲： 相對於前述配線用光阻遮罩每單位長度L的體積V2 ’前述電極用光阻遮罩每單位長度L的體積〜1爲1.5〜3倍 〇 2.如申請專利範圍第1項所述之回流處理方法，其中 ’將前述電極用光阻遮罩的線寬形成爲大於前述配線用光 阻遮罩的線寬。 3 ·如申請專利範圍第1項所述之回流處理方法，其中 # ’將前述電極用光阻遮罩的膜厚形成爲大於前述配線用光 阻遮罩的膜厚。 4·一種回流處理方法，是在回流處理裝置的處理室內 ，讓溶劑對具有以圖案形成的電極用金屬膜和與該電極用 金屬膜相連接的配線用金屬膜、及分別被設置在前述電極 用金屬膜和前述配線用金屬膜的上面之電極用光阻遮罩和 配線用光阻遮罩之基板產生作用，使光阻劑軟化變形，藉 此以變形光阻劑來包覆與前述電極用金屬膜相鄰的區域之 回流處理方法，其特徵爲： -46- 200837833 相對於前述配線用光阻遮罩每單位長度L的體積V2 ，前述電極用光阻遮罩每單位長度L的體積乂！爲0.2〜0.7 倍。 5.如申請專利範圍第4項所述之回流處理方法，其中 ，將前述電極用光阻遮罩的線寬形成爲小於前述配線用光 阻遮罩的線寬。 6 ·如申請專利範圍第4項所述之回流處理方法，其中 φ ，將前述電極用光阻遮罩的膜厚形成爲小於前述配線用光 阻遮罩的膜厚。 7·如申請專利範圍第5或6項所述之回流處理方法，其 中，在前述配線用光阻遮罩尙未流動化的時間，進行回流 處理。 8 ·如申請專利範圍第7項所述之回流處理方法，其中 ，在前述配線用光阻遮罩尙未流動化的時間，反覆進行回 流處理，強勢地使前述電極用光阻遮罩變形。 # 9.一種薄膜電晶體（TFT)之製造方法，是具有源極電 極與汲極電極之間的通道部、及分別與前述源極電極和前 述汲極電極相連接的配線的薄膜電晶體（TFT)之製造方法 ，其特徵爲： 包含有以下的步驟： 在被形成於基板上之金屬膜的上面形成光阻膜之步驟 ;及 利用微影技術（Photolith〇graPhy technology) ’ 以圖案 形成前述光阻膜’而形成、源極電極用光阻遮罩'汲極電極 -47- 200837833 用光阻遮罩以及配線用光阻遮罩之步驟；及 以前述源極電極用光阻遮罩、前述汲極電極用光阻遮 罩以及前述配線用光阻遮罩當作遮罩，將前述金屬膜予以 鈾刻，形成前述源極電極及前述汲極電極及前述配線之金 屬膜蝕刻步驟；及 讓溶劑對前述源極電極用光阻遮罩、前述汲極電極用 光阻遮罩以及前述配線用光阻遮罩產生作用，使光阻劑軟 化變形，藉此以變形光阻劑來包覆前述源極電極與前述汲 極電極之間之回流步驟；及 前述回流步驟中，相對於前述配線用光阻遮罩每單位 長度L的體積V 2，前述源極電極用光阻遮罩和/或前述汲 極電極用光阻遮罩每單位長度L的體積▽1爲1.5〜3倍。 10·—種薄膜電晶體（TFT)之製造方法，是具有源極電 極與汲極電極之間的通道部、及分別與前述源極電極和前 述汲極電極相連接的配線的薄膜電晶體（TFT)之製造方法 ，其特徵爲： 包含有以下的步驟： 在被形成於基板上之金屬膜的上面形成光阻膜之步驟 ;及 利用微影技術（photoUthography technology)，以圖案 形成前述光阻膜，而形成源極電極用光阻遮罩、汲極電極 用光阻遮罩以及配線用光阻遮罩之步驟；及 以前述源極電極用光阻遮罩、前述汲極電極用光阻遮 罩以及前述配線用光阻遮罩當作遮罩，將前述金屬膜予以 -48· 200837833 触刻，形成前述源極電極及前述汲極電極及前述配線之金 屬膜蝕刻步驟；及 讓溶劑對前述源極電極用光阻遮罩、前述汲極電極用 光阻遮罩以及前述配線用光阻遮罩產生作用，使光阻劑軟 化變形，藉此以變形光阻劑來包覆前述源極電極與前述汲 極電極之間之回流步驟；及 前述回流步驟中，相對於前述配線用光阻遮罩每單位 長度L的體積V2，前述源極電極用光阻遮罩和/或前述汲 極電極用光阻遮罩每單位長度L的體積乂！爲0.2〜0.7倍。 11. 一種薄膜電晶體（TFT)之製造方法，其特徵爲： 包含有以下的步驟： 在基板上形成閘極電極之步驟；及 將覆蓋前述閘極電極的閘極絕緣膜予以形成之步驟； 及 從下起依序，使a-Si膜、歐姆接觸用Si膜及金屬膜 ，堆積在前述閘極絕緣膜上之步驟；及 在前述金屬膜上形成光阻膜之步驟；及 用特定的曝光遮罩來曝光處理前述光阻膜之步驟；及 將被曝光處理過的前述光阻膜經顯影處理來予以以圖 案形成，形成源極電極用光阻遮罩、汲極電極用光阻遮罩 以及配線用光阻遮罩之遮罩圖案處理步驟；及 以前述源極電極用光阻遮罩、前述汲極電極用光阻遮 罩以及前述配線用光阻遮罩當作遮罩，將前述金屬膜予以 蝕刻，形成源極電極及汲極電極及分別與該兩電極相連接 -49- 200837833 的配線之金屬膜触刻步驟；及 讓有機溶媒對前述源極電極用光阻遮罩、前述汲極電 極用光阻遮罩以及前述配線用光阻遮罩產生作用，使光阻 劑軟化變形，藉此以變形光阻劑來至少將前述源極電極與 前述汲極電極之間之通道用凹部內的前述歐姆接觸用Si 膜予以覆蓋之回流步驟；及 以前述變形光阻劑以及前述源極電極和前述汲極電極 當作遮罩，將下層的前述歐姆接觸用Si膜和前述a-Si膜 予以蝕刻之步驟；及 除去前述變形光阻劑，讓前述歐姆接觸用Si膜再度 曝露在前述通道用凹部內之步驟；及 以前述源極電極及前述汲極電極當作遮罩，將曝露在 這兩電極之間的前述通道用凹部之前述歐姆接觸用 Si膜 予以蝕刻之步驟；及 前述回流步驟中，相對於前述配線用光阻遮罩每單位 長度L的體積V2，前述源極電極用光阻遮罩和/或前述汲 極電極用光阻遮罩每單位長度L的體積〜！爲1.5〜3倍。 12. —種薄膜電晶體（TFT)之製造方法，其特徵爲： 包含有以下的步驟： 在基板上形成閘極電極之步驟；及 將覆蓋前述閘極電極的閘極絕緣膜予以形成之步驟； 及 從下起依序’使Si膜、歐姆接觸用Si膜及金屬膜 ，堆積在前述閘極絕緣膜上之步驟；及 -50- 200837833 在前述金屬膜上形成光阻膜之步驟；及 用特定的曝光遮罩來曝光處理前述光阻膜之步驟；及 將被曝光處理過的前述光阻膜經顯影處理來予以以圖 案形成，形成源極電極用光阻遮罩、汲極電極用光阻遮罩 以及配線用光阻遮罩之遮罩圖案處理步驟；及 以前述源極電極用光阻遮罩、前述汲極電極用光阻遮 罩以及前述配線用光阻遮罩當作遮罩，將前述金屬膜予以 蝕刻，形成源極電極及汲極電極及分別與該兩電極相連接 的配線之金屬膜蝕刻步驟；及 讓有機溶媒對前述源極電極用光阻遮罩、前述汲極電 極用光阻遮罩以及前述配線用光阻遮罩產生作用，使光阻 劑軟化變形，以變形光阻劑來至少將前述源極電極與前述 汲極電極之間之通道用凹部內的前述歐姆接觸用Si膜予 以覆蓋之回流步驟；及 以前述變形光阻劑以及前述源極電極和前述汲極電極 當作遮罩，將下層的前述歐姆接觸用Si膜和前述a-Si膜 予以蝕刻之步驟；及 除去前述變形光阻劑，讓前述歐姆接觸用Si膜再度 曝露在前述通道用凹部內之步驟；及 以前述源極電極及前述汲極電極當作遮罩，將曝露在 這兩電極之間的前述通道用凹部之前述歐姆接觸用Si膜 予以飩刻之步驟；及 前述回流步驟中，相對於前述配線用光阻遮罩每單位 長度L的體積V2，前述源極電極用光阻遮罩和/或前述汲 -51、 200837833 極電極用光阻遮罩每單位長度L的體積V】爲0· 2〜0.7倍。 1 3 · —種可電腦讀取的記憶媒體，是記憶有會在電腦 上動作的控制程式之可電腦讀取的記憶媒體，其特徵爲： 前述控制程式係在執行時，以在回流處理裝置的處理 室內施行申請專利範圍第1至8項中任一項所述之回流處理 方法的方式，控制回流處理裝置。 14. 一種回流處理裝置’其特徵爲，具備有： 拳 裝備有載置基板的支撐台之處理室；及 用來將有機溶媒供應給前述處理室內之氣體供應手段 •’及 以在前述處理室內施行申請專利範圍第1至8項中任 一項所述之回流處理方法的方式進行控制之控制部。 -52-200837833 X. Patent Application No. 1 - A reflow treatment method in which a solvent is used to form a metal film for an electrode having a pattern and a metal film for wiring connected to the metal film for the electrode in a processing chamber of a reflow processing apparatus, and Each of the electrode metal film for the electrode and the substrate for the wiring metal film and the wiring mask for the wiring are respectively provided to act to soften and deform the photoresist, thereby deforming the photoresist. A Φ reflow treatment method for coating a region adjacent to the electrode metal film, characterized in that: the volume of the photoresist mask per unit length L with respect to the wiring mask of the wiring is made of the photoresist mask per unit length The reflow treatment method according to the first aspect of the invention, wherein the line width of the photoresist mask for the electrode is formed to be larger than the photoresist mask for the wiring. Line width. 3. The reflow processing method according to claim 1, wherein #' is formed to have a film thickness of the photoresist mask for the electrode larger than a thickness of the wiring mask. 4. A reflow treatment method in which a solvent is applied to a metal film for an electrode formed in a pattern and a metal film for wiring connected to the metal film for an electrode in a processing chamber of a reflow processing apparatus, and each of the electrodes is provided on the electrode The metal film and the electrode for the upper surface of the metal film for wiring are used for the photoresist mask and the substrate for the photoresist mask for wiring, and the photoresist is softened and deformed, thereby coating the electrode with the deformed photoresist. A reflow processing method using a region adjacent to a metal film, characterized in that: -46- 200837833, the volume of the electrode mask per unit length L with respect to the volume V2 per unit length L of the photoresist mask for wiring described above Hey! It is 0.2 to 0.7 times. 5. The reflow processing method according to claim 4, wherein the line width of the photoresist mask for the electrode is formed to be smaller than the line width of the photoresist mask for wiring. The reflow processing method according to claim 4, wherein φ is formed to have a film thickness of the photoresist mask for the electrode smaller than a film thickness of the wiring mask. 7. The reflow processing method according to claim 5, wherein the reflow treatment is performed while the wiring photoresist mask is not fluidized. The reflow processing method according to the seventh aspect of the invention, wherein, in the time when the wiring photoresist mask is not fluidized, the reflow processing is repeatedly performed to strongly deform the photoresist mask for the electrode. # 9. A method of manufacturing a thin film transistor (TFT), which is a thin film transistor having a channel portion between a source electrode and a drain electrode, and a wiring respectively connected to the source electrode and the drain electrode ( A method of manufacturing a TFT, comprising the steps of: forming a photoresist film on a metal film formed on a substrate; and patterning the foregoing by using a photolithography technique (Photolith〇graPhy technology) Photoresist film formed, photoresist mask for source electrode 'thorium electrode-47- 200837833 Step for photoresist mask and wiring photoresist mask; and photoresist mask for source electrode The photoresist mask for a drain electrode and the photoresist mask for wiring are used as a mask, and the metal film is etched to form a metal film etching step of the source electrode and the drain electrode and the wiring; The solvent acts on the photoresist mask for the source electrode, the photoresist mask for the drain electrode, and the photoresist mask for the wiring, and softens and deforms the photoresist, thereby deforming the photoresist. a step of reflowing between the source electrode and the drain electrode; and in the reflow step, the photoresist mask for the source electrode is formed with respect to the volume V 2 per unit length L of the photoresist mask for wiring And/or the aforementioned photoresist mask of the drain electrode has a volume ▽1 per unit length L of 1.5 to 3 times. A method of manufacturing a thin film transistor (TFT) is a thin film transistor having a channel portion between a source electrode and a drain electrode, and a wiring respectively connected to the source electrode and the drain electrode ( A method of manufacturing a TFT, comprising: the steps of: forming a photoresist film on a metal film formed on a substrate; and patterning the photoresist by photoUthography technology a film to form a photoresist mask for a source electrode, a photoresist mask for a drain electrode, and a photoresist mask for wiring; and a photoresist mask for the source electrode, and a photoresist for the drain electrode The mask and the wiring photoresist mask are used as a mask, and the metal film is etched by -48·200837833 to form a metal film etching step of the source electrode and the drain electrode and the wiring; and a solvent pair The photoresist mask for the source electrode, the photoresist mask for the drain electrode, and the photoresist mask for the wiring act to soften and deform the photoresist, thereby coating the photoresist with a deformed photoresist. a reflow step between the source electrode and the drain electrode; and a reflow step, wherein the source electrode is provided with a photoresist mask and/or with respect to the volume V2 per unit length L of the photoresist mask for wiring The above-mentioned photoresist for the above-mentioned drain electrode is shielded by the volume per unit length L 乂! It is 0.2 to 0.7 times. A method of manufacturing a thin film transistor (TFT), comprising: the steps of: forming a gate electrode on a substrate; and forming a gate insulating film covering the gate electrode; And a step of depositing an a-Si film, an ohmic contact Si film, and a metal film on the gate insulating film, and a step of forming a photoresist film on the metal film; and using a specific Exposing the mask to expose the photoresist film; and exposing the exposed photoresist film to a pattern to form a photoresist mask for the source electrode and a photoresist for the drain electrode a mask pattern processing step of the mask and the photoresist mask for wiring; and the photoresist mask for the source electrode, the photoresist mask for the drain electrode, and the photoresist mask for the wiring are used as a mask, and The metal film is etched to form a source electrode and a drain electrode, and a metal film engraving step of the wiring of each of the electrodes connected to -49-200837833; and an organic solvent is used to mask the source electrode with a photoresist, The photoresist mask for the drain electrode and the photoresist mask for the wiring function to soften and deform the photoresist, thereby deforming the photoresist to at least the channel between the source electrode and the drain electrode a reflow step of covering the ohmic contact with a Si film in the recess; and using the deformed photoresist, the source electrode and the drain electrode as a mask, and the Si film for the ohmic contact of the lower layer and the a a step of etching the Si film; and removing the deformed photoresist, exposing the ohmic contact Si film to the recess for the channel again; and using the source electrode and the drain electrode as a mask, a step of etching the ohmic contact Si film exposed by the recessed portion between the electrodes, and a volume V2 per unit length L with respect to the wiring photoresist mask in the reflow step, the source The electrode is shielded with a photoresist mask and/or the photoresist of the aforementioned drain electrode is covered with a volume per unit length L~! It is 1.5 to 3 times. 12. A method of manufacturing a thin film transistor (TFT), comprising: the steps of: forming a gate electrode on a substrate; and forming a gate insulating film covering the gate electrode And a step of depositing a Si film, an ohmic contact Si film, and a metal film on the gate insulating film in order from the bottom; and -50-200837833 forming a photoresist film on the metal film; a step of exposing the photoresist film with a specific exposure mask; and patterning the exposed photoresist film by a development process to form a photoresist mask for a source electrode and a drain electrode a mask pattern processing step of the photoresist mask and the photoresist mask for wiring; and the photoresist mask for the source electrode, the photoresist mask for the drain electrode, and the photoresist mask for the wiring are used as a mask a mask, a metal film etching step of etching the metal film to form a source electrode and a drain electrode, and wirings respectively connected to the electrodes; and allowing the organic solvent to mask the source electrode with a photoresist The photoresist mask for the drain electrode and the photoresist mask for the wiring function to soften and deform the photoresist, and deform the photoresist to at least the recess in the channel between the source electrode and the drain electrode. a step of reflowing the ohmic contact covered with a Si film; and using the deformed photoresist, the source electrode and the drain electrode as a mask, and the ohmic contact Si film and the a-Si film of the lower layer a step of etching; and removing the deformed photoresist to expose the ohmic contact Si film to the channel recess; and using the source electrode and the drain electrode as a mask to expose a step of etching the ohmic contact with the Si film by the recessed portion between the electrodes; and the source electrode of the photoresist mask per unit length L with respect to the wiring for the wiring The volume V of the photoresist mask per unit length L is 0. 2 to 0.7 times with the photoresist mask and/or the aforementioned 汲-51, 200837833. 1 3 · A computer-readable memory medium is a computer-readable memory medium that stores a control program that can be operated on a computer, and is characterized in that: the control program is executed during reflow processing In the processing chamber, the reflow processing device is controlled in such a manner that the reflow processing method according to any one of claims 1 to 8 is applied. A reflow processing apparatus characterized by comprising: a processing chamber in which a punch is equipped with a support table on which a substrate is placed; and a gas supply means for supplying an organic solvent to the processing chamber, and in the processing chamber A control unit that performs control by means of a reflow processing method according to any one of claims 1 to 8. -52-
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