TW200834299A - Memory replay mechanism - Google Patents
Memory replay mechanismInfo
- Publication number
- TW200834299A TW200834299A TW096105514A TW96105514A TW200834299A TW 200834299 A TW200834299 A TW 200834299A TW 096105514 A TW096105514 A TW 096105514A TW 96105514 A TW96105514 A TW 96105514A TW 200834299 A TW200834299 A TW 200834299A
- Authority
- TW
- Taiwan
- Prior art keywords
- replay
- reset
- logic
- memory
- transaction data
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1405—Saving, restoring, recovering or retrying at machine instruction level
- G06F11/141—Saving, restoring, recovering or retrying at machine instruction level for bus or memory accesses
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/24—Resetting means
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
- G06F11/106—Correcting systematically all correctable errors, i.e. scrubbing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1666—Error detection or correction of the data by redundancy in hardware where the redundant component is memory or memory area
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Retry When Errors Occur (AREA)
- Hardware Redundancy (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/357,492 US7587625B2 (en) | 2006-02-16 | 2006-02-16 | Memory replay mechanism |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200834299A true TW200834299A (en) | 2008-08-16 |
TWI354888B TWI354888B (en) | 2011-12-21 |
Family
ID=38437903
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW096105514A TWI354888B (en) | 2006-02-16 | 2007-02-14 | Integrated circuit, method, and system for memory |
Country Status (9)
Country | Link |
---|---|
US (1) | US7587625B2 (zh) |
EP (1) | EP1984822B1 (zh) |
JP (1) | JP5039061B2 (zh) |
KR (1) | KR100992334B1 (zh) |
CN (1) | CN101110047B (zh) |
AT (1) | ATE456090T1 (zh) |
DE (1) | DE602007004448D1 (zh) |
TW (1) | TWI354888B (zh) |
WO (1) | WO2007098062A2 (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI727994B (zh) * | 2015-11-13 | 2021-05-21 | 台灣積體電路製造股份有限公司 | 記憶體裝置與校正方法 |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8028198B2 (en) * | 2007-07-30 | 2011-09-27 | Micron Technology, Inc. | Devices, methods, and apparatuses for detection, sensing, and reporting functionality for semiconductor memory |
US8151266B2 (en) * | 2008-03-31 | 2012-04-03 | Qualcomm Incorporated | Operating system fast run command |
US8234540B2 (en) | 2008-07-01 | 2012-07-31 | International Business Machines Corporation | Error correcting code protected quasi-static bit communication on a high-speed bus |
US8245105B2 (en) * | 2008-07-01 | 2012-08-14 | International Business Machines Corporation | Cascade interconnect memory system with enhanced reliability |
US8078848B2 (en) * | 2009-01-09 | 2011-12-13 | Micron Technology, Inc. | Memory controller having front end and back end channels for modifying commands |
US8539309B2 (en) * | 2009-09-17 | 2013-09-17 | International Business Machines Corporation | System and method for responding to error detection |
US8862973B2 (en) * | 2009-12-09 | 2014-10-14 | Intel Corporation | Method and system for error management in a memory device |
US9158616B2 (en) * | 2009-12-09 | 2015-10-13 | Intel Corporation | Method and system for error management in a memory device |
KR101187642B1 (ko) * | 2011-05-02 | 2012-10-08 | 에스케이하이닉스 주식회사 | 집적 회로의 모니터링 장치 |
US9823986B2 (en) | 2013-04-30 | 2017-11-21 | Hewlett Packard Enterprise Development Lp | Memory node error correction |
US9934085B2 (en) * | 2013-05-29 | 2018-04-03 | Hewlett Packard Enterprise Development Lp | Invoking an error handler to handle an uncorrectable error |
US9626270B2 (en) * | 2014-09-26 | 2017-04-18 | Intel Corporation | Link retraining based on runtime performance characteristics |
EP3057027B1 (en) * | 2015-02-16 | 2018-06-13 | Nxp B.V. | Method for secure data reading, computer program product and data handling system |
US9817738B2 (en) * | 2015-09-04 | 2017-11-14 | Intel Corporation | Clearing poison status on read accesses to volatile memory regions allocated in non-volatile memory |
US11675659B2 (en) * | 2016-07-15 | 2023-06-13 | Advanced Micro Devices, Inc. | DDR memory error recovery |
US10437946B1 (en) * | 2016-09-01 | 2019-10-08 | Xilinx, Inc. | Using implemented core sources for simulation |
US10635613B2 (en) | 2017-04-11 | 2020-04-28 | Micron Technology, Inc. | Transaction identification |
US10391764B2 (en) | 2017-05-16 | 2019-08-27 | Canon Kabushiki Kaisha | Element substrate, printhead, and printing apparatus |
US10459785B2 (en) | 2017-09-27 | 2019-10-29 | Western Digital Technologies, Inc. | Error detection for training non-volatile memories |
US11442813B2 (en) | 2017-10-11 | 2022-09-13 | Hewlett-Packard Development Company, L.P. | Memory devices including execution trace buffers |
US11334457B1 (en) | 2019-06-27 | 2022-05-17 | Samsung Electronics Co., Ltd. | Semiconductor memory device and memory system including the same |
US11243831B2 (en) * | 2019-07-15 | 2022-02-08 | Micron Technology, Inc. | Reset and replay of memory sub-system controller in a memory sub-system |
CN110727530B (zh) * | 2019-09-12 | 2021-02-19 | 无锡江南计算技术研究所 | 基于窗口的错误访存请求重传系统及方法 |
US11137941B2 (en) * | 2019-12-30 | 2021-10-05 | Advanced Micro Devices, Inc. | Command replay for non-volatile dual inline memory modules |
US11531601B2 (en) | 2019-12-30 | 2022-12-20 | Advanced Micro Devices, Inc. | Error recovery for non-volatile memory modules |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3754482B2 (ja) * | 1996-02-29 | 2006-03-15 | 株式会社日立製作所 | メモリ転写機能を有する情報処理装置 |
US6333929B1 (en) | 1997-08-29 | 2001-12-25 | Intel Corporation | Packet format for a distributed system |
US7404032B2 (en) * | 2000-01-05 | 2008-07-22 | Rambus Inc. | Configurable width buffered module having switch elements |
US6766429B1 (en) * | 2000-08-31 | 2004-07-20 | International Business Machines Corporation | Low cost and high RAS mirrored memory |
US7028213B2 (en) * | 2001-09-28 | 2006-04-11 | Hewlett-Packard Development Company, L.P. | Error indication in a raid memory system |
US7028147B2 (en) * | 2002-12-13 | 2006-04-11 | Sun Microsystems, Inc. | System and method for efficiently and reliably performing write cache mirroring |
US6917967B2 (en) | 2002-12-13 | 2005-07-12 | Sun Microsystems, Inc. | System and method for implementing shared memory regions in distributed shared memory systems |
US7386768B2 (en) * | 2003-06-05 | 2008-06-10 | Intel Corporation | Memory channel with bit lane fail-over |
US7111153B2 (en) * | 2003-09-30 | 2006-09-19 | Intel Corporation | Early data return indication mechanism |
US20060026375A1 (en) * | 2004-07-30 | 2006-02-02 | Christenson Bruce A | Memory controller transaction scheduling algorithm using variable and uniform latency |
US7292950B1 (en) * | 2006-05-08 | 2007-11-06 | Cray Inc. | Multiple error management mode memory module |
-
2006
- 2006-02-16 US US11/357,492 patent/US7587625B2/en active Active
-
2007
- 2007-02-14 TW TW096105514A patent/TWI354888B/zh not_active IP Right Cessation
- 2007-02-15 KR KR1020087019946A patent/KR100992334B1/ko active IP Right Grant
- 2007-02-15 JP JP2008555397A patent/JP5039061B2/ja not_active Expired - Fee Related
- 2007-02-15 WO PCT/US2007/004210 patent/WO2007098062A2/en active Application Filing
- 2007-02-15 DE DE602007004448T patent/DE602007004448D1/de active Active
- 2007-02-15 EP EP07751004A patent/EP1984822B1/en active Active
- 2007-02-15 CN CN2007100923079A patent/CN101110047B/zh active Active
- 2007-02-15 AT AT07751004T patent/ATE456090T1/de not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI727994B (zh) * | 2015-11-13 | 2021-05-21 | 台灣積體電路製造股份有限公司 | 記憶體裝置與校正方法 |
Also Published As
Publication number | Publication date |
---|---|
CN101110047A (zh) | 2008-01-23 |
US20070226579A1 (en) | 2007-09-27 |
WO2007098062A2 (en) | 2007-08-30 |
ATE456090T1 (de) | 2010-02-15 |
KR20080087035A (ko) | 2008-09-29 |
US7587625B2 (en) | 2009-09-08 |
JP5039061B2 (ja) | 2012-10-03 |
DE602007004448D1 (de) | 2010-03-11 |
EP1984822B1 (en) | 2010-01-20 |
CN101110047B (zh) | 2010-11-17 |
JP2009527819A (ja) | 2009-07-30 |
KR100992334B1 (ko) | 2010-11-05 |
EP1984822A2 (en) | 2008-10-29 |
WO2007098062A3 (en) | 2007-11-22 |
TWI354888B (en) | 2011-12-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |