TW200832099A - Bandgap reference circuit - Google Patents

Bandgap reference circuit Download PDF

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Publication number
TW200832099A
TW200832099A TW96102269A TW96102269A TW200832099A TW 200832099 A TW200832099 A TW 200832099A TW 96102269 A TW96102269 A TW 96102269A TW 96102269 A TW96102269 A TW 96102269A TW 200832099 A TW200832099 A TW 200832099A
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Taiwan
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current
coupled
current path
path
circuit
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TW96102269A
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Chinese (zh)
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TWI331265B (en
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Yan-Hua Peng
Uei-Shan Wang
Mei-Show Chen
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Faraday Tech Corp
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Abstract

A bandgap reference circuit comprises: a reference current generation circuit for generating first and second reference currents on first and second current paths; a current mirror, generating a third reference current on a third current path based on the first and second reference currents; an operation amplifier for making the first reference current substantially equal to the second reference current; and a feedback circuit, for making a node voltage on the first current path substantially equal to another node voltage on the third current path, for eliminating possible errors caused by channel length modulation effect in the current mirror.

Description

200832099 P2006-004-TW-B 21217twf.doc/n 九、發明說明: 【發明所屬之技術領域】 本發明是有_能隙參考電路的—種改良方式,能改 善能隙參考電狀電源斥減(PSRR)與温錢數的電 性。 【先前技術】 ”數位類比轉換器(DAC)、類比數位轉換器(ADC)或穩 壓器(regulator)會需要至少一種固定且穩定之參考電壓二 • 此參考電壓最好在每次電源啟動時能穩定地再生。理相 的參考電壓最好不受到製程差異,操作溫度變化,與g 源變異等影響。 月色隙蒼考電路(bandgap reference circuit)可用於提供 =考電壓。故而,在許多電子系統中,能隙參考電路扮 次重要角色,因為其會決定系統整體的穩定度與精準度。 一般而言,能隙參考電路會包括數個主要部份:電 /;丨l鏡操作放大态,能隙電流產生器(bandgap current 鲁 generator)與負載。 圖1顯示傳統能隙參考電路的電路圖。此能隙參考 電路包括:MOS電晶體Mil〜M13 ;操作放大器〇pl ; BJT電晶體Qii與(312、電阻R11與R12(其組成能隙電 流產生器);以及電阻R13。 圖1之能隙電流產生器包含兩條電流路徑:IIA與 I1B,I1A=I1B=I11+I12。111 為正溫度係數(PTAT)電流, 而m則為負溫度係數(CTAT)電流。所以,理想上,由 I11+I12所合成的I1A/I1B可被視為溫度無關^流。另 200832099 P2006-004-TW-B 21217twf.doc/n 外,因為電流鏡的操作,I1C>I1A=I1B,所以lie也可被 視為溫度無關電流。因為Vref=i1C*r13,Vref也可被視 為溫度無關電壓。 但是當考慮到MOS電晶體的通道長度調變效應時, I1A-IIB^IIC。這是因為,透過操作放大器的虛擬接地效應 (VIA^VIB)會使得M〇s電晶體M11與M12的汲極_源極電 壓相等。但是,另一節點電壓Vlc卻未必等於V1A/Vm。 如此一來,MOS電晶體Mil與]VQ2的汲極-源極電壓未必 等於MOS電晶體M13的汲極-源極電壓;亦即, VDSM11=VDSM1#VDSM13。此汲極_源極電壓的不匹配對於電源 與溫度是相當錄,也就是料致不㈣獅斥拒 與溫度係數。 為此,最好有-種能隙參考電路的改良技術,能夠改良 ,知,術的缺點,卿較差的溫度係數與pSRR特性。此外, =好是,能不需特殊電路元件即可達成,也就是能在標 CMOS製程來實現。 【發明内容】 故而,本發明提供一種能隙參考電路的改良架構,其能 k用於一般的電流型(currentm〇de)能隙參考電路。’、 本發明又提供能隙參考電路的 較佳的溫麟賴PSRR·。 ^讀其可㈣ 本發明另提供一種可在低雷厭 數相關/⑽瓣恤, 路d:目=;明提出-種能陳參考電 $考黾流產生電路,在第一與 200832099 P2006-004-TW-B 21217twf.doc/n 第二電流路徑上経第—與第二參考電流;—電流鏡, 根據該第-與第二參考電流以在第三電流路徑上產生第 二夢考電流;—第—操作放大器,純至該第-盘第二 一電流路徑上之—第一節點電壓本 二上專於該弟二電流路徑上之―第二節點電壓;一回授 =本該第—與第三電流路徑,以令該第一節點 U本,上專於該弟二電流路徑上之—第三節點電壓; 以及-麥考負载,触至該喊電路,以提供一參考電 發明之上述和其他目的、特徵 π下文特舉本發明之較佳實施例, 月 式,作砰細說明如下。 口 【實施方式】 發明實施例作為本 MOSA例中’為改良f知技術中之電流鏡之 衿士电曰曰體之汲極韻亟電壓的不匹配,故利用另-摔作 放大器來使得電缝巾财細 壓彼此實皙相笙电日日篮之汲極源極包 的電路降低由通道長度調變效應所帶 老恭考圖2’其顯7F根據本發明較佳實施例之能隙參 择二、ί路方塊圖。能隙參考電路包括:電流鏡210, ^倉哉大1" 〇Ρ2卜施隙電流產生器22G,回授電路230 興負载R2。 月匕隙電流產生器220用於產生溫度無關電流I2A與 200832099 P2006-004-TW-B 21217twf.doc/n I2B。在此,能隙電流產生器22()之架構可不特別限定, 至少能達成此功能即可。操作放大器〇p;21可令節點電壓 V2A=V2B。 電流鏡21G根據能隙電流產生器220所產生之電流 , I2A與I2B而鏡射出另—溫度無關電流I2C。同樣地,在 Λ,電流鏡210之架構可不特別限定,i少能達成此功 能即可。 回授電路230可令節點電路V2C=V2A,如此一來, • 可令電流鏡21〇内之所有MOS電晶體(未顯示出)實質上 具有相同的汲極-源極電壓。因而,即使考量通道長度調 變效應,電流鏡210内之所有M〇s電晶體所產生的電流 實質上會彼此匹配。也就是,假設用於產生電流I2A,I2B 與I2C之MOS電晶體之尺寸皆相同,則I2a=I2b=I2c, 且電流I2A,I2B與I2C皆為溫度無關。 回授電路230比如包括操作放大器〇?22與]^〇8電 晶體M21。操作放大器〇P22的正負輸入端分別耦接至節 φ 點V2A與節點V2C,其輸出端則耦接至M〇s電晶體M21 之閘極。MOS電晶體M21之源極耦接至節點V2c與電 流鏡210 ’其閘極搞接至操作放大器〇p22的輸出端,其 汲極耦接至負载R2。 〃 圖3〜圖6顯示本實施例之數個例子,熟習此項技藝 者當知本發明並不受限於該些例子。圖3之能隙參考電 路包括·· MOS電晶體M31〜M33(其組成電流鏡);操作放 大态OP31 ;操作放大器〇p32與MOS電晶體M34(其組 成回授電路);數個電流元件(比如為BJT電晶體Q31與 8 200832099 P2006-004-TW-B 21217twf.doc/n Q32、電阻R31與R32 ;以及電阻R33。此外,電流元件 除了用BJT電晶體來實施外,也可用:二極體、運作於 次臨界區之金氧半電晶體或二極體連接方式N通道金氧 半電晶體(DTNMOS,diode turn-on NMOS)等來實施。 透過操作放大器OP31與OP32之負回授效應,使得 V3A-V3B=V3C。如此一來,MOS電晶體M31〜M33之没200832099 P2006-004-TW-B 21217twf.doc/n IX. Description of the invention: [Technical field of the invention] The present invention is an improved method of the _gap reference circuit, which can improve the energy gap reference electrical power supply repulsion (PSRR) and the electricity of the number of money. [Prior Art] "Digital analog converters (DACs), analog-to-digital converters (ADCs) or regulators require at least one fixed and stable reference voltage. 2. This reference voltage is best used each time the power is turned on. It can be stably regenerated. The reference voltage of the phase is preferably not affected by process variation, operating temperature variation, and g source variation. The bandgap reference circuit can be used to provide the voltage of the test. Therefore, in many In electronic systems, the bandgap reference circuit plays an important role because it determines the overall stability and accuracy of the system. In general, the bandgap reference circuit will include several main parts: electricity /; 丨 l mirror operation amplification State, bandgap current generator and load. Figure 1 shows the circuit diagram of the conventional bandgap reference circuit. This bandgap reference circuit includes: MOS transistor Mil~M13; operational amplifier 〇pl; BJT transistor Qii And (312, resistors R11 and R12 (which form the bandgap current generator); and resistor R13. The gap current generator of Figure 1 contains two current paths: IIA and I1B, I1A = I1B = I 11+I12.111 is the positive temperature coefficient (PTAT) current, and m is the negative temperature coefficient (CTAT) current. Therefore, ideally, I1A/I1B synthesized by I11+I12 can be regarded as temperature independent. In addition, since the operation of the current mirror, I1C>I1A=I1B, lie can also be regarded as temperature-independent current. Because Vref=i1C*r13, Vref can also be It is regarded as a temperature-independent voltage. However, when considering the channel length modulation effect of the MOS transistor, I1A-IIB^IIC. This is because the virtual ground effect (VIA^VIB) through the operational amplifier makes the M〇s transistor M11 and M12 have the same drain-source voltage. However, the other node voltage Vlc is not necessarily equal to V1A/Vm. As a result, the drain-source voltages of the MOS transistors Mil and VQ2 are not necessarily equal to the MOS transistor M13. The drain-source voltage; that is, VDSM11=VDSM1#VDSM13. The mismatch of this drain_source voltage is equivalent to the power supply and temperature, that is, the material does not (4) the repulsion and the temperature coefficient. It is better to have an improved technique of the energy gap reference circuit, which can improve, know, and shortcomings of the surgery. Poor temperature coefficient and pSRR characteristics. In addition, = is good, can be achieved without special circuit components, that is, can be realized in the standard CMOS process. [Invention] Therefore, the present invention provides an improvement of the energy gap reference circuit. Architecture, which can be used for general current-mode (gap) reference circuits. Further, the present invention provides a preferred Winlin-based PSRR of a bandgap reference circuit. ^Reading it can (4) The present invention further provides a circuit that can be used in the low-relationship of the low-relationship/(10) flap, the road d: 目 =; 明 proposed - the kind of energy can be used in the first and 200832099 P2006- 004-TW-B 21217twf.doc/n a second current path 経 first and second reference current; a current mirror, according to the first and second reference currents to generate a second dream current on the third current path ; - the first operational amplifier, pure to the second current path of the first disk - the first node voltage is dedicated to the second node voltage on the second current path; a feedback = the first And a third current path such that the first node U is dedicated to the third node voltage on the second current path; and the - Mai Khao load, touching the shout circuit to provide a reference invention The above and other objects and features of the present invention are described below with reference to the preferred embodiments of the present invention. [Embodiment] In the present MOSA example, in order to improve the voltage mismatch of the 亟 亟 亟 为 为 为 为 为 为 为 MOS MOS MOS MOS MOS MOS MOS MOS MOS MOS MOS MOS MOS MOS MOS MOS MOS MOS MOS MOS MOS MOS MOS MOS MOS MOS MOS MOS The sewing machine is finely pressed against each other. The circuit of the 源 源 源 降低 降低 降低 降低 降低 降低 降低 降低 降低 通道 通道 通道 通道 通道 通道 通道 通道 通道 通道 通道 通道 通道 通道 通道 通道 通道 通道 通道 通道 通道 通道 通道 通道 通道 通道 通道 通道 通道 通道 通道Refer to the second, ί road block diagram. The energy gap reference circuit includes: a current mirror 210, a 哉 哉 哉 1 " 〇Ρ 2 施 gap current generator 22G, and a feedback circuit 230 兴 R2. The sag current generator 220 is used to generate temperature independent current I2A and 200832099 P2006-004-TW-B 21217twf.doc/n I2B. Here, the structure of the band gap current generator 22() may not be particularly limited, and at least this function can be achieved. Operating the amplifier 〇p;21 allows the node voltage V2A = V2B. The current mirror 21G mirrors another temperature-independent current I2C according to the current generated by the band gap current generator 220, I2A and I2B. Similarly, in the case of Λ, the structure of the current mirror 210 is not particularly limited, and i can achieve this function. The feedback circuit 230 can cause the node circuit V2C = V2A, so that all of the MOS transistors (not shown) in the current mirror 21 can have substantially the same drain-source voltage. Thus, even if the channel length modulation effect is considered, the currents generated by all of the M?s transistors in the current mirror 210 substantially match each other. That is, assuming that the MOS transistors for generating the current I2A, I2B and I2C are the same size, then I2a = I2b = I2c, and the currents I2A, I2B and I2C are temperature independent. The feedback circuit 230 includes, for example, an operational amplifier 22 and a transistor M21. The positive and negative inputs of the operational amplifier 〇P22 are respectively coupled to the node φ point V2A and the node V2C, and the output end thereof is coupled to the gate of the M〇s transistor M21. The source of the MOS transistor M21 is coupled to the node V2c and the current mirror 210', and its gate is connected to the output of the operational amplifier 〇p22, and its drain is coupled to the load R2. 3 to 6 show several examples of the present embodiment, and those skilled in the art will recognize that the present invention is not limited to the examples. The bandgap reference circuit of FIG. 3 includes: MOS transistors M31 to M33 (which constitute a current mirror); an operational amplification state OP31; an operational amplifier 〇p32 and an MOS transistor M34 (which constitutes a feedback circuit); and a plurality of current elements ( For example, BJT transistor Q31 and 8 200832099 P2006-004-TW-B 21217twf.doc/n Q32, resistors R31 and R32; and resistor R33. In addition, the current component can be used in addition to the BJT transistor. The body, the gold-oxide semi-transistor operating in the sub-critical region or the diode-connected N-channel MOSFET (diode turn-on NMOS), etc. The negative feedback effect through the operational amplifiers OP31 and OP32 , making V3A-V3B=V3C. As a result, MOS transistors M31~M33 are not

極-源極電壓實質上會彼此相等。即使考量通道長度調變 效應’ M0S電晶體M31〜M33所產生之電流I3A/I3B/I3C • 也會彼此相等(假設M0S電晶體M31〜M33之尺寸皆相 等)。 圖4之能隙參考電路包括:厘⑽電晶體]^41〜从43(其 組成電流鏡);操作放大器〇P4i ; M0S電晶體M44與操 作放大器OP42(其組成回授電路);數個電流元件(比如為 BJT電晶體Q41/Q42 ;電阻R41/R42 ;以及負載R43。此 外,電流元件除了以BJT電晶體來實施外,也可用:二 極體、運作於次臨界區之金氧半電晶體或二極體連接方 ^ 式N通道金氧半電晶體等來實施。 圖5之能隙參考電路包括:M〇s電晶體其 組成電流鏡);操作放大器0P51 ;M〇s電晶體M55與操 • 作放大态〇P52(其组成回授電路);數個電流元件(比如為 BJT電晶體Q51〜Q53);電阻R51〜R55 ;以及負載R56。 此外,電流元件除了以BjT電晶體來實施外,也可用: 二極體、運作於次臨界區之金氧半電晶體或二極體連接 方式N通道金氡半電晶體等來實施。 圖6之能隙麥考電路包括:MOS電晶體M61〜M63(其 9 200832099 P2006-004-TW-B 21217twf.doc/n 組成電流鏡);操作放大器OP61 ; MOS電晶體M64與操 作放大器OP62(其組成回授電路);數個電流元件(比如為 MOS電晶體M65〜M66,其運作於次臨界區);電阻… R61〜R63 ;以及負載R64。此外,電流元件除了以運作於 次臨界區之MOS電晶體來實施外,也可利用:二極體、 BJT電晶體,或二極體連接方式n通道金氧半電晶體等 來實施。 'The pole-source voltages are substantially equal to each other. Even if the channel length modulation effect is considered, the current I3A/I3B/I3C generated by the M0S transistors M31 to M33 will be equal to each other (assuming that the sizes of the M0S transistors M31 to M33 are equal). The energy gap reference circuit of Figure 4 includes: PCT (10) transistor] ^ 41 ~ from 43 (which constitutes the current mirror); operating amplifier 〇 P4i; M0S transistor M44 and operational amplifier OP42 (which constitutes the feedback circuit); Components (such as BJT transistor Q41/Q42; resistor R41/R42; and load R43. In addition, the current component can be used in addition to BJT transistor: diode, gold oxide and semi-electricity operating in the subcritical region. The crystal or diode is connected to the N-channel MOS transistor, etc. The bandgap reference circuit of Figure 5 includes: M〇s transistor composed of current mirror); operational amplifier 0P51; M〇s transistor M55 And operation • Amplified state 52 P52 (which constitutes the feedback circuit); several current components (such as BJT transistor Q51~Q53); resistors R51~R55; and load R56. Further, the current element may be implemented by a BjT transistor, a diode, a MOS transistor operating in a subcritical region, or a diode-connected N-channel ytterbium semi-transistor. The energy gap circuit of Fig. 6 includes: MOS transistor M61~M63 (the 9 200832099 P2006-004-TW-B 21217twf.doc/n constitutes a current mirror); an operational amplifier OP61; a MOS transistor M64 and an operational amplifier OP62 ( It constitutes a feedback circuit); several current components (such as MOS transistors M65 to M66, which operate in the subcritical region); resistors... R61 to R63; and load R64. Further, the current element can be implemented by using a MOS transistor operating in a subcritical region, or a diode, a BJT transistor, or a diode-connected n-channel MOS transistor. '

為簡化起見,圖4〜圖6之詳細操作原理在此不再重 述,但習知此技者當可知透過圖4〜圖6之架構及圖2之 原理,以避免通道長度調變效應所導致之誤差。 為更加進一步證明本實施例所能產生之優點,發明 人列舉數個模擬的特徵曲線圖於圖7〜圖1〇。 圖7a與圖7b顯示習知技術(圖丨)與本實施例(圖3) 之參考電壓VREF對溫度之關係曲線圖。在圖%與圖% 中,五條曲線由上而下分別代表在不同電壓源 (VDD气0V、VDD吐卜彻=1 2V、聊心3與 VDD4.4V)下的關係曲線圖。請注意,由於在本實施例 中’在各種電壓源所得狀參考電壓皆非常相近,故而 在圖7b中不容易分辨出5條曲線。 、w ,知技術(圖1)與本實施例(圖3)在不同電壓源下的For the sake of brevity, the detailed operation principle of FIG. 4 to FIG. 6 will not be repeated here, but it is known to those skilled in the art that the structure of FIG. 4 to FIG. 6 and the principle of FIG. 2 can be known to avoid the channel length modulation effect. The resulting error. To further demonstrate the advantages that can be produced by this embodiment, the inventors have enumerated several simulated characteristic graphs in Figures 7 to 1A. 7a and 7b are graphs showing the relationship between the reference voltage VREF and the temperature of the prior art (Fig. 3) and the present embodiment (Fig. 3). In the graph % and graph %, the five curves represent the relationship between the different voltage sources (VDD gas 0V, VDD Tubu = 12V, Chat 3 and VDD4.4V) from top to bottom. Note that since the reference voltages obtained at various voltage sources are very similar in this embodiment, it is not easy to distinguish five curves in Fig. 7b. , w, the knowing technology (Fig. 1) and the present embodiment (Fig. 3) under different voltage sources

10 200832099 P2006-004-TW-B 21217twf.doc/n 圖8a〜圖8f顯示在不同電壓源下,習知技術(圖i) 與本實施例(圖3)之參考電壓VREF對溫度之關係曲線 圖。在圖8a〜圖8f中’符號PFNF代表pM〇s Fast丽〇810 200832099 P2006-004-TW-B 21217twf.doc/n Figures 8a to 8f show the relationship between the reference voltage VREF and the temperature of the prior art (Fig. i) and this embodiment (Fig. 3) under different voltage sources. Figure. In Figure 8a to Figure 8f, the symbol PFNF stands for pM〇s Fast Radisson 8

Fast,而 PTNT 則代表 PMOS Typical NMOS Typical,PSNS 則代表 PMOS Slow NMOS Slow。PFNF、PTNT 鱼 PSNS . 的意思為習知此技者所明瞭,於此不於詳述。 同樣地,在圖8a〜8f中,五條曲線由上而下分別代 表在不同電壓源下(VDD=1.0V、VDD=1.1、、 • VDD=1·3與VDD=1.4V)的關係曲線圖。請注意,由於在 本實施例中,各種電壓源所得到之參考電壓皆非常相 近’故而在圖8d〜8f中不容易分辨出5條曲線。 圖9a與圖9b顯示習知技術(圖1)與本實施例(圖3) 之參考電壓VREF對電壓源之關係曲線圖。在圖%與圖 9b中,五條曲線由上而下分別代表在不同模擬溫度下 (-40^,〇〇C,+25〇c,+85义與+125。〇)所得之關係曲線 圖。δ月庄思,由於在本實施例中,在不同電壓源所得到 之參考電壓皆非常相近,故而在圖9b中不容易分辨出5 • 條曲線。 習知技術(圖1)與本實施例(圖3)在不同溫度下的 jSRR係數比較表如下。 -----—K __L 溫度(cc) -40 -- 0 -- +25 +85 PSRR(%/y) 習知技 術(圖1) 12.44 8.19 6.81 4.63 3.44 —----- 本實施 例(圖3) 0.06 0.09 0.19 0.22 0.26 11 200832099 P2006-004-TW-B 21217twf.doc/n 圖10a〜圖而顯示在不同模擬溫度下,習知技術(圖 1)與本貝_(圖3)之參考電壓VR£F對電㈣之關係曲 線圖。 同樣地,在圖中,五條曲線由上而下分別 代表在不同模擬溫度下(_4〇〇c,〇〇c,+25〇c,+85〇c盥 +125^Q所得之關係曲線圖。請注意,在本實施例中,/於 各種核擬溫度下所制之參考輕时料目近,故而在 圖l〇d〜i〇f中不容易分辨出5條曲線。 d故而’本貫施例之優點在於,其可提供較佳溫度係數與 SRR特性,又可在低電訂操作且魅麟數 低。 此外’因為利用另一操作放大器來使得電流鏡中所 有MOS電晶體之汲極_源極電壓彼此實質相等,因而可 降低因為通道長度調變效應所帶的電路誤差。 雖然本發明已以較佳實施例揭露如上,然其並非用 以限定本發明,任何熟習此技藝者,在不脫縣發明之 精神和範圍内,當可作些許之更動與_,因此本發明 之保護範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 # 圖1顯示傳統能隙參考電路的電路圖。 圖2顯示根據本發明較佳實施例之能隙參考電路的 電路方塊圖。 / 圖3〜圖6顯示本發明實施例之數個例子。 圖7a與圖7b顯示習知技術(圖與本實施例(圖3) 之參考電壓VREF對溫度之關係曲線圖。 12 200832099 P2006-004-TW-B 21217twf.doc/n 圖8a〜圖8f顯示在不同電壓源下,習知技術(圖叫 本實施例(®取參考電壓VREF對溫度之_曲線圖。、 ® 9a與圖9b顯示習知技術(圖1)與本實施例(圖3) 之參考電壓VREF對電墨源之關係曲線圖。 圖l〇a〜圖10f顯示在不同模擬溫度下,習知技術(圖 1)與本貝施例(圖3)之芩考電壓VREF對電壓源之關係曲 線圖。 【主要元件符號說明】 φ M11 〜M13、M21、JVI31 〜M34、M41 〜M44、M51 〜M55、 M61〜M66 : MOS電晶體 OP1、OP21、OP22、OP31、OP32、OP41、OP42、OP51、 OP52、OP6卜OP62 :操作放大器 Q1 卜 Q12、Q3 卜 Q32、Q4卜 Q42、Q51 〜Q53 : BJT 電 曰触 日日體Fast, while PTNT stands for PMOS Typical NMOS Typical and PSNS stands for PMOS Slow NMOS Slow. The meaning of PFNF and PTNT fish PSNS. is known to those skilled in the art and will not be described in detail herein. Similarly, in Figures 8a to 8f, the five curves represent the relationship between different voltage sources (VDD = 1.0V, VDD = 1.1, • VDD = 1·3 and VDD = 1.4V) from top to bottom. . Note that since the reference voltages obtained by the various voltage sources are very close in this embodiment, it is not easy to distinguish five curves in Figs. 8d to 8f. Figures 9a and 9b are graphs showing the relationship between the reference voltage VREF and the voltage source of the prior art (Figure 1) and this embodiment (Figure 3). In Figure % and Figure 9b, the five curves represent the relationship between the top and bottom curves at different simulated temperatures (-40^, 〇〇C, +25〇c, +85 and +125.〇). Since the reference voltages obtained by different voltage sources are very similar in this embodiment, it is not easy to distinguish 5 curves in Fig. 9b. A comparison of the jSRR coefficients of the prior art (Fig. 1) and the present embodiment (Fig. 3) at different temperatures is as follows. ------K __L Temperature (cc) -40 -- 0 -- +25 +85 PSRR (%/y) Conventional Technology (Fig. 1) 12.44 8.19 6.81 4.63 3.44 —----- This embodiment (Fig. 3) 0.06 0.09 0.19 0.22 0.26 11 200832099 P2006-004-TW-B 21217twf.doc/n Figure 10a to Fig. 10 shows the conventional technology (Fig. 1) and Benbe _ (Fig. 3) at different simulated temperatures. The reference voltage VR£F vs. electricity (four) relationship diagram. Similarly, in the figure, the five curves represent the relationship between the top and bottom curves at different simulated temperatures (_4〇〇c, 〇〇c, +25〇c, +85〇c盥+125^Q). Please note that in this embodiment, the reference made at various nuclear temperatures is close to the light, so it is not easy to distinguish five curves in the graphs 〇d~i〇f. The advantage of the embodiment is that it can provide better temperature coefficient and SRR characteristics, and can be operated in low-spinning operation with low charm. In addition, because another operational amplifier is used to make the MOSFET of all MOS transistors in the current mirror The source voltages are substantially equal to each other, and thus the circuit error due to the channel length modulation effect can be reduced. Although the present invention has been disclosed in the preferred embodiments as above, it is not intended to limit the invention, and anyone skilled in the art, In the spirit and scope of the invention, the scope of protection of the present invention is subject to the definition of the scope of the appended patent application. [Simplified illustration] # Figure 1 shows Circuit diagram of a conventional bandgap reference circuit. A circuit block diagram of a bandgap reference circuit in accordance with a preferred embodiment of the present invention. / Figures 3 to 6 show several examples of embodiments of the present invention. Figures 7a and 7b show a conventional technique (Fig. 7 and Figure 7) Figure 3) A plot of the reference voltage VREF versus temperature. 12 200832099 P2006-004-TW-B 21217twf.doc/n Figures 8a to 8f show the conventional techniques under different voltage sources (this is called this embodiment ( ® takes the reference voltage VREF vs. temperature graph., ® 9a and Figure 9b show the relationship between the reference voltage VREF of the prior art (Fig. 1) and the present embodiment (Fig. 3) versus the ink source. a ~ Figure 10f shows the relationship between the reference voltage VREF and the voltage source of the conventional technique (Fig. 1) and the Benbe example (Fig. 3) at different simulated temperatures. [Main component symbol description] φ M11 ~ M13 , M21, JVI31 ~ M34, M41 ~ M44, M51 ~ M55, M61 ~ M66: MOS transistor OP1, OP21, OP22, OP31, OP32, OP41, OP42, OP51, OP52, OP6 BU OP62: Operational amplifier Q1 Bu Q12, Q3 Bu Q32, Q4 Bu Q42, Q51 ~ Q53 : BJT Electric Touching Japanese Body

Rl 1 〜R13、R2、R31 〜R33、R41 〜R43、R51 〜R56、R61 〜R64 : 電阻 210 :電流鏡 • 220 :能隙電流產生器 230 :回授電路 13Rl 1 to R13, R2, R31 to R33, R41 to R43, R51 to R56, R61 to R64: resistance 210: current mirror • 220: band gap current generator 230: feedback circuit 13

Claims (1)

200832099 P2006-004-TW-B 21217twf.doc/n 十、申請專利範園: 1.一種能隙參考電路,包括: -參考電流產生電路,在—第—電流路徑上產生一 第一參考電流; -電流鏡,根據該第—參考電流以在―第二電流路 徑上產生一第二參考電流;以及 回授包路,耦接至該第一與第二電流路徑,以令 該第一電流路徑上之H點電壓本質上等於該第二 Φ 電流路徑上之一第二節點電壓。 ^如中#專利|&圍第1項所述之能隙參考電路,更包 括麥考負載,触至該回授電路,以提供一參考電壓。 3·如申#專利圍第i項所述之 盆 產生電路更在-第三電細上產生-第三 麥考電流。 ^如中明專利|&圍第3項所述之能隙參考電路,更包 -作放Ail,具有:—正輸人端,祕至該第 徑;一負輸入端’搞接至該第一電流路徑,以 - 及一輸出端,輕接至該電流鏡。 5·”請專觀㈣2項所述之 該回授電路包括-第二操作放大器與-第4= 今第=1ί專利範圍第5項所述之㈣參考電路,其中 器具有:—正輸人端,輕接至該第-電 =Τ輸入端’耦接至該第二電流路徑,以及- 翰出%,耦接至該第一電晶體。 7.如申請專利範圍第6項所述之能隙參考電路,其中 200832099 P2006-004-TW-B 212I7twf.doc/n 該第一電晶體具有:-源極,祕至該第二電流路徑· 一閘極,耦接至該第二操作放大器之該輪出端,·以^二 汲極,耦接至該參考負载。 8·如申請專利範圍第1項所述之能隙參考 中該參考電流產生電路包含有: /、 至少一第一電流元件,耦接於該第一電流路徑,1 可於該第一電流路徑上傳導電流;以及 工/、200832099 P2006-004-TW-B 21217twf.doc/n X. Application for Patent Park: 1. A bandgap reference circuit comprising: - a reference current generating circuit for generating a first reference current in the -first current path; a current mirror, based on the first reference current to generate a second reference current on the second current path; and a feedback bypass coupled to the first and second current paths to cause the first current path The voltage at point H above is essentially equal to one of the second node voltages on the second Φ current path. ^如中#专利|& The bandgap reference circuit described in item 1 further includes a McCaw load that is touched to provide a reference voltage. 3. The pot generating circuit described in item # patent of the patent # is generated on the third electric fine - the third measuring current. ^ For example, the energy gap reference circuit described in the third paragraph of the patent | & surrounding the third item, for the Ail, has: - the positive input end, secret to the first diameter; a negative input end - engage to the The first current path is connected to the current mirror by - and an output terminal. 5·”Please refer to (4) The feedback circuit described in item 2 includes: - the second operational amplifier and the reference circuit of the fourth operation described in item 5 of the 4th patent today, wherein the device has: - a positive input The terminal is coupled to the second electrical current path, and coupled to the second current path, and coupled to the first transistor. 7. As described in claim 6 Bandgap reference circuit, wherein: 200832099 P2006-004-TW-B 212I7twf.doc/n the first transistor has: - a source, the second current path, a gate, coupled to the second operational amplifier The wheel current output terminal is coupled to the reference load by a diode. The current reference circuit of the energy gap reference according to claim 1 includes: /, at least one first a current component coupled to the first current path, 1 capable of conducting current on the first current path; and 至第二電流元件,耦接於該第二電流路徑,复 可於該第二電流路徑上傳導電流, /、 、其中,各該第一電流元件與該第二電流元件可從: ,載子接面電晶體、二極體、運作於次臨界區之金氧半 電晶體或二極體連接方式N通道金氧半電晶體中擇出。 9·一種能隙參考電路,包括: /电流路徑 一參考電流產生電路,在一第一與—第 上分別產生一第一與一第二參考電流; 一電流鏡’根據該第-與第二參考電流 電流路徑上產生一第三參考電流; 矛— / 一第-操作放大器’輕接至該第一與第二電流路 二二令=一電流路徑上之-第-節點電壓本質上等 於5亥弟二路徑上之一第二節點電壓;以及 卜1二操作放大器,輕接至該第一與第三電流路 點電歷本質上等於該第三電流路徑上 項一 = 參二其 15 200832099 F2UU6-U〇4-TW-B 21217twf.doc/n 二電流路徑;一負輸入端,耦接至該第一電流路徑,以 及一輸出端,耦接至該電流鏡。 11·如申请專利範圍第9項所述之能隙參考電路,其 中該第二操作放大器具有:一正輸入端,耦接至該第二 電流路徑;一負輸入端,耦接至該第三電流路徑,以及 一輸出端。 12·如申請專利範圍第n項所述之能隙參考電路,更The second current component is coupled to the second current path, and the current is conducted on the second current path, wherein each of the first current component and the second current component can be: The junction transistor, the diode, the gold oxide semi-transistor operating in the subcritical region or the diode-connected N-channel MOS transistor is selected. 9. A bandgap reference circuit comprising: /current path-reference current generating circuit, respectively generating a first and a second reference current on a first and a first; a current mirror 'according to the first and second A third reference current is generated on the reference current-current path; the spear-/one-operating amplifier' is lightly connected to the first and second current paths, and the second-stage voltage is substantially equal to 5 One of the second node voltages on the path of the two brothers; and the operational amplifier of the first two and third currents are electrically connected to the first current and the third current path. The electrical history is essentially equal to the first current path of the first one = the second of its 15 200832099 F2UU6-U〇4-TW-B 21217twf.doc/n Two current paths; a negative input terminal coupled to the first current path, and an output terminal coupled to the current mirror. The gap amplifier reference circuit of claim 9, wherein the second operational amplifier has a positive input coupled to the second current path, and a negative input coupled to the third Current path, and an output. 12·If the energy gap reference circuit mentioned in item n of the patent application scope, ^括一第一電晶體,其具有:一源極,耦接至該第三電 流路徑;一閘極,耦接至該第二操作放大器之該輸出端; 以及一沒極。 13. 如申請專利範圍第12項所述之能隙參考電路,更 包括一參考負載,耦接至該第一電晶體之該汲極。 14. 如申請專利範圍第9項所述之能隙參考電路,直 中該參考電流產生電路包含有: ,、 ~r上:第一電流兀件,耦接於該第一電流路徑,其 ^ 一Ϊ流路徑上傳導電流;以及 —第二電流元件,耦接於該第二電流路徑,其 可於=二電流路徑上傳導電流, 雔恭2 ’各該第—電流元件與該第二電流元件可從: J曰2面電晶體、二極體、運作於次臨界區之金氧半 日日或—極體連接方式N通道金氧半電晶體中擇出。 b·—種能隙參考電路,包括. 上產產第生電,在-第-與-第二電流路徑 —土 弟—參考電流; 電做鏡,根據該第—與第二參考電流以在第三電 16 200832099 F20U6-U〇4-TW-B 21217twf.doc/n 流路徑上產生一第三參考電流; 一第一操作放大器,耦接至該第一與第二電流路 徑’以令該第一電流路徑上之一第一節點電壓本質上等 於該第二電流路徑上之一第二節點電壓; 一回授電路,耦接至該第一與第三電流路徑,以令 該第一節點電壓本質上等於該第三電流路徑上之一第三 節點電壓;以及 一茶考負載,耦接至該回授電路,以提供一參考電The first transistor has a first source coupled to the third current path, a gate coupled to the output of the second operational amplifier, and a gate. 13. The bandgap reference circuit of claim 12, further comprising a reference load coupled to the drain of the first transistor. 14. The gap current reference circuit of claim 9, wherein the reference current generating circuit comprises: , , and a first current component coupled to the first current path, wherein Conducting a current on a turbulent path; and - a second current component coupled to the second current path, the current being conducted on the = two current path, the second current element and the second current The components can be selected from: J曰2 surface transistors, diodes, gold oxide half-days operating in the subcritical region, or N-channel MOS transistors. b·—the energy gap reference circuit, including: the upper generation of the electricity generation, the in-first-and-second current path-the soil-reference current; the electric mirror, according to the first-and second reference current The third power 16 200832099 F20U6-U〇4-TW-B 21217twf.doc/n generates a third reference current in the flow path; a first operational amplifier coupled to the first and second current paths 'to One of the first node voltages on the first current path is substantially equal to one of the second node voltages on the second current path; a feedback circuit coupled to the first and third current paths to cause the first node The voltage is substantially equal to one of the third node voltages on the third current path; and a tea test load coupled to the feedback circuit to provide a reference power 壓。 16·如申請專利範圍第15項所述之能隙參考電路,其 亥第一操作放大器具有:一正輸入端,耦接至該第二 電流路徑;一負輸入端,耦接至該第一電流路徑,以及 一輸出端’輕接至該電流鏡。 17·如申請專利範圍第15項所述之能隙參考電路,其 中該回授電路包括—第二操作放大器與—第一電晶體。 18.如申請專利範圍第17項所述之能隙參考電路,其 2第:ί操作放大器具有:—正輸人端,_至該第一 包流路技;H端’雛至該第三電流路徑,以及 輸出,|馬接至該第一電晶體。 ^9.如申睛專利範圍第18項所述之能隙參考電路, 二S'1晶體具有:—源極,祕至該第三電流路徑 :=以作放大器之該輸出端;以及- 17 200832099 rzuuo-u04-TW-B 21217twf.doc/n 至少一第一電流元件,耦接於該第〜電流路徑,其 可於該第一電流路徑上傳導電流;以及 Μ 工 ” 至少-第二電流元件,耦接於該第 ,立 可於該第二電流路徑上傳導電流, 笔抓路仫,、 其中,各該第-電流元件與該第 冗=晶體、二極體、運作於次二半 ㈣體或二極體連接方式Ν通道金氧半電晶體中擇出二Pressure. 16) The energy gap reference circuit of claim 15, wherein the first operational amplifier has a positive input terminal coupled to the second current path, and a negative input terminal coupled to the first The current path, as well as an output terminal, is connected to the current mirror. 17. The bandgap reference circuit of claim 15, wherein the feedback circuit comprises a second operational amplifier and a first transistor. 18. The gap reference circuit of claim 17, wherein the 2: ί operational amplifier has: - a positive input terminal, _ to the first package flow path technology; and a H end 'from the first to the third The current path, as well as the output, is connected to the first transistor. ^9. The energy gap reference circuit of claim 18, wherein the two S'1 crystals have: a source, a secret to the third current path: = as the output of the amplifier; and - 17 200832099 rzuuo-u04-TW-B 21217twf.doc/n at least a first current component coupled to the first current path, the current can be conducted on the first current path; and the at least one second current The component is coupled to the first electrode to conduct current on the second current path, and the pen grasping path, wherein each of the first current element and the second redundant crystal, the diode, and the second half (4) The connection mode of the body or the diode is selected in the channel MOS semi-transistor
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI449326B (en) * 2010-02-25 2014-08-11 Sharp Kk Bias circuit, LNA, LNB, communication receiver, communication transmitter and sensing system
CN108345336A (en) * 2017-01-23 2018-07-31 晶豪科技股份有限公司 Energy-gap reference circuit

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI426371B (en) * 2011-03-30 2014-02-11 Global Unichip Corp Bandgap reference circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI449326B (en) * 2010-02-25 2014-08-11 Sharp Kk Bias circuit, LNA, LNB, communication receiver, communication transmitter and sensing system
CN108345336A (en) * 2017-01-23 2018-07-31 晶豪科技股份有限公司 Energy-gap reference circuit

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