200825596 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種像素陣列模組及顯示裝置，特別關 於一種能夠適用於拼接式顯示的像素陣列模組及平面顯 示裝置。 【先前技術】 顯示技術的發展使得人們能夠輕易地由顯示裝置接 收各種不同的資訊，也因此豐富了人們的生活，亦加速了 資訊的傳遞速度。 請參照圖1A所示，一般的平面顯示裝置1主要係包 括一基板11、一像素陣列12、一驅動迴路13及一光電顯 示單元14。其中驅動迴路13具有一資料線驅動迴路131 及一掃瞄線驅動迴路132,而光電顯示單元14具有一與像 素陣列12相對而設的對向電極，以及設置於對向電極與 像素陣列12之間的光電顯示元件。 驅動迴路13係與像素陣列12電性連接，以控制像素 陣列12與對向電極之間的電壓來驅動光電顯示單元14以 使其顯示影像。而為了能夠將驅動迴路13與像素電極陣 列電性連接，一般而言，會在基板11上除了設置像素陣 列12之外，另預留一空間（如圖1A中之斜線部分）以方 便驅動迴路13與像素陣列12電性連接。 請參照圖1B所示，近來亦有業者直接將至少一資料 線驅動晶片21及至少一掃瞄線驅動晶片22設置 5 200825596 (biding)於基板η之預留空間（如圖1B中之斜線部 分）上，使得資料線驅動晶片21及掃晦線驅動晶片22能 夠與像素陣列12電性連接。 然而，上述之兩㈣樣，由於其需要有預留空間以連 接驅動迴路或設置驅動晶片，換言之，基板將無法完全作 為顯示面使用’因此當應用於大尺寸的顯示裝置時，皇益 法利用小尺寸的基板拼接而成。而直接製作大尺寸的基i φ將需要投入更多的製程設備，且每當有新的尺寸需求時， 則需要不同的製程設備來因應，實是相當不實惠且乾費成 本的作法。因此，如何提供一種能夠適用於拼接式的像素 陣列模組及平面顯示裝置，實屬當前重要課題之一。 【發明内容】 冑鑑於上賴題，本發明之目的為提供—種能夠完全 使用顯示面，且適用於拼接式的像素陣列模組及平面顯示 • 裝置。 /緣是，為達上述目的，依據本發明之一種像素陣列模 、 組係包括一基板、一像素電極陣列、一圖案化導電層以及 •—半導體電路單元。基板具有-第-表面及與第—表面相 對而設之一第二表面；像素電極陣列係設置於基板之第一 表面；圖案化導電層設置於基板之第二表面，且圖案化導 電層與像素電極陣列電性連接；半導體電路單元係具有至 少一輸入端及至少一與圖案化導電層電性連接之輪出端。 另外，為達上述目的，依據本發明之一種平面顯示裝 200825596 置，其係具有複數個像素陣 包括-基板、-像素電極陣列、、:==陣列模組係 導體電路單元。基板係 層以及-半 而設之— #表面及與第—表面相對 面祕陣列係設置於基板之第-表 面，圖案化導電層係設置於基板之 電層係與像素電極陣列電性連接;轉體:路:圖= 承案化導電層電性連接輪出端。 顯亍賴本發日狀—種像轉龍組及平面 ，係將像素電極陣列與圖案化導電層分別設置於 面，以使得基板的其中之—表面㈣完全作為顯 不面之用，因此當其應用於拼接式 最佳的影像表現。 接U不裝料，能狗得到 【實施方式】 一以下將參照相關圖式，說明依據本發明較佳實施例之 一種像素陣列模組及平面顯示裝置。 請參照圖2所示，依據本發明較佳實施例之一種像素 安歹]模組3係包括一基板31、一像素電極陣列.32、一圖 案化導電層33以及一半導體電路單元34。 基板31具有一第一表面311及一第二表面312，且第 表面311及第二表面312係相對而設。其中，基板31 係為一印刷電路板（printed circuit board，PCB)或一軟性 電路板（flexible printed circuit，FPC)，於本實施例中基板 31係以雙面印刷電路板為例，當然其亦可為一多層印刷電 7 200825596 路板。 像素電極陣列32係設置於基板31之第一表面311 上，其係由複數個電極以陣列排列設置於基板31之第/ 表面311。於本實施例中，像素電極陣列32之材質係為導 電材料，其可為金屬或例如為銦錫氧化物的透明導電材， 於此並不加以限制。 圖案化導電層33係設置於基板31之第二表面312 _ 上’且圖案化導電層33係透過基板31而與像素電極陣列 32電性連接。於此，像素陣列模組3更包括一辅助圖案化 導電層35，其係設置於基板31之第一表面311及第二表 面312之間，並分別與像素電極陣列32及圖案化導電層 33電性連接。於本實施例中，辅助圖案化導電層35係玎 設置於基板31之一貫孔之中。需注意者，無論基板31係 為雙層板或多層板，設置於基板31之第一表面311及第 一表面312之間用以電性連接像素電極陣列32及圖案化 • 導電層33之導電線皆可稱之為辅助圖案化導電層35。 半導體電路單元34係設置於基板η之第二表面 _ 312，且半導體電路單元34具有至少一輸入端341及至少 . 一輪出端342 ’其中輸出端342係與圖案化導電層33電性 連接。於本實施例中，半導體電路單元34例如係為一多 工器（MUX)，其係可為一晶片（chip)。當然，半導體電 路單元34亦可由-例如為玻填基板之透明基板及一集積 迴路（integrateddrcuit)所構成。其中集積迴路係直接形 成於透明基板之-表面上，且集積㈣係與圖案化導電層 200825596 33相對設置並與其電性連接。 明參照圖3所示，像素陣列模組3更< 包括一軟性電 路板36，其係與半導體電路單元34之輸入端341電性連 接。於本實施例中，軟性電路板36係透過部分之圖案化 . &電層33而與半導體電路單元34之輸入端341電性連 接。於此，軟性電路板36係將至少一驅動訊號輸入至例 如為多工器之半導體電路單元34，再由半導體電路單元 ⑩34將驅動訊號分職由_化導電層33而傳輸至像素電 極陣列32。 值传注意的是 …卞等體電路單元从亦可以些微位 33 .(Wt 如此一、^單元％係有部分突出於墓板3: 路單之輪入=136係可直接電性連接於半導體‘ 包含:ft:::: ;7:本實施例中，像素陣列模組3 i 對向電極單：=Γ光電顯示單元38。 中，對向電極單元37r〜像素電極陣列32相對而設，肩 由於對向電極單元37^可為—電極層或—電極板。另外， 化物、鋁鋅氧化物因此其材質可為銦錫氧 光電顯示單元38= 或鶴錫氧化物。。 極陣列32之門。糸°又置於對向電極單元37與像素電 需而以—光4一:、_中，光電顯示單元％可以依照設計所 本實施例I 或二光電顯示薄旗的形式呈現。於 先電顯不早元38係可包括一電泳性 200825596 (electrophoresis )材料或一電濕性（electrowetting )材料。 另外’於本貫施例中’光黾顯示單元3 8的尺寸係約等於 基板31的尺寸，因此，基板31之第一表面311能夠完全 作為顯示面之用。 請參照圖5所示’本發明之另一種像素陣列模組4係 包括一基板41、一像素電極陣列42、一圖案化導電層43、 一半導體電路單元44以及一辅助圖案化導電層45。其中 # 基板41、像素電極陣列42、圖案化導電層43以及辅助圖 案化導電層45係與上述實施例中之基板31、像素電極陣 列32、圖案化導電層33以及輔助圖案化導電層％具有相 同結構、連結關係及功效，故於此不再贅述。 而與上述賞施例不同的是，半導體電路單元44係包 括一薄膜441及一晶片442,其係以晶粒軟膜技術&叫⑽ 胞，COF)將晶片442設置於薄膜441上，且晶片⑽係 藉由薄膜441而與圖案化導電層43電性連接。其中，晶 籲# 442之態樣亦可為由-例如為破璃基板之透明基板及一 集積迴路所構成。其中集積迫路係直接形成於透明基板之 • 一表面上，再藉由薄膜44!而與圖案化導電層43電性連 接。 以下’請參照圖6A及圖6B所示，以說明本發明較佳 ^例之平面顯示裝Ϊ，其·本發明之像素陣列模組為 之設：，為便於敘述’故像素陣列模組之相關編號將 用上34貫施例（如圖2至圖4所示）之編號。 本發明較佳實施例之平面顯示裝置5係具有複數個像 200825596 素陣列模組3’其中，該等像素陣列模組係為並列設置（如 圖6A所示）或係為陣列設置（如圖6B所示）。當然，單 一組像素陣列模組3亦可構成平面顯示裝置，於此並不加 以限定其數量。 值得一提的是，平面顯示裝置5並不限定為一般監視 器或電視用之顯示裝置，其亦可為—戶外顯示看板。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pixel array module and a display device, and more particularly to a pixel array module and a flat display device that can be applied to a spliced display. [Prior Art] The development of display technology has enabled people to easily receive various kinds of information from display devices, thereby enriching people's lives and speeding up the transmission of information. Referring to FIG. 1A, a general flat display device 1 mainly includes a substrate 11, a pixel array 12, a driving circuit 13, and a photoelectric display unit 14. The driving circuit 13 has a data line driving circuit 131 and a scanning line driving circuit 132, and the photoelectric display unit 14 has a counter electrode disposed opposite to the pixel array 12, and is disposed between the opposite electrode and the pixel array 12. Photoelectric display elements. The drive circuit 13 is electrically connected to the pixel array 12 to control the voltage between the pixel array 12 and the counter electrode to drive the optoelectronic display unit 14 to display an image. In order to electrically connect the driving circuit 13 and the pixel electrode array, in general, in addition to the pixel array 12, a space (such as a diagonal line in FIG. 1A) is reserved on the substrate 11 to facilitate the driving circuit. 13 is electrically connected to the pixel array 12. Referring to FIG. 1B, recently, at least one data line driving chip 21 and at least one scanning line driving chip 22 are directly disposed in the reserved space of the substrate η (as shown by the oblique line in FIG. 1B). The data line driving chip 21 and the broom line driving chip 22 can be electrically connected to the pixel array 12. However, in the above two (four), since it requires a reserved space to connect the drive circuit or to set the drive chip, in other words, the substrate cannot be completely used as the display surface. Therefore, when applied to a large-sized display device, Huang Yifa utilizes Small-sized substrates are spliced together. Direct production of large-sized base i φ will require more process equipment, and whenever there is a new size requirement, different process equipment is required to respond, which is quite uneconomical and cost-effective. Therefore, how to provide a pixel array module and a flat display device which can be applied to a splicing type is one of the current important topics. SUMMARY OF THE INVENTION In view of the above problems, an object of the present invention is to provide a pixel array module and a flat display device which are capable of fully using a display surface and are suitable for splicing. In order to achieve the above object, a pixel array module and assembly according to the present invention comprises a substrate, a pixel electrode array, a patterned conductive layer, and a semiconductor circuit unit. The substrate has a first surface and a second surface opposite to the first surface; the pixel electrode array is disposed on the first surface of the substrate; the patterned conductive layer is disposed on the second surface of the substrate, and the patterned conductive layer is The pixel electrode array is electrically connected; the semiconductor circuit unit has at least one input end and at least one wheel end electrically connected to the patterned conductive layer. In addition, in order to achieve the above object, a flat display device 200825596 according to the present invention has a plurality of pixel arrays including a substrate, a pixel electrode array, and a == array module conductor circuit unit. The substrate layer and the semi-surface layer are disposed on the first surface of the substrate, and the patterned conductive layer is electrically connected to the pixel electrode array. Swivel: Road: Figure = The conductive layer of the substrate is electrically connected to the wheel end. It is obvious that the surface of the hair is the same as that of the dragon-shaped group and the plane, and the pixel electrode array and the patterned conductive layer are respectively disposed on the surface, so that the surface-surface (4) of the substrate is completely used as a surface, so when it is applied The best image performance in splicing. The U is not charged, and the dog can be obtained. [Embodiment] A pixel array module and a flat display device according to a preferred embodiment of the present invention will be described below with reference to the related drawings. Referring to FIG. 2, a pixel mounting module 3 according to a preferred embodiment of the present invention includes a substrate 31, a pixel electrode array .32, a patterned conductive layer 33, and a semiconductor circuit unit 34. The substrate 31 has a first surface 311 and a second surface 312, and the first surface 311 and the second surface 312 are opposite to each other. The substrate 31 is a printed circuit board (PCB) or a flexible printed circuit (FPC). In the embodiment, the substrate 31 is a double-sided printed circuit board. Can be a multi-layer printed electricity 7 200825596 road board. The pixel electrode array 32 is disposed on the first surface 311 of the substrate 31, and is disposed on the first surface 311 of the substrate 31 in an array by a plurality of electrodes. In this embodiment, the material of the pixel electrode array 32 is a conductive material, which may be a metal or a transparent conductive material such as indium tin oxide, which is not limited herein. The patterned conductive layer 33 is disposed on the second surface 312_ of the substrate 31 and the patterned conductive layer 33 is electrically connected to the pixel electrode array 32 through the substrate 31. The pixel array module 3 further includes an auxiliary patterned conductive layer 35 disposed between the first surface 311 and the second surface 312 of the substrate 31 and respectively connected to the pixel electrode array 32 and the patterned conductive layer 33. Electrical connection. In the present embodiment, the auxiliary patterned conductive layer 35 is disposed in the uniform holes of the substrate 31. It should be noted that the substrate 31 is a two-layer board or a multi-layer board, and is disposed between the first surface 311 of the substrate 31 and the first surface 312 for electrically connecting the pixel electrode array 32 and the patterned conductive layer 33. The lines can all be referred to as auxiliary patterned conductive layers 35. The semiconductor circuit unit 34 is disposed on the second surface _ 312 of the substrate η, and the semiconductor circuit unit 34 has at least one input end 341 and at least one round end 342 ′, wherein the output end 342 is electrically connected to the patterned conductive layer 33. In the present embodiment, the semiconductor circuit unit 34 is, for example, a multi-tool (MUX), which may be a chip. Of course, the semiconductor circuit unit 34 can also be composed of, for example, a transparent substrate filled with a glass substrate and an integrated circuit. The accumulation circuit is directly formed on the surface of the transparent substrate, and the accumulation (4) is opposite to and electrically connected to the patterned conductive layer 200825596 33. Referring to FIG. 3, the pixel array module 3 further includes a flexible circuit board 36 electrically connected to the input terminal 341 of the semiconductor circuit unit 34. In the present embodiment, the flexible circuit board 36 is electrically connected to the input terminal 341 of the semiconductor circuit unit 34 by a portion of the patterned & electrical layer 33. Here, the flexible circuit board 36 inputs at least one driving signal to the semiconductor circuit unit 34, which is, for example, a multiplexer, and then the semiconductor circuit unit 1034 divides the driving signal from the conductive layer 33 to the pixel electrode array 32. . The value of the signal is that the 卞 电路 电路 电路 电路 从 ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( Included: ft::::; 7: In this embodiment, the pixel array module 3 i is opposite to the electrode: = Γ photoelectric display unit 38. In the middle, the opposite electrode unit 37r to the pixel electrode array 32 are oppositely disposed, The shoulder may be an electrode layer or an electrode plate due to the opposite electrode unit 37. In addition, the material, the aluminum zinc oxide may be made of indium tin oxide photo-electric display unit 38= or a tin-tin oxide. The gate 又° is again placed in the opposite electrode unit 37 and the pixel is required to be in the form of the light 4:, _, and the photoelectric display unit % can be presented in the form of the design embodiment I or the second photoelectric display thin flag. The electro-optical display system 38 may include an electrophoretic 200825596 (electrophoresis) material or an electrowetting material. In addition, in the present embodiment, the size of the pupil display unit 38 is approximately equal to the substrate 31. Dimensions, therefore, the first surface 311 of the substrate 31 can be completely Referring to FIG. 5, another pixel array module 4 of the present invention includes a substrate 41, a pixel electrode array 42, a patterned conductive layer 43, a semiconductor circuit unit 44, and an auxiliary pattern. The conductive layer 45. The # substrate 41, the pixel electrode array 42, the patterned conductive layer 43, and the auxiliary patterned conductive layer 45 are the substrate 31, the pixel electrode array 32, the patterned conductive layer 33, and the auxiliary pattern in the above embodiment. The conductive layer % has the same structure, connection relationship and efficacy, and therefore will not be described again. However, unlike the above-mentioned embodiment, the semiconductor circuit unit 44 includes a film 441 and a wafer 442 which is formed by a grain soft film. The technique & (10) cell, COF) is disposed on the film 441, and the wafer (10) is electrically connected to the patterned conductive layer 43 by the film 441. Among them, the form of Jingyu #442 may also be composed of a transparent substrate such as a glass substrate and an accumulation circuit. The integrated forced path is formed directly on a surface of the transparent substrate, and is electrically connected to the patterned conductive layer 43 by the film 44!. Please refer to FIG. 6A and FIG. 6B for illustrating a planar display device according to a preferred embodiment of the present invention. The pixel array module of the present invention is provided for the purpose of describing the pixel array module. The relevant number will be numbered using the 34 examples (as shown in Figures 2 to 4). The flat display device 5 of the preferred embodiment of the present invention has a plurality of images of the 200825596 pixel array module 3', wherein the pixel array modules are arranged side by side (as shown in FIG. 6A) or arrayed (as shown in the figure). 6B)). Of course, a single set of pixel array modules 3 can also constitute a flat display device, and the number thereof is not limited thereto. It is worth mentioning that the flat display device 5 is not limited to a general monitor or a display device for a television, and may be an outdoor display kanban.
如圖6A與圖6B所示’由於像素陣列模組3之基板 31的尺寸約等於光電顯示單元38 @尺寸，因此，不論其 係以並列設置或陣列設置，皆可使顯示面緊密的接合，而 達到最佳的影像顯示效果。 一‘上所述’因依據本發明之—種像素陣賴組及平面 顯示裝置’係將像素電極陣列與圖案化導電層分別設置於 基板之兩面，以使縣板的其中之—表面得以完全作為顯 3 = 2此备其應用於拼接式顯示裝置時，能夠得到 取佳的影像表現。 太二上僅!舉例性，而非為限制性者。任何未脫離 應包含於後附之中請專二t之纽修改或變更’均 【圖式簡單說明】 =圖：：顯示習知的平面顯示裝置之示意圖; 為依據本發明較佳實施例之-種像辛陣列模 組之一剖面示意圖； m诼京P旱列杈 圖 為…員示依據本發明較佳實施例之一 種像素陣列模 11 200825596 組包括一軟性電路板之一剖面示意圖； 圖4為顯示依據本發明較佳實施例之一種像素陣列模 組包括一對向電極及一光電顯示單元之一示意圖； 圖5為顯示依據本發明較佳實施例之另一種像素陣列 模組之一剖面示意圖；以及 圖6A及圖6B為顯示依據本發明較佳實施例之一種平 面顯示裝置之示意圖。 元件符號說明： I :平面顯示裝置 II :基板 12 :像素陣列 13 :驅動迴路 131 :資料線驅動迴路 132 :掃瞄線驅動迴路 • 14 :光電顯示單元 21 .貢料線驅動晶片 * 22 ·掃猫線驅動晶片 3、4 :像素陣列模組 31、41 :基板 311 :第一表面 312 ··第二表面 .32、42 :像素電極陣列 33、43 :圖案化導電層 12 200825596 34、 44 :半導體電路單元 341 :输入端 342 :输出端 35、 45 :辅助圖:案化導電層 36 :軟性電路板 37 :對向電極單元 38 :光電顯示單元 441 :薄膜 442 :晶片As shown in FIG. 6A and FIG. 6B, since the size of the substrate 31 of the pixel array module 3 is approximately equal to the size of the photoelectric display unit 38 @, the display surface can be tightly bonded regardless of whether it is arranged in parallel or in an array. And achieve the best image display. According to the present invention, a pixel array and a planar display device are disposed on both sides of a substrate, so that the surface of the county plate is completely completed. As the display 3 = 2, when it is applied to the spliced display device, it can obtain better image performance. On the second is only an example, not a limitation. Any modification or change that should be included in the attachment, please refer to the following: a schematic diagram showing a conventional flat display device; in accordance with a preferred embodiment of the present invention - a schematic diagram of a cross-sectional view of a sinusoidal array module; a pixel array module 11 according to a preferred embodiment of the present invention; 200825596 includes a schematic cross-sectional view of a flexible circuit board; 4 is a schematic diagram showing a pixel array module according to a preferred embodiment of the present invention including a pair of electrodes and an optoelectronic display unit; FIG. 5 is a diagram showing another pixel array module according to a preferred embodiment of the present invention. FIG. 6A and FIG. 6B are schematic diagrams showing a flat display device in accordance with a preferred embodiment of the present invention. Description of component symbols: I: Flat display device II: Substrate 12: Pixel array 13: Drive circuit 131: Data line drive circuit 132: Scan line drive circuit • 14: Photoelectric display unit 21. Gourmet line drive wafer* 22 • Sweep Cat line driver chip 3, 4: pixel array module 31, 41: substrate 311: first surface 312 · second surface. 32, 42: pixel electrode array 33, 43: patterned conductive layer 12 200825596 34, 44: Semiconductor circuit unit 341: input terminal 342: output terminal 35, 45: auxiliary drawing: cased conductive layer 36: flexible circuit board 37: opposite electrode unit 38: photoelectric display unit 441: film 442: wafer