TW200820612A - Power-on reset circuits - Google Patents

Abstract

Power-on reset circuits are disclosed. A first reset circuit includes a first comparator to output a system reset signal, and a second reset circuit outputs a first reset signal to control operations of the first comparator, such that the first reset circuit outputs the system reset signal when a first voltage is less than a first reference voltage.

Description

200820612 IX. Description of the Invention: [Technical Field] The present invention relates to a power supply start reset circuit, and more particularly to a power supply start reset circuit having two reset circuits connected in series.

I [Prior Art]: The power-on reset (p0wer_〇n reset; p〇R) circuit is typically used in semiconductor devices to avoid malfunctions when a supply voltage is supplied to the semiconductor device. When the semiconductor device operates on a power supply voltage that has not reached an appropriate voltage level, an incorrect action port may be generated. This reset k number (RESET) is used to reset the power supply voltage but has not yet reached a predetermined voltage level. The semiconductor circuit does not reset the semiconductor device after the power supply voltage reaches a predetermined voltage level. SUMMARY OF THE INVENTION The present invention provides a power supply start reset circuit including a first reset circuit including a first comparator for outputting a system reset signal and a second reset circuit for outputting a The first reset signal, = then controls the action of the -4th circuit, so that the first-reset circuit: when the first-voltage is less than - the first reference, the semaphore resets the signal. The invention also provides a power supply start reset circuit, comprising a first reset circuit for outputting a first-reset signal when the partial voltage of the power supply voltage is less than - the first table; and - the second The reset circuit, the younger-reset circuit is connected in series. The first-comparator is controlled by the first reset signal to output a system reset signal to reset an external 0758-A32570TWF; MTKI-06 -.387;demis 5 200820612 Part of the circuit The present invention also provides a power supply start reset circuit, comprising a first set circuit comprising a first comparator having a first input terminal | horse connected to the first reference voltage, The second input end is coupled to a first node, wherein the t-output terminal is used to rotate a first reset signal; and the second reset circuit is configured to include a second comparator having a second input end coupling Connected to a first kite voltage, a second input coupled to a second node, and an input for outputting a system reset signal, wherein the first comparator is programmed to Two comparators. The present invention also provides a power supply start reset circuit, including a first reset circuit, including a first voltage supply unit for providing a first::: voltage; and a first comparator, including a first An input terminal is coupled to the i-test, the first input is connected to a first resistor string = a first node, and an output terminal is used to output a first reset signal 'the first resistor string The second reset circuit of the power supply voltage and the ground voltage includes a second voltage supply unit for providing a second reference voltage and a second one of the second and second resistor strings. Pure to the second reference voltage, - second input wheel =

Section I and one round of the round end are used to rotate the -: reset signal 'where the output of the first comparator is tied to =:, or the second comparator - the power supply or the second comparator is also provided - an initial method of resetting an electric ship, including by means of a circuit, when -the first - the first - reference electric, 〇 758-A32570TWF; MTKI-06-387; dennis 6 200820612 And resetting the signal to a second reset circuit; and outputting a system reset signal according to the first reset signal by one of the second reset circuits. The above and other objects, features and advantages of the present invention will become more <RTIgt; It is a schematic diagram of the power start reset circuit of the present invention. As shown, the power start reset circuit 10 includes two series connected to the reset circuits 2 and 4, wherein the reset circuit 2 is used to lower the voltage VI (determined by voltage division by the power supply voltage Vdd). When the voltage Vgs is referenced, a reset signal RS1 is output, and the reset circuit 4 outputs a system reset signal Sreset to an external circuit (not shown) when the voltage V2 is lower than the reference voltage Vbg. For example, the reference voltage Vgs is a threshold voltage of a MOS transistor M1 and smaller than the reference voltage Vbg. * It is to be noted that the reset signal RS1 from the reset circuit 2 controls the operation of the comparator COM2 in the reset circuit 4 when the voltage VI is smaller than the reference voltage Vgs. When the voltage VI exceeds the reference voltage Vbg, the reset circuit 2 stops outputting the reset signal RS1, and then the reset circuit 4 is based on the voltage V2 (determined by voltage division by the power supply voltage Vdd) and the reference voltage Vbg, and the output system is heavy. For example, if the voltage V2 is less than the reference voltage Vbg, the comparator COM2 will continue to output the system reset signal Sreset, and when the voltage V2 is equal to (meet) reference voltage Vbg 0758-A32570TWF; MTKI-06- 387;dennis 7 200820612, comparator COM2 will stop output system reset signal Sreset. Therefore, the power start reset circuit 1 can output a reset signal sRESET for resetting the external circuit when the divided voltage of the power supply voltage Vdd is less than the reference voltage Vbg, so as to prevent the external circuit from operating at a lower power supply voltage. under.

Figure 2 is an embodiment of a power start reset circuit. As shown, the power start reset circuit 10A includes two reset circuits 2 and 4A connected in series. The reset circuit 2 includes a resistor ri~, an M〇s transistor M1, and a comparator c〇M. The resistor is coupled between the power supply voltage Wd and the MOS transistor M1, and the M〇s transistor M1 is coupled. Between the resistor R1 and the grounding electric waste coffee, the resistor phantom and the leg transistor Μ1 form a voltage supply unit for providing the μ 〇s transistor

The threshold voltage of M1 is used as the reference voltage Vgs. The private resistance R2 is connected in series with the R3 series, the resistor R2 is lightly connected between the power supply voltage Vdd and the node N1, and the resistor R3 is connected between the ground voltage of the node N1, wherein the resistors form a voltage dividing circuit. (ie - resistor string) ' is used to divide the power supply voltage Wd to obtain the voltage V1 at the node m. The comparator c〇m has two input terminals connected to the reference voltage Vgs and the voltage νι on the node N1, the two power terminals are respectively coupled to the power supply voltage Vdd and the ground voltage, and the output terminal is coupled to the reset. Comparator c〇m2 in circuit 4-8. For example, the MOS transistor M1 can be replaced by other types of transistors, such as bi-carrier transistors (BJTs), junction field effect transistors, and the like. 0758-A32570TWF; MTKI-06-387; dennis 8 200820612 - Reset circuit 4A includes resistors R4 and R5, a bandgap reference circuit BRC, and a comparator COM2. The bandgap voltage reference circuit BRC is used to provide a reference voltage Vbg higher than the reference voltage Vgs to the comparator COM2. The resistors R4 and R5 are connected in series, and the resistors are coupled between the power supply voltage vdd and the node N2, and the resistor R5 is coupled between the node vdd and the ground voltage GND, and the resistors R4 to R5 form a point. The voltage circuit (ie, another resistor string) is used to divide the power supply voltage Vdd to obtain a voltage V2 at the node N2. The comparator COM2 includes two input terminals respectively coupled to the reference voltage Vbg and the voltage V2 on the node N2, a first power terminal connected to the output terminal of the comparator COM1, and a second power terminal coupled to the ground voltage QNd. And an output for outputting a system reset signal Sreset. The operation of the power-on reset circuit 1 〇 A is described below with reference to Figure 3. At time T1, the voltage VI is less than the reference voltage vgs, so the comparator will lower its output terminal to the ground voltage GND, which means that the comparator COM1 outputs the reset signal RS1 to the comparator c〇M2. When the reset signal RS1 is applied to the first power supply terminal of the comparator (:0)^2, even if the voltage V2 exceeds the reference voltage Vbg provided by the bandgap voltage reference circuit BRC, the comparator C0M2 will still The output is pulled low to the ground voltage GND. In other words, the system reset signal Sreset (with low logic level) is output to an external circuit (not shown). At time T2, since the voltage v 1 is still less than the reference voltage VgS Therefore, the comparator COM1 will continue to output the reset signal RS1, that is, the comparator 0758-A32570TWF; MTKI-06-387; deimis 9 200820612. The output of COM2 will be pulled down to the ground voltage GND, so that the comparator COM2 voltage at this time Why does V2 still output the system reset signal?

Sreset 0 At time T3, since the voltage V1 exceeds the reference voltage Vgs, the comparator COM1 will pull its output terminal to the power supply voltage Vdd, that is, the comparator COM1 will stop outputting the reset signal RS1. Since the first power terminal of the comparator COM2 is pulled up to the power supply voltage Vdd, the comparator COM2 outputs a system reset signal No. SRESET according to the voltage V2 and the reference voltage Vbg. Since the voltage V2 is less than the reference voltage Vbg, the comparator COM2 will continue to pull its output low to the ground voltage GND as the reset signal Sreset. At time T4, since voltage V2 exceeds reference voltage Vbg, comparator COM2 pulls its output high to supply voltage Vdd, ie comparator COM2 stops outputting system reset signal S RESET ° in short, when voltage VI is less than At the reference voltage Vgs, the reset circuit 2 outputs a reset signal RS1 so that the comparator COM2 in the reset circuit 4A outputs the system reset signal SRESET. When the voltage VI exceeds the reference voltage Vgs, the reset circuit 4A outputs a system reset signal S RESET ° according to the voltage V2 and the reference voltage Vbg. If the voltage V2 is lower than the reference voltage Vbg at this time, the comparator COM2 continues to output the system reset signal. SRESET; conversely, the comparator COM2 stops outputting the system reset signal SreSET 0. In other words, by selecting the appropriate resistors R1 R R5, when the reference voltage Vbg exceeds the voltage V2 (ie, time T1), the voltage VI can be less than the reference voltage 0758- A32570TWF; MTKI-06-387; dennis 10 200820612. Pressing Vgs causes the power start reset circuit 10A to correctly output the system reset signal S RESET to reset the external circuit at times T1-T4.

Fig. 4 is another embodiment of the power supply start reset circuit of the present invention. As shown, the power start reset circuit 10B is similar to the power start reset circuit 10 A shown in FIG. 2, except that the reset circuit 4B I ί further includes a multiplexer: AUX1, and compares The input of the COM1: the output is coupled to the multiplexer AUX1 and is not the first power supply of the comparator COM2 in the reset circuit 4A. The multiplexer AUX1 includes a first input coupled to the node Ν2, a second input coupled to the ground voltage GND, an output coupled to one of the inputs of the comparator COM2, and a control coupled Connected to the reset signal RS1 from the output of the comparator COM1. The structure and connection of other components in the reset circuit and the reset circuit 2 are similar to those shown in Fig. 2 and will not be described again. The operation of the power start reset circuit 10 is described below with reference to Fig. 3. At time Τ1, since the voltage VI is smaller than the reference voltage Vgs, the comparator COM1 pulls its output terminal to the ground voltage GND, that is, the reset signal RS1 is output to the reset circuit 4B. When the reset signal RS1 is applied to the control terminal of the multiplexer AUX1, the multiplexer AUX1 pulls one of the inputs of the comparator COM2 to the ground voltage GND. Therefore, regardless of whether the voltage V2 exceeds the bandgap voltage reference circuit reference voltage Vbg, the comparator COM2 pulls its output to the ground voltage GND. In other words, the (reset with low recursive level) system reset number Sreset will be output to an external circuit (not shown). At time T2, since the voltage VI is still less than the reference voltage Vgs, 0758-A32570TWF; MTKI-06-387; demiis 11 200820612. Therefore, the comparator COM1 will continue to output the reset signal RSI, that is, the first power terminal of the comparator COM2 is Pulling down to the ground voltage GND causes the comparator COM2 to output a system reset signal SRESET. At time T3, since the voltage VI exceeds the reference voltage Vgs, the first power terminal of the comparator COM2 is pulled up to the ground voltage GND, I Ϊ that is, the comparator COM1 stops outputting the reset signal: RS1:. Therefore, the multiplexer AUX1 couples the voltage V2 at the node N2 to the positive input of the comparator COM2. Since the voltage V2 is less than the reference voltage Vbg, the comparator COM2 will continue to pull its output low to the ground voltage GND. As the system reset signal S RESET ° at time T4, since the voltage V2 exceeds the reference voltage Vbg, it is compared. The COM2 will pull its output high to the power supply voltage Vdd, that is, the comparator COM2 stops outputting the system reset signal S RESET °. FIG. 5 is another embodiment of the power start reset circuit. As shown, the power start reset circuit 10C is similar to the power start reset circuit 10A shown in FIG. 2, with the difference that the output of the comparator COM1 in the reset circuit 2 is coupled to the resistor. One end of the ruler 4, instead of the first power terminal of the comparator COM2 in the reset circuit 4C. The other components of the reset circuit and the structure and connection of the reset circuit 2 are similar to those shown in Fig. 2 and will not be described again. The operation of the power start reset circuit 10C is explained below with reference to Fig. 6. As shown, at time T1, since the voltage VI is less than the reference voltage Vgs, the comparator COM1 pulls its output low to the ground voltage GND, i.e., the reset signal RS1 is turned to the reset circuit 4C. When the weight is 0758-A32570TWF; MTKI-06-387; dennis 12 200820612. When the signal RS1 is applied to the resistor R4, the resistors R4 and R5 are all coupled to the ground voltage GND, so the voltage V2 of the node N2 is pulled down to Ground voltage GND. Therefore, the voltage V2 will be less than the reference circuit reference voltage Vbg, so the comparator COM2 will pull its output low to the ground voltage GpD ' as the system reset number Sreset output external circuit. At time T2, since the voltage VI is still less than the reference voltage Vgs, the comparator COM1 continues to output the reset signal RS1, that is, the voltage V2 on the node N2 is also pulled down to the ground voltage GND, so that the comparator COM2 continues to output. The system reset signal SReset° with low logic level is at time T3. Since the voltage VI exceeds the reference voltage Vgs, the comparator COM1 will pull its output high to the power supply voltage Vdd, ie the comparator COM1 stops outputting at this time. Set signal RS1. Therefore, multiplexer AUX1 couples voltage V2 on node N2 to the positive input of comparator COM2. Since the voltage V2 is less than the reference voltage Vbg, the comparator COM2 continues to pull its output low to the ground voltage GND as the system reset signal SreSET. ® At time T4, since voltage V2 exceeds reference voltage Vbg, comparator COM2 pulls its output high to supply voltage Vdd, ie comparator COM2 stops outputting the reset signal Sreset. Figure 7 is an embodiment of an electronic device. As shown, the electronic device 30 includes a power supply start reset circuit 10/10A/10B/10C and a core circuit 20. For example, the power start reset circuit 10 and 10A/10B/10C are used to provide a system reset signal Sreset to reset the core circuit 20 when the power is turned on, so as to prevent the core circuit 20 from operating 0758-A32570TWF; MTKI-06 -387;deimis 13 200820612 - On a lower supply voltage. The power start reset circuit 10 and 10A 10C in the embodiment of the present invention can be used as a necessary functional component, and are applicable to an integrated circuit, such as a data converter, a phase locked loop, an oscillator, a power management circuit, Random access memory, flash memory: micro processing unit, digital signal processor, microcontroller, central processing unit, microprocessor or electronic device, such as digital camera, portable DVD, TV, on-board display , PDAs, notebook computers, mobile phones, display devices, etc. • The present invention also provides a voltage start reset method to prevent the core circuit 20 from operating at a lower supply voltage. In the voltage start reset method, when the voltage VI obtained by dividing the power supply voltage Vdd is smaller than the reference voltage Vgs, the reset circuit 2 outputs a reset signal RS1, and the reset circuit 4 is at the voltage V2. When less than the reference voltage Vbg, a system reset signal Sreset is generated to reset an external circuit. For example, the reference voltage Vgs is a threshold voltage of a MOS transistor and is smaller than the reference voltage Vbg. When the voltage VI exceeds the reference voltage Vgs, the reset circuit 2 stops outputting the reset signal RS1, and the reset circuit 4 then outputs a system reset according to the voltage V2 and the reference voltage Vbg obtained by dividing the power supply voltage Vdd. Signal Sreset. For example, if the voltage V2 is less than the reference voltage Vbg, the comparator COM2 will continue to output the system reset signal S RESET ? and when the voltage V2 exceeds the reference voltage Vbg, the comparator COM2 will stop outputting the system reset signal Sreset. Therefore, when the power supply voltage Vdd is less than the reference voltage Vbg, the power start reset circuit 10 can output the system 0758-A32570TWF; MTKI-06-387; dennis 14 200820612 reset signal sRESET is used to reset the external circuit to avoid operation A lower operating voltage. The core circuit is exemplified, as shown in the figure 2, when the voltage v1] and the voltage Vgs, the comparator COM1 will pull its output low to the reference power GND, that is, the reset signal RS1 is turned out of the f comparator. The voltage signal RS1 is applied to the comparator COM2, regardless of the voltage V2, § reset comparator COM2 will pull its output low to ground power 1

The system reset signal sRESET is output to the external circuit (not shown in Figure 8), the VI exceeds the reference voltage Vgs, and the comparator COM1 will turn the voltage of the field to the power supply voltage Vdd, that is, the comparator c〇Ml stops the wheel == The pull signal RS b is pulled up to the source voltage Vdd because the first power terminal of the comparator C0M2 is pulled, so the comparator C0M2 outputs the system reset signal sRESET according to the voltage V2 and the reference voltage Vbg. If the voltage V2 is smaller than The reference voltage Vbg, compared to the parent device COM2, will continue to pull its output low to the ground voltage GND as the system reset signal Sreset. If the voltage V2 is not less than the reference voltage Vbg, the comparator COM2 will pull its output high. To the power supply voltage Vdd, that is, the comparator COM2 will stop outputting the system reset signal Sreset. Or say, as shown in Fig. 4, the reset signal RS1 is applied to the control end of the multiplexer AUX1 (coupled to the node N2) Between the positive input terminal of the comparator COM2 and the multiplexer AUX1, when the reset signal RS1 is received, the input terminal of the comparator COM2 is pulled down to the ground voltage GND, so that the comparator COM2 is regardless of the voltage V2. Will have its output As low as the ground voltage GND. In other words, (with low logic 0758-A32570TWF; MTKI-06-387; dennis 15 200820612 - bit) system reset signal SrESET will be rotated out to the external circuit. When the voltage VI exceeds the reference voltage Vgs When the comparator COM1 pulls its output terminal to the power supply voltage Vdd, the comparator COM1 stops outputting the reset signal RS1. Therefore, the multiplexer AUX1 will connect the voltage V2 to the comparator COM2. Positive input terminal, so comparator COM2 outputs system reset signal SRESET according to voltage: V2 and reference voltage Vbg.

V2 is less than the reference voltage Vbg, comparator COM2 will continue to pull its output low to the ground voltage GND, as the system reset signal S RESET ° If the voltage V2 is not less than the reference voltage vb § 'Comparator COM2 will output it The terminal is pulled up to the power supply voltage Vdd, which means that the comparator COM2 stops outputting the system reset signal Skeset. Or, as shown in Fig. 5 and Fig. 6, when the voltage VI is smaller than the reference voltage Vgs, the comparator C〇M1 pulls its output terminal to the ground voltage GND, that is, the reset signal RS1 is output. To resistor R4 (coupled to the positive input of comparator COM2). Since the resistors R4 and R5 are both coupled to the ground voltage GND, the voltage V2 at the node N2 is pulled down to the ground voltage GND. Therefore, the voltage V2 will be less than the Mickey voltage Vbg, so the comparator COM2 will pull its output low to the ground voltage GND as the system reset signal SrEset. When the voltage V1 exceeds the reference voltage Vbg, the comparator COM1 will output its output. Pulling the power supply voltage Vdd, that is, the comparator COM1 will stop outputting the reset signal RS1. Therefore, one end of the resistor R4 is coupled to the power supply Vdd, so the voltage V2 at the node N2 can be regarded as one of the voltages of the power supply voltage Vdd. Therefore, the comparator COM2 outputs a system reset 0758-A32570TWF according to the voltage V2 and the reference voltage Vbg; MTKI-06-387; dennis 200820612 signal Sreset. If the voltage V2 is less than the voltage Vbg', COM2 will continue to pull its output low to the ground voltage GND as the system reset signal Sreset. If the voltage V2 is not less than the reference voltage Vbg 'the comparator COM2 will pull its output high to the power supply voltage Vdd, which means that the comparator COM2 will stop outputting the system reset signal S RESET ° I Ϊ although the present invention has been preferably implemented The above disclosure is not intended to limit the scope of the invention, and the scope of protection of the present invention can be applied to the appended claims without departing from the spirit and scope of the invention. The scope defined by the patent scope shall prevail. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic diagram of a power supply start reset circuit of the present invention. Figure 2 is an embodiment of a power start reset circuit. Figure 3 is an output waveform diagram of one of the power supply start reset circuits. Fig. 4 is another embodiment of the power supply start reset circuit of the present invention. Figure 5 is another embodiment of a power start reset circuit. Figure 6 is another output waveform of a power-start reset circuit. Figure 7 is an embodiment of an electronic device. [Main component symbol description] 2, 4, 4A, 4B, 4C: reset circuit; 10, 10A, 10B, 10C: power supply start reset circuit; 0758-A32570TWF; MTKI-06-387; dennis 17 200820612, 20 : core circuit; 30: electronic device; VI, V2: voltage; Vdd: power supply voltage;

Vgs, Vbg: reference voltage; RS1; reset signal; Sreset · 重置 reset number, GND · grounding? 'R1~R5: resistance, Ml: MOS transistor COM1, COM2: comparator;

Nl, N2: node; BRC: bandgap voltage reference circuit; • AUX1: multiplexer.

0758-A32570TWF; MTKI-06-387; dennis 18

Claims (1)

200820612 X. Patent application scope: 1 · A power supply start reset circuit, comprising: a first reset circuit system reset signal; and a first comparator for outputting a system of output circuits for outputting, —— /, ▼ reset signal, in order to reset the circuit, so that the above-mentioned reset circuit power μ is less than - the first reference voltage, the output system resets 13⁄4 5 tiger. 2. If you apply for a patent range! The power-on reset circuit of the above, wherein the first-reset signal is lightly connected to the first comparator: the first end: the first reset circuit is lower than the first voltage When the reference voltage is 'output the above system reset signal. 3. The power supply starting resetting power as described in the scope of claim 2, wherein the first-reset circuit further comprises an input terminal of one of the comparators for receiving the first weight. The signal is turned on, and the above-mentioned wheel terminal is pulled down to a ground voltage, so that the first reset circuit outputs the system reset signal. 4. The power supply start reset circuit of claim 1, wherein the first reset signal is coupled to an input end of the first comparator by a voltage dividing unit, such that The first reset circuit outputs the system reset signal upon receiving the first-reset signal. 5. If you apply for a patent scope! The power supply start reset circuit of the above, wherein the second reset circuit outputs the first reset signal when the first voltage exceeds the first test voltage %, and when a 0758-A32570TWF; MTKi- 06-387;dennis 19 200820612 The first comparator continues to out of the above-mentioned system when the voltage is lower than a second loss &gt; r-, tr out}·, +, each &amp; + — Reset the signal. Only the road, Ι Π Π 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利 专利踗,立1申: The monthly power supply 帛5 items of the power supply start resetting The first and second voltages are obtained by voltage-dividing a power supply voltage. 8. For the towel, please refer to the power supply start reset circuit described in item 5, wherein the above-mentioned first reference voltage is smaller than the above second reference voltage. 9. The power supply start reset circuit of claim 1 wherein the second reset circuit further comprises a voltage supply unit for providing a threshold voltage of the transistor as the first reference voltage. 10. The power supply starting reset power of claim 5, wherein the first reset circuit further comprises an energy bandgap voltage reference voltage to provide the second reference voltage. 11. A power start reset circuit, comprising: a first reset circuit for outputting a first reset signal when a divided voltage of a power supply voltage is less than a first reference voltage; and a second reset The circuit is connected in series with the first reset circuit, and includes a first comparator controlled by the first reset signal for outputting a system reset signal to reset an external circuit. 12) a power supply start reset circuit, comprising: a first reset circuit, comprising a first comparator having a first input 0758-A32570TWF; MTKI-06-387; dennis 200820612 McCaw voltage, a second The input end is coupled to the input end coupled to a first node: and the output end is configured to output a first reset signal. The 'input end #: a reset circuit' includes - the second comparator has - The second input is connected to the first reference voltage, the second input terminal is pure to the second gas, and the input end is used to rotate a series of f charge reset signals, wherein the comparison output is coupled to the above The second comparator. The third comparator further includes a power supply end coupled to the output end of the comparator, as described in claim 12, wherein the second comparator further includes a power supply terminal. ^4· The power supply starting resetting power as described in claim 12 of the patent scope includes: the second reset circuit further includes a multiplexer having a first pure to the second node, and the second input end The output terminal of the first comparator and the other terminal are coupled to the second input terminal of the second comparator. The second reset circuit of the power supply is configured to be coupled to the first input end of the upper circuit breaker and the above Between the second nodes, and a first-resistance_ between the second node and the ground voltage. The power supply starting resetting power as described in claim 12, wherein the second reset circuit further comprises: - the first resistor is connected to the upper = - between the first input terminal and the second node And the private resistance is coupled between the second node and the ground voltage. 17. The power supply starting resetting power as described in claim 12 of the scope of the patent application, wherein the first reset circuit further comprises: 〇 758 rhyme 57 瞻 κι side 7; d_s 21 200820612. a third resistor, coupled Connected between a power supply voltage and the first node; a fourth resistor coupled between the first node and the ground voltage; and a voltage supply unit for providing the first reference voltage. The power supply start reset circuit of claim 17, wherein the voltage supply unit is configured to provide a threshold voltage of a transistor as the first reference voltage. 19. The power supply start reset circuit of claim 12, wherein the second reset circuit further comprises an energy bandgap voltage reference voltage for providing the second reference voltage. 20. A power supply start reset circuit, comprising: a first reset circuit comprising: a first voltage supply unit for providing a first reference voltage; and a first comparator comprising a first input The first terminal is coupled to the first reference voltage, the second input is coupled to a first node of the first resistor string, and the output is configured to output a first reset signal, wherein the first The resistor string is coupled between a power supply voltage and a ground voltage; and a second reset circuit includes: a second voltage supply unit for providing a second reference voltage; and a second comparator, including A first input terminal is coupled to the second 0758-A32570TWF; MTKI-06-387; dennis 22 200820612 = ',: the first round, connected to one of the second resistor strings 卽&quot;, 占, and A round Ψ ** mw T brother j out &amp; Μ output a system 鲚 will be the above-mentioned comparator - the wheel end of the second line, 'one of the above-mentioned second comparator power supply side - resistance string, Or enter. ', or the second round of the above comparator, the power supply described in item 2:0 of ^中园 starts to reset the electric-critical voltage as the first 4; the supply unit of the transistor includes the energy band The gap electric circuit test circuit above the second money road, the power supply mentioned in the item starts to reset the electric input heart:: the first set;: more package?-multiplexer... grounding relocation, one control two:: point,: brother The second input terminal _ is connected to the output terminal of the first comparator, and the output terminal of the first comparator is coupled to the second input terminal of the second comparator. The power supply starting reset power-corresponding to the second resistor string described in Item 2 of Luming Patent 1 includes a first-electrode connection between the round-out end of the above-mentioned first benefit and the second node, and A second resistor # is connected between the second node and the grounding relocation. 〇758.A32570TWF;MT&amp;〇6.387;deilnis 23